Patent application number | Description | Published |
20090102535 | CLOCK SIGNAL CIRCUIT FOR MULTIPLE LOADS - A clock signal circuit for multiple loads includes a clock generator and M loads. The clock generator includes N clock generator pins which output clock signals having a same frequency. The N clock generator pins are all connected to a connection point. The connection point is connected to M loads via M transmitting lines respectively, wherein M is larger than N, M and N each is an integer greater than 2. | 04-23-2009 |
20090242244 | PRINTED CIRCUIT BOARD - An exemplary PCB includes a first reference layer, a first signal layer, and a second signal layer in that order. A first differential pair is arranged in the first signal layer in an edge-coupled structure referencing the first reference layer. A second differential pair is arranged in the second signal layer in edge-coupled structure. A first ground part and a second ground part are symmetrically arranged at opposite sides of the second differential pair in the second signal layer. The first differential pair is arranged above the first ground part and a projection of the first differential pair onto the second signal layer having an area coincident with the first ground part. The second differential pair references the first and second ground parts. | 10-01-2009 |
20090278633 | EQUALIZER AND CONNECTOR INCLUDING THE SAME - An equalizer includes a first resistor and a capacitor connected in parallel. The positive terminal of the capacitor is connected to a signal transmission line on a blah printed circuit board. The negative terminal of the capacitor is connected to ground through a second resistor. A connector including the equalizer and a printed circuit board including the connector are also provided. | 11-12-2009 |
20100321910 | PRINTED CIRCUIT BOARD - A printed circuit board includes a first signal layer, a first reference layer, a second reference layer, and a second signal layer. An integrated circuit mounted on the first signal layer includes a power supply terminal connected to a first power supply via. The second signal layer includes a filter and a power supply wire. The filter includes a power terminal connected to the first power supply via, and a ground terminal connected to the second reference layer. The first power supply via is connected to the first reference layer through the power supply wire and a second power supply via. A void defined in the second reference layer is at least partially vertically overlapping with the power supply wire, and enables the first reference layer to function as a reference plane for the power supply wire, to increase impedance of the power supply wire. | 12-23-2010 |
20110012426 | POWER SUPPLY SYSTEM AND METHOD - A power supply system includes a power supply, a daughterboard, and a motherboard. Output currents of power connectors of the motherboard and impedances of copper foils between every two adjacent power connectors of the motherboard are obtained via simulation. A voltage of one power connector of the motherboard is predetermined. Therefore, desired impedances of copper foils between VRM connectors and corresponding power connectors on the daughter board are determined via calculations, to make currents passing through the power connectors of the motherboard equal to each other. | 01-20-2011 |
20110047524 | SYSTEM AND METHOD FOR INSPECTING LAYOUT OF A PRINTED CIRCUIT BOARD - A system and method for inspecting layout of a printed circuit board (PCB) provides a graphical user interface (GUI). The GUI displays a layout of the PCB. High side pins of a pulse width modulation (PWM) controller and a component connected to a high side pin are found. If the component is a metallic oxide semiconductor field effect transistor (MOSFET), the system calculate absolute a linear distance and a trace distance between a source pin of the MOSFET and a capacitor pin of a coupling capacitor connected to the source pin. If the linear distance, the trace distance and a capacitance of the coupling capacitor accord with a layout standard, the layout of the PCB is determined to be up to standard. | 02-24-2011 |
20110051793 | SYSTEM AND METHOD FOR EVALUATING PERFORMANCE OF A MIMO ANTENNA SYSTEM - A performance evaluation system for a multiple-input multiple-output (MIMO) antenna system receives simulation parameters from an input device, and simulates a MIMO antenna system accordingly. A method, also provided, further evaluates performance of the simulated MIMO antenna system when a series of radio frequency (RF) signals are transmitted through the MIMO antenna system, and displays a performance analysis result of the MIMO antenna system on a display device for evaluation of the performance of the simulated MIMO antenna system. | 03-03-2011 |
20110093831 | SYSTEM AND METHOD FOR ANALYZING TEMPERATURE RISE OF A PRINTED CIRCUIT BOARD - A system and method that can analyze a temperature rise of a printed circuit board (PCB). The system and method receives attribute parameters of the PCB from an input device, and generates a temperature rise formula according to the received attribute parameters. Additionally, the system and method calculates a temperature rise of a local area surrounding each component on the PCB according to the temperature rise formula. | 04-21-2011 |
20110094787 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole passes through the printed circuit board. A number of thermal engravings are defined in the layer around the through hole. Each thermal engraving is a groove defined in the surface of the layer, without covered with the layer of copper. The number of thermal engravings are not in contact with each other. | 04-28-2011 |
20110106481 | SYSTEM AND METHOD FOR CHECKING GROUND VIAS OF A CONTROLLER CHIP OF A PRINTED CIRCUIT BOARD - A system and method for checking a ground via of control chips of a printed circuit board (PCB) provides a graphical user interface (GUI) displaying a layout of the PCB. The control chip has a plurality of ground pins. The computer searches for signal path routing of each ground pin and ground vias along each signal path routing of each ground pin. If there are any ground vias having the same absolute coordinates, the computer determines that the ground vias are shared by more than one ground pin. | 05-05-2011 |
20110175585 | CURRENT BALANCE CIRCUIT - A current balance circuit includes a first and a second current sensors, an averager, a first and a second control modules, and a first and a second rheostat elements. The first and second current sensors receive a first current and a second current from a power source respectively and convert the first and second currents into a first and a second voltages. The averager receives the first and second voltages and calculates to obtain an average voltage. The first and second control modules receive the first voltage, the second voltage, and the average voltage, to obtain a first and a second control signals, to control current conduction ability of the first and second rheostat elements, to make the first and second currents keep a dynamic balance. | 07-21-2011 |
20110186337 | PRINTED CIRCUIT BOARD TO PREVENT ELECTROSTATIC DISCHARGE - A printed circuit board (PCB) can prevent electrostatic discharge. A number of vias are embedded in the PCB. A circular insulated member is disposed between each via and the number of vias. Each via includes a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member. An acute angle between two tangents which pass through a point of intersection of two overlapped insulated members is greater than twenty degrees. | 08-04-2011 |
20110238233 | SYSTEM AND METHOD FOR OPTIMIZING CURRENT OVERLOAD PROTECTION CIRCUIT - A system for optimizing a current overload protection circuit includes an input device, a data storage device, a central processing device, and a display. The central processing device includes a storage module, a control module, and a calculation module. The storage module stores a VI application therein. The control module receives instructions from the input device and selects virtual electronic components of the current overload protection circuit from the data storage device and connection of the selected electronic components. The current overload protection circuit is completed and run in the VI application; electronic components significantly affecting the maximum protection current are labeled. The calculation module calculates normal distribution samples of the current overload protection circuit based on the labeled electronic components. The display shows whether the current overload protection circuit meets a process capability standard. | 09-29-2011 |
20110284279 | PRINTED CIRCUIT BOARD - A printed circuit board includes a signal layer, a dielectric layer, and a reference layer. The signal layer includes a pair of differential signal lines. The dielectric layer is sandwiched between the signal layer and the reference layer. A first void is defined in the reference layer between projections of the pair of differential signal lines. Two second voids are defined in the reference layer at opposite sides of the projections of the pair of differential signal lines. | 11-24-2011 |
20120090884 | PRINTED CIRCUIT BOARD - A printed circuit board includes a plurality of power layers. Each power layer defining a number of vias arranged in a number of rows. The number of the power layers is N (N>3). The power layers are defined as a 1st, 2nd, . . . , Nth power layer. The vias of the 1st power layer are connected to other power layers by a step-shaped connection means. | 04-19-2012 |
20120241207 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias. | 09-27-2012 |
20120243194 | PRINTED CIRCUIT BOARD - A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extends through the top layer and the bottom layer, and is electrically connected to the top layer and the bottom layer. A right-angled triangular void area without vias defined therein is formed on the printed circuit board, between the second vias and the electronic component. The second vias are arranged on a hypotenuse of the void area. | 09-27-2012 |
20120261175 | PRINTED CIRCUIT BOARD - A printed circuit board includes a first circuit area, a second circuit area, a plurality of connectors, and a connecting terminal. The first circuit area is electrically connected to the second circuit area via the connectors. The connecting terminal is placed on one side of the first circuit area for electrically connecting with a load. An imaginary center line of the connecting terminal is perpendicular to the one side of the printed circuit board. The less a horizontal distance between the center line of connecting terminal and one of the connectors, the larger a vertical distance between the side of the printed circuit board and the one of the connector. | 10-18-2012 |
20120268086 | POWER SUPPLY DEVICE - A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series. | 10-25-2012 |
20120278784 | ELECTRONIC DEVICE AND METHOD FOR CHECKING LAYOUT OF PRINTED CIRCUIT BOARD - In a method for checking layout of a printed circuit board (PCB) using an electronic device, a power line is selected from a layout diagram of the PCB. The method searches for one or more signal lines which are overlapping with the selected power line from the layout diagram of the PCB. The method further locates attribute data of the searched signal lines and the selected power line in the layout diagram of the PCB, and displays the attribute data of the searched signal lines and the selected power line on a display device of the electronic device. | 11-01-2012 |
20120292090 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) comprising a first circuit area, a second circuit area, a plurality of connecting elements, and a plurality of connecting terminals placed on the first circuit area, wherein the first circuit area are electrically connected to the second circuit area through the plurality of connecting elements, the plurality of connecting elements are arranged in sequence to extend toward the plurality of connecting terminals, to form shortest current paths from the second circuit area via corresponding one of the connecting elements to the connecting terminals, respectively, and each shortest current path between the corresponding one of the connecting elements and the corresponding one of the connecting terminals is uncoated with conductive material. | 11-22-2012 |
20120297356 | COMPUTING DEVICE AND METHOD FOR INSPECTING LAYOUT OF PRINTED CIRCUIT BOARD - In a method for inspecting the layout of a printed circuit board (PCB), a component to be checked is determined from an electronic layout diagram of the PCB, and a power transmission line which may be serving that component is selected. The layout diagram is checked to determine whether the component is connected to the power transmission line, and further checked to determine whether more than one ground pins of the component is connected to the power transmission line. Vias that are shared by two or more ground pins of the component are determined if more than one ground pin is connected to the power transmission line. Shared vias are marked on the layout diagram. | 11-22-2012 |
20120314391 | CIRCUIT BOARD AND METHOD FOR MAKING THE SAME - A circuit board includes a base board defining a number of via holes, a power supply connection unit, a load connection unit, and at least one capacitor connection unit(s). Each of the at least one capacitor connection unit(s) includes two capacitor connectors, and one of the two capacitor connectors is positioned nearer to the power supply connection unit and farther away from the load connection unit than the other. The via holes are divided into at least one group(s) corresponding to each of the capacitor connection unit(s), and all of the via holes in each of the group(s) are equidistantly positioned along a semicircle arc surrounding the capacitor connector of the capacitor connection unit corresponding to the group that is positioned nearer to the power supply connection unit. | 12-13-2012 |
20130006561 | COMPUTING DEVICE, STORAGE MEDIUM, AND METHOD FOR ANALYZING SIGNAL GROUP DELAY OF PRINTED CIRCUIT BOARD - In a method for analyzing a signal group delay of a printed circuit board (PCB) using a computing device, the computing device connects to a signal measuring device that measures S-parameters from a pair of data signal line and clock signal line of the PCB. The method analyzes a differential loss coefficient of the data signal line and the clock signal line based on the S-parameters, and calculates a first signal delay of the data signal line and a second signal delay of the clock signal line according to the differential loss coefficient. The method further analyzes a signal group delay of the PCB according to the first signal delay and the second signal delay, and displays the signal group delay on a display device if the signal group delay does not satisfy a PCB design specification. | 01-03-2013 |
20130007690 | ELECTRONIC DEVICE AND SIMULATION METHOD FOR CHECKING PRINTED CIRCUIT BOARD POWER LOSS - An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned. | 01-03-2013 |
20130055190 | COMPUTING DEVICE AND METHOD FOR CHECKING DESIGN OF PRINTED CIRCUIT BOARD LAYOUT FILE - A computing device reads a printed circuit board (PCB) layout file from a storage device. The PCB layout file includes arrangement information of signal lines, power lines, and power through-holes arranged on a PCB. Furthermore, the computing device sets a reference distance between a selected power through-hole and a neighboring signal line, and searches for one or more line segments of one or more signal lines where the a distance between each of the one or more line segment and the selected power through-hole is less than the reference distance. | 02-28-2013 |
20130204558 | ELECTRONIC DEVICE AND METHOD FOR CALCULATING EFFICIENCY OF SIMULATIVE POWER SUPPLY SYSTEM - A method for calculating efficiency of a power supply system includes: displaying a parameter selection interface on the display unit for selecting power supply parameters and transmission line parameters. Obtaining power supply parameters and transmission line parameters selected by the user via the parameter selection interface when determining the user has finished the selection. Determining a efficiency of a selected power supply of the power supply parameters according to the relationship table, and calculating a sum efficiency according to the obtained power supply parameters and the transmission line parameters and the efficiency of the selected power supply. And calculating a total efficiency of the power supply system according to each sum efficiency when determining that all of the power supplies of the power supply system have been selected. | 08-08-2013 |
20130284508 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material. | 10-31-2013 |