Patent application number | Description | Published |
20110074084 | PRINTER - A printer includes a printer body, a tray, and an actuating device. The printer body is capable of outputting file paper from a paper output opening. The tray is attached to the printer body configured for holding file paper. The actuating device is attached to the tray capable of moving the file paper in the tray to a predetermined position. | 03-31-2011 |
20110074097 | PAPER-OUT MECHANISM FOR PRINTING APPARATUS - A paper-out mechanism for a printing apparatus, includes a paper out wall and a paper out board. The paper out wall defines a paper out opening via which a printing apparatus discharges printed papers out. The paper out opening includes a first edge and a second edge facing to the first edge. The paper out board is slidably mounted on the paper out wall below the paper out opening. The paper out board is capable of receiving printed papers discharged from the paper out opening. The paper out board includes an adapter portion which includes a first side and a second side. A distance between the first side and second side is greater than a distance between the first edge and the second edge. The paper out board is slidable between a first position and a second position. In the first position, the first side of the adapter portion is in alignment with the first edge of the paper out opening. In the second position, the second side of the adapter portion is in alignment with the second edge of the paper out opening. | 03-31-2011 |
20110074104 | PAPER SORTING APPARATUS AND ELECTRONIC DEVICE WITH PAPER SORTING APPARATUS - A paper sorting apparatus for an electronic device includes a chassis with a control module disposed therein, a paper transporting module accommodated in the chassis, and a plurality of paper trays attached to the chassis. The paper transporting module has a first end, that is pivotable, and a second end, that is attached to the control module. The control module is capable of rotating the second end about the first end and coupling the second end with one of the paper trays. | 03-31-2011 |
20110095495 | RACK WITH WHEELS - A rack includes a chassis, and a plurality of wheel assemblies secured to the chassis. Each wheel assembly includes a bracket, a wheel, and a handle. The bracket is rotatable relative to the chassis between a first position and a second position. Each wheel is capable of rotating about an axis. A distance between the axis and the chassis when each bracket is in the first position is less than a distance between the axis and the chassis when the bracket is in the second position. The handle is secured to the bracket and configured to rotate the corresponding bracket, and extends inside the chassis. | 04-28-2011 |
20110095497 | SUPPORTING DEVICE WITH WHEELS - A supporting device includes a tray, a plurality of wheel assemblies, a handle, and a handgrip. The tray is configured for supporting a payload. The wheel assemblies are secured to the tray, and each wheel assembly includes a wheel. Each wheel is capable of rotating about a first axis. The wheel assemblies are rotatable between a first position and a second position, and a distance between each wheel and the tray in the first position is smaller than a distance between each wheel and the tray in the second position. The handle is attached to the tray and configured to urge the wheel assemblies to rotate from the first position to the second position. The handgrip is attached to the tray and configured to urge the wheel assemblies to rotate from the second position to the first position. | 04-28-2011 |
20110123247 | PRINTER WITH BRACKET FOR PAPER TRAY - A printer includes a main body, a bracket, a lifting mechanism, and a paper tray. The main body is capable of printing and outputting paper. The bracket is attached to the main body. The lifting mechanism is secured to the bracket and includes a retaining plate. The retaining plate is moveable between a first position, where a first distance is defined between the retaining plate and the bracket, and a second position, where a second distance is defined between the retaining plate and the bracket and is less than the first distance. The paper tray is configured for receiving the paper. The retaining plate is moved from the second position to the first position when the paper tray is inserted into the bracket, and moved from the first position to the second position when the paper tray is released. | 05-26-2011 |
20110129272 | PRINTER WITH BRACKET FOR HOLDING PAPER TRAY - A printer includes a main body for printing and outputting paper, a bracket attached to the main body, a driving mechanism, and a tray for receiving the paper. The bracket includes two sidewalls. A retaining member is secured to each sidewall. A first spring member is secured between each retaining member and the corresponding sidewall. The driving mechanisms are secured to the sidewalls. Each driving mechanism includes a sliding member slidable on the sidewall. The tray is received in the bracket. The tray has tray posts. The sliding members are slid to bring the tray. The tray posts slide the retaining members from a first position to a second position before passing across the retaining members, and the retaining members are slid from the second position to the first position by rebounding of the first springs after the tray posts pass across the retaining members. | 06-02-2011 |
20110129282 | PRINTER WITH BRACKET FOR HOLDING PAPER TRAY - A printer includes a main body capable of printing and outputting paper, a bracket attached to the main body, two sliding blocks, and a tray configured for receiving the paper. The bracket includes two sidewalls. A retaining member is secured to each sidewall. The sliding blocks are slidably attached to the sidewalls of the bracket. The tray is received in the bracket and has tray posts corresponding to the retaining members. The sliding blocks bring the tray to slide in the bracket. The retaining members have a first position, where the tray posts urge the retaining members to slide before passing across the retaining members, and a second position, where the tray posts are blocked by the retaining member when the tray is released from the sliding blocks. | 06-02-2011 |
20110133401 | ELECTRONIC DEVICE WITH PAPER SORTING APPARATUS - An electronic device includes a main body and a plurality of paper trays. The main body includes a mounting plate, and the mounting plate defines a paper outlet. A mounting bracket is secured to the main body. A control module is disposed on the mounting bracket. A driving member is connected to the paper trays. The control module is capable of causing the driving member to move the paper trays along a direction parallel to the mounting plate, so that one of the paper trays is aligned with the paper outlet. | 06-09-2011 |
20110148030 | PRINTER WITH PAPER HOLDING DEVICE - A printer includes a main body and a paper holding device. The main body is capable of printing and outputting paper. The paper holding device is secured to the main body, and includes a paper tray, a plurality of sliding members, a connecting mechanism, and a driving mechanism. The paper tray is configured for receiving the outputted paper. The sliding members are slidably located on the paper tray. The connecting mechanism is attached to the paper tray and connected to the sliding members. The driving mechanism is attached to the paper tray and capable of driving the connecting mechanism to slide the plurality of sliding members to shape a space to fit the size of outputted paper. | 06-23-2011 |
20110148031 | PAPER HOLDING DEVICE AND PRINTER WITH THE PAPER HOLDING DEVICE - A paper holding device includes a paper tray, a sliding plate, and a driving mechanism. The paper tray is configured for receiving printed paper. A shaft is secured to the paper tray. The sliding plate is slidably attached to the paper tray. A main gear member is disposed on the sliding plate. The driving mechanism is secured to the sliding plate and capable of sliding the main gear member along the shaft to slide the sliding plate on the paper tray. | 06-23-2011 |
20110148032 | PAPER HOLDING DEVICE AND PRINTER WITH PAPER HOLDING DEVICE - A printer includes a main body and a paper holding device. The main body is capable of printing and outputting paper. The paper holding device is secured to the main body and includes a paper tray, a connecting mechanism, and a sliding mechanism. The paper tray is configured for receiving the outputted paper. A driving gear member is located on the paper tray. The connecting mechanism is located on the paper tray and connected to the driving gear member. The sliding mechanism is located on the paper tray and connected to the connecting mechanism. The driving gear member controls the sliding mechanism by the connecting mechanism to shape a space to fit the size of the outputted paper. | 06-23-2011 |
20110169209 | PRINTING DEVICE - A printing device includes a main body and a paper holding device. The main body is capable of printing and dispensing paper. The paper holding device is secured to the main body and includes a bracket, a paper tray, a paper adjusting mechanism, and a punch mechanism. The bracket is secured to the main body. The paper tray is secured to the bracket for receiving the dispensed paper. The paper adjusting mechanism is capable of aligning the dispensed paper. The punch mechanism is capable of binding the dispensed paper. The main body dispenses the paper between the paper adjusting mechanism and the punch mechanism. | 07-14-2011 |
20120043869 | SERVER RACK - A server rack includes a frame, a support, and a securing member. The frame includes a first pole and a second pole connected to the first pole. The support is connected to the first pole and the second pole. The securing member includes a first fastening section, a second fastening section connected to the first fastening section, and a third fastening section connected to the first fastening section and the second fastening section. The first fastening section is received in the first pole, the second fastening section is received in the second pole, and the third fastening section is received in the support. The first fastening section and the second fastening section are located on a first plane, and the third fastening section is located on a second plane substantially perpendicular to the first plane. The first fastening section, the second fastening section, and the third fastening section share a base wall. | 02-23-2012 |
Patent application number | Description | Published |
20110020994 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A method of forming a semiconductor device is described. First, a substrate is provided. Thereafter, a gate structure including, from bottom to top, a high-k layer, a work function metal layer, a wetting layer, a polysilicon layer and a mask layer is formed on the substrate. Afterwards, a spacer is formed on the sidewall of the gate structure. Source/drain regions are then formed in the substrate beside the gate structure. Further, an interlayer dielectric layer is formed over the substrate. Thereafter, a portion of the interlayer dielectric layer is removed to expose the surface of the mask layer. Afterwards, the mask layer and the polysilicon layer are sequentially removed to expose the surface of the wetting layer. A selective chemical vapor deposition process is then performed, so as to bottom-up deposit a metal layer from the surface of the wetting layer. | 01-27-2011 |
20110062524 | GATE STRUCTURES OF CMOS DEVICE AND METHOD FOR MANUFACTURING THE SAME - Gate structures of CMOS device and the method for manufacturing the same are provided. A substrate having an NMOS region, a PMOS region, and a work function modulation layer disposed on the NMOS region and the PMOS region is provided. A nitrogen doping process is performed to dope nitrogen into a portion of the work function modulation layer disposed on the PMOS region so as to form an N-rich work function modulation layer disposed on the PMOS region. A nonmetallic conductive layer is formed blanketly covering the work function modulation layer and the N-rich work function modulation layer. A portion of the nonmetallic conductive layer, the work function modulation layer, and the N-rich work function modulation layer is removed to form a first gate in the NMOS region and a second gate in the PMOS region. | 03-17-2011 |
20110070702 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is provided. A high dielectric constant (high-k) layer and a work function metal layer are formed in sequence on a substrate. A hard mask layer is formed on the work function metal layer, where the material of the hard mask layer is lanthanum oxide. The work function metal layer is patterned by using the hard mask layer as a mask. The hard mask layer is then removed. Afterwards, a gate structure is formed on the substrate. | 03-24-2011 |
20110079854 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device and a method for fabricating the same are described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a bottom, and a neck arranged between the top and the bottom, where the width of the neck is narrower than that of the top. A dielectric layer is formed on the substrate to cover the substrate disposed between adjacent dummy patterns, and the top of each dummy pattern is exposed. Thereafter, the dummy patterns are removed to form a plurality of trenches in the dielectric layer. A plurality of gate structures is formed in the trenches, respectively. | 04-07-2011 |
20110140206 | SEMICONDUCTOR DEVICE - A semiconductor device including a substrate, a gate structure, a spacer and source/drain regions is provided. The gate structure is on the substrate, wherein the gate structure includes, from bottom to top, a high-k layer, a work function metal layer, a wetting layer and a metal layer. The spacer is on a sidewall of the gate structure. The source/drain regions are in the substrate beside the gate structure. | 06-16-2011 |
20110140207 | METAL GATE STRUCTURE AND METHOD OF FORMING THE SAME - The metal gate structure of the present invention can include a TiN complex, and the N/Ti proportion of the TiN complex is decreased from bottom to top. In one embodiment, the TiN complex can include a single TiN layer, which has an N/Ti proportion gradually decreasing from bottom to top. In another embodiment, the TiN complex can include a plurality of TiN layers stacking together. In such a case, the lowest TiN layer has a higher N/Ti proportion than the adjusted TiN layer. | 06-16-2011 |
20120034747 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a bottom, and a neck arranged between the top and the bottom, where the width of the neck is narrower than that of the top. A dielectric layer is formed on the substrate to cover the substrate disposed between adjacent dummy patterns, and the top of each dummy pattern is exposed. Thereafter, the dummy patterns are removed to form a plurality of trenches in the dielectric layer. A plurality of gate structures is formed in the trenches, respectively. | 02-09-2012 |
20120070995 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating a metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a first transistor region and a second transistor region; forming a first metal-oxide semiconductor (MOS) transistor on the first transistor region and a second MOS transistor on the second transistor region, in which the first MOS transistor includes a first dummy gate and the second MOS transistor comprises a second dummy gate; forming a patterned hard mask on the second MOS transistor, in which the hard mask includes at least one metal atom; and using the patterned hard mask to remove the first dummy gate of the first MOS transistor. | 03-22-2012 |
20120146101 | MULTI-GATE TRANSISTOR DEVICES AND MANUFACTURING METHOD THEREOF - A method for manufacturing multi-gate transistor devices includes providing a semiconductor substrate having a first patterned hard mask for defining at least a first fin formed thereon, forming the first fin having a first crystal plane orientation on the semiconductor substrate, forming a second patterned hard mask for defining at least a second fin on the semiconductor substrate, forming the second fin having a second crystal plane orientation that is different from the first crystal plane orientation on the semiconductor substrate, forming a gate dielectric layer and a gate layer covering a portion of the first fin and a portion of the second fin on the semiconductor substrate, and forming a first source/drain in the first fin and a second source/drain in the second fin, respectively. | 06-14-2012 |
20120199888 | FIN FIELD-EFFECT TRANSISTOR STRUCTURE - A fin field-effect transistor structure includes a silicon substrate, a fin channel, a gate insulator layer and a gate conductor layer. The fin channel is formed on a surface of the silicon substrate, wherein the fin channel has at least one slant surface. The gate insulator layer formed on the slant surface of the fin channel. The gate conductor layer formed on the gate insulator layer. | 08-09-2012 |
Patent application number | Description | Published |
20080233662 | Advanced Process Control for Semiconductor Processing - An advanced process control (APC) method for semiconductor fabrication is provided. A first substrate and a second substrate are provided. The first substrate and the second substrate include a dielectric layer. A first etch process parameter for the first substrate is determined. A trench is etched in the dielectric layer of the first substrate using the first etch process parameter. At least one aspect of the etched trench of the first substrate is measured. A second etch process parameter for the second substrate is determined using the measured aspect of the etched trench of the first substrate. A planarization process parameter for the first substrate is determined also using the measured aspect of the etched trench of the first substrate. | 09-25-2008 |
20080305563 | Method and system for controlling copper chemical mechanical polish uniformity - A system and method for controlling resistivity uniformity in a Copper trench structure by controlling the CMP process is provided. A preferred embodiment comprises a system and a method in which a plurality of CMP process recipes may be created comprising at least a slurry arm position. A set of metrological data for at least one layer of the semiconductor substrate may be estimated, and an optimum CMP process recipe may be selected based on the set of metrological data. The optimum CMP process recipe may be implemented on the semiconductor substrate. | 12-11-2008 |
20090248187 | ADVANCED PROCESS CONTROL FOR SEMICONDUCTOR PROCESSING - A computer comprising a recordable medium on which is stored instructions for at least one model-based, run-to-run controller routine is provided. The computer includes instructions to receive a first dataset regarding a first wafer after a first process, to determine a process parameter for the first process for a second wafer using the first dataset; and to determine a second process parameter for a second process for the first wafer using the first dataset. In an embodiment, the first process is an etch process. In an embodiment, the second process is a planarization process. | 10-01-2009 |
20110054819 | Method and System for Modeling in Semiconductor Fabrication - A method for use in semiconductor fabrication is provided that includes providing manufacturing data of a semiconductor process, providing a plurality of functional transformations, optimizing each of the functional transformations based on the manufacturing data, selecting one of the functional transformations that has a least deviation with respect to the manufacturing data, predicting performance of the semiconductor process using the selected transformation function, and controlling a fabrication tool based on the predicted performance. | 03-03-2011 |
20120239178 | DEVICE PERFORMANCE PARMETER TUNING METHOD AND SYSTEM - A method comprises computing respective regression models for each of a plurality of failure bins based on a plurality of failures identified during wafer electrical tests. Each regression model outputs a wafer yield measure as a function of a plurality of device performance variables. For each failure bin, sensitivity of the wafer yield measure to each of the plurality of device performance variables is determined, and the device performance variables are ranked with respect to sensitivity of the wafer yield measure. A subset of the device performance variables which have highest rankings and which have less than a threshold correlation with each other are selected. The wafer yield measures for each failure bin corresponding to one of the selected subset of device performance variables are combined, to provide a combined wafer yield measure. At least one new process parameter value is selected to effect a change in the one device performance variable, based on the combined wafer yield measure. The at least one new process parameter value is to be used to process at least one additional wafer. | 09-20-2012 |
20140100684 | 2D/3D Analysis for Abnormal Tools and Stages Diagnosis - A method for analyzing abnormalities in a semiconductor processing system provides performing an analysis of variance on a production history associated with each of a plurality of tools at each of a plurality of process steps for each of a plurality of processed wafers, and key process steps are identified. A regression analysis on a plurality of measurements of the plurality of wafers at each process step is performed and key measurement parameters are identified. An analysis of covariance on the key measurement parameters and key process steps, and the key process steps are ranked based on an f-ratio, therein ranking an abnormality of the key process steps. Further, the plurality of tools associated with each of the key process steps are ranked based on an orthogonal t-ratio associated with an analysis of covariance, therein ranking an abnormality each tool associated with the key process steps. | 04-10-2014 |
Patent application number | Description | Published |
20120220113 | Method of Manufacturing Semiconductor Device Having Metal Gate - The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench and then a first metal layer and a first material layer are formed in the first trench. Next, the first metal layer and the first material layer are flattened. The second sacrifice gate is removed to form a second trench and then a second metal layer and a second material layer are formed in the second trench. Lastly, the second metal layer and the second material layer are flattened. | 08-30-2012 |
20120256276 | Metal Gate and Fabricating Method Thereof - A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O | 10-11-2012 |
20120313178 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 12-13-2012 |
20120326243 | TRANSISTOR HAVING ALUMINUM METAL GATE AND METHOD OF MAKING THE SAME - A transistor having an aluminum metal gate includes a substrate, a high-k gate dielectric layer, an aluminum metal gate and a source/drain region. The high-k gate dielectric layer is disposed on the substrate. The aluminum metal gate includes a work function tuning layer and an aluminum metal layer disposed orderly on the high-k gate dielectric layer, where the aluminum metal layer comprises a first aluminum metal layer and a second aluminum metal layer. Furthermore, the source/drain region is disposed in the substrate at each of two sides of the aluminum metal gate. | 12-27-2012 |
20130043506 | Fin-FET and Method of Forming the Same - A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure. | 02-21-2013 |
20130078818 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure. | 03-28-2013 |
20130113027 | Metal Oxide Semiconductor Transistor and Manufacturing Method Thereof - The present invention provides a MOS transistor, including a substrate, a gate oxide, a gate, a source/drain region and a silicide layer. The gate oxide is disposed on the substrate and the gate is disposed on the gate oxide. The source/drain region is disposed in the substrate at two sides of the gate. The silicide layer is disposed on the source/drain region, wherein the silicide layer includes a curved bottom surface. The present invention further provides a manufacturing method of the MOS transistor. | 05-09-2013 |
20130113053 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a substrate, a dielectric layer and a fluoride metal layer. The dielectric layer is located on the substrate. The fluoride metal layer is located on the dielectric layer. Furthermore, the present invention also provides a semiconductor process to form said semiconductor structure. | 05-09-2013 |
20130115777 | MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURES - A manufacturing method for semiconductor structures includes providing a substrate having a first region and a second region defined thereon, forming a plurality of first patterns in the first region and at least a second pattern in the second region, forming a plurality of first spacers respectively on sidewalls of the first patterns and at least a second spacer on a sidewall of the second pattern, forming a patterned protecting layer in the second region, removing the first patterns from the first region to form a plurality of first masking patterns in the first region and at least a second masking pattern in the second region, and transferring the first masking patterns and the second masking pattern to the substrate. | 05-09-2013 |
20130200470 | SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME - A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin structure, forming a plurality of epitaxial structures covering said fin structures, performing a gate pullback process to reduce the critical dimension (CD) of said gate and separate said gate and said epitaxial structures, forming lightly doped drains (LDD) in said fin structures, and forming a spacer on said gate and said fin structures. | 08-08-2013 |
20130277686 | Semiconductor Structure with Metal Gate and Method of Fabricating the Same - A metal gate process comprises the steps of providing a substrate, forming a dummy gate on said substrate, forming dummy spacers on at least one of the surrounding sidewalls of said dummy gate, forming a source and a drain respectively in said substrate at both sides of said dummy gate, performing a replacement metal gate process to replace said dummy gate with a metal gate, removing said dummy spacers, and forming low-K spacers to replace said dummy spacers. | 10-24-2013 |
20130307126 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a stacked metal oxide layer on a substrate, wherein the stacked metal oxide layer includes a first metal oxide layer, a second metal oxide layer, and a third metal oxide layer from top to bottom, and the energy bandgap of the second metal oxide layer is lower than the energy bandgap of the first metal oxide layer and that of the third metal oxide layer. The semiconductor structure includes a metal oxide layer on a substrate, wherein the energy bandgap of the metal oxide layer changes along a direction perpendicular to the surface of the substrate. The present invention also provides a semiconductor process forming said semiconductor structure. | 11-21-2013 |
20140077229 | SEMICONDUCTOR STRUCTURE - A non-planar semiconductor structure comprises a substrate, at least one fin structure on the substrate, a gate covering parts of the fin structures and part of the substrate such that the fin structure is divided into a channel region stacking with the gate and source/drain region at both sides of the gate, a plurality of epitaxial structures covering on the source/drain region of the fin structures, a recess is provided between the channel region of the fin structure and the epitaxial structure, and a spacer formed on the sidewalls of the gate and the epitaxial structures, wherein the portion of the spacer filling in the recesses is flush with the top surface of the epitaxial structures. | 03-20-2014 |
20140103443 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A semiconductor device having a metal gate includes a substrate having a first gate trench and a second gate trench formed thereon, a gate dielectric layer respectively formed in the first gate trench and the second gate trench, a first work function metal layer formed on the gate dielectric layer in the first gate trench and the second gate trench, a second work function metal layer respectively formed in the first gate trench and the second gate trench, and a filling metal layer formed on the second work function metal layer. An opening width of the second gate trench is larger than an opening width of the first gate trench. An upper area of the second work function metal layer in the first gate trench is wider than a lower area of the second work function metal layer in the first gate trench. | 04-17-2014 |
20140113425 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes the following steps. At first, at least a gate structure is formed on a substrate. Subsequently, a first material layer and a second material layer sequentially formed on the substrate conformally cover the gate structure. Subsequently, an implantation process is performed on the second material layer, and a wet etching process is further performed to remove a part of the second material layer to form a remaining second material layer. Furthermore, a dry etching process is performed to remove a part of the remaining second material layer to form a partial spacer. | 04-24-2014 |
20140127892 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 05-08-2014 |
20140256136 | METHOD FOR FORMING FIN-SHAPED STRUCTURES - The present invention provides a method for forming a fin structure comprising the following steps: first, a multiple-layer structure is formed on a substrate; then, a sacrificial pattern is formed on the multiple-layer structure, a spacer is formed on the sidewall of the sacrificial pattern and disposed on the multiple-layer structure, the sacrificial pattern is removed, the spacer is used as a cap layer to etch parts of the multiple-layer structure, and then the multiple-layer structure is used as a cap layer to etch the substrate and to form at least one fin structure in the substrate. | 09-11-2014 |
20140339652 | SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES - A semiconductor device with oxygen-containing metal gates includes a substrate, a gate dielectric layer and a multi-layered stack structure. The multi-layered stack structure is disposed on the substrate. At least one layer of the multi-layered stack structure includes a work function metal layer. The concentration of oxygen in the side of one layer of the multi-layered stack structure closer to the gate dielectric layer is less than that in the side of one layer of the multi-layered stack structure opposite to the gate dielectric layer. | 11-20-2014 |
20150017781 | METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE - A method of forming a shallow trench isolation structure is disclosed. Hard mask patterns are formed on a substrate. A portion of the substrate is removed, using the hard mask patterns as a mask, to form first trenches in the substrate, wherein a fin is disposed between the neighboring first trenches. A filling layer is formed in the first trenches. A patterned mask layer is formed on the filling layer. A portion of the filling layer and a portion of the fins are removed, using the patterned mask layer as a mask, to form second trenches in the substrate. A first insulating layer is formed on the substrate filling in the second trenches. | 01-15-2015 |
20150061041 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME - A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench. | 03-05-2015 |
20150069533 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a semiconductor device having metal gate includes following steps. A substrate having at least a first semiconductor device formed thereon is provided. The first semiconductor device includes a first gate trench formed therein. Next, an n-typed work function metal layer is formed in the first gate trench. After forming the n-typed work function metal layer, a nitridation process is performed to form a first protecting layer on the n-typed work function metal layer. After forming the first protecting layer, an oxidation process is performed to the first protecting layer to form a second protecting layer on the n-typed work function metal layer. Then, a gap filling metal layer is formed to fill up the first gate trench. | 03-12-2015 |
20150076623 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a dummy gate on each of the NMOS region and the PMOS region respectively; removing the dummy gates from each of the NMOS region and the PMOS region; forming a n-type work function layer on the NMOS region and the PMOS region; removing the n-type work function layer in the PMOS region; forming a p-type work function layer on the NMOS region and the PMOS region; and depositing a low resistance metal layer on the p-type work function layer of the NMOS region and the PMOS region. | 03-19-2015 |