Patent application number | Description | Published |
20100272310 | MICROCAP ACOUSTIC TRANSDUCER DEVICE - A device includes a first wafer, a second wafer, a gasket bonding the first wafer to the second wafer to define a cavity between the first wafer and the second wafer, and an acoustic transducer disposed on the first wafer and disposed within the cavity between the first wafer and the second wafer. One or more apertures are provided for communicating an acoustic signal between the acoustic transducer and an exterior of the device. An aperture may be formed in the cavity itself, or the cavity may be hermetically sealed. An aperture may be formed completely through the first wafer and located directly beneath at least a portion of the acoustic transducer. | 10-28-2010 |
20100278368 | MICROMACHINED HORN - An acoustic device includes a transducer formed on a first surface of a substrate and an acoustic horn formed in the substrate by a dry-etching process through an opposing second surface of the substrate. The acoustic horn is positioned to amplify sound waves from the transducer and defines a non-linear cross-sectional profile. | 11-04-2010 |
20100327697 | Acoustic resonator structure comprising a bridge - An acoustic resonator comprises a first electrode a second electrode and a piezoelectric layer disposed between the first and second electrodes. The acoustic resonator further comprises a reflective element disposed beneath the first electrode, the second electrode and the piezoelectric layer. An overlap of the reflective element, the first electrode, the second electrode and the piezoelectric layer comprises an active area of the acoustic resonator. The acoustic resonator also comprises a bridge adjacent to a termination of the active area of the acoustic resonator. | 12-30-2010 |
20100327701 | Piezoelectric resonator structures having temperature compensation - An electrical resonator comprises a substrate comprising a cavity. The electrical resonator comprises a resonator stack suspended over the cavity. The resonator stack comprises a first electrode; a second electrode; a piezoelectric layer; and a temperature compensating layer comprising borosilicate glass (BSG). | 12-30-2010 |
20100327702 | TEMPERATURE CONTROL OF MICROMACHINED TRANSDUCERS - A micromachined structure, comprises a substrate and a cavity in the substrate. The micromachined structure comprises a membrane layer disposed over the substrate and spanning the cavity. | 12-30-2010 |
20100327994 | ACOUSTIC RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION - An acoustic resonator comprises a first electrode and second electrode comprising a plurality of sides. At least one of the sides of the second electrode comprises a cantilevered portion. A piezoelectric layer is disposed between the first and second electrodes. An electrical filter comprises an acoustic resonator. | 12-30-2010 |
20110088234 | TEMPERATURE CONTROL OF MICROMACHINED TRANSDUCERS - A micromachined structure, comprises a substrate and a cavity in the substrate. The micromachined structure comprises a membrane layer disposed over the substrate and spanning the cavity. | 04-21-2011 |
20110121689 | POLARITY DETERMINING SEED LAYER AND METHOD OF FABRICATING PIEZOELECTRIC MATERIALS WITH SPECIFIC C-AXIS - An acoustic resonator comprises a first electrode, a second electrode and a piezoelectric layer disposed between the first electrode and the second electrode, and comprising a C-axis having an orientation. A polarization-determining seed layer (PDSL) is disposed beneath the piezoelectric layer, the seed layer comprising a metal-nonmetal compound. A method of fabricating a piezoelectric layer over a substrate comprises forming a first layer of a polarization determining seed layer (PDSL) over the substrate. The method further comprises forming a second layer of the PDSL over the first layer. The method further comprises forming a first layer of a piezoelectric material over the second layer of the PDSL; and forming a second layer of the piezoelectric material over the first layer of the piezoelectric material. The piezoelectric material comprises a compression axis (C-axis) oriented along a first direction. | 05-26-2011 |
20110291207 | TRANSDUCER DEVICES HAVING DIFFERENT FREQUENCIES BASED ON LAYER THICKNESSES AND METHOD OF FABRICATING THE SAME - A transducer array on a common substrate includes a membrane and first and second transducer devices. The membrane is formed on the common substrate, and includes a lower layer and an upper layer. The first transducer device includes a first resonator stack formed on at least the lower layer in a first portion of the membrane, the upper layer having a first thickness in the first portion of the membrane. The second transducer device includes a second resonator stack formed on at least the lower layer in a second portion of the membrane, the upper layer having a second thickness in the second portion of the membrane, where the second thickness is different from the first thickness, such that a first resonant frequency of the first transducer device is different from a second resonant frequency of the second transducer device. | 12-01-2011 |
20120096697 | METHOD OF FORMING ACOUSTIC RESONATOR USING INTERVENING SEED LAYER - A method of forming an acoustic resonator includes forming a seed layer on a first electrode layer, forming a piezoelectric layer directly on a surface of the seed layer, and forming a second electrode layer on the piezoelectric layer. The piezoelectric layer includes multiple crystals of piezoelectric material, and the seed layer causes crystal axis orientations of the crystals to be substantially perpendicular to the surface of the seed layer. | 04-26-2012 |
20120098625 | ELECTROSTATIC BONDING OF A DIE SUBSTRATE TO A PACKAGE SUBSTRATE - A transducer apparatus comprises a package substrate and a transducer disposed over a die substrate. The die substrate is disposed over the package substrate. The transducer apparatus also comprises a voltage source connected between the die substrate and the package substrate, and configured to selectively apply an electrostatic attractive force between the die substrate and the package substrate. | 04-26-2012 |
20120161902 | SOLID MOUNT BULK ACOUSTIC WAVE RESONATOR STRUCTURE COMPRISING A BRIDGE - A solid mount bulk acoustic wave resonator, comprises a first electrode; a second electrode; a piezoelectric layer disposed between the first and second electrodes; and an acoustic reflector comprising a plurality of layers and disposed beneath the first electrode, the second electrode and the piezoelectric layer, An overlap of the acoustic reflector, the first electrode, the second electrode and the piezoelectric layer defines an active area of the acoustic resonator, and the piezoelectric layer extends over an edge of the first electrode. The acoustic resonator also comprises a bridge adjacent to a termination of the active area of the acoustic resonator. The bridge overlaps a portion of the first electrode. | 06-28-2012 |
20120194297 | ACOUSTIC RESONATOR STRUCTURE COMPRISING A BRIDGE - An acoustic resonator comprises a first electrode a second electrode and a piezoelectric layer disposed between the first and second electrodes. The acoustic resonator further comprises a reflective element disposed beneath the first electrode, the second electrode and the piezoelectric layer. An overlap of the reflective element, the first electrode, the second electrode and the piezoelectric layer comprises an active area of the acoustic resonator. The acoustic resonator also comprises a bridge adjacent to a termination of the active area of the acoustic resonator. | 08-02-2012 |
20120206015 | ACOUSTIC RESONATOR STRUCTURE COMPRISING A BRIDGE - An acoustic resonator comprises a first electrode a second electrode and a piezoelectric layer disposed between the first and second electrodes. The acoustic resonator further comprises a reflective element disposed beneath the first electrode, the second electrode and the piezoelectric layer. An overlap of the reflective element, the first electrode, the second electrode and the piezoelectric layer comprises an active area of the acoustic resonator. The acoustic resonator also comprises a bridge adjacent to a termination of the active area of the acoustic resonator. | 08-16-2012 |
20120218057 | FILM BULK ACOUSTIC RESONATOR COMPRISING A BRIDGE - A film bulk acoustic resonator (FBAR) structure includes a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode, and a second electrode disposed over the first piezoelectric layer. A bridge is disposed between the first electrode and the piezoelectric layer. | 08-30-2012 |
20120269372 | MICROMACHINED HORN - An acoustic device includes a transducer formed on a first surface of a substrate and an acoustic horn formed in the substrate by a dry-etching process through an opposing second surface of the substrate. The acoustic horn is positioned to amplify sound waves from the transducer and defines a non-linear cross-sectional profile. | 10-25-2012 |
20120293278 | STACKED BULK ACOUSTIC RESONATOR COMPRISING DISTRIBUTED BRAGG REFLECTOR - A device comprises a substrate, an acoustic stack, and a distributed Bragg reflector. The acoustic stack comprises a first electrode formed on the substrate, a first piezoelectric layer formed on the first electrode, a second electrode formed on the first piezoelectric layer, a second piezoelectric layer formed on the second electrode, and a third electrode formed on the second piezoelectric layer. The distributed Bragg reflector is formed adjacent to the acoustic stack and provides it with acoustic isolation. | 11-22-2012 |
20120326807 | ACOUSTIC RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION - An acoustic resonator comprises (a) a substrate having atop surface and a bottom surface, a first end portion and an opposite, second end portion, and a body portion defined therebetween; (b) an acoustic mirror having a top surface and a bottom surface, a first end portion and an opposite, second end portion, and a body portion defined therebetween, wherein the bottom surface is formed on the top surface of the substrate; (c) a first electrode having a top surface and a bottom surface, a first end portion and an opposite, second end portion, and a body portion defined therebetween, wherein the bottom surface is formed on the top surface of the acoustic mirror; (d) a piezoelectric layer having a top surface and a bottom surface, a first end portion and an opposite, second end portion, and a body portion defined therebetween, wherein the bottom surface is formed on the top surface of the first electrode; and (e) a second electrode having a top surface and a bottom surface, a first end portion and an opposite, second end portion, and a body portion defined therebetween. The bottom surface is formed on the top surface of the piezoelectric layer, wherein the overlapped area of body portions of the substrate, the acoustic mirror, the first electrode, the piezoelectric layer and the second electrode is defined as an active area A. | 12-27-2012 |
20130038408 | BULK ACOUSTIC WAVE RESONATOR DEVICE COMPRISING AN ACOUSTIC REFLECTOR AND A BRIDGE - A bulk acoustic wave (BAW) resonator device includes an acoustic reflector formed over a substrate and a resonator stack formed over the acoustic reflector. The acoustic reflector includes multiple acoustic impedance layers. The resonator stack includes a first electrode formed over the acoustic reflector, a piezoelectric layer formed over the first electrode, and a second electrode formed over the piezoelectric layer. A bridge is formed within one of the acoustic reflector and the resonator stack. | 02-14-2013 |
20130106534 | PLANARIZED ELECTRODE FOR IMPROVED PERFORMANCE IN BULK ACOUSTIC RESONATORS | 05-02-2013 |
20130193808 | FILM BULK ACOUSTIC RESONATOR WITH MULTI-LAYERS OF DIFFERENT PIEZOELECTRIC MATERIALS AND METHOD OF MAKING - A thin film bulk acoustic resonator (FBAR) includes a first electrode, a first piezoelectric layer having a first c-axis orientation and on the first electrode, a second piezoelectric layer having a second c-axis orientation over the first piezoelectric layer, and a second electrode on the second piezoelectric layer. The first and second piezoelectric layers are made of respective different piezoelectric materials. The FBAR can be set to have different resonance frequencies by selecting the first and second c-axis orientations to be respectively the same or different. The high and low frequency range of the FBAR can thus be extended. | 08-01-2013 |
20130314177 | ACOUSTIC RESONATOR COMPRISING COLLAR, FRAME AND PERIMETER DISTRIBUTED BRAGG REFLECTOR - An acoustic resonator includes a bottom electrode disposed over a substrate, a piezoelectric layer disposed over the bottom electrode, a top electrode disposed over the piezoelectric layer, and a cavity disposed beneath the bottom electrode. An overlap of the bottom electrode, the piezoelectric layer and the top electrode defines a main membrane region of the acoustic resonator structure. The acoustic resonator further includes an acoustic reflector disposed over the substrate adjacent to the cavity, the acoustic reflector including a layer of low acoustic impedance material stacked on a layer of high acoustic impedance material. | 11-28-2013 |
20140111288 | ACOUSTIC RESONATOR HAVING GUARD RING - A bulk acoustic wave (BAW) resonator structure comprises a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode, a second electrode disposed over the first piezoelectric layer, and a guard ring structure formed around a perimeter of an active region corresponding to an overlap of the first electrode, the first piezoelectric layer, and the second electrode. | 04-24-2014 |
20140118087 | ACOUSTIC RESONATOR COMPRISING COLLAR AND FRAME - An acoustic resonator structure comprises a first electrode disposed on a substrate, a piezoelectric layer disposed on the first electrode, a second electrode disposed on the piezoelectric layer, a frame disposed within a main membrane region defined by an overlap between the first electrode, the piezoelectric layer, and the second electrode, and having an outer edge substantially aligned with a boundary of the main membrane region, and a collar formed separate from the frame, disposed outside the main membrane region, and having an inner edge substantially aligned with the boundary of or overlapping the main membrane region. | 05-01-2014 |
20140118088 | ACCOUSTIC RESONATOR HAVING COMPOSITE ELECTRODES WITH INTEGRATED LATERAL FEATURES - A bulk acoustic wave (BAW) resonator device includes a bottom electrode on a substrate over one of a cavity and an acoustic reflector, a piezoelectric layer on the bottom electrode, and a top electrode on the piezoelectric layer. At one of the bottom electrode and the top electrode is a composite electrode having an integrated lateral feature, arranged between planar top and bottom surfaces of the composite electrode and configured to create a cut-off frequency mismatch. | 05-01-2014 |
20140118089 | BULK ACOUSTIC WAVE RESONATOR HAVING DOPED PIEZOELECTRIC LAYER WITH IMPROVED PIEZOELECTRIC CHARACTERISTICS - A bulk acoustic wave (BAW) resonator structure includes a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode and a second electrode disposed over the first piezoelectric layer. The piezoelectric layer is formed of a piezoelectric material doped with one of erbium or yittrium at an atomic percentage of greater than three for improving piezoelectric properties of the piezoelectric layer. | 05-01-2014 |
20140118090 | BULK ACOUSTIC WAVE RESONATOR HAVING PIEZOELECTRIC LAYER WITH MULTIPLE DOPANTS - A bulk acoustic wave (BAW) resonator structure includes a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode and a second electrode disposed over the first piezoelectric layer. The piezoelectric layer is formed of a piezoelectric material doped with multiple rare earth elements for improving piezoelectric properties of the piezoelectric layer. | 05-01-2014 |
20140118091 | ACOUSTIC RESONATOR HAVING COLLAR STRUCTURE - A bulk acoustic wave (BAW) resonator structure comprises a first electrode disposed over a substrate, a first piezoelectric layer disposed over the first electrode, a second electrode disposed over the first piezoelectric layer, and a collar structure disposed around a perimeter of an active region defined by an overlap between the first electrode, the second electrode, and the piezoelectric layer. | 05-01-2014 |
20140118092 | ACCOUSTIC RESONATOR HAVING INTEGRATED LATERAL FEATURE AND TEMPERATURE COMPENSATION FEATURE - A bulk acoustic wave (BAW) resonator device includes a bottom electrode on a substrate over one of a cavity and an acoustic mirror, a piezoelectric layer on the bottom electrode, a top electrode on the piezoelectric layer, and a temperature compensation feature having positive temperature coefficient for offsetting at least a portion of a negative temperature coefficient of the piezoelectric layer. At least one of the bottom electrode and the top electrode includes an integrated lateral feature configured to create at least one of a cut-off frequency mismatch and an acoustic impedance mismatch. | 05-01-2014 |
20140125202 | BULK ACOUSTIC WAVE (BAW) RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION AND A PIEZOELECTRIC LAYER WITH MULTIPLE DOPANTS - A bulk acoustic wave (BAW) resonator, comprises: a first electrode; a second electrode comprising a plurality of sides. At least one of the sides comprises a cantilevered portion. The bulk acoustic wave (BAW) resonator also comprises a piezoelectric layer disposed between the first and second electrodes. The piezoelectric layer comprises a piezoelectric material doped with a plurality of rare earth elements, and the cantilevered portion extends above the piezoelectric layer. The bulk acoustic wave (BAW) resonator comprises a gap between the cantilevered portion and the piezoelectric layer. | 05-08-2014 |
20140125203 | BULK ACOUSTIC WAVE (BAW) RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION AND A PIEZOELECTRIC LAYER WITH VARYING AMOUNTS OF DOPANT - A bulk acoustic wave (BAW) resonator, comprises: a first electrode; a second electrode comprising a plurality of sides. At least one of the sides comprises a cantilevered portion. The bulk acoustic wave (BAW) resonator also comprises a piezoelectric layer disposed between the first and second electrodes. The piezoelectric layer comprises a piezoelectric material doped with a plurality of rare earth elements, and the cantilevered portion extends above the piezoelectric layer. The bulk acoustic wave (BAW) resonator comprises a gap between the cantilevered portion and the piezoelectric layer. | 05-08-2014 |
20140139077 | ACOUSTIC RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION - An acoustic resonator comprises a first electrode and second electrode comprising a plurality of sides. At least one of the sides of the second electrode comprises a cantilevered portion. A piezoelectric layer is disposed between the first and second electrodes. A bridge disposed adjacent to one of the sides of the second electrode. | 05-22-2014 |
20140152152 | ACOUSTIC RESONATOR COMPRISING TEMPERATURE COMPENSATING LAYER AND PERIMETER DISTRIBUTED BRAGG REFLECTOR - An acoustic resonator structure includes a bottom electrode disposed on a substrate, a piezoelectric layer disposed on the bottom electrode, a top electrode disposed on the piezoelectric layer, a cavity disposed beneath the bottom electrode, and a temperature compensating feature. The temperature compensating feature has a positive temperature coefficient for offsetting at least a portion of a negative temperature coefficient of the piezoelectric and electrode layers. The acoustic resonator structure further includes an acoustic reflector disposed over the substrate around a perimeter of the cavity. The acoustic reflector includes a layer of low acoustic impedance material stacked on a layer of high acoustic impedance material. | 06-05-2014 |
20140159548 | ACOUSTIC RESONATOR COMPRISING COLLAR AND ACOUSTIC REFLECTOR WITH TEMPERATURE COMPENSATING LAYER - An acoustic resonator structure includes an acoustic reflector over a cavity formed in a substrate, the acoustic reflector including a layer of low acoustic impedance material stacked on a layer of high acoustic impedance material. The acoustic resonator further includes a bottom electrode on the layer of low acoustic impedance material, a piezoelectric layer on the bottom electrode, a top electrode on the piezoelectric layer, and a collar formed outside a main membrane region defined by an overlap between the top electrode, the piezoelectric layer and the bottom electrode. The collar has an inner edge substantially aligned with a boundary of or overlapping the main membrane region. The layer of the low acoustic impedance material includes a temperature compensating material having a positive temperature coefficient for offsetting at least a portion of a negative temperature coefficient of the piezoelectric layer, the bottom electrode and the top electrode. | 06-12-2014 |
20140174908 | SCANDIUM-ALUMINUM ALLOY SPUTTERING TARGETS - A sputtering target comprises an alloy of scandium and aluminum, wherein the alloy has a concentration of 3-10 at % scandium and 90-97 at % aluminum. The sputtering target can be used to produce a piezoelectric layer for an apparatus such as an acoustic resonator. | 06-26-2014 |
20140175950 | ACOUSTIC RESONATOR COMPRISING ALUMINUM SCANDIUM NITRIDE AND TEMPERATURE COMPENSATION FEATURE - An acoustic resonator structure comprises a first electrode disposed on a substrate, a piezoelectric layer disposed on the first electrode and comprising aluminum scandium nitride, a second electrode disposed on the piezoelectric layer, and a temperature compensation feature having a temperature coefficient offsetting at least a portion of a temperature coefficient of the piezoelectric layer, the first electrode, and the second electrode. | 06-26-2014 |
20140354109 | BULK ACOUSTIC WAVE RESONATOR HAVING PIEZOELECTRIC LAYER WITH VARYING AMOUNTS OF DOPANT - A bulk acoustic wave (BAW) resonator structure includes a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode, and a second electrode disposed over the piezoelectric layer. The piezoelectric layer includes undoped piezoelectric material and doped piezoelectric material, where the doped piezoelectric material is doped with at least one rare earth element, for improving piezoelectric properties of the piezoelectric layer and reducing compressive stress. | 12-04-2014 |
20140354115 | SOLIDLY MOUNTED ACOUSTIC RESONATOR HAVING MULTIPLE LATERAL FEATURES - A solidly mounted resonator (SMR) includes an acoustic resonator on a substrate, the acoustic resonator having multiple acoustic impedance layers having different acoustic impedances, respectively. The SMR further includes a bottom electrode on a top acoustic impedance layer of the plurality of acoustic impedance layers, a piezoelectric layer on the bottom electrode, a top electrode on the piezoelectric layer, and multiple lateral features on a surface of the top electrode. The lateral features include multiple stepped structures. | 12-04-2014 |
20150240349 | MAGNETRON SPUTTERING DEVICE AND METHOD OF FABRICATING THIN FILM USING MAGNETRON SPUTTERING DEVICE - A method is provided for depositing a thin film of material on a substrate. The method includes providing the substrate on a cathode and a target on an anode in a reaction chamber of a magnetron sputtering device, generating a magnetic field using an enhanced magnetron including an upper base plate to generate an upper magnetic field having a field strength of about 205 gauss and a lower base plate to generate a lower magnetic field having a field strength of about −215 gauss to about −370 gauss, injecting sputtering gas at low pressure into the reaction chamber, and applying power across the anode and cathode to create plasma. Ions from the plasma sputter atoms of at least one element from the target, which are deposited on the substrate to form the thin film. Power density of the power is in a range of about 20 W/cm | 08-27-2015 |
20150244346 | BULK ACOUSTIC WAVE RESONATORS HAVING DOPED PIEZOELECTRIC MATERIAL AND FRAME ELEMENTS - A bulk acoustic wave (BAW) resonator includes a first electrode; a second electrode; and a piezoelectric layer disposed between the first and second electrodes. The piezoelectric layer includes a piezoelectric material doped with at least one rare earth element. In an embodiment, the BAW resonator includes a recessed frame element disposed over a surface of at least one of the first and second electrodes. In another embodiment, the BAW resonator includes a raised frame element disposed over a surface of at least one of the first and second electrodes. In yet another embodiment, the BAW resonator includes both the raised and recessed frame elements. | 08-27-2015 |
20150244347 | BULK ACOUSTIC WAVE RESONATOR HAVING DOPED PIEZOELECTRIC LAYER - In accordance with a representative embodiment, a bulk acoustic wave (BAW) resonator comprises: a first electrode having a first electrode thickness; a second electrode having a second electrode thickness; and a piezoelectric layer having a piezoelectric layer thickness and being disposed between the first and second electrodes, the piezoelectric layer comprising a piezoelectric material doped with at least one rare earth element. For a particular acoustic coupling coefficient (kt | 08-27-2015 |
20150280687 | ACOUSTIC RESONATOR COMPRISING ACOUSTIC REDISTRIBUTION LAYERS AND LATERAL FEATURES - An acoustic resonator device including a piezoelectric layer, a first electrode disposed adjacent to a first surface of the piezoelectric layer, and a second electrode disposed adjacent to a second surface of the piezoelectric layer. At least one of the first electrode and the second electrode includes a first conductive layer disposed adjacent to the piezoelectric layer and having a first acoustic impedance, and a second conductive layer disposed on a side of the first conductive layer opposite the piezoelectric layer and having a second acoustic impedance greater than the first acoustic impedance. The acoustic resonator device further includes at least one lateral feature for increasing quality factor Q of the acoustic resonator structure. The at least one lateral feature includes at least one of an air-ring between the piezoelectric layer and the second electrode, and a frame on at least one of the first electrode and the piezoelectric layer. | 10-01-2015 |
20150311046 | FABRICATING LOW-DEFECT RARE-EARTH DOPED PIEZOELECTRIC LAYER - A plasma vapor deposition (PVD) system and method for depositing a piezoelectric layer over a substrate are disclosed. A plasma is created in a reaction chamber creates from the sputtering gas supplied to the reaction chamber. The plasma sputters atoms from the sputtering target, which are deposited on the substrate for forming the thin film of the material. | 10-29-2015 |
20150318837 | ACOUSTIC RESONATOR DEVICE WITH AIR-RING AND TEMPERATURE COMPENSATING LAYER - A bulk acoustic wave (BAW) resonator device includes a substrate defining a cavity, a bottom electrode formed over the substrate and at least a portion of the cavity, a piezoelectric layer formed on the bottom electrode, and a top electrode formed on the piezoelectric layer. An air-wing and an air-bridge are formed between the piezoelectric layer and the top electrode, the air-wing having an inner edge that defines an outer boundary of an active region of the BAW resonator device. The BAW resonator device further includes a temperature compensation feature having positive temperature coefficient for offsetting at least a portion of a negative temperature coefficient of the piezoelectric layer. The temperature compensation feature extends outside the active region by a predetermined length. | 11-05-2015 |
20150326200 | Bulk Acoustic Wave Devices with Temperature-Compensating Niobium Alloy Electrodes - A bulk acoustic wave (BAW) resonator having a first electrode, a second electrode, and a piezoelectric layer between the first electrode and the second electrode. The first electrode is of a first electrode material. The second electrode is of a second electrode material. The piezoelectric layer is of a piezoelectric material doped with at least one rare earth element. The BAW resonator has a resonant frequency dependent at least in part on respective thicknesses and materials of the first electrode, the second electrode and the piezoelectric layer. The resonant frequency has a temperature coefficient. At least one of the first electrode and the second electrode includes a niobium alloy electrode material that, relative to molybdenum as the electrode material, reduces the temperature coefficient of the resonant frequency of the BAW resonator. | 11-12-2015 |
20150341015 | ELECTRICAL RESONATOR - An acoustic resonator comprises a substrate comprising a cavity. The electrical resonator comprises a resonator stack suspended over the cavity. The resonator stack comprises a first electrode; a second electrode; a piezoelectric layer; and a temperature compensating layer comprising borosilicate glass (BSG). | 11-26-2015 |
Patent application number | Description | Published |
20080298131 | INTEGRATED CIRCUIT FEATURING A NON-VOLATILE MEMORY WITH CHARGE/DISCHARGE RAMP RATE CONTROL AND METHOD THEREFOR - An integrated circuit ( | 12-04-2008 |
20090034339 | NON-VOLATILE MEMORY HAVING A DYNAMICALLY ADJUSTABLE SOFT PROGRAM VERIFY VOLTAGE LEVEL AND METHOD THEREFOR - An erase operation in a non-volatile memory includes selecting a block on which to perform an erase operation, erasing the selected block, receiving test data corresponding to the selected block, determining a soft program verify voltage level based on the test data, and soft programming the erased selected block using the soft program verify voltage level. A non-volatile memory includes a plurality of blocks, a test block which stores test data corresponding to each of the plurality of blocks, and a flash control coupled to the plurality of blocks and the test block, the flash control determining a soft program verify voltage level for a particular block of the plurality of blocks based on the test data for the particular block when the particular block is being soft programmed. | 02-05-2009 |
20090034352 | METHOD AND CIRCUIT FOR PREVENTING HIGH VOLTAGE MEMORY DISTURB - A circuit and method reduces disturb in a memory array resulting from one of two supply voltages dropping below a predetermined value. Memory control logic is operated using a logic power domain. Higher voltages than that of the logic power domain are generated in response to an oscillator oscillating. The higher voltages are used to operate the memory array. Operation of the oscillator is controlled with the memory control logic when the logic power domain is at least at a first level or value. The oscillator is disabled when the logic power domain is below the first level. The disabling of the oscillator has the effect of preventing generation of the higher voltages. This facilitates preventing the higher voltages from reaching the memory array when they may not be properly controlled. | 02-05-2009 |
20090059629 | VOLTAGE REGULATOR FOR INTEGRATED CIRCUITS - A voltage regulator for a charge pump includes a capacitor divider and a reset circuit. The capacitor divider produces, based on an input voltage (VPP), a sample voltage at a sampling node. The sampling node and a reference voltage VREF are connected to respective inputs of a comparator that generates an enable signal for the charge pump. The reset circuit connects to the divider and includes a first transistor connected between the sampling node and a biasing node. During a sampling mode, the reset circuit biases VDS of the first transistor to approximately zero at the regulation point to minimize subthreshold IDS. During reset intervals, the reset circuit applies VREF to the biasing node. The reset circuit may include a second transistor connected between the biasing node and a known level (e.g., ground) and a biasing transistor connected between the biasing node and VREF. | 03-05-2009 |
20090140795 | HIGH-DYNAMIC RANGE LOW RIPPLE VOLTAGE MULTIPLIER - A voltage multiplier ( | 06-04-2009 |
20110025379 | LATCHED COMPARATOR AND METHODS THEREFOR - A compare cycle of a comparator includes a precharge phase and a compare phase. During the precharge phase, a node of the comparator is precharged to a defined voltage. In addition, during the precharge phase an input transistor of the comparator is decoupled from the node. During the compare phase, an input voltage is coupled to the node via the input transistor. The input transistor is maintained in saturation during both the precharge phase and the compare phase, reducing switching noise. | 02-03-2011 |
20110057694 | REGULATOR HAVING INTERLEAVED LATCHES - A charge pump system ( | 03-10-2011 |
20110221410 | CURRENT INJECTOR CIRCUIT FOR SUPPLYING A LOAD TRANSIENT IN AN INTEGRATED CIRCUIT - A current injector circuit comprises a clock modulating circuit, a first current injector, a feedback circuit, a first input modulating circuit and a second current injector. The clock modulating circuit receives a clock, a control signal, and an output. The first current injector has an input coupled to the clock modulating circuit, and an output coupled to a power supply terminal for providing a first current. The feedback circuit is coupled between the power supply terminal and another input of the clock modulating circuit. The feedback circuit is for providing the control signal for controlling the clock modulating circuit. The first current injector provides the first current in response to the clock modulating circuit. The first input modulating circuit receives an input signal, the control signal, and an output. The second current injector has an input coupled to the first input modulating circuit, and an output for providing a second current. | 09-15-2011 |
20120014179 | SOFT PROGRAM OF A NON-VOLATILE MEMORY BLOCK - A method includes erasing bits and identifying bits that have been over-erased by the erasing. A first subset of the bits that have been over-erased are soft programmed. The results of soft programming the first subset of bits is measured. An initial voltage condition from a plurality of possible voltage conditions based on the results from soft programming the first subset of bits is selected. A second subset of bits that have been over-erased are soft programmed. The soft programming applies the initial voltage condition to the bits in the second subset of bits. The second subset comprises bits that are still over-erased when the step of selecting occurs. The result is that the soft programming for the second subset may begin at a more optimum point for quickly achieving the needed soft programming to bring all of the bits within the desired erase condition. | 01-19-2012 |
20120113714 | METHOD FOR PROGRAMMING A MULTI-STATE NON-VOLATILE MEMORY (NVM) - A method is provided for programming a multi-state flash memory having a plurality of memory cells. A first programming pulse is provided to the flash array; determining a threshold voltage distribution for the plurality of memory cells after providing the first programming pulse. The plurality of memory cells is categorized into at least two bins based on a threshold voltage of each memory cell of the plurality of memory cells. A first voltage is selected for a second programming pulse for programming a first bin of memory cells of the at least two bins, the first voltage based on both a threshold voltage of the first bin and a first target threshold voltage. A second voltage is selected for a third programming pulse for programming a second bin of memory cells of the at least two bins, the second voltage based on both the threshold voltage of the second bin and on a second target threshold voltage. | 05-10-2012 |
20120117307 | NON-VOLATILE MEMORY (NVM) ERASE OPERATION WITH BROWNOUT RECOVERY TECHNIQUE - A method for erasing a non-volatile memory includes: performing a first pre-erase program step on the non-volatile memory; determining that the non-volatile memory failed to program correctly during the first pre-erase program step; performing a first soft program step on the non-volatile memory in response to determining that the non-volatile memory failed to program correctly; determining that the non-volatile memory soft programmed correctly; performing a second pre-erase program step on the non-volatile memory in response to determining that the non-volatile memory soft programmed correctly during the first soft program step; and performing an erase step on the non-volatile memory. The method may be performed using a non-volatile memory controller. | 05-10-2012 |
20120201082 | ERASE RAMP PULSE WIDTH CONTROL FOR NON-VOLATILE MEMORY - A method of erasing a memory block of a non-volatile memory, including setting a pulse width of erase pulses to an initial width, repeatedly applying erase pulses to the memory block until the memory block meets an erase metric or until a maximum number of erase pulses have been applied, gradually adjusting a pulse voltage magnitude of the erase pulses from an initial pulse voltage level to a maximum pulse voltage level, and reducing the width of the erase pulses to less than the initial width when the pulse voltage magnitude reaches an intermediate voltage level between the initial pulse voltage level and the maximum pulse voltage level. Thus, narrow pulses are applied at higher voltage levels to reduce the amount of over erasure of the memory block. | 08-09-2012 |
20140022022 | ERROR DETECTION AT AN OSCILLATOR - An error detection system employs a chain of delay elements connected in an open loop configuration. To determine whether the oscillator is operating within a specified set of parameters, the error detection system applies a start pulse to an input of the open-loop chain of delay elements. The error detection system compares the resulting output signal with the output of the oscillator. If the oscillator has locked onto a harmonic of the intended output frequency, the comparison of the output signals will indicate an error. | 01-23-2014 |
20140140161 | NON-VOLATILE MEMORY ROBUST START-UP USING ANALOG-TO-DIGITAL CONVERTER - In accordance with at least one embodiment, an onboard analog-to-digital converter (ADC) on a system-on-a-chip (SOC) is utilized to determine whether a charge pump output for a non-volatile memory (NVM) is correct or not. The SOC is directed to wait until the output is within an expected range before moving to the next step in a start-up procedure. If the maximum allowed start-up time is exceeded, an error signal is sent to the SOC such that the application can react to it. | 05-22-2014 |
20140145699 | SYSTEMS AND METHODS FOR CONTROLLING POWER IN SEMICONDUCTOR CIRCUITS - A power control circuit includes a plurality of transistors coupled between a power supply node and a gated power supply node, wherein the gate electrode of a first transistor of the plurality of transistors is coupled to receive a power control signal, wherein, in response to assertion of the power control signal, the first transistor is placed into a conductive state; a first voltage comparator, wherein, in response to assertion of the power control signal, places a second transistor of the plurality of transistors in a conductive state when a voltage on the gated voltage supply node reaches a first reference voltage; and a second voltage comparator, wherein, in response to assertion of the power control signal, places a third transistor of the plurality of transistors in a conductive state when the voltage on the gated voltage supply node reaches a second reference voltage different from the first reference voltage. | 05-29-2014 |
20140145765 | VOLTAGE RAMP-UP PROTECTION - Systems and methods for voltage ramp-up protection. In an illustrative, non-limiting embodiment, a method may include monitoring at least one of a first node or a second node, the first node configured to receive a first voltage greater than a second voltage present at a second node, and, in response to a slew rate of the first voltage creating a sneak condition between the first node and the second node, counteracting the sneak condition. For example, the sneak condition may favor an excess current to flow from the first node to the second node. In some cases, counteracting the sneak condition may include maintaining the second voltage below at or below a predetermined value. | 05-29-2014 |
20140204694 | SYSTEMS AND METHODS FOR ADAPTIVE SOFT PROGRAMMING FOR NON-VOLATILE MEMORY USING TEMPERATURE SENSOR - Erasing of a non-volatile memory (NVM) having an array of bit cells includes soft programming after an initial erasing of the bit cells. Over-erased bit cells are determined. A temperature is detected. A first soft program gate voltage based on the temperature is provided. Soft programming on the over-erased bit cells using the first soft program gate voltage is performed. Any remaining over-erased bit cells are identified. if there are any remaining over-erased bit cells, soft programming is performed on the remaining over-erased bit cells using a second soft program gate voltage incremented from the first soft program gate voltage. | 07-24-2014 |
20140241091 | SENSE AMPLIFIER VOLTAGE REGULATOR - A memory is disclosed that includes a plurality of memory cells, a plurality of sense amplifiers for reading data of the memory cells, and a voltage regulator coupled to the plurality of sense amplifiers. The voltage regulator includes a reference sense amplifier, a current injector, and a current injector control circuit. The current injector control circuit controls an amount of current provided by the current injector to an output node of the voltage regulator based on a voltage of the reference sense amplifier. | 08-28-2014 |
20140254285 | Temperature-Based Adaptive Erase or Program Parallelism - A method includes, in one implementation, performing a memory operation to place memory cells of a memory array to a first logic state using a voltage of a charge pump. A portion of the operation is performed on the memory cells using the voltage of the charge pump. A temperature of the memory array is compared to a threshold. If the temperature is above a reference level, a load on the charge pump is reduced by providing the voltage to only a reduced number of memory cells. | 09-11-2014 |
20140269132 | NEGATIVE CHARGE PUMP REGULATION - A negative charge pump is responsive to a pump enable signal. A voltage controlled current source provides a current. A resistor is coupled between a node from the voltage controlled current source and a negative charge output from the negative charge pump. A capacitor is placed in parallel with the resistor. A comparator generates the pump enable signal to control the negative charge pump. The comparator is coupled to the resistor and the capacitor and measures an IR drop thereacross and compares this measurement against a reference threshold. A level of the pump enable signal can be variable by tuning an amount of resistance of the resistor or capacitor or adjusting the reference threshold. A memory can be driven by a method of the negative charge pump. | 09-18-2014 |
20150371711 | CONTROL GATE DRIVER FOR USE WITH SPLIT GATE MEMORY CELLS - A circuit for driving a control gate of a split-gate nonvolatile memory cell may include a switched current source; a first transistor having a current electrode coupled to the switched current source and a control electrode coupled to a voltage source; a second transistor having a current electrode coupled to a second node of the switched current source, and a control electrode coupled to a third voltage source; a third transistor having a control electrode coupled to the second transistor, a current electrode coupled to the first transistor and a fourth switched voltage source; and a fourth transistor having a current electrode coupled to the first switched voltage source, a control electrode coupled to the switched current source, and a second current electrode coupled to the second transistor at a driver voltage node, wherein a voltage level at the driver voltage node is operable to drive the control gate. | 12-24-2015 |
20160064092 | FLASH MEMORY WITH IMPROVED READ PERFORMANCE - A non-volatile memory device includes an array of memory cells and a plurality of word lines and voltage supply lines. Each memory cell of the array is coupled to one of the word lines. Each of the plurality of voltage supply lines is coupled to a first voltage supply terminal of a subset of memory cells of a plurality of subsets of memory cells of the array. Each subset includes a plurality of memory cells. A voltage switch supplies a respective one of a plurality of aged voltages to each of the plurality of subsets of memory cells in the memory array on respective ones of the voltage supply lines. The aged voltage supplied to a first of the plurality of subsets of memory cells is different than the aged voltage supplied to a second of the plurality of subsets of memory cells. | 03-03-2016 |