Patent application number | Description | Published |
20140070352 | Stress Release Layout and Associated Methods and Devices - An embodiment semiconductor device includes a substrate such as a silicon or silicon-containing film, a pixel array supported by the substrate, and a metal stress release feature arranged around a periphery of the pixel array. The metal stress release feature may be formed from metal strips or discrete metal elements. The metal stress release feature may be arranged in a stress release pattern that uses a single line or a plurality of lines. The metal stress release pattern may also use metal corner elements at ends of the lines. | 03-13-2014 |
20150130001 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid and a plurality of color filters. In the image sensor, the grid has a first portion and a second portion disposed on the first portion. The second portion of the grid can cause reflection or refraction of incident lights targeted for one image sensor element back into the same image sensor element, so as to avoid crosstalk occurred. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150130002 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid, a light-tight layer and a plurality of color filters. In the image sensor, the grid has a top surface, and the light-tight layer is disposed on the top surface of the grid. Due to the light-tight layer on the grid, an incident light entering into the grid can be blocked by the light-tight layer, so that the crosstalk effect is reduced significantly. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150145083 | Structure Of Dielectric Grid For A Semiconductor Device - An image sensor device and a method for manufacturing the image sensor device are provided. An image sensor device includes a pixel region and a non-pixel region in a substrate. In the pixel region there is a plurality of sensor elements. The non-pixel region is adjacent to the pixel region and has no sensor element. Dielectric grids are disposed in the pixel region with a first dielectric trench between two adjacent dielectric grids. The first dielectric trench aligns to a respective sensor element. Second dielectric trenches are disposed in the non-pixel region. | 05-28-2015 |
20150311247 | METHOD AND APPARATUS FOR FORMING BACK SIDE ILLUMINATED IMAGE SENSORS WITH EMBEDDED COLOR FILTERS - A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. The radiation-sensing regions are separated by a plurality of gaps. A plurality of radiation-blocking structures is disposed over the second side of the substrate. Each of the radiation-blocking structures is aligned with a respective one of the gaps. A plurality of color filters are disposed in between the radiation-blocking structures. | 10-29-2015 |
Patent application number | Description | Published |
20090053840 | HIGH POWER LIGHT EMITTING DEVICE ASSEMBLY WITH ESD PROTECTION ABILITY AND THE METHOD OF MANUFACTURING THE SAME - A high power light emitting device assembly with electro-static-discharge (ESD) protection ability and the method of manufacturing the same, the assembly comprising: at least two sub-mounts, respectively being electrically connected to an anode electrode and a cathode electrode, each being made of a metal of high electric conductivity and high thermal conductivity; a light emitting device, arranged on the sub-mounts; and an ESD protection die, sandwiched and glued between the sub-mounts, for enabling the high-power operating light emitting device to have good heat dissipating path while preventing the same to be damaged by transient power overload of static surge. | 02-26-2009 |
20100149614 | OPTICAL SCANNER - An optical scanner including a substrate, a driving component, and an optical reflector is provided. The driving component is disposed on the substrate and has a first hole. The driving component can swing about a first axis by a time-varied magnetic force. The optical reflector has a reflective surface and is disposed in the first hole. The optical reflector can swing about a second axis by a Lorentz force. The first axis is essentially perpendicular to the second axis. The first axis and the second axis are both essentially parallel to the reflective surface. | 06-17-2010 |
20110164226 | SYSTEM AND METHOD FOR PROJECTION CORRECTION - A method for projection correction includes following steps. An original image is projected as a projection image on an object. A projection-zone image including the projection image is captured from the object. A projection image outline corresponding to the projection image is obtained from the projection-zone image. An operation is performed on the projection image outline to obtain a horizontal inclination and a vertical inclination. The original image is pre-warped according to the horizontal inclination and the vertical inclination to obtain a corrected image, and the corrected image is projected on the object. | 07-07-2011 |
20110194164 | OPTICAL MULTI-RING SCANNER - An optical multi-ring scanner is disclosed, which comprises: a substrate; an outer ring driving element, disposed inside the substrate and configured symmetrically at two sides thereof with a pair of first arms that are connected respectively to the substrate; at least one inner ring driving element, each configured with a first inner ring driver in a manner that the first inner ring driver has a pair of second arms symmetrically disposed at a top side and a bottom side thereof while being connected to the outer ring driving element; and a mirror element, disposed inside the first inner ring driver and having a pair of third arms symmetrically disposed at a top side of a bottom side thereof; wherein, the third arm is disposed coaxial with the second arm while enabling the first arm to be disposed perpendicular to the second arm and the third arm. | 08-11-2011 |
20120154882 | OPTICAL SCANNING PROJECTION SYSTEM - An optical scanning projection system includes a scanning light source component, a second reflecting element, a transparent element, a scanning element, a photosensitive element and a control module. The transparent element receives a main light beam emitted by the scanning light source component and reflects a part of the main light beam to be a reflected light. The reflected light is reflected by the second reflecting element, and the scanning element reflects the reflected light from the second reflecting element in a scanning manner. The photosensitive element receives the reflected light from the scanning element and outputs a sensing signal, and the control module actuates or stops actuating the scanning light source component according to the sensing signal. Therefore, when the scanning element is damaged, the control module may instantly stop actuating the scanning light source component, thereby enhancing the using safety of the optical scanning projection system. | 06-21-2012 |
20130181109 | OPTICAL SCANNING PROJECTION MODULE - An optical scanning projection module includes a scanning light component including a plurality of sub light sources and at least one light-splitting element, a main light reflective element, a scanning element and a photosensitive element. Sub light beams of the sub light sources are converged to form a main light beam. One of the sub light beams travels to the light-delivering element to form a partial reflective light beam and a partial penetrating light beam. With a scanning manner, the partial reflective light beam or the partial penetrating light beam is reflected by the scanning element to be an inspection light, and the main light beam is reflected by the scanning element to be a projection light. The photosensitive element outputs a sensing signal according to the inspection light. Thus, the optical scanning projection module controls the operation of the scanning light component according to the sensing signal. | 07-18-2013 |
20130333384 | SOLAR POWER SYSTEM AND SOLAR ENERGY COLLECTION DEVICE THEREOF - A solar energy connection device is provided, including a C-shaped reflecting plate, a heat pipe and a wing-shaped structure. The C-shaped reflecting plate includes a parabolic surface defining a symmetrical axis and a focusing axis. The heat pipe is disposed on the focusing axis of the parabolic surface with a working fluid flowing therein. The wing-shaped structure connects to the heat pipe and extends outwardly from the heat pipe, wherein the extension direction of the wing-shaped structure is parallel to the symmetrical axis. | 12-19-2013 |
20150108782 | BEAM SPLITTING MODULE AND PROJECTOR DEVICE USING THE SAME - A beam splitting module and a projector device using the same are provided. The beam splitting module comprises a projector, a first reflective mirror and a second reflective mirror. The projector projects a first split image, a second split image and a third split image. The first reflective mirror reflects the first split image to a real image forming plate to form a first projection image. The second reflective mirror reflects the second split image to the real image forming plate to form a second projection image. The third split image is projected on the real image forming plate through a space between the first reflective mirror and the second reflective mirror to form a third projection image. | 04-23-2015 |
Patent application number | Description | Published |
20120001338 | OPENING STRUCTURE - An opening structure is disclosed. The opening structure includes: a semiconductor substrate; at least one dielectric layer disposed on the semiconductor substrate, wherein the dielectric layer has a plurality of openings exposing the semiconductor substrate, and each of the openings has a sidewall; a dielectric thin film covering at least a portion of the sidewall of each of the openings; an etch stop layer disposed between the semiconductor substrate and the dielectric layer and extending partially into the openings to isolate the dielectric thin film from the semiconductor substrate; and a metal layer filled in the openings. | 01-05-2012 |
20120184105 | METHOD OF FORMING OPENINGS - A method for forming openings is provided. First, a substrate with a silicon-containing photo resist layer thereon is provided. Second, a first photo resist pattern is formed on the silicon-containing photo resist layer. Later, a first etching procedure is carried out on the silicon-containing photo resist layer to form a plurality of first openings by using the first photo resist pattern as an etching mask. Next, a second photo resist pattern is formed on the silicon-containing photo resist layer. Then, a second etching procedure is carried out on the silicon-containing photo resist layer to form a plurality of second openings by using the second photo resist pattern as an etching mask. | 07-19-2012 |
20120220113 | Method of Manufacturing Semiconductor Device Having Metal Gate - The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench and then a first metal layer and a first material layer are formed in the first trench. Next, the first metal layer and the first material layer are flattened. The second sacrifice gate is removed to form a second trench and then a second metal layer and a second material layer are formed in the second trench. Lastly, the second metal layer and the second material layer are flattened. | 08-30-2012 |
20130089962 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate is provided. A gate structure is formed on the substrate. A spacer is formed on the substrate beside the gate structure. The spacer includes a first spacer and a second spacer located on the external surface of the first spacer. A first etching process is performed to etch and form at least a recess in the substrate beside the spacer and entirely remove the second spacer. The etching rate of the first etching process to the first spacer is lower than the etching rate of the first etching process to the second spacer. An epitaxial layer is formed in the recess. | 04-11-2013 |
20130316506 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A gate structure is formed on a substrate. A main spacer is formed on the substrate beside the gate structure. A source/drain is formed in the substrate beside the main spacer. After the source/drain is formed, an epitaxial structure is formed in the substrate beside the main spacer. A gate structure may be respectively formed in a first area and a second area of a substrate. A main spacer is formed on the substrate respectively beside the two gate structures. A source/drain is formed in the substrate respectively beside the two spacers. After the two source/drains are formed, an epitaxial structure is formed in the substrate respectively beside the main spacers. | 11-28-2013 |
20140175527 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a gate, a dual spacer and two recesses. The gate is located on a substrate. The dual spacer is located on the substrate beside the gate. The recesses are located in the substrate and the dual spacers, wherein the sidewall of each of the recesses next to the gate has a lower tip and an upper tip, and the lower tip is located in the substrate while the upper tip is an acute angle located in the dual spacer and close to the substrate. The present invention also provides a semiconductor process formed said semiconductor structure. | 06-26-2014 |
20140273368 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device including the steps of providing a substrate having first type semiconductor regions and second type semiconductor regions, forming a conformal first epitaxy mask layer on the substrate, forming first type epitaxial layer in the substrate of the first type semiconductor regions, forming a conformal second epitaxy mask layer on the substrate, forming second type epitaxial layer in the substrate of the second type semiconductor regions, and removing the second epitaxy mask layer. | 09-18-2014 |
Patent application number | Description | Published |
20120091549 | FORMATION OF EMBEDDED MICRO-LENS - Provided is an image sensor device. The image sensor device includes a pixel formed in a substrate. The image sensor device includes a first micro-lens embedded in a transparent layer over the substrate. The first micro-lens has a first upper surface that has an angular tip. The image sensor device includes a color filter that is located over the transparent layer. The image sensor device includes a second micro-lens that is formed over the color filter. The second micro-lens has a second upper surface that has an approximately rounded profile. The pixel, the first micro-lens, the color filter, and the second micro-lens are all at least partially aligned with one another in a vertical direction. | 04-19-2012 |
20130034929 | Method for Forming CMOS Image Sensors - A method includes forming a blocking layer over a substrate, and etching the blocking layer to form a trench in the blocking layer. A dielectric layer is formed, wherein the dielectric layer comprises a first portion over the blocking layer, and a second portion in the trench. After the step of forming the dielectric layer, an implantation is performed to implant an impurity into the substrate to form a deep well region. After the implantation, the dielectric layer and the blocking layer are removed. | 02-07-2013 |
20130037958 | CMOS Image Sensor and Method for Forming the Same - An integrated circuit structure includes an interconnect structure that includes a plurality of metal layers, wherein the interconnect structure is under a semiconductor substrate. A metal pad is formed in one of the plurality of metal layers. A dielectric pad extends from a bottom surface of the semiconductor substrate up into the semiconductor substrate. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate and the dielectric pad. An edge of the semiconductor substrate in the opening is vertically aligned to an edge of the dielectric pad in the opening. The opening stops on a top surface of the metal pad. A dielectric spacer is disposed in the opening, wherein the dielectric spacer is formed on the edge of the semiconductor substrate and the edge of the dielectric pad. | 02-14-2013 |
20130327921 | IMAGE DEVICE AND METHODS OF FORMING THE SAME - A method of forming of an image sensor device includes a substrate having a pixel region and a periphery region. A plurality of first trenches is etched in the periphery region. Each of the first trenches has a depth D | 12-12-2013 |
20140264709 | Interconnect Structure for Connecting Dies and Methods of Forming the Same - A structure includes a first chip having a first substrate, and first dielectric layers underlying the first substrate, with a first metal pad in the first dielectric layers. A second chip includes a second substrate, second dielectric layers over the second substrate and bonded to the first dielectric layers, and a second metal pad in the second dielectric layers. A conductive plug includes a first portion extending from a top surface of the first substrate to a top surface of the first metal pad, and a second portion extending from the top surface of the first metal pad to a top surface of the second metal pad. An edge of the second portion is in physical contact with a sidewall of the first metal pad. A dielectric layer spaces the first portion of the conductive plug from the first plurality of dielectric layers. | 09-18-2014 |
20140264719 | Varied STI Liners for Isolation Structures in Image Sensing Devices - An integrated circuit device incorporating a plurality of isolation trench structures configured for disparate applications and a method of forming the integrated circuit are disclosed. In an exemplary embodiment, a substrate having a first region and a second region is received. A first isolation trench is formed in the first region, and a second isolation trench is formed in the second region. A first liner layer is formed in the first isolation trench, and a second liner layer is formed in the second isolation trench. The second liner layer has a physical characteristic that is different from a corresponding physical characteristic of the first liner layer. An implantation procedure is performed on the second isolation trench and the second liner layer formed therein. The physical characteristic of the second liner layer may be selected to enhance an implantation depth or an implantation uniformity compared to the first liner layer. | 09-18-2014 |
20140264929 | Interconnect Structure for Stacked Device - A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers. | 09-18-2014 |
20140264947 | Interconnect Apparatus and Method - A method comprises bonding a first chip on a second chip, depositing a first hard mask layer over a non-bonding side of the first chip, depositing a second hard mask layer over the first hard mask layer, etching a first substrate of the first semiconductor chip using the second hard mask layer as a first etching mask and etching the IMD layers of the first chip and the second chip using the first hard mask layer as a second etching mask. | 09-18-2014 |
20150069619 | 3DIC Interconnect Apparatus and Method - An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two substrates, such as wafers, dies, or a wafer and a die, are bonded together. A first mask is used to form a first opening extending partially to an interconnect formed on the first wafer. A dielectric liner is formed, and then another etch process is performed using the same mask. The etch process continues to expose interconnects formed on the first substrate and the second substrate. The opening is filled with a conductive material to form a conductive plug. | 03-12-2015 |
20150179612 | 3DIC Interconnect Apparatus and Method - An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls of the first opening. One or more etch processes form one or more spacer-shaped structures along sidewalls of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug. | 06-25-2015 |
20150255400 | Method for Forming Alignment Marks and Structure of Same - A method of fabrication of alignment marks for a non-STI CMOS image sensor is introduced. In some embodiments, zero layer alignment marks and active are alignment marks may be simultaneously formed on a wafer. A substrate of the wafer may be patterned to form one or more recesses in the substrate. The recesses may be filled with a dielectric material using, for example, a field oxidation method and/or suitable deposition methods. Structures formed by the above process may correspond to elements of the zero layer alignment marks and/or to elements the active area alignment marks. | 09-10-2015 |
20150279879 | Varied STI Liners for Isolation Structures in Image Sensing Devices - An integrated circuit device incorporating a plurality of isolation trench structures configured for disparate applications and a method of forming the integrated circuit are disclosed. In an exemplary embodiment, a substrate having a first region and a second region is received. A first isolation trench is formed in the first region, and a second isolation trench is formed in the second region. A first liner layer is formed in the first isolation trench, and a second liner layer is formed in the second isolation trench. The second liner layer has a physical characteristic that is different from a corresponding physical characteristic of the first liner layer. An implantation procedure is performed on the second isolation trench and the second liner layer formed therein. The physical characteristic of the second liner layer may be selected to enhance an implantation depth or an implantation uniformity compared to the first liner layer. | 10-01-2015 |
20150279891 | Stacked Image Sensor Having a Barrier Layer - An image sensor includes a sensor portion and an ASIC portion bonded to the sensor portion. The sensor portion includes a first substrate having radiation-sensing pixels, a first interconnect structure, a first isolation layer, and a first dielectric layer. The ASIC portion includes a second substrate, a second isolation layer, and a second dielectric layer. The material compositions of the first and second isolation layers and the first and second dielectric layers are configured such that the first and second isolation layers may serve as barrier layers to prevent copper diffusion into oxide. The first and second isolation layers may also serve as etching-stop layers in the formation of the image sensor. | 10-01-2015 |
20150287757 | Interconnect Structure for Connecting Dies and Methods of Forming the Same - A structure includes a first chip having a first substrate, and first dielectric layers underlying the first substrate, with a first metal pad in the first dielectric layers. A second chip includes a second substrate, second dielectric layers over the second substrate and bonded to the first dielectric layers, and a second metal pad in the second dielectric layers. A conductive plug includes a first portion extending from a top surface of the first substrate to a top surface of the first metal pad, and a second portion extending from the top surface of the first metal pad to a top surface of the second metal pad. An edge of the second portion is in physical contact with a sidewall of the first metal pad. A dielectric layer spaces the first portion of the conductive plug from the first plurality of dielectric layers. | 10-08-2015 |
Patent application number | Description | Published |
20130241002 | RESISTOR AND MANUFACTURING METHOD THEREOF - A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench. | 09-19-2013 |
20130270613 | METHOD OF TRIMMING SPACERS AND SEMICONDUCTOR STRUCTURE THEREOF - A method of trimming spacers includes etching a silicon oxide spacer when forming an outmost spacer, so that a silicon carbon nitride spacer contacting the gate electrode exposes an area. The exposure area of the silicon carbon nitride spacer can then be partly removed by phosphate acid. At the end of the semiconductor process, at least part of the top surface of the silicon carbon nitride spacer will be lower than the top surface of a gate electrode. | 10-17-2013 |
20130307084 | RESISTOR INTEGRATED WITH TRANSISTOR HAVING METAL GATE - A method of manufacturing a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, a transistor is positioned in the transistor region and a resistor is positioned in the resistor region; forming a dielectric layer exposing tops of the transistor and the resistor on the substrate; performing a first etching process to remove portions of the resistor to form two first trenches respectively at two opposite ends of the resistor; forming a patterned protecting layer in the resistor region; performing a second etching process to remove a dummy gate of the transistor to form a second trench in the transistor region; and forming a metal layer filling the first trenches and the second trench. | 11-21-2013 |
20150137197 | SEMICONDUCTOR STRUCTURE HAVING TRIMMING SPACERS - A semiconductor structure includes a substrate, a gate electrode disposed on the substrate, wherein the gate electrode has a first top surface. Agate dielectric layer is disposed between the substrate and the gate electrode. A silicon carbon nitride spacer surrounds the gate electrode, wherein the silicon carbon nitride spacer has a second top surface not higher than the first top surface. A silicon oxide spacer surrounds the silicon carbon nitride spacer. | 05-21-2015 |
Patent application number | Description | Published |
20120164249 | CHINESE HERBAL MEDICINE COMPOSITION USED FOR ANTIINFLAMMATION, DETUMESCENCE AND ACESODYNE, AND PREPARATION METHOD AND USE THEREOF - A Chinese herbal medicine composition used for antiinflammation, detumescence and acesodyne, comprising first type of medicinal materials and second type of medicinal materials. The first type of medicinal materials include Rhizoma Bletillae, Cortex Cinnamomi, Radix Angelicae Formosanae, Radix Angelicae Sinensis, Paeonia Lactiflora, Rhizoma Notopterygii, Radix Linderae, Glycyrrhizae, Radix Angelicae Pubescentis, and Radix Et Rhizoma Rhei. The second type of medicinal materials is one, two or three selected from the group cosisting of | 06-28-2012 |
20140294745 | CORAL EXTRACT FOR SKIN WHITENING, MOISTURE RETENTION, ELASTICITY IMPROVEMENT, ANTI-INFLAMMATION AND OCCLUSION OF WOUNDS AND EXTRACTING METHOD THEREOF - A coral extract for skin whitening, moisture retention, elasticity improvement, anti-inflammation and occlusion of wounds and its extracting method is provided. The coral extract is extracted from | 10-02-2014 |
Patent application number | Description | Published |
20120189469 | AIR COMPRESSOR - An air compressor with enhanced air compressing effect comprises a mounting chassis with a coupling aperture, a piston having a piston rod with a crankpin linking bore and a piston head with an air acting face, a cylinder having an air chamber with an inner top wall, and a driving mechanism including a motor having a shaft and a rotational crank cam with an eccentric crankpin. The coupling aperture on the mounting chassis is bias disposed relative to the axial line of the cylinder. Both of the air acting face on piston head and inner top wall in cylinder are configured into corresponding slant planar surface. The eccentric crankpin on the crank cam pivotally links the crankpin linking bore on the piston rod of the piston so that rotary motion of the crank cam is converted into linear reciprocating motion. Thus, air compressing effect is substantially enhanced. | 07-26-2012 |
20130011283 | Air Compressor - An air compressor includes a cylinder housing with a piston slidably disposed in a compression chamber of the cylinder housing for generating pressurized air. The air compressor further includes an air drum receiving the cylinder housing and engaged with a flange extending outwardly from a peripheral wall of the cylinder housing. An expanded chamber for storage of the pressurized air is formed between the air drum and the cylinder housing and being in communication with the compression chamber of the cylinder housing. The expanded chamber has significantly larger volume which reduces resistance applied to the piston during reciprocation in the cylinder housing and increases air compression efficiency. | 01-10-2013 |
20130105055 | Vehicle-carried Air Compression Device | 05-02-2013 |
20130284312 | Vehicle-carried air compressor device - A vehicle-carried air compressor device includes a case installed with an air compressor therein, a tire repairing container containing a liquid adhesive, and a flexible linking tube. An air inlet coupler of the tire repairing container is connected with an air outlet manifold of the air compressor. An end of the flexible linking tube is coupled to an adhesive outlet coupler of the tire repairing container, and the other end of the flexible linking tube is provided with a protection adapter for coupling to a tire nipple. Before the protection adapter is connected with the tire nipple, the other end of the flexible linking tube is closed by the protection adapter, so that the liquid adhesive in the tire repairing container will not shoot out suddenly because of improper handling. | 10-31-2013 |
20140216164 | MANOMETER - A manometer comprises a manometer body with an indicating scale with graduated markings of pressure units and a safety vent, a plunger with a annular groove and a tinted O-ring a cap mount, a primary box spring and an auxiliary box spring. By means of the tinted O-ring and the indicating scale with graduated markings of pressure units, the manometer innovatively functions as indication of air pressure measured. By means of the primary box spring and auxiliary box spring, the manometer precisely measures overall air pressure in combination of coarse air pressure variation responded by the primary box spring and fine air pressure variation responded by the auxiliary box spring. By means of the safety vent disposed on the peripheral of manometer body and the tinted O-ring on the plunger, the manometer provides a safety proactive means for input compressed air. | 08-07-2014 |
20150078920 | AIR COMPRESSOR - An air compressor having a pen pressure gauge and an is disclosed and provided for measuring the change of a pressure value as well as releasing air when the pressure value is greater than a predetermined maximum safety value, so as to achieve the safety effect without installing an additional safety value and prevent damages to an inflated object. | 03-19-2015 |
20150184668 | AIR COMPRESSOR WITH AUDIBLE ALARM DEVICE - An air compressor includes an audible alarm device mounted to an outlet of a storage container thereof to produce a high-frequency sound for alerting users when compressed air produced in a cylinder thereof exceeds a predetermined value, wherein the sliding cap of the audible alarm device can be driven by the compressed air to perform a quick, slight back-and-forth movement of high frequency, so that the sliding cap can be partially moved out of the opening of an external enclosure and thus exposed to the outside. Through the audible alarm device, users can be alerted effectively to overpressure conditions of the air compressor. | 07-02-2015 |
Patent application number | Description | Published |
20100175557 | LOW POWER CONSUMING DESORPTION APPARATUS AND DEHUMIDIFIER USING THE SAME - The present invention provides a low power consumption desorption apparatus, which utilizes a pair of electrodes coupled to an absorbing material to provide an electric current flowing through the absorbing material so as to desorb the substances absorbed within the absorbing material. By means of the desorption apparatus of the present invention, the absorbing material is able to enhance the desorbing efficiency and reducing power consumption during desorption. The present invention further provides a dehumidifier using the low power consumption desorption apparatus for providing a continuous dry air flow to desorb and regenerate the moisture from the absorbing material so that the dehumidifier is capable of removing moisture in the air repeatedly to reduce the humidity. | 07-15-2010 |
20110223350 | METHOD FOR PRODUCING THERMOELECTRIC MATERIAL - A method for producing a thermoelectric material is provided. A semiconductor material powder is provided. An electroless plating process is preformed to deposit metal nano-particles on the surface of semiconductor material powder. An electrical current activated sintering process is performed to form a thermoelectric material having one and plurality grain boundaries. | 09-15-2011 |
20130047631 | WATER DISPENSER - A water dispenser including a water inlet system, a drinking water storage system, a heat-exchange water system, a refrigeration system, a heating system and a water outlet system is provided. The drinking water storage system connects the water inlet system. The refrigeration system connects the drinking water storage system and has a water cooling tank and a first thermoelectric element. The cooling side of the first thermoelectric element contacts the water cooling tank. The heating system connected the drinking water storage system has a low-temperature water heating tank and a second thermoelectric element. A heating side of the second thermoelectric element contacts the low-temperature water heating tank. The heat-exchange system connects the water inlet system, a heating side of the first thermoelectric element and a cooling side of the second thermoelectric element. The water outlet system connects the refrigeration system and the heating system. | 02-28-2013 |
20130312426 | DRINKING DISPENSER AND THERMOELECTRIC HEAT PUMP APPARATUS THEREOF - A drinking dispenser has a warm water container; a hot water container coupled to the warm water container; a water supplying apparatus separately coupled to the warm water container and the hot water container; and a thermoelectric heat pump apparatus, configured with a pump that is arranged coupling to the water container and a thermoelectric module in respective coupled to the water container and the pump. | 11-28-2013 |
Patent application number | Description | Published |
20130162767 | ENDOSCOPE AND WIRELESS TRANSMISSION SYSTEM THEREOF - An endoscope, tied-in a display device, including a tube, a distal section and a handling section is provided. The distal section, coupled to a distal end of the tube, includes a first wafer-level image sensor which is disposed to capture at least one first image. The handling section, coupled to a proximal end of the tube, includes a transmitter which transmits the first image to the display device via a wireless connection. | 06-27-2013 |
20130162789 | ENDOSCOPE WITH A LIGHT SOURCE - An endoscope including a tube, a wafer-level imaging module, a holder and a light source is provided. The wafer-level imaging module is coupled to a distal end of the tube. The holder is disposed to house the wafer-level imaging module. The light source is bonded on the surface of the holder. | 06-27-2013 |
20130165749 | ENDOSCOPE CAPABLE OF CAPTURING 3D IMAGE - An endoscope including a tube and a distal section is provided. The distal section, coupled to a distal end of the tube, includes a left wafer-level image sensor, disposed to capture at least one left image, and a right wafer-level image sensor, disposed to capture at least one right image. Wherein, the captured left image and right image are processed as a 3D image. | 06-27-2013 |
20130165750 | ENDOSCOPE CAPABLE OF CHANGING DIRECTION - The invention is directed to an endoscope having a distal section coupled to a distal end of a tube, and a wire disposed in the tube, wherein a distal end of the wire is fixed at a distal point of the tube. The endoscope also includes a handling section coupled to a proximal end of the tube. The wire slidingly passes through a sliding point that is situated between the distal point and the proximal end of the wire, such that the wire is constrained at the sliding point. A proximal end of the wire is capable of being pulled to bend the tube. | 06-27-2013 |
20130165751 | WATERPROOF ENDOSCOPE AND A METHOD OF MANUFACTURING THE SAME - The invention is directed to a waterproof endoscope having a wafer-level imaging module (WLM) bonded on a substrate. The endoscope also includes a holder, which has a groove formed into an inner surface of the holder. First glue is filled in the groove, and second glue is applied at a junction between the holder and the tube. | 06-27-2013 |
20130165752 | ENDOSCOPE INTEGRATED WITH A LIGHT SOURCE - The invention is directed to an endoscope having a wafer-level imaging module (WLM) and a light source bonded on a substrate. The endoscope also includes a holder, to which the substrate with the bonded WLM and the bonded light source is attached. | 06-27-2013 |
Patent application number | Description | Published |
20130049101 | SEMICONDUCTOR DEVICES UTILIZING PARTIALLY DOPED STRESSOR FILM PORTIONS AND METHODS FOR FORMING THE SAME - A semiconductor structure and method for forming the same provide a high mobility stressor material suitable for use as source/drain regions or other active devices. The structure is formed in a substrate opening and is doped with an impurity such as boron in upper portions but is void of the impurity in regions that contact the surfaces of the opening. The structure is therefore resistant to out-diffusion of the dopant impurity during high temperature operations and may be formed through selective deposition using reduced pressure chemical vapor deposition or reduced pressure epitaxial deposition. | 02-28-2013 |
20130256663 | SURFACE TENSION MODIFICATION USING SILANE WITH HYDROPHOBIC FUNCTIONAL GROUP FOR THIN FILM DEPOSITION - A semiconductor structure that includes crystalline surfaces and amorphous hydrophilic surfaces is provided. The hydrophilic surfaces are treated with silane that includes a hydrophobic functional group, converting the hydrophilic surfaces to hydrophobic surfaces. Chemical vapor deposition or other suitable deposition methods are used to simultaneously deposit a material on both surfaces and due to the surface treatment, the deposited material exhibits superior adherence qualities on both surfaces. In one embodiment, the structure is an opening formed in a semiconductor substrate and bounded by at least one portion of a crystalline silicon surface and at least one portion of an amorphous silicon oxide structure. | 10-03-2013 |
20130295739 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In a method of manufacturing a semiconductor device, a source/drain feature is formed over a substrate. A Si-containing layer is formed over the source/drain feature. A metal layer is formed over the Si-containing layer. A metal silicide layer is formed from the metal layer and Si in the Si-containing layer. | 11-07-2013 |
20140191299 | Dual Damascene Metal Gate - A method for fabricating a dual damascene metal gate includes forming a dummy gate onto a substrate, disposing a protective layer on the substrate and the dummy gate, and growing an expanding layer on sides of the dummy gate. The method further includes removing the protective layer, forming a spacer around the dummy gate, and depositing and planarizing a dielectric layer. The method further includes selectively removing the expanding layer, and removing the dummy gate. | 07-10-2014 |
20140239416 | Semiconductor device - A semiconductor device includes a source/drain feature in a substrate. The source/drain feature has an upper portion and a lower portion, the upper portion having a lower concentration of Ge than the lower portion. A Si-containing layer over the source/drain feature includes a metal silicide layer. | 08-28-2014 |
20140246710 | CYCLIC DEPOSITION ETCH CHEMICAL VAPOR DEPOSITION EPITAXY TO REDUCE EPI ABNORMALITY - A semiconductor substructure with an improved source/drain structure is described. The semiconductor substructure can include an upper surface; a gate structure formed over the substrate; a spacer formed along a sidewall of the gate structure; and a source/drain structure disposed adjacent the gate structure. The source/drain structure is disposed over or on a recess surface of a recess that extends below said upper surface. The source/drain structure includes a first epitaxial layer, having a first composition, over or on the interface surface, and a subsequent epitaxial layer, having a subsequent composition, over or on the first epitaxial layer. A dopant concentration of the subsequent composition is greater than a dopant concentration of the first composition, and a carbon concentration of the first composition ranges from 0 to 1.4 at.-%. Methods of making semiconductor substructures including improved source/drain structures are also described. | 09-04-2014 |
20150236124 | EPITAXY IN SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure including a semiconductor substrate is provided. The semiconductor substrate includes a surface. A gate structure is provided on the surface. An interface lower than the surface is provided. An epitaxial regrowth region adjacent the gate structure is disposed on the interface. In addition, the epitaxial regrowth region extends over the surface and includes a bottom layer and a cap layer. The activation of the cap layer is lower than that of the bottom layer. Moreover, the bottom layer is lower than the surface and the gate structure. Furthermore, the bottom layer includes a first downwardly-curved edge and a second downwardly-curved edge over the first one. The first downwardly-curved edge is connected with the second downwardly-curved edge at two endpoints. The two endpoints are in contact with the surface of the semiconductor substrate. | 08-20-2015 |
20150255578 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a gate structure located on a substrate and a raised source/drain region adjacent to the gate structure. The raised source/drain region includes: a first epitaxial-grown doped layer of the raised source/drain region in contact with the substrate; a second epitaxial-grown doped layer on the first epitaxial-grown doped layer and including a same dopant species as the first epitaxial-grown doped layer, wherein the second epitaxial-grown doped layer includes a higher dopant concentration than the first epitaxial-grown doped layer and interfacing the gate structure by using a predetermined distance; and a third epitaxial-grown doped layer on the second epitaxial-grown doped layer and including the same dopant species as the first epitaxial-grown doped layer, wherein the third epitaxial-grown doped layer includes a higher dopant concentration than the second epitaxial-grown doped layer. | 09-10-2015 |
20150255602 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH DISLOCATIONS - A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes proving a substrate. The substrate includes a gate stack over the substrate and source/drain regions separated by the gate stack. A first dislocation with a first pinch-point is formed within the source/drain region with a first depth. A second dislocation with a second pinch-point is formed within the source/drain region at a second depth. The second depth is substantial smaller than the first depth. | 09-10-2015 |
20150311314 | SEMICONDUCTOR DEVICES UTILIZING PARTIALLY DOPED STRESSOR FILM PORTIONS - A method includes providing a gate structure over a semiconductor substrate and forming a source/drain region associated with the gate structure by etching an opening in the semiconductor substrate, performing a first epitaxial growth process while an entirety of a sidewall of the opening is exposed to grow a first epitaxy material in the opening. The first epitaxial growth process is free of a first dopant impurity. A second epitaxial growth process is performed after first epitaxial growth process to grow a second epitaxy material on the first epitaxy material. The second epitaxy material has the first dopant impurity at a first concentration. Further, a third epitaxial growth process is performed after the second epitaxial growth process that includes introducing the first dopant impurity at a second concentration, the second concentration greater than the first concentration. | 10-29-2015 |