Patent application number | Description | Published |
20080295878 | INTEGRATED PACKAGE STRUCTURE HAVING SOLAR CELL AND THERMOELECTRIC ELEMENT AND METHOD OF FABRICATING THE SAME - An integrated package structure having a solar cell and a thermoelectric element includes a substrate, a first solar cell and a thermoelectric element. The substrate has a first surface. The first solar cell has a second surface, a first electrode disposed on the second surface and a second electrode disposed on the second surface. The second surface faces the first surface. The thermoelectric element has a third electrode and a fourth electrode. The thermoelectric element is disposed between the first surface and the second surface. The first electrode and the second electrode are electrically connected to the third electrode and the fourth electrode respectively. A method of fabricating the integrated package structure having the solar cell and the thermoelectric element is also provided. | 12-04-2008 |
20090014046 | FLEXIBLE THERMOELECTRIC DEVICE AND MANUFACTURING METHOD THEREOF - A flexible thermoelectric device and a manufacturing method thereof are provided. Flexible substrates are formed by using LIGA process, micro-electro-mechanical process or electroforming technique. The flexible substrates are used to produce thermoelectric device. The structure and the material property of the substrates offer flexible property and tensile property to the thermoelectric device. Thermal transfer enhancement structures such as thermal via or metal diffusion layer are formed on the flexible substrates to overcome the low thermal transfer property of the flexible substrates. | 01-15-2009 |
20090154525 | APPARATUS AND METHOD FOR MEASURING CHARACTERISTIC AND CHIP TEMPERATURE OF LED - An apparatus for measuring a characteristic and a chip temperature of an LED includes a thermal conductive component. An LED chip is disposed on the thermal conductive component. A temperature control unit is connected to the thermal conductive component for providing a temperature to the thermal conductive component, and therefore providing the temperature to the LED chip via the thermal conductive component. A power-source and voltage-meter unit provides a current to the LED chip, and measures a voltage value of the LED chip. Under a measurement mode, the current is featured with a current waveform having a high current level and a low current level which are alternatively changed, for applying to the LED chip. Measurements are conducted respectively corresponding to the high current level and the low current level, and a correlation curve between the voltage and the temperature can be obtained with the results of measurement. | 06-18-2009 |
20090245308 | ACTIVE SOLID HEATSINK DEVICE AND FABRICATING METHOD THEREOF - An active solid heatsink device and fabricating method thereof is related to a high-effective solid cooling device, where heat generated by a heat source with a small area and a high heat-generating density diffuses to a whole substrate using a heat conduction characteristic of hot electrons of a thermionic (TI) structure, and the thermionic (TI) structure and a thermo-electric (TE) structure share the substrate where the heat diffuses to. Further, the shared substrate serves as a cold end of the TE structure, and the heat diffusing to the shared substrate is pumped to another substrate of the TE structure serving as a hot end of the TE structure. | 10-01-2009 |
20090258449 | FABRICATING METHOD OF LIGHT EMITTING DIODE PACKAGE - A method of fabricating a light emitting diode package structure is provided. First, a first circuit substrate having a first surface and a corresponding second surface and a second circuit substrate having a third surface and a corresponding fourth surface are provided. The second surface and the third surface respectively have a plurality of electrodes. Then, a plurality of N-type semiconductor materials and a plurality of P-type semiconductor materials alternatively arranged on the electrodes are formed. Then, the first circuit substrate and the second circuit substrate are assembled. The two type semiconductor materials are located between the electrodes of the first circuit substrate and the second circuit substrate. The two type semiconductor materials are electrically connected to the first circuit substrate and the second circuit substrate through the electrodes. Finally, an LED chip is arranged on the first surface and electrically connected to the first circuit substrate. | 10-15-2009 |
20100224226 | THERMOELECTRIC CONVERSION DEVICE - A thermoelectric conversion device includes a hot terminal substrate, a cold terminal substrate and a stacked structure. The stacked structure is disposed between the hot terminal substrate and the cold terminal substrate. The stacked structure includes thermoelectric conversion layers each including a thermoelectric couple layer, a first conductive layer and a second conductive layer, a first heat-conductive and electrically insulating structure and a second heat-conductive and electrically insulating structure. Each of the thermoelectric conversion layers is arranged in the stacked structure. The first conductive layer includes first conductive materials and is arranged on tops of P/N type thermoelectric conversion elements. The second conductive layer includes second conductive materials and is arranged on bottoms of the P/N type thermoelectric conversion elements. The first heat-conductive and electrically insulating structure is connected between two adjacent first conductive layers. The second heat-conductive and electrically insulating structure is connected between two adjacent second conductive layers. | 09-09-2010 |
20100290193 | Stacked-chip packaging structure and fabrication method thereof - A stacked-chip packaging structure includes chip sets, a heat sink, a substrate, a circuit board, and solder balls. The chip sets are stacked together, each of which has a heat-dissipation structure and a chip. The heat-dissipation structure has a chip recess, through holes arranged in the chip recess, and an extending portion extending from the chip recess. The chip disposed in the chip recess has bumps. Each bump on the chip is correspondingly disposed in one of the through holes of the heat-dissipation structure. The extending portion of the heat-dissipation structure of each chip set contacts that of the neighboring chip set. The heat sink and the substrate are disposed at two opposite sides of the chip sets, respectively. The circuit board is below the substrate. The solder balls are between the circuit board and the substrate. | 11-18-2010 |
20110042805 | PACKAGE STRUCTURES FOR INTEGRATING THERMOELECTRIC COMPONENTS WITH STACKING CHIPS - Package structures for integrating thermoelectric components with stacking chips are presented. The package structures include a chip with a pair of conductive through vias. Conductive elements are disposed one side of the chip contacting the pair of conductive through vias. Thermoelectric components are disposed on the other side of the chip, wherein the thermoelectric component includes a first type conductive thermoelectric element and a second type conductive thermoelectric element respectively corresponding to and electrically connecting to the pair of conductive through vias. A substrate is disposed on the thermoelectric component, wherein the thermoelectric component, the pair of conductive through vias and the conductive element form a thermoelectric current path. Therefore, heat generated from the chip is transferred outward through a thermoelectric path formed from the thermoelectric components, the conductive through vias and the conductive elements. | 02-24-2011 |
20110149521 | THERMALLY CONDUCTIVE, ELECTRICALLY INSULATING COMPOSITE FILM AND STACK CHIP PACKAGE STRUCTURE UTILIZING THE SAME - Disclosed is a thermally conductive, electrically insulating composite film, including interface layers disposed on the top and bottom surface of a metal substrate, and an insulation layer. Because the film has thermal conductivity and electric insulation properties, it can be disposed between the chips of a stack chip package structure, thereby dissipating the heat in horizontal and vertical directions simultaneously. | 06-23-2011 |
20110266674 | Laser Etch Via Formation - The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed. | 11-03-2011 |
20120088322 | DICING-FREE LED FABRICATION - Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a substrate having opposite first and second sides. A semiconductor layer is formed on the first side of the substrate. The method includes forming a photoresist layer over the semiconductor layer. The method includes patterning the photoresist layer into a plurality of photoresist components. The photoresist components are separated by openings. The method includes filling the openings with a plurality of thermally conductive components. The method includes separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side. Each of the first regions of the substrate is aligned with one of the conductive components. | 04-12-2012 |
20120119228 | LED DEVICE WITH IMPROVED THERMAL PERFORMANCE - An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings. | 05-17-2012 |
20120119246 | LIGHT EMITTING DIODE COMPONENTS INTEGRATED WITH THERMOELECTRIC DEVICES - The present disclosure relates to structures of LED components that integrate thermoelectric devices with LEDs on LED emitter substrates for cooling the LEDs. The present disclosure also related to methods for integrating LED dies with thermoelectric elements. The LED component includes an LED emitter substrate with a cavity in a downward facing surface of the LED emitter substrate and thermal vias that extend from a bottom of the cavity to an area close to an upward facing surface of the LED emitter substrate. The device also includes thermoelectric elements disposed in the cavity where the thermoelectric elements connect with their corresponding thermal vias. The device further includes a thermoelectric substrate in the cavity to electrically connect to the thermoelectric elements. The device further includes an LED die on the upward facing surface of the LED emitter substrate such that the LED die is opposite the cavity. | 05-17-2012 |
20120129282 | WAFER LEVEL CONFORMAL COATING FOR LED DEVICES - Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a wafer. The wafer has light-emitting diode (LED) devices formed thereon. The method includes immersing the wafer into a polymer solution that has a surface tension lower than that of acetic acid. The polymer solution contains a liquid polymer and phosphor particles. The method includes lifting the wafer out of the polymer solution at a substantially constant speed. The method includes drying the wafer. The above processes form a conformal coating layer at least partially around the LED devices. The coating layer includes the phosphor particles. The coating layer also has a substantially uniform thickness. | 05-24-2012 |
20120181568 | MICRO-INTERCONNECTS FOR LIGHT-EMITTING DIODES - The present disclosure provides a method of fabricating a light emitting diode (LED) package. The method includes bonding a plurality of separated light emitting diode (LED) dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer; depositing an isolation layer over the plurality of separated LED dies and the substrate; etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate; forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and dicing the plurality of separated LED dies and the substrate into a plurality of LED packages. | 07-19-2012 |
20120205694 | METHOD OF FORMING A LIGHT EMITTING DIODE EMITTER SUBSTRATE WITH HIGHLY REFLECTIVE METAL BONDING - The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding. | 08-16-2012 |
20120228650 | Light Emitting Diode Emitter Substrate with Highly Reflective Metal Bonding - The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding. | 09-13-2012 |
20120256187 | DOUBLE SUBSTRATE MULTI-JUNCTION LIGHT EMITTING DIODE ARRAY STRUCTURE - The present disclosure provides one embodiment of a light-emitting structure. The light-emitting structure includes a carrier substrate having first metal features; a transparent substrate having second metal features; a plurality of light-emitting diodes (LEDs) bonded with the carrier substrate and the transparent substrate, sandwiched between the carrier substrate and the transparent substrate; and metal pillars bonded to the carrier substrate and the transparent substrate, each of the metal pillars being disposed between adjacent two of the plurality of LEDs, wherein the first metal features, the second metal features and the metal pillars are configured to electrically connect the plurality of LEDs. | 10-11-2012 |
20120286240 | Methods of Fabricating Light Emitting Diode Packages - An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate. | 11-15-2012 |
20120326198 | LED STRUCTURE - A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer. | 12-27-2012 |
20130020589 | WAFER LEVEL PHOTONIC DEVICE DIE STRUCTURE AND METHOD OF MAKING THE SAME - A vertical Light Emitting Diode (LED) device includes an epi structure with a first-type-doped portion, a second-type-doped portion, and a quantum well structure between the first-type-doped and second-type-doped portions and a carrier structure with a plurality of conductive contact pads in electrical contact with the epi structure and a plurality of bonding pads on a side of the carrier structure distal the epi structure, in which the conductive contact pads are in electrical communication with the bonding pads using at least one of vias and a Redistribution Layer (RDL). The vertical LED device further includes a first insulating film on a side of the carrier structure proximal the epi structure and a second insulating film on a side of the carrier structure distal the epi structure. | 01-24-2013 |
20130089937 | METHOD AND APPARATUS FOR ACCURATE DIE-TO-WAFER BONDING - A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating. | 04-11-2013 |
20130230935 | LED DEVICE WITH IMPROVED THERMAL PERFORMANCE - An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings. | 09-05-2013 |
20140061688 | LED Structure - A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer. | 03-06-2014 |
20140065741 | Method and Apparatus for Accurate Die-to-Wafer Bonding - A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating. | 03-06-2014 |
20140084244 | Wafer Level Photonic Device Die Structure and Method of Making the Same - A vertical Light Emitting Diode (LED) device includes an epi structure with a first-type-doped portion, a second-type-doped portion, and a quantum well structure between the first-type-doped and second-type-doped portions and a carrier structure with a plurality of conductive contact pads in electrical contact with the epi structure and a plurality of bonding pads on a side of the carrier structure distal the epi structure, in which the conductive contact pads are in electrical communication with the bonding pads using at least one of vias and a Redistribution Layer (RDL). The vertical LED device further includes a first insulating film on a side of the carrier structure proximal the epi structure and a second insulating film on a side of the carrier structure distal the epi structure. | 03-27-2014 |
20140159096 | Micro-Interconnects for Light-Emitting Diodes - The present disclosure provides a method of fabricating a light emitting diode (LED) package. The method includes bonding a plurality of separated light emitting diode (LED) dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer; depositing an isolation layer over the plurality of separated LED dies and the substrate; etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate; forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and dicing the plurality of separated LED dies and the substrate into a plurality of LED packages. | 06-12-2014 |
20140239323 | Method and Apparatus for Accurate Die-to-Wafer Bonding - A plurality of conductive pads are disposed on a substrate. A plurality of semiconductor dies are each disposed on a respective one of the conductive pads. A mold device is positioned over the substrate. The mold device contains a plurality of recesses that are each configured to accommodate a respective one of the semiconductor dies underneath. | 08-28-2014 |
20140339579 | LED Structure - A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer. | 11-20-2014 |