Patent application number | Description | Published |
20090073088 | Multi-primary color display and color filter - When the coordinates of multiple primaries are set within specific ranges in a chromaticity diagram (e.g. the CIE 1931 chromaticity diagram), the proportion of the contrast ratio of one primary to the contrast ratio of the other primary should conform to some requirements to achieve the white balance of dark-state, so as to effectively display the natural color and mitigate the color shift of low-luminance images. | 03-19-2009 |
20090085834 | Multi-primary color display and the manufacturing method thereof - A multi-primary color display has pixels, and each pixel includes at least four sub pixels which display red primary color, green primary color, blue primary color and cyan primary color, respectively. When the four primary colors are displayed to achieve white balance, their luminance ratios are: the relative luminance of green primary color is greater than the relative luminance of red primary color, the relative luminance of red primary color is greater than the relative luminance of cyan primary color, and the relative luminance of cyan primary color is greater than the relative luminance of blue primary color. A method for manufacturing the multi-primary color display is disclosed as well. | 04-02-2009 |
20090086133 | Multi-Primary Color Display - A multi-primary color display has a backlight source and pixels. Each pixel has at least four sub pixels, which display red primary color, green primary color, blue primary color and a fourth primary color, respectively. At the peak position of the fourth primary color located in the wavelength range between 550 nm˜600 nm, the relative luminance ratio of the fourth primary color to the green primary color is greater than or equal to 0.5. When the ratio of the relative luminance meets the requirement and the relative luminance of a newly added primary color is greater than a certain value, the colors beyond the three-primary color gamut, which includes natural colors and other colors outside the natural color gamut, can be reproduced. | 04-02-2009 |
20110148747 | Multi-primary color display and the manufacturing method thereof - A multi-primary color display has pixels, and each pixel includes at least four sub pixels which display red primary color, green primary color, blue primary color and cyan primary color, respectively. When the four primary colors are displayed to achieve white balance, their luminance ratios are: the relative luminance of green primary color is greater than the relative luminance of red primary color, the relative luminance of red primary color is greater than the relative luminance of cyan primary color, and the relative luminance of cyan primary color is greater than the relative luminance of blue primary color. A method for manufacturing the multi-primary color display is disclosed as well. | 06-23-2011 |
20110286077 | DISPLAY DEVICE - A display device includes a display panel, a barrier layer, and a sealant. The display panel includes a backplane and a frontplane disposed on the backplane, wherein the frontplane includes a plurality of frontplane sidewalls. The frontplane sidewalls at least include a first frontplane sidewall and a second frontplane sidewall, forming a frontplane concavity. The barrier layer includes a first barrier layer sidewall and a second barrier layer sidewall, wherein the first barrier layer sidewall and the second barrier layer sidewall form a barrier layer concavity. The barrier layer concavity corresponds to the frontplane concavity, and at least one of the barrier layer concavity and the frontplane concavity does not include a right angle. The sealant is disposed in a sealant accommodating space defined by the frontplane sidewalls of the frontplane, an inner surface of the backplane and an inner surface of the barrier layer. | 11-24-2011 |
20110299151 | E-INK DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - An E-ink display device includes an active element array substrate, an E-ink layer, a protective layer and a sealant. The active element array substrate has a surface, and the surface includes a contacting region and a sealing region. The E-ink layer is disposed on the contacting region and has a first side wall, and a first included angle defined between the first side wall and the surface being smaller than 90 degrees or larger than 90 degrees. The protective layer is disposed on the E-ink layer and has a second side wall, and a second included angle defined between the second side wall and the surface is smaller than 90 degrees or larger than 90 degrees. The sealant is disposed on the sealing region and surrounds the E-ink layer and the protective layer. A method for manufacturing the E-ink display device is also provided. | 12-08-2011 |
20120268442 | ELECTROPHORETIC DISPLAY APPARATUS AND IMAGE-UPDATING METHOD THEREOF - An electrophoretic display apparatus and an image-updating method thereof are provided. The electrophoretic display apparatus comprises a display panel and a source driver. The display panel comprises a plurality of pixels and a plurality of source lines, and each pixel electrode is electrically coupled to an AC common voltage through a corresponding capacitor. The capacitor comprises a plurality of charged particles. The source driver comprises a first data-latching circuit and a second data-latching circuit. Each of the data-latching circuits comprises a transistor, a capacitor and an inverter. The first data-latching circuit receives image data and a data shift-register output pulse. The second data-latching circuit is electrically coupled between an output terminal of the first data-latching circuit and a source line and is used for receiving a data output pulse. | 10-25-2012 |
Patent application number | Description | Published |
20130313696 | POWER SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A power semiconductor package and a method of method of manufacturing the same are disclosed, where the power semiconductor package includes a lead frame, a first die, a second die and a single connecting strip. The lead frame includes a voltage plate, a grounding plate, an output plate, a first gate plate and a second gate plate. The first die is disposed on the voltage plate, and a high side transistor within the first die is connected to the first gate plate. The second die is disposed on the grounding plate, and a low side transistor within the second die is connected to the second gate plate. The connecting strip is disposed on the first and second dies and the output plate and electrically connects to a source of the high side transistor and a drain of the low side transistor. | 11-28-2013 |
20150262843 | PACKAGE STRUCTURE AND PACKAGING METHOD OF WAFER LEVEL CHIP SCALE PACKAGE - A package structure and a packaging method of wafer level chip scale package are provided. The packaging method includes: providing a carrier, and disposing a plurality of chips on the carrier; forming a plurality of adhesive layers on a surface of the corresponding chips; covering a conductive cover plate, bonding the conductive cover plate with the chips through the adhesive layers, and dividing out a plurality of packaging spaces by the conductive cover plate for disposing the chips respectively; and providing an insulation material to fill the packaging spaces through via holes on the conductive cover plate to form a first insulation structure; finally, removing the carrier. | 09-17-2015 |
Patent application number | Description | Published |
20110024862 | IMAGE SENSOR PACKAGE STRUCTURE WITH LARGE AIR CAVITY - The present invention discloses an image sensor package structure with a large air cavity. The image sensor package structure includes a substrate, a chip, a cover and a package material. The chip is combined with the substrate. A plastic sheet of the cover is adhered to the chip and a transparent lid of the cover is combined with the plastic sheet to provide a covering over a sensitization area of the chip so as to form an air cavity. The package material is arranged on the substrate and encapsulated around the chip and the cover. The plastic sheet having a predetermined thickness can increase the distance between the transparent lid and the chip to enlarge the air cavity. Thus, the image-sensing effect of the image sensor package structure can be improved and the ghost image problem resulting from multi-refraction and multi-reflection of light can be minimized. | 02-03-2011 |
20110241146 | MANUFACTURING METHOD AND STRUCTURE OF A WAFER LEVEL IMAGE SENSOR MODULE WITH PACKAGE STRUCTURE - The present invention discloses a manufacturing method and structure of a wafer level image sensor module with package structure. The structure of the wafer level image sensor module with package structure includes a semi-finished product, a plurality of solder balls, and an encapsulant. The semi-finished product includes an image sensing chip and a wafer level lens assembly. The encapsulant is disposed on lateral sides of the image sensing chip and the wafer level lens assembly. Also, the manufacturing method includes the steps of: providing a silicon wafer, dicing the silicon wafer, providing a lens assembly wafer, fabricating a plurality of semi-finished products, performing a packaging process, mounting the solder balls, and cutting the encapsulant. Accordingly, the encapsulant encapsulates each of the semi-finished products by being disposed on the lateral sides thereof. | 10-06-2011 |
20110241147 | WAFER LEVEL IMAGE SENSOR PACKAGING STRUCTURE AND MANUFACTURING METHOD OF THE SAME - The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the following steps: providing a silicon wafer, dicing the silicon wafer, providing a plurality of transparent lids, fabricating a plurality of semi-finished products, performing a packaging process, mounting solder balls, and cutting an encapsulant between the semi-finished products. The manufacturing method of the invention has the advantage of being straightforward, uncomplicated, and cost-saving. Thus, the wafer level image sensor package structure is lightweight, thin, and compact. To prevent the image sensor chip from cracking on impact during handling, the encapsulant will be arranged on the lateral sides of the semi-finished products during the packaging process. | 10-06-2011 |
Patent application number | Description | Published |
20100052360 | Door Assembly and Method for a Vehicle - A door assembly for a vehicle includes an outer panel. A support panel is operatively connected to the outer panel and configured such that the support panel provides bending resistance to the outer panel when the outer panel is deflected toward the support panel during a first deflection distance of the outer panel. A cable is operatively connected in the door assembly between a first end and a second end of the outer panel such that the cable provides additional bending resistance to the outer panel when the outer panel is deflected toward the support panel during a second deflection distance of the outer panel, greater than the first deflection distance. | 03-04-2010 |
20110113697 | AUTOMOTIVE VEHICLE DOOR CONSTRUCTION - One embodiment includes a lightweight automotive vehicle door construction including an inner panel partially formed from a lightweight metal casting. The casting provides a toe pan, hinge pillar and beltline. A lightweight stamping connected with the casting provides a remainder of the inner skin. The stamping provides an opposite pillar and latch mount. A header connected to the casting along a first end and with the beltline at a second end provides a window frame. A side intrusion beam extends between the hinge pillar and the opposite pillar. An outer panel is connected with the inner panel. | 05-19-2011 |
20110274957 | SECONDARY BATTERY MODULE AND COMPOSITE ARTICLE THEREOF - A composite article for dissipating thermal energy from a secondary battery cell includes a first graphite layer, a second graphite layer spaced away from and arranged parallel to the first graphite layer, and a metal layer sandwiched between and disposed in contact with each of the first graphite layer and the second graphite layer. The composite article has a thermal conductivity of greater than or equal to about 1,200 W/mK and an electrical conductivity of greater than or equal to about 10,000 S/cm. A secondary battery module includes the composite article and a secondary battery cell having a length and an average measurable temperature along the length during operation of the secondary battery module. The composite article is disposed adjacent and in contact with the secondary battery cell to thereby dissipate thermal energy from the secondary battery cell during operation of the secondary battery module. | 11-10-2011 |
20110293992 | BATTERY CONNECTION TOPOLOGY - A battery module comprising a plurality of battery cells arranged in a stacked configuration, each of the battery cells including a first terminal disposed on a first end of the battery cell and a second terminal disposed on a second end of the battery cell, wherein the first terminal of at least one of the battery cells is in direct electrical communication with the second terminal of another non-adjacent one of the battery cells. | 12-01-2011 |
20120061998 | ALUMINUM ROOF PANEL FOR ATTACHMENT TO SUPPORTING STEEL VEHICLE BODY MEMBERS - The substitution of aluminum alloy roof panels for the low carbon steel roof panels most commonly used in motor vehicles is an attractive option for vehicle mass reduction. Often, however, the remainder of the vehicle body structure continues to be fabricated of steel. The combination of the aluminum alloy roof attached to the steel body may create compressive stresses in the aluminum roof when the body is subjected to elevated temperatures such as those required to cure or bake the paint applied to the body. These stresses may lead to unacceptable appearance features in the visible segment of the roof. By modifying the roof stamping to introduce a tabbed flange for attachment to the body and/or modifying the generally-vertical wall joining the flange to the roof interior, the stresses may be minimized and relocated to segments of the roof not normally visible. | 03-15-2012 |
20120181860 | DUAL BIPOLAR MAGNETIC FIELD FOR LINEAR HIGH-VOLTAGE CONTACTOR IN AUTOMOTIVE LITHIUM-ION BATTERY SYSTEMS - A device and method for operating automotive battery system relays and related switches. By creating a dual bipolar magnetic field adjacent the contactor portion of a switching mechanism in the relay, the magnetic field used to promote arc extinguishing is shifted, which in turn reduces the Lorentz force that forms as a byproduct of the field. Such a configuration has the potential for simultaneously maintaining arc-extinguishing capability and improving short-circuit withstanding capability while reducing the tendency of the Lorentz forces to interfere with the operation of a solenoid or other switch-activating mechanisms. Such devices and methods may be used in conjunction with hybrid-powered and electric-powered vehicles. | 07-19-2012 |
20120181953 | DUAL BIPOLAR MAGNETIC FIELD FOR ROTARY HIGH-VOLTAGE CONTACTOR IN AUTOMOTIVE LITHIUM-ION BATTERY SYSTEMS - A device and method for operating automotive battery system relays and related switches. By aligning a magnetic field with a direction of current flow in a contact plate disposed between magnets that are producing the field, a generated Lorentz force can be used to promote arc extinguishing during a relay opening sequence, while simultaneously reducing the tendency of the Lorentz forces to interfere with the operation of a solenoid or other switch-activating mechanisms. By using a rotary-based mechanism to establish contact between a contact plate and current-carrying terminals, the likelihood of inadvertent opening of the relay is reduced. Such devices and methods may be used in conjunction with hybrid-powered and electric-powered vehicles. | 07-19-2012 |
20130071700 | COMPACT BATTERY COOLING DESIGN - A battery module is described. The battery module includes the battery module includes a plurality of repeating frames; a plurality of battery cells positioned between the plurality of repeating frames, the battery cells having a flexible heat conducting covering, an edge of the heat conducting covering folded over an outside edge of the repeating frame; and a heat sink contacting the edge of the heat conducting covering folded over the edge of the repeating frame. A method of cooling a battery module is also described. | 03-21-2013 |
20130108897 | Method For Thermal Management And Mitigation Of Thermal Propagation For Batteries Using A Graphene Coated Polymer Barrier Substrate | 05-02-2013 |
20130175998 | BATTERY DEPOWER FOR AUTOMOBILE BATTERIES - Methods and systems for depowering an automotive battery in a controlled manner. The methods comprise (i) providing a depowering medium comprising one or more non-ionic electric conductors (for example, a carbon conductor) dispersed in a substantially non-ionic aqueous medium; (ii) contacting terminals of the battery with the depowering medium; and (iii) maintaining contact between the depowering medium and terminals for a period of time sufficient to depower the battery. The systems comprise (i) the depowering medium; and (ii) a container configured to receive a battery and the depowering medium such that the battery body is contacted with the depowering medium prior to the terminals. | 07-11-2013 |
20130273399 | Integrated and Optimized Battery Cooling Blower and Manifold - A battery pack having an integrated cooling system which includes a first battery module including a first plurality of battery cells separated by a first plurality of channels, a second battery module including a second plurality of battery cells separated by a second plurality of channels, and a fan that creates air flow between the first and second plurality of channels. The battery pack also includes a manifold having a first conduit section lead from the fan to the first plurality of channels and a second conduit section lead from the fan to the second plurality of channels. Characteristically, the fan is positioned in the manifold where it creates the air flow that is directed by the manifold to the first plurality of channels and the second plurality of channels. | 10-17-2013 |
20140131015 | Simple and Efficient Turbulator to Promote the Uniform Heat Exchange Inside the Battery Cooling Channel - A cooling system for a battery pack includes a fluid source for providing cooling fluid and a turbulator in which the cooling fluid flows along an average flow direction. The turbulator includes a first support member, a second support member, a third support member, a first plurality of rods positioned between the first support member and the second support member, and a second plurality of rods positioned between the second and the third support members. The first plurality of rods is offset from the second plurality of rods in a direction perpendicular to the average flow direction. Finally, the first plurality of rods and the second plurality of rods disrupt fluid flow from the fluid source into non-laminar flow. | 05-15-2014 |
20140308551 | SERIES COOLED MODULE COOLING FIN - An automotive battery module with numerous battery cells and a series-based cooling fin arrangement placed in thermal communication with at least two of the battery cells. Heat generated within the battery cells by, among other things, electric current that can be used to provide motive power for the automobile, may be removed by the cooling fin that includes different portions tailored to remove relatively lesser or greater amounts of heat, depending on a potential temperature difference among the cells. The construction of the cooling fin is such that multiple heat transfer paths are established, each configured to convey heat away from the battery cells, as well as to keep temperature differences between adjacent series-cooled battery cells to a minimum. In one form, the multiple heat transfer paths may include a relatively laminar portion and a relatively turbulent portion, where in one form the increased turbulence may be obtained through numerous turbulators. Other such heat transfer paths may include an intermediate exhaust path, a discreet coolant channel or the like. Any or all of the turbulators, exhaust path or discreet coolant channel may be tuned in order to increase or decrease an amount of heat delivered to the cooling fin from the battery cells. | 10-16-2014 |
Patent application number | Description | Published |
20130188367 | LIGHTING STRUCTURE AND FIXING BASE THEREOF - A lighting structure comprises a case, a fixing base, a substrate and a lighting device. The fixing base disposed at the case comprises a bearing plate and a plurality of fixing plates, wherein the substrate is disposed at the bearing plate, and the fixing plates are bendable to form a clip space between the fixing plates and the bearing plate. The substrate is limited within the clip space and clipped by the bearing plate and the fixing plates. In addition, the case further comprises an accommodating chamber and at least one combining portion, when the fixing base is disposed at an opening of the case, the at least one combining portion is bendable toward the accommodating chamber and clips the fixing base. | 07-25-2013 |
20130335982 | LAMP STRUCTURE - A lamp structure includes a case, a fixing base, a heat dissipation tube, a lighting module and an insulating sleeve. The fixing base is disposed at the case and comprises a carrier, and the lighting module is disposed on the carrier. The heat dissipation tube is coupled to the fixing base, and a heat dissipation space is defined between the heat dissipation tube and the case. The insulating sleeve is coupled to the fixing base. The heat produced by the lighting module can be conducted to the heat dissipation tube and the heat dissipation space through the fixing base to increase heat dissipation efficiency of the lamp structure. | 12-19-2013 |
20130343064 | LAMP STRUCTURE - A lamp structure includes a case, a fixing base and a plurality of heat dissipation members. The fixing base is disposed at the case and comprises a carrier. The heat dissipation members are coupled to the fixing base, wherein a heat exchange space is defined between adjacent heat dissipation members. The heat produced from the lamp structure can be dissipated through the heat dissipation members and the heat exchange space so as to increase heat dissipation efficiency of the lamp structure. Therefore, the present invention prevents the lamp structure from overheat to avoid a relatively lower optoelectronic conversion efficiency or destruction. | 12-26-2013 |
20140078743 | MOUNTING STRUCTURE OF A LAMP ASSEMBLY - A mounting structure of a lamp assembly at least includes a first mounting base and a second mounting base, the second mounting base is attached to the first mounting base, the first mounting base comprises a blocking portion, and the second mounting base comprises a limiting portion and a clamping portion. The blocking portion of the first mounting base is limited between the clamping portion and the limiting portion to prevent the second mounting base from separating the first mounting base. | 03-20-2014 |
Patent application number | Description | Published |
20100163287 | SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF - A substrate structure is provided. The substrate structure includes a substrate, a first insulation layer, a conductive part, a second insulation layer, a seed layer and a conductive layer. The substrate has a first circuit pattern layer and a second circuit pattern layer, which are located on two opposite surfaces of the substrate respectively. The first insulation layer formed on the first circuit pattern layer has a first insulation hole, which exposes a first opening in the outer surface of the first insulation layer. The conductive part formed on the first insulation hole for electrically connecting with a chip is enclosed by the edge of the first opening. The second insulation layer formed on the second circuit pattern layer has a second insulation hole in which the seed layer is formed. The conductive layer is formed on the seed layer for electrically connecting with a circuit board. | 07-01-2010 |
20110056739 | SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer. | 03-10-2011 |
20130068517 | SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer. | 03-21-2013 |
Patent application number | Description | Published |
20130158205 | MODIFIED HIGH CIS CONJUGATED DIENE COPOLYMER AND MANUFACTURING METHOD OF THE SAME - A modified conjugated diene polymer and a manufacturing method for the same are provided. The modified conjugated diene polymer is manufactured by the method including, forming a conjugated diene polymer by a polymerization step and making it react with a first modifier and then react with a second modifier. The modified conjugated diene polymer has over 97% of cis-1,4 structure. A PDI of the modified conjugated diene polymer is bigger than 1.8 and smaller than 2.5. The first modifier has a chemical formula of X—R1-Si(R2) | 06-20-2013 |
20130172492 | MODIFIED HIGH CIS CONJUGATED DIENE COPOLYMER AND PREPARING METHOD OF THE SAME - A modified conjugated diene copolymer and a preparing method for the same are provided. The method comprising a polymerization step for polymerizing conjugated diene monomers to form a conjugated diene polymer; and a modifying step for reacting the conjugated diene polymer with a modifier to form a modified conjugated diene polymer. The modifier includes a polythiol ester compound, a polythiol alkane compound or a combination thereof, the polythiol ester compound has a chemical formula (I): | 07-04-2013 |
20140154045 | FLEXIBLE FREIGHT BAG AND METHOD OF TRANSFERRING CARGO USING THE SAME - A flexible freight bag includes a flexible base unit having first and second panel halves that are interconnected to form a flexible base panel, and a hanging strap assembly connected to the flexible base unit. The first and second panel halves have adjacent inner end portions that are fastened to each other to form a seam across the flexible base panel. A fastener unit is attached to the inner end portions of the first and second panel halves and is operable to be detached from at least one of the inner end portions so that the inner end portions are separable from each other. | 06-05-2014 |
20140179860 | MODIFIED CONJUGATED DIENE POLYMER AND SYNTHESIS METHOD THEREOF - Provided is a synthesis method of a modified conjugated diene polymer. Conjugated diene monomers are reacted in a reaction system. A modifier is added into the reaction system while the reaction proceeds to a predetermined extent. The modifier has a structure represented by formula (1): | 06-26-2014 |
20140187696 | RUBBER COMPOSITION AND MANUFACTURING METHOD FOR THE SAME - A rubber composition and a method for manufacturing the same are provided. The rubber composition includes a main chain modified conjugated diene based polymer and a stabilizer. A weight ratio of the main chain modified conjugated diene based polymer to the stabilizer is 100:0.2˜2. The stabilizer has a structural formula of: | 07-03-2014 |
20140187720 | MODIFIED COPOLYMER OF CONJUGATED DIENE AND VINYL AROMATIC HYDROCARBON AND POLYMERIZATION METHOD THEREOF - Provided is a polymerization method of a modified copolymer of conjugated diene and vinyl aromatic hydrocarbon. A multi-functional vinyl benzene-based compound is reacted with an organic alkali metal compound to form a star shaped compound with multiple active sites. A conjugated diene monomer, a vinyl aromatic hydrocarbon monomer, and the star shaped compound with multiple active sites are reacted with each other to form a copolymer of conjugated diene and vinyl aromatic hydrocarbon. The copolymer of conjugated diene and vinyl aromatic hydrocarbon is then reacted with a modifier to form the modified copolymer of conjugated diene and vinyl aromatic hydrocarbon. | 07-03-2014 |
20140187723 | POLYSILOXANE COMPOUND, MODIFIED CONJUGATED DIENE-VINYL AROMATIC COPOLYMER AND PREPARING METHOD THEREOF - The present invention relates to a polysiloxane compound having a structure represented by formula 1: | 07-03-2014 |
Patent application number | Description | Published |
20150256075 | DC voltage generation circuit and pulse generation circuit thereof - A pulse generation circuit, for outputting a pulse signal at an output terminal, comprises a PMOS, an NMOS and a logic circuit. The PMOS has a source coupled to a first reference voltage level, a drain coupled to the output terminal, and a gate coupled to a first gate control signal. The NMOS has a source coupled to a second reference voltage level, a drain coupled to the output terminal, and a gate coupled to a second gate control signal. The logic circuit generates the first gate control signal according to a control signal and a first logic signal, relating to the second gate control signal and a delay signal of the second gate control signal, and generates the second gate control signal according to the control signal and a second logic signal, relating to the first gate control signal and a delay signal of the first control signal. | 09-10-2015 |
20150256076 | DC voltage generation circuit and pulse generation circuit thereof - A pulse generation circuit for outputting a pulse signal at an output terminal, including: a PMOS, an NMOS, and a logic circuit. The PMOS has a source coupled to a first reference voltage level, a drain coupled to the output terminal, and a gate that receives a first gate control signal. The NMOS has a source coupled to a second reference voltage level, a drain coupled to the output terminal, and a gate that receives a second gate control signal. The logic circuit generates the first gate control signal according to a control signal and a first delay signal and generates the second gate control signal according to the control signal and a second delay signal. The first delay signal is relevant to the second gate control signal and the control signal. The second delay signal is relevant to the first gate control signal and the control signal. | 09-10-2015 |
Patent application number | Description | Published |
20120160317 | POLYIMIDE POLYMER SOLUTION, POLYIMIDE POLYMER, TRANSPARENT FILM, DISPLAYING DEVICE AND SOLAR CELL - A polyimide polymer solution, a polyimide polymer, a transparent film, a display device and a solar cell are provided. The polyimide polymer has at least one of a repeating unit of formula (D) and a repeating unit of formula (J) and at least one of a repeating unit of formula (Q) and a repeating unit of formula (T). | 06-28-2012 |
20130269758 | FLEXIBLE SUBSTRATES, APPLICATIONS OF COMPOSITE LAYERS IN SOLAR CELLS, AND SOLAR CELLS - Disclosed is a flexible substrate, including a metal substrate and a composite layer thereon. The composite layer includes polyimide and sodium-containing silica mixed with each other, and the polyimide and the sodium-containing silica have a weight ratio of about 6:4 to 9:1. The silica and the sodium ions of the sodium-containing silica have a weight ratio of 100:0.01 to 100:2. | 10-17-2013 |
20140021169 | POLYIMIDE-CONTAINING LAYER AND METHOD FOR ETCHING POLYIMIDE-CONTAINING LAYER - The disclosure provides a polyimide-containing layer suitable for being etched by an alkaline solution and a method for etching a polyimide-containing layer. The polyimide-containing layer suitable for being etched by an alkaline solution includes 20-50 parts by weight of a silica dioxide, and 50-80 parts by weight of a polyimide. | 01-23-2014 |
Patent application number | Description | Published |
20120229182 | SIGNAL GENERATING APPARATUS FOR GENERATING POWER-ON-RESET SIGNAL - A signal generating apparatus, for generating a power-on-reset signal, including a bias circuit and a power-on-reset signal generating circuit is disclosed. The bias circuit is for generating an output bias voltage, and includes at least one bipolar junction transistor (BJT), wherein a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT. The power-on-reset signal generating circuit is coupled to the bias circuit, and is for generating a duplicated voltage by duplicating the output bias voltage, wherein the power-on-reset signal is generated according to the duplicated voltage. | 09-13-2012 |
20140320179 | SIGNAL GENERATING APPARATUS FOR GENERATING POWER-ON-RESET SIGNAL - A signal generating apparatus, for generating a power-on-reset signal, including a bias circuit and a power-on-reset signal generating circuit is disclosed. The bias circuit is for generating an output bias voltage, and includes at least one bipolar junction transistor (BJT), wherein a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT. The power-on-reset signal generating circuit is coupled to the bias circuit, and is for generating a duplicated voltage by duplicating the output bias voltage, wherein the power-on-reset signal is generated according to the duplicated voltage. | 10-30-2014 |
Patent application number | Description | Published |
20130072079 | MANUFACTURING METHOD FOR FLEXIBLE DISPLAY APPARATUS - A manufacturing method for a flexible display apparatus is provided. A rigid substrate is provided. A flexible substrate having a supporting portion and a cutting portion surrounding the supporting portion is provided. A first adhesive material is formed between the rigid substrate and the cutting portion of the flexible substrate, so that the flexible substrate is adhered onto the rigid substrate by the first adhesive material. The first adhesive material does not locate on the supporting portion of the flexible substrate. At least a display unit is formed on the supporting portion of the flexible substrate. The supporting portion and the cutting portion of the flexible substrate are separated so as to separate the rigid substrate and the flexible substrate, wherein the flexible substrate and the display unit thereon form a flexible display apparatus. In the method, the flexible substrate and the rigid substrate can be easily separated. | 03-21-2013 |
20140030494 | GAS BARRIER SUBSTRATE - A gas barrier substrate including a flexible base material, at least one first inorganic gas barrier layer and at least one second inorganic gas barrier layer is provided. The flexible base material has an upper surface. The first inorganic gas barrier layer is disposed on the flexible base material and covers the upper surface. The second inorganic gas barrier layer is disposed on the first inorganic gas barrier layer and covers the first inorganic gas barrier layer. A water vapor and oxygen transmission rate of the second inorganic gas barrier layer is lower than that of the first inorganic gas barrier layer. | 01-30-2014 |
20140158663 | SURFACE TREATMENT METHOD FOR FLEXIBLE SUBSTRATE - A surface treatment method for a flexible substrate is provided. A flexible insulation substrate is provided. A surface of the flexible insulation substrate has at least one defect. A plasma etching is performed on the flexible insulation substrate to smooth a profile of the defect. | 06-12-2014 |
20140191649 | PIXEL STRUCTURE - A pixel structure including a flexible substrate, an active device, a pixel electrode, a capacitance electrode, a first insulation layer, a second insulation layer, and a padding layer is provided. The pixel electrode is electrically connected to the active device and has pixel electrode openings. The capacitance electrode is disposed overlapping the pixel electrode and has capacitance electrode openings corresponding to the pixel electrode openings. The first insulation layer is disposed between the pixel electrode and the flexible substrate. The second insulation layer is disposed between the pixel electrode and the capacitance electrode. The active device is disposed between the second insulation layer and the flexible substrate. The padding layer includes padding pillars and a padding pattern covering over the active device. The padding pillars are located in the pixel electrode openings respectively. The pixel electrode partially covers the padding pattern and exposes the padding pillars. | 07-10-2014 |
20140264606 | PIXEL STRUCTURE - A pixel structure includes a flexible substrate, an active device, a conductive pattern, a first insulation layer, and a pixel electrode. The active device is disposed on the flexible substrate and includes a gate, a channel, a source, and a drain. The source and the drain are connected to the channel and are separated from each other. The channel and the gate are stacked in a thickness direction. The active device is disposed between the conductive pattern and the flexible substrate. The conductive pattern is electrically connected to the drain of the active device. The first insulation layer covers the conductive pattern and has first contact holes separated from one another, and the first contact holes expose the conductive pattern. The first insulation layer is disposed between the pixel electrode and the conductive pattern. The pixel electrode is electrically connected to the conductive pattern through the first contact holes. | 09-18-2014 |
Patent application number | Description | Published |
20140008655 | PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF - A pixel structure and a manufacturing method of the pixel structure are provided. The pixel structure includes a substrate, a transistor, a planarizing layer, a plurality of contact windows, and a pixel electrode layer. The transistor is disposed on the substrate and includes a gate, a source, and a drain. The planarizing layer is disposed on the gate, the source, and a portion of the drain. The contact windows penetrate the planarizing layer and expose another portion of the drain. The pixel electrode layer is disposed on the planarizing layer, on the another portion of the drain, and in the contact windows and is electrically connected to the drain. | 01-09-2014 |
20140014944 | PIXEL STRUCTURE AND FABRICATION METHOD THEREOF - A pixel structure includes a first patterned transparent conductive layer, an active layer, an insulating layer and a second patterned transparent conductive layer. The first patterned transparent conductive layer is disposed on a substrate and includes a source, a drain and a pixel electrode connected to the drain. The active layer connects the source and the drain. The insulating layer covers the source, the drain and the active layer. The second patterned transparent conductive layer is disposed on the insulating layer and includes a gate disposed above the active layer and a common electrode disposed above the pixel electrode. A fabrication method of a pixel structure is also provided. | 01-16-2014 |
20150076722 | MANUFACTURING METHOD FOR DISPLAY MODULE - A manufacturing method for a display module is provided. The method comprises following steps. A module structure comprising a cover plate, a substrate, and a front plate disposed between the cover plate and the substrate is provided. A space is defined by a lower surface of the cover plate, an upper surface of the substrate, and a side surface of the front plate. A holding structure comprising a holding layer disposed under the module structure is provided. A sealant is filled into the space. Portions of the package layer and the holding structure disposed outside a side surface of the cover plate and a side surface of the substrate are removed. | 03-19-2015 |
Patent application number | Description | Published |
20080256400 | System and Method for Information Handling System Error Handling - Non-fatal errors at an information handling system link are managed by firmware of the information handling system. For example, a PCI Express link controller initiates an SMI interrupt upon detection of a non-fatal error associated with the PCI Express link. A non-fatal error monitor associated with an SMI handler in the BIOS of the information handling system receives the interrupt, determines the component of the information handling system associated with non-fatal error and issues an error message if the non-fatal error meets a predetermined condition, such as a predetermined number of errors associated with the component. | 10-16-2008 |
20090292910 | SYSTEM AND METHOD OF ACCESSING BIOS CHANGE SUMMARY INFORMATION WITHIN A BIOS OPERATING ENVIRONMENT - A system and method of accessing basic input output system (BIOS) change summary information within a BIOS operating environment is disclosed. According to an aspect, a basic input output system (BIOS) set-up interface is disclosed. The BIOS set-up interface includes a navigation routine accessible via a BIOS set-up menu and operable to initiate displaying a secondary user display interface. The BIOS set-up interface further includes a BIOS change summary interface accessible using the secondary display user interface and configured to display BIOS set-up changes made using the BIOS set-up menu. | 11-26-2009 |
20100037044 | Method and system for using a server management program for an error configuration table - Methods and systems are disclosed for using a server management program for an error configuration table, wherein a user loads the management program, which receives a Hardware Error Configuration Table (HECT) from baseboard management controller (BMC) firmware, the HECT table containing error control parameters for a hardware error event table. A replica of the HECT is maintained in SRAM using BMC firmware. The HECT is sent via the basic input output system (BIOS) during system power up. An interface is set up to allow the user to configure error event thresholds. The user can set preferred threshold of a system management requirement without rebooting system. If the user makes changes to the HECT, the management program sends the new HECT to BMC firmware to feedback the completion. A software SMI is issued to inform BIOS of HECT changes during the BMC completion. BIOS informs the operating system (OS) to discard and reload the new HECT. | 02-11-2010 |