Patent application number | Description | Published |
20090075620 | LOCAL OSCILLATOR BUFFER AND MIXER HAVING ADJUSTABLE SIZE - Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an exemplary embodiment, LO buffer and/or mixer size may be increased when a receiver or transmitter operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver or transmitter operates in a low gain mode. In an exemplary embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific exemplary embodiments of LO buffers and mixers having adjustable size are disclosed. | 03-19-2009 |
20090156152 | TRACKING FILTER FOR A RECEIVER - A tracking filter for attenuating out-of-band signals and adjacent channel signals in a receiver is described. In one exemplary design, an apparatus includes a tracking filter, an LNA, and a downconverter. The tracking filter includes a summer, a filter, and an upconverter. The summer subtracts a feedback signal from an input signal and provides a first signal. The LNA amplifies the first signal and provides a second signal. The downconverter frequency downconverts the second signal and provides an output signal. The filter filters (e.g., differentiates) the output signal and provides a third signal. The filter blocks a desired signal and passes out-of-band signal components. The upconverter frequency upconverts the third signal and provides a fourth signal from which the feedback signal is derived. The tracking filter has an equivalent bandpass filter response and a variable center frequency determined based on the frequency of the desired signal. | 06-18-2009 |
20090190692 | LINEAR AND POLAR DUAL MODE TRANSMITTER CIRCUIT - Method and apparatus for configuring a transmitter circuit to support linear or polar mode. In the linear mode, a baseband signal is specified by adjusting the amplitudes of in-phase (I) and quadrature (Q) signals, while in the polar mode, the information signal is specified by adjusting the phase of a local oscillator (LO) signal and the amplitude of either an I or a Q signal. In an exemplary embodiment, two mixers are provided for both linear and polar mode, with a set of switches selecting the appropriate input signals provided to one of the mixers based on whether the device is operating in linear or polar mode. In an exemplary embodiment, each mixer may be implemented using a scalable architecture that efficiently adjusts mixer size based on required transmit power. | 07-30-2009 |
20090315621 | AMPLIFIER WITH GAIN EXPANSION STAGE - Techniques are disclosed for extending an amplifier's linear operating range by concatenating an amplifier exhibiting gain compression with a gain expansion stage. In an exemplary embodiment, a gain expansion stage incorporates a Class-B stage, a Class-AB stage, or a combination of the two. In an exemplary embodiment, both the gain compression stage and gain expansion stage are provided with a replica current biasing scheme to ensure stable biasing current over variations in temperature, process, and/or supply voltage. Further disclosed is an output voltage biasing scheme to set the DC output voltage to ensure maximum linear operating range. | 12-24-2009 |
20100029227 | MULTI-MODE CONFIGURABLE TRANSMITTER CIRCUIT - Method and apparatus for configuring a transmitter circuit to support multiple modes and/or frequency bands. In an embodiment, a pre-driver amplifier (pDA) in a transmit (TX) signal path is selectively bypassed by a controllable switch. The switch can be controlled based on a mode of operation of the transmitter circuit. Further techniques are disclosed for selectively coupling the output of a driver amplifier (DA) to at least one of a plurality of off-chip connections, each connection coupling the DA output to a set of off-chip components. | 02-04-2010 |
20100033253 | TECHNIQUES FOR IMPROVING BALUN LOADED-Q - Techniques for improving the quality factor (“Q”) of a balun in the presence of loading stages are disclosed. In an exemplary embodiment, the ground node of a balun secondary (single-ended) element is connected to a source node of an amplifier stage via a common ground node. The connection may be made physically short to minimize any parasitic elements. In another exemplary embodiment, the common ground node may be coupled to an off-chip ground voltage via a peaking inductor. The peaking inductor may be implemented on-chip, e.g., as a spiral inductor, or off-chip e.g., using bondwires. | 02-11-2010 |
20100130144 | TECHNIQUES FOR IMPROVING TRANSMITTER PERFORMANCE - Exemplary embodiment are directed to preserving transmitter linearity in RF transceivers while reducing RX band noise for use with low-power voltage supplies. In one aspect, a programmable attenuation element may be provided on-chip at the output of a driver amplifier, prior to a matching network. In another aspect, the programmable attenuation element may include a plurality of switchable capacitors. | 05-27-2010 |
20100182090 | ULTRA LOW NOISE HIGH LINEARITY LNA FOR MULTI-MODE TRANSCEIVER - An amplifier for operating at low, middle or high linearity modes, the amplifier comprising a first low noise amplifier (LNA) coupled to a second low noise amplifier for providing amplification; a first degeneration inductor coupled to the first LNA for providing impedance matching; a −g | 07-22-2010 |
20130229954 | FREQUENCY SYNTHESIZER ARCHITECTURE IN A TIME-DIVISION DUPLEX MODE FOR A WIRELESS DEVICE - A dual frequency synthesizer architecture for a wireless device operating in a time division duplex (TDD) mode is disclosed. In an exemplary design, the wireless device includes first and second frequency synthesizers. The first frequency synthesizer generates a first oscillator signal used to generate a first/receive local oscillator (LO) signal at an LO frequency for the receiver. The second frequency synthesizer generates a second oscillator signal used to generate a second/transmit LO signal at the same LO frequency for the transmitter. The two frequency synthesizers generate their oscillator signals to obtain receive and transmit LO signals at the same LO frequency when the wireless device operates in the TDD mode. | 09-05-2013 |
20130316670 | MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) LOW NOISE AMPLIFIERS FOR CARRIER AGGREGATION - Multiple-input multiple-output (MIMO) low noise amplifiers (LNAs) supporting carrier aggregation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a MIMO LNA having a plurality of gain circuits, a drive circuit, and a plurality of load circuits. The gain circuits receive at least one input radio frequency (RF) signal and provide at least one amplified RF signal. Each gain circuit receives and amplifies one input RF signal and provides one amplified RF signal when the gain circuit is enabled. The at least one input RF signal include transmissions sent on multiple carriers at different frequencies to the wireless device. The drive circuit receives the at least one amplified RF signal and provides at least one drive RF signal. The load circuits receive the at least one drive RF signal and provide at least one output RF signal. | 11-28-2013 |
20140030991 | LOW POWER LOCAL OSCILLATOR SIGNAL GENERATION - A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path. | 01-30-2014 |
20140043102 | MULTI-CASCODE AMPLIFIER BIAS TECHNIQUES - Techniques for generating bias voltages for a multi-cascode amplifier. In an aspect, a multi-cascode bias network is provided, each transistor in the bias network being a replica of a corresponding transistor in the multi-cascode amplifier, enabling accurate biasing of the transistors in the multi-cascode amplifier. In another aspect, a voltage supply for the multi-cascode amplifier is provided separately from a voltage supply for the replica bias network, to advantageously decouple variations in the amplifier voltage supply from the bias network voltage supply. In yet another aspect, the bias voltages of transistors in the multi-cascode amplifier may be configured by adjusting the impedance of resistive voltage dividers coupled to the transistor gate biases. As the gain of the amplifier depends on the bias voltages of the cascode amplifiers, the gain of the amplifier may be adjusted in this manner without introducing a variable gain element directly in the amplifier signal path. | 02-13-2014 |
20140070899 | CANCELLING SUPPLY NOISE IN A VOLTAGE CONTROLLED OSCILLATOR CIRCUIT - A voltage controlled oscillator (VCO) core for cancelling a supply noise is described. The VCO core includes an input node that receives the supply noise. The VCO core also includes a noise path coupled to the input node. The VCO core additionally includes a cancellation path coupled to the input node and the noise path. The cancellation path includes a programmable gain circuit coupled with a first terminal of a varactor. The supply noise passes through the programmable gain circuit to produce a cancellation noise. | 03-13-2014 |
20140098906 | TRANSMIT DIVERSITY ARCHITECTURE WITH OPTIMIZED POWER CONSUMPTION AND AREA FOR UMTS & LTE SYSTEMS - A method and apparatus for providing total power from one transmit path. The method provides the steps of: selecting a transmit path and closing a first switch, located after a digital to analog converter. A second switch between the two transmit paths is then closed in order to provide for the use of at least one low-pass filter in each transmit path. The signal is then processed through the at least one low pass filter in each transmit path. The signal is then processed through at least one mixer in each transmit path. After the mixer, the signal is then processed through at least one driver amplifier in each transmit path, and one-half of the total power is allocated to each of two transmission paths. A third switch is then closed after the at least one power amplifier in each transmit path to force the half-power from one transmit path into one output. | 04-10-2014 |
20140106681 | Ku ADAPTATION FOR PHASE-LOCKED LOOP WITH TWO-POINT MODULATION - A wireless device includes: an antenna; and a polar-modulation transmitter coupled to the antenna and configured for two-point modulation, the transmitter including: a data input; a first signal path including a multiplier coupled to the data input and a voltage-controlled oscillator gain adaptation module coupled to the multiplier and configured to provide a gain value to the multiplier; and a second signal path coupled to the data input and including an analog phase-locked loop (PLL) including a voltage-controlled oscillator (VCO) coupled to the first signal path. | 04-17-2014 |
20140273904 | LOCAL OSCILLATOR (LO) GENERATOR WITH MULTI-PHASE DIVIDER AND PHASE LOCKED LOOP - Techniques for generating a local oscillator (LO) signal are disclosed. In one design, an apparatus includes an oscillator, a divider, and a phase locked loop (PLL). The oscillator receives a control signal and provides an oscillator signal having a frequency determined by the control signal. The divider receives the oscillator signal and generates multiple divided signals of different phases. The PLL receives a reference signal and a selected divided signal and generates the control signal for the oscillator. The divider is powered on and off periodically and wakes up in one of multiple possible states, with each state being associated with a different phase of the selected divided signal. Phase continuity of the selected divided signal is ensured by using the divider in a feedback loop with the PLL. The PLL locks the selected divided signal to the reference signal, and the selected divided signal has continuous phase due to the reference signal having continuous phase. | 09-18-2014 |