Patent application number | Description | Published |
20130271396 | SENSING MODULE WHICH CAN PERFORM PROXIMITY DETECTION AND DISPLAY STRUCTURE HAVING SENSING ELECTRODES - A display includes a display module and a sensing module including a proximity sensing electrode, a set of sensing electrodes, a touch circuit, a proximity circuit and a processor. The sensing electrodes are configured to sense a touch input during a first period and sense a proximity input during a second period. The touch circuit is coupled to the sensing electrodes for controlling the sensing electrodes to sense the touch input in the first period, and converting a two-dimensional analog touch signal transmitted from the set of the sensing electrodes to a two-dimensional digital touch signal. The proximity circuit is coupled to the sensing electrodes and the proximity sensing electrode for controlling the sensing electrodes and the proximity sensing electrode to sense the proximity input, and converting a three-dimensional analog proximity signal transmitted from the set of sensing electrodes and proximity unit to a three-dimensional digital proximity signal. | 10-17-2013 |
20130300706 | TOUCH DISPLAY AND METHOD FOR DRIVING TOUCH DISPLAY - A touch display includes a display panel, a plurality of sensing electrodes and a driving circuit module. The display panel includes a plurality of pixels. The plurality of sensing electrodes are stacked with the display panel and are used for detecting a touch input and generating a sensing signal in response to the touch input. The driving circuit module is electrically coupled to the display panel and the plurality of sensing electrodes, for controlling the pixels of the display panel according to an image data, and generating a touch signal for indicating whether the touch display is touched or not in response to the image data and the sensing signal. | 11-14-2013 |
20130314623 | CAPACITIVE TOUCH MODULE AND DISPLAY HAVING CAPACITIVE TOUCH MODULE - A capacitive touch module includes a first glass layer, a second glass layer, a liquid crystal layer, a first insulating layer, a second insulating layer, a plurality of first electrodes, second electrodes and third electrodes. The liquid crystal layer is arranged between the first glass layer and the second glass layer. The first insulating layer is formed between the first glass layer and the liquid crystal layer. The second insulating layer is formed between the liquid crystal layer and the second glass layer. The plurality of first electrodes are formed between the liquid crystal layer and the first insulating layer along a first axis. The plurality of second electrodes are formed between the second insulating layer and the second glass layer along the first axis. The plurality of third electrodes are formed between the first insulating layer and the first glass layer along a second axis. | 11-28-2013 |
Patent application number | Description | Published |
20140204113 | CARRY TABLE GENERATING METHOD - A carry table generating method is provided for generating N dither carry tables, so as to dither N pixel blocks, wherein a size of the pixel block is N×N, and N is an integer greater than 1. The carry table generating method comprises the following steps: reading a plurality of basic tables from a memory, wherein the base tables are corresponding to a plurality of basic blocks, the number of the basic blocks is smaller than N, and the size of the basic blocks is smaller than the size of the pixel blocks; expanding the size of the basic tables by a first conversion procedure, and expanding the number of the basic blocks by a second conversion procedure; and generating the dither carry tables by using the expanded basic blocks. | 07-24-2014 |
20140333642 | DISPLAY SYSTEM AND DATA TRANSMISSION METHOD THEREOF - A display system and a data transmission method thereof are provided. When a first frame stored in a frame buffer is identical to a second frame to be output from an audio and video (AV) source, the AV source is set an AV control signal corresponding to a self-refresh mode, and a timing controller reads the first frame to output a display data controlled by the AV control signal. When the first frame is differed from the second frame, the AV source is set the AV control signal corresponding to a data update mode and a AV data signal corresponding to the second frame, and the timing controller stores the second frame in the frame buffer controlled by the AV control signal and outputs the display data corresponding to the first frame or the second frame according the timing sequences of the AV data signal and the display data. | 11-13-2014 |
20150062149 | METHOD FOR PERFORMING DITHERING UPON BOTH NORMAL MODE AND SELF REFRESH MODE IN LOWER TRANSMISSION DATA RATE AND RELATED APPARATUS THEREOF - A self refresh method with dithering has at least the following steps: generating a plurality of original frames; performing a dithering process upon the plurality of original frames to generate a plurality of dithering frames to a timing controller; checking if the plurality of original frames is unaltered; and when it is detected that the plurality of original frames is unaltered, requesting the timing controller to enter a self refresh mode, and stopping transmission of dithering frames after transmitting a specific frame and dithering information associated with the specific frame to the timing controller for further dithering processing. | 03-05-2015 |
Patent application number | Description | Published |
20130154561 | NETWORK BASED MANAGEMENT FOR MULTIPLEXED ELECTRIC VEHICLE CHARGING - A system for multiplexing charging of electric vehicles, comprising a server coupled to a plurality of charging control modules over a network. Each of said charging modules being connected to a voltage source such that each charging control module is configured to regulate distribution of voltage from the voltage source to an electric vehicle coupled to the charging control module. Data collection and control software is provided on the server for identifying a plurality of electric vehicles coupled to the plurality of charging control modules and selectively distributing charging of the plurality of charging control modules to multiplex distribution of voltage to the plurality of electric vehicles. | 06-20-2013 |
20130179061 | SMART ELECTRIC VEHICLE (EV) CHARGING AND GRID INTEGRATION APPARATUS AND METHODS - An expert system manages a power grid wherein charging stations are connected to the power grid, with electric vehicles connected to the charging stations, whereby the expert system selectively backfills power from connected electric vehicles to the power grid through a grid tie inverter (if present) within the charging stations. In more traditional usage, the expert system allows for electric vehicle charging, coupled with user preferences as to charge time, charge cost, and charging station capabilities, without exceeding the power grid capacity at any point. A robust yet accurate state of charge (SOC) calculation method is also presented, whereby initially an open circuit voltage (OCV) based on sampled battery voltages and currents is calculated, and then the SOC is obtained based on a mapping between a previously measured reference OCV (ROCV) and SOC. The OCV-SOC calculation method accommodates likely any battery type with any current profile. | 07-11-2013 |
20140062401 | POWER CONTROL APPARATUS AND METHODS FOR ELECTRIC VEHICLES - Electric vehicle (EV) charging apparatus and methods are described which allow the sharing of charge current between multiple vehicles connected to a single source of charging energy. In addition, this charge sharing can be performed in a grid-friendly manner by lowering current supplied to EVs when necessary in order to satisfy the needs of the grid, or building operator. The apparatus and methods can be integrated into charging stations or can be implemented with a middle-man approach in which a multiple EV charging box, which includes an EV emulator and multiple pilot signal generation circuits, is coupled to a single EV charge station. | 03-06-2014 |
Patent application number | Description | Published |
20130009232 | NON-VOLATILE MEMORY CELL AND FABRICATING METHOD THEREOF - A non-volatile memory cell includes a substrate, two charge trapping structures, a gate oxide layer, a gate and two doping regions. The charge trapping structures are disposed on the substrate separately. The gate oxide layer is disposed on the substrate between the two charge trapping structures. The gate is disposed on the gate oxide layer and the charge trapping structures, wherein the charge trapping structures protrude from two sides of the gate. The doping regions are disposed in the substrate at two sides of the gate. | 01-10-2013 |
20130026557 | SONOS NON-VOLATILE MEMORY CELL AND FABRICATING METHOD THEREOF - A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell, wherein the method comprises steps as following: a pad oxide layer and a first hard mask layer are sequentially formed on a substrate. The pad oxide layer and the first hard mask layer are then etched through to form an opening exposing a portion of the substrate. Subsequently, an oxide-nitride-oxide (ONO) structure with a size substantially less than or equal to the opening is formed to coincide with the portion of the substrate exposed from the opening. | 01-31-2013 |
20130221424 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is described. A stacked gate dielectric is formed over a substrate, including a first dielectric layer, a second dielectric layer and a third dielectric layer from bottom to top. A conductive layer is formed on the stacked gate dielectric and then patterned to form a gate conductor. The exposed portion of the third and the second dielectric layers are removed with a selective wet cleaning step. S/D extension regions are formed in the substrate with the gate conductor as a mask. A first spacer is formed on the sidewall of the gate conductor and a portion of the first dielectric layer exposed by the first spacer is removed. S/D regions are formed in the substrate at both sides of the first spacer. A metal silicide layer is formed on the S/D regions. | 08-29-2013 |
20130234252 | INTEGRATED CIRCUIT AND METHOD FOR FABRICATING THE SAME - An integrated circuit includes a substrate, a first semiconductor device, a second semiconductor device and an interlayer dielectric layer. At least one isolation structure has been formed in the he substrate so as to separate the substrate into a first active region and a second active region. The first semiconductor device disposed on the first active region of the substrate includes a first gate insulating layer and a poly-silicon gate stacked on the substrate sequentially. The second semiconductor device disposed on the second active region of the substrate includes a second gate insulating layer and a metal gate stacked on the substrate sequentially. The material of the second gate insulating layer is different from that of the first gate insulating layer. The thickness of the metal gate is greater than that of the poly-silicon gate. The interlayer dielectric layer is disposed on the substrate and covering the first semiconductor device. | 09-12-2013 |
20140091383 | SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is described. A stacked gate dielectric is formed over a substrate, including a first dielectric layer, a second dielectric layer and a third dielectric layer from bottom to top. A conductive layer is formed on the stacked gate dielectric and then patterned to form a gate conductor. The exposed portion of the third and the second dielectric layers are removed with a selective wet cleaning step. S/D extension regions are formed in the substrate with the gate conductor as a mask. A first spacer is formed on the sidewall of the gate conductor and a portion of the first dielectric layer exposed by the first spacer is removed. S/D regions are formed in the substrate at both sides of the first spacer. A metal silicide layer is formed on the S/D regions. | 04-03-2014 |
20140353739 | Semiconductor device and fabrication method thereof - A semiconductor device including a first gate structure and a second gate structure immediately adjacent to each other with a spacer therebetween. Line width of the top of the second gate structure is not less than that of the bottom thereof. A fabrication method thereof is also disclosed. A transient first gate structure and a temporary gate structure are formed by etching through a first hard mask. A second gate structure is formed between a first spacer and a second spacer opposite to each other and disposed respectively on the transient first gate structure and temporary gate structure. The second gate structure is covered with a second hard mask. An etch process is performed through a patterned photoresist layer to remove exposed first hard mask and temporary gate structure and to partially remove exposed portion of first hard mask and transient first gate structure to form the first gate structure. | 12-04-2014 |
20150179748 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region. | 06-25-2015 |
Patent application number | Description | Published |
20110223753 | Hard Mask Removal for Semiconductor Devices - A method of removing a hard mask during fabrication of semiconductor devices is provided. A protective layer, such as a bottom anti-reflective coating (BARC) layer or other dielectric layer, is formed over structures formed on a substrate, wherein spacers are formed alongside the structures. In an embodiment, the structures are gate electrodes having a hard mask formed thereon and the spacers are spacers formed alongside the gate electrodes. A photoresist layer is formed over the protective layer, and the photoresist layer may be patterned to remove a portion of the photoresist layer over portions of the protective layer. Thereafter, an etch-back process is performed, such that the protective layer adjacent to the spacers remains to substantially protect the spacers. The hard mask is then removed while the protective layer protects the spacers. | 09-15-2011 |
20110252387 | METHOD AND APPARATUS FOR REDUCING IMPLANT TOPOGRAPHY REFLECTION EFFECT - Embodiments of the present disclosure provide methods and apparatuses for integrated circuits. An exemplary integrated circuit (IC) method includes providing an IC design layout that includes a design feature; determining a dimensional difference between the design feature and a corresponding developed photoresist feature of a photoresist layer; modifying the CD of the design feature to compensate for the difference, thereby generating a modified IC design layout; and making a mask using the modified IC design layout. | 10-13-2011 |
20110294286 | REVERSE PLANARIZATION METHOD - A method for fabricating an integrated circuit device is disclosed. The method includes providing a substrate; forming a semiconductor feature over the substrate; forming a first photoresist layer over the substrate; performing a lithography process on the first photoresist layer, such the first photoresist layer includes an opening therein that exposes the semiconductor feature; performing a stabilization process on the first photoresist layer; forming a second photoresist layer over the first photoresist layer, wherein the second photoresist layer fills the opening; and etching back the first and second photoresist layers until the semiconductor feature is exposed. | 12-01-2011 |
Patent application number | Description | Published |
20140354470 | Signal Generating Method and Radar System - A signal generating method for a radar system includes generating a first chirp signal and a second chirp signal having a first time delay relative to the first chirp signal; and combining the first chirp signal and the second chirp signal to determine a frequency modulated signal, wherein the first chirp signal and the second chirp signal are N-step linear stepped frequency modulated continuous waves having the same frequency modulation bandwidth, such that the frequency modulated signal includes i steps of the first chirp signal in a first duration, an interleaved combination of N−i steps of the first chirp signal and N−i steps of the second chirp signal in a second duration, and i steps of the second chirp signal in a third duration. | 12-04-2014 |
20150260841 | Alarm System and Method for Vehicle - An alarm system for a vehicle comprises a sensor disposed on an installation plane of the vehicle, configured to emit a plurality of frequency-modulated continuous waveform (FMCW) signals toward a reverse plane of the installation plane and receiving reflected signals of the plurality of FMCW signals, to detect information of a plurality of targets within a specified range corresponding to the vehicle; an alarm being controlled to generate an alarm signal; and a control module coupled to the sensor and the alarm, capable of receiving the information of the plurality of targets detected by the sensor; determining a vehicle information of the vehicle in relation to an external environment according to the information of the plurality of targets; and determining movement statuses of the plurality of targets in relation to the vehicle according to the vehicle information and the information of the plurality of targets, and accordingly controlling the alarm. | 09-17-2015 |
20150276929 | Signal Processing Method and Device for Frequency-Modulated Continuous Waveform Radar System - A signal processing method for a frequency-modulated continuous waveform (FMCW) radar system includes receiving a plurality of feedback signals from a plurality of targets and performing analog to digital conversion on the plurality of feedback signals to obtain a digital receiving signal corresponding to the plurality of feedback signals, performing a window function on the digital receiving signal to obtain a window transformation signal corresponding to the digital receiving signal, performing time-domain to frequency-domain conversion on the window transformation signal to obtain a spectrum signal of the window transformation signal, performing two beat frequency detections on the spectrum signal, and determining distances and speeds of the plurality of targets in comparison to the FMCW radar system according to results of the two beat frequency detections. | 10-01-2015 |
Patent application number | Description | Published |
20090035958 | ELECTRONIC DEVICE AND ELASTIC SHEET UNIT THEREOF - An electronic device includes a body, a first circuit board, an electronic element set and an elastic sheet unit. The body includes a first surface, a second surface and at least one through hole. The first surface is opposite to the second surface. The through hole passes through the body. The first circuit board includes a first conductive portion. The electronic element set is provided at the first surface. The electronic element set includes a second conductive portion. The elastic sheet unit includes a fixing element and two elastic sheets. The fixing element fixes the elastic sheets on the second surface. Each of the elastic sheets includes a first end and a second end. The first ends abut the first conductive portion, and the second ends pass through the through hole to abut the second conductive portion. | 02-05-2009 |
20090173606 | Keyboard - A keyboard includes a printed circuit board, a light guide sheet, a keypad member and a light shield. The printed circuit board has a plurality of light-emitting devices. The light guide sheet is disposed over the printed circuit board to receive the light output from the light-emitting devices. The keypad member has a plurality of keys, wherein the light guide sheet is disposed between the printed circuit board and the keypad member. The light shield is disposed between the light guide sheet and the keypad member. The light shield has a light-absorbing surface, a light-reflective surface and a plurality of light-outlet holes. The light-reflective surface faces the light guide sheet. The light-absorbing surface faces the keypad member. The light output from the light-emitting devices passes the light-outlet holes to illuminate the keypad member. | 07-09-2009 |
20090209301 | ELECTRONIC DEVICE WITH DETACHABLE KEYPAD MODULE - The invention provides an electronic device with a detachable keypad module including a casing, a main circuit board and a detachable keypad module. The detachable keypad module is slidingly disposed at the casing and electrically connected to the main circuit board. The detachable keypad module includes a plurality of keys, a keypad circuit board and a keypad casing. The keypad circuit board is disposed between the keys and the main circuit board. | 08-20-2009 |
20100020999 | SPEAKER MODULE OF ELECTRONIC DEVICE - An acoustic speaker module of a portable electronic device includes an acoustic housing, an acoustic speaker, a chip card and an elastic member. The acoustic housing has an accommodation space, a first opening and a second opening. The acoustic speaker is seamlessly connected with the first opening. The chip card is disposed at the second opening. The elastic member and the chip card are disposed at the second opening to make the accommodation space to form a hermetical space. | 01-28-2010 |
20100144409 | SLIDING TYPE HANDHELD MOBILE DEVICE WITH GREAT SLIDING RANGE - A sliding type handheld mobile device is disclosed. A screen module covers a plurality of keys of a body, and may slide relative to the body to expose the keys. The screen module has an opening to allow the FPC to pass through and connect to the body. One end of a linkage is connected to the body, and another end is connected to a shuttle to make the linkage driven by the body and push the shuttle to cover the opening. This may prevent electronic components inside the screen module from being exposed. | 06-10-2010 |
20100182739 | HANDHELD ELECTRONIC DEVICE - A handheld electronic device includes a first body, a second body, a flexible electrical connector, and a protection cover. The second body is slidably stacked with the first body. The flexible electrical connector is electrically connected between the first body and the second body. The cover is slidably disposed between the first body and the second body. The cover is at an initial position when the first body and the second body are in a stacked state. The cover shields the flexible electrical connector exposed after the second body moves when the first body and the second body are in a spread state. As a result, the lifetime of the handheld electronic device can be prolonged. Additionally, the available region of the handheld electronic device in the spread state can be increased to provide higher design flexibility. | 07-22-2010 |
Patent application number | Description | Published |
20130167757 | ADJUSTABLE DESK - An adjustable desk includes a desk board, a supporting unit, and a first adjusting unit. The desk board includes front and rear ends. The supporting unit disposed between the desk board and the ground includes a first leg pivotally connected with the front end. The first adjusting unit mounted between the desk board and the first leg includes a screw shaft, at least one linkage, and at least one level. The linkage is engaged screwedly with screw shaft. The level pivotally connected between the linkage and the rear end. While the screw shaft is rotated, the linkage is moved axially between two ends of the outer screw portions to drive the level pivoting with respect to the screw shaft. The desk board is pivoted with respect to the first leg to adjust a slope angle formed between the desk board and the supporting unit steplessly without tools. | 07-04-2013 |
20140048671 | Angle Inclining Structure for a Desk - An angle inclining structure for a desk contains a body and an angle inclining structure, the body including two opposite support legs, a horizontal rod, and two support posts connected with the two support legs and a first plate, wherein the angle inclining structure is disposed between the horizontal rod and the first plate and has a holder, a covering member, and a buffer member, the holder includes a locking tab and connects with the horizontal rod, a receiving room to receive a retainer and a pushing element, and a groove to receive a positioning member; the covering member includes a slot, plural tilted recesses, and a locking hole; a free end of the buffer member axially couples with one end of the covering member and a bottom surface of the first plate so that when the first plate axially rotates upwardly, the covering member slides on the holder. | 02-20-2014 |