Patent application number | Description | Published |
20080309897 | MULTIVARIABLE SOLVER FOR OPTICAL PROXIMITY CORRECTION - The method of the invention tracks how the collective movement of edge segments in a mask layout alters the resist image values at control points in the layout and simultaneously determines a correction amount for each edge segment in the layout. A multisolver matrix that represents the collective effect of movements of each edge segment in the mask layout is used to simultaneously determine the correction amount for each edge segment in the mask layout. | 12-18-2008 |
20100161093 | MULTIVARIABLE SOLVER FOR OPTICAL PROXIMITY CORRECTION - The method of the invention tracks how the collective movement of edge segments in a mask layout alters the resist image values at control points in the layout and simultaneously determines a correction amount for each edge segment in the layout. A multisolver matrix that represents the collective effect of movements of each edge segment in the mask layout is used to simultaneously determine the correction amount for each edge segment in the mask layout. | 06-24-2010 |
20100167184 | LITHOGRAPHIC PROCESSING METHOD, AND DEVICE MANUFACTURED THEREBY - A multivariable solver for proximity correction uses a Jacobian matrix to approximate effects of perturbations of segment locations in successive iterations of a design loop. The problem is formulated as a constrained minimization problem with box, linear equality, and linear inequality constraints. To improve computational efficiency, non-local interactions are ignored, which results in a sparse Jacobian matrix. | 07-01-2010 |
20110173578 | Method and Apparatus for Enhancing Signal Strength for Improved Generation and Placement of Model-Based Sub-Resolution Assist Features (MB-SRAF) - Model-Based Sub-Resolution Assist Feature (SRAF) generation process and apparatus are disclosed, in which an SRAF guidance map (SGM) is iteratively optimized to finally output an optimized set of SRAFs as a result of enhanced signal strength obtained by iterations involving SRAF polygons and SGM image. SRAFs generated in a prior round of iteration are incorporated in a mask layout to generate a subsequent set of SRAFs. The iterative process is terminated when a set of SRAF accommodates a desired process window or when a predefined process window criterion is satisfied. Various cost functions, representing various lithographic responses, may be predefined for the optimization process. | 07-14-2011 |
20120272196 | Local Multivariable Solver for Optical Proximity Correction in Lithographic Processing Method, and Device Manufactured Thereby - A multivariable solver for proximity correction uses a Jacobian matrix to approximate effects of perturbations of segment locations in successive iterations of a design loop. The problem is formulated as a constrained minimization problem with box, linear equality, and linear inequality constraints. To improve computational efficiency, non-local interactions are ignored, which results in a sparse Jacobian matrix. | 10-25-2012 |
20130000505 | Method and Apparatus for Cost Function Based Simultaneous OPC and SBAR Optimization - Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features. | 01-03-2013 |
20130042212 | Multivariable Solver for Optical Proximity Correction - The method of the invention tracks how the collective movement of edge segments in a mask layout alters the resist image values at control points in the layout and simultaneously determines a correction amount for each edge segment in the layout. A multisolver matrix that represents the collective effect of movements of each edge segment in the mask layout is used to simultaneously determine the correction amount for each edge segment in the mask layout. | 02-14-2013 |
20130111421 | Method and Apparatus for Model Based Flexible MRC | 05-02-2013 |
20130311959 | MULTIVARIABLE SOLVER FOR OPTICAL PROXIMITY CORRECTION - The method of the invention tracks how the collective movement of edge segments in a mask layout alters the resist image values at control points in the layout and simultaneously determines a correction amount for each edge segment in the layout. A multisolver matrix that represents the collective effect of movements of each edge segment in the mask layout is used to simultaneously determine the correction amount for each edge segment in the mask layout. | 11-21-2013 |
20130311960 | METHOD AND APPARATUS FOR ENHANCING SIGNAL STRENGTH FOR IMPROVED GENERATION AND PLACEMENT OF MODEL-BASED SUB-RESOLUTION ASSIST FEATURES (MB-SRAF) - Model-Based Sub-Resolution Assist Feature (SRAF) generation process and apparatus are disclosed, in which an SRAF guidance map (SGM) is iteratively optimized to finally output an optimized set of SRAFs as a result of enhanced signal strength obtained by iterations involving SRAF polygons and SGM image. SRAFs generated in a prior round of iteration are incorporated in a mask layout to generate a subsequent set of SRAFs. The iterative process is terminated when a set of SRAF accommodates a desired process window or when a predefined process window criterion is satisfied. Various cost functions, representing various lithographic responses, may be predefined for the optimization process. | 11-21-2013 |
20140351772 | METHOD AND APPARATUS FOR MODEL BASED FLEXIBLE MRC - Described herein is a method of processing a pattern layout for a lithographic process, the method comprising: identifying a feature from a plurality of features of the layout, the feature violating a pattern layout requirement; and reconfiguring the feature, wherein the reconfigured feature still violates the pattern layout requirement, the reconfiguring including evaluating a cost function that measures a lithographic metric affected by a change to the feature and a parameter characteristic of relaxation of the pattern layout requirement. | 11-27-2014 |
20140359543 | METHOD AND APPARATUS FOR COST FUNCTION BASED SIMULTANEOUS OPC AND SBAR OPTIMIZATION - Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features. | 12-04-2014 |
Patent application number | Description | Published |
20100218784 | COPPER DEPOSITION CHAMBER HAVING INTEGRATED BEVEL CLEAN WITH EDGE BEVEL REMOVAL DETECTION - Embodiments of the invention generally provide apparatus and method for detecting and controlling edge bevel removal of a semiconductor substrate. One embodiment of the present invention provides an apparatus for inspecting a rotating substrate. The apparatus comprises a substrate support configured to support the rotating substrate on a back side and rotate the substrate about a central axis, and a sensor positioned above the substrate support, the sensor being configured to inspect a front side of the rotating substrate while moving simultaneously radially across the substrate. | 09-02-2010 |
20100279516 | APPARATUS AND METHOD OF ALIGNING AND POSITIONING A COLD SUBSTRATE ON A HOT SURFACE - Embodiments of the invention contemplate a method, apparatus and system that are used to support and position a substrate on a surface that is at a different temperature than the initial, or incoming, substrate temperature. Embodiments of the invention may also include a method of controlling the transfer of heat between a substrate and substrate support positioned in a processing chamber. The apparatus and methods described herein generally may also provide an inexpensive and simple way of accurately positioning a substrate on a substrate support that is positioned in a semiconductor processing chamber. Substrate processing chambers that can benefit from the various embodiments described herein include, but are not limited to RTP, CVD, PVD, ALD, plasma etching, and/or laser annealing chambers. | 11-04-2010 |
20120073974 | Non-Permeable Substrate Carrier For Electroplating - One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The substrate carrier comprises a non-conductive carrier body on which the substrates are to be held. Electrically-conductive lines are embedded within the carrier body, and a plurality of contact clips are coupled to the electrically-conductive lines embedded within the carrier body. The contact clips hold the substrates in place and electrically couple the substrates to the electrically-conductive lines. The non-conductive carrier body is continuous so as to be impermeable to flow of electroplating solution through the non-conductive carrier body. Other embodiments, aspects and features are also disclosed. | 03-29-2012 |
20120073976 | Maintainable substrate carrier for electroplating - One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The carrier includes a non-conductive carrier body on which the substrates are placed and conductive lines embedded within the carrier body. A plurality of conductive clip attachment parts are attached in a permanent manner to the conductive lines embedded within the carrier body. A plurality of contact clips are attached in a removable manner to the clip attachment parts. The contact clips hold the substrates in place and conductively connecting the substrates with the conductive lines. Other embodiments, aspects and features are also disclosed. | 03-29-2012 |
20140034488 | NON-PERMEABLE SUBSTRATE CARRIER FOR ELECTROPLATING - One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The substrate carrier comprises a non-conductive carrier body on which the substrates are to be held. Electrically-conductive lines are embedded within the carrier body, and a plurality of contact clips are coupled to the electrically-conductive lines embedded within the carrier body. The contact clips hold the substrates in place and electrically couple the substrates to the electrically-conductive lines. The non-conductive carrier body is continuous so as to be impermeable to flow of electroplating solution through the non-conductive carrier body. Other embodiments, aspects and features are also disclosed. | 02-06-2014 |
20160108541 | NON-PERMEABLE SUBSTRATE CARRIER FOR ELECTROPLATING - One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The substrate carrier comprises a non-conductive carrier body on which the substrates are to be held. Electrically-conductive lines are embedded within the carrier body, and a plurality of contact clips are coupled to the electrically-conductive lines embedded within the carrier body. The contact clips hold the substrates in place and electrically couple the substrates to the electrically-conductive lines. The non-conductive carrier body is continuous so as to be impermeable to flow of electroplating solution through the non-conductive carrier body. Other embodiments, aspects and features are also disclosed. | 04-21-2016 |
Patent application number | Description | Published |
20090319281 | CUE-BASED AUDIO CODING/DECODING - Generic and specific C-to-E binaural cue coding (BCC) schemes are described, including those in which one or more of the input channels are transmitted as unmodified channels that are not downmixed at the BCC encoder and not upmixed at the BCC decoder. The specific BCC schemes described include 5-to-2, 6-to-5, 7-to-5, 6.1-to-5.1, 7.1-to-5.1, and 6.2-to-5.1, where “0.1” indicates a single low-frequency effects (LFE) channel and “0.2” indicates two LFE channels. | 12-24-2009 |
20110164756 | Cue-Based Audio Coding/Decoding - Generic and specific C-to-E binaural cue coding (BCC) schemes are described, including those in which one or more of the input channels are transmitted as unmodified channels that are not downmixed at the BCC encoder and not upmixed at the BCC decoder. The specific BCC schemes described include 5-to-2, 6-to-5, 7-to-5, 6.1-to-5.1, 7.1-to-5.1, and 6.2-to-5.1, where “.1” indicates a single low-frequency effects (LFE) channel and “.2” indicates two LFE channels. | 07-07-2011 |
Patent application number | Description | Published |
20140332820 | Flip Light Emitting Diode Chip and Method of Fabricating the Same - A method of fabricating a light emitting diode device comprises depositing conductive material to cover a portion of surface of a conductive and reflective layer to form a first contact pad, and surfaces between adjacent first trenches to form a second contact pad; and depositing a first passivation layer over uncovered portion of surface of the conductive and reflective layer to form a first planar passivation contact surface between the first contact pad and the second trench and depositing bonding material to cover a portion of surface of the first contact pad, a portion of the second contact pad and a portion of the first planar passivation contact to form a first light emitting diode bonding pad on the first contact pad, a second light emitting diode bonding pad on the second contact pad, and a third light emitting diode bonding pad on the first planar passivation contact. | 11-13-2014 |
20140367716 | CHIP ON BOARD LIGHT EMITTING DIODE DEVICE HAVING DISSIPATION UNIT ARRAY - A chip on board light emitting diode (LED) device comprises a LED device, a printed circuit board (PCB) and a dissipation unit array. The LED device comprises a LED substrate, a first contact pad and a second contact pad above the LED substrate and a thermal layer formed on top surface of the LED device. The thermal layer comprises a thermal conductive material. A printed circuit board (PCB) comprises a PCB substrate with a thermal projection extending from surface of the PCB substrate, and a first and a second electrode pads above the PCB substrate. The thermal projection and the PCB substrate comprise the thermal conductive material. The dissipation unit array comprises a plurality of dissipation units each disposed between the LED device and the PCB. The thermal layer is thermally coupled to the thermal projection via at least one dissipation unit. Each of the first and second contact pads is electrically coupled to the corresponding electrode pad via at least one dissipation unit. | 12-18-2014 |
20150123161 | LED PACKAGE AND METHOD OF MANUFACTURING THE SAME - A method is provided for manufacturing a LED package base including providing a metal core substrate having a top surface and a bottom surface and forming two first trenches in the metal core substrate. The first trenches extend from the top surface to the bottom surface, The method further includes at least partially filling in the first trenches with first dielectric material to form dielectric isolations. The dielectric isolations divide the metal core substrate into three metal core portions. Two of the metal core portions may be configured to serve as LED package electrodes. The method also includes applying a second dielectric material to cover at least a portion of the first dielectric material, and forming a conductive layer over the second dielectric material to form circuit contacts. The conductive layer includes a first conductive material. | 05-07-2015 |
Patent application number | Description | Published |
20080213628 | Perpendicular recording media with Ta transition layer to improve magnetic and corrosion resistance performances and method of manufacturing the same - A perpendicular magnetic recording medium comprising a substrate, an underlayer, a Ta-containing seedlayer, a magnetic layer, wherein the underlayer comprises a soft magnetic material and the Ta-containing seedlayer is between the underlayer and the magnetic layer, and a process for improving corrosion resistance of the recording medium and for manufacturing the recording medium are disclosed. | 09-04-2008 |
20100020441 | METHOD AND MANUFACTURE PROCESS FOR EXCHANGE DECOUPLED FIRST MAGNETIC LAYER - A perpendicular magnetic recording medium having a dual-layer magnetic film is disclosed. The bottom layer is completely exchange decoupled, and the top layer contains a certain amount of exchange coupling optimized for recording performance. Preferably, the bottom magnetic layer contains stable oxide material (for example, TiO | 01-28-2010 |
20100021770 | NICKEL BASED ALLOYS AS CRYSTAL GROWTH ENHANCING AND MECHANICAL STRENGTHENING LAYER FOR PERPENDICULAR RECORDING MEDIA - The invention relates to a perpendicular magnetic recording medium having a substrate and a seed layer comprising a Ni alloy. | 01-28-2010 |
20100177439 | PERPENDICULAR MEDIA WITH REDUCED SIDE TRACK ERASURE - A media for perpendicular recording and a method of creating the media is provided. The media includes a hard recording layer and a soft underlayer (SUL). The SUL is composed of at least two anti-ferromagnetically coupled (AFC) sub-underlayers. The sub-underlayers respond to a magnetic field established during dynamic reversal with respective magnetic fields. The sub-underlayers are formed and disposed to differ in one or more magnetic moment, anisotropy, and thickness, so that their respective magnetic fields constructively interfere in one or more points in the hard recording layer, thereby reducing a total SUL magnetic field response to the dynamic reversal field approximately to zero at one or more points in the hard recording layer, which reduces side track erasure. | 07-15-2010 |
20110003175 | COMPOSITE PERPENDICULAR MEDIA WITH GRADED ANISOTROPY LAYERS AND EXCHANGE BREAK LAYERS - A perpendicular magnetic recording layer may include a hard granular layer, an exchange break layer formed on the hard granular layer, and a soft granular layer formed on the exchange break layer. In some embodiments, the exchange break layer may consist essentially of ruthenium. In some embodiments, the perpendicular magnetic recording layer may include n magnetic layers and n−1 exchange break layers, where n is greater than or equal to three, and where the n−1 exchange break layers alternate with the n magnetic layers in the magnetic recording layer. | 01-06-2011 |
20120225324 | PERPENDICULAR MEDIA WITH DUAL SOFT MAGNETIC LAYERS - A recording medium having a substrate, a first soft magnetic underlayer, a second soft magnetic underlayer and a perpendicular magnetic recording layer without a spacer layer between the first and second soft magnetic underlayers is disclosed. | 09-06-2012 |
20140178714 | Method and Manufacture Process for Exchange Decoupled First Magnetic Layer - A perpendicular magnetic recording medium having a dual-layer magnetic film is disclosed. The bottom layer is completely exchange decoupled, and the top layer contains a certain amount of exchange coupling optimized for recording performance. Preferably, the bottom magnetic layer contains stable oxide material (for example, TiO | 06-26-2014 |
Patent application number | Description | Published |
20090130452 | Low Embodied Energy Wallboards and Methods of Making Same - Wallboards, as well as other building materials, are produced by methods which use significantly reduced embodied energy, generating far less greenhouse gases when compared with the energy used to fabricate gypsum wallboard. A novel cementitious core, consisting in one embodiment of post-industrial waste such as slag and combined with pH modifiers, provides a controlled exothermic reaction to create a gypsum-wallboard-like core which can be wrapped in a selected material such as recycled paper and manufactured on a conveyor system to appear, weigh and handle similar to gypsum wallboard, but without the large amounts of energy required to make gypsum wallboard. The manufacturing process results in lower greenhouse gas emissions than the processes used to make gypsum wallboard. | 05-21-2009 |
20130145969 | Low Embodied Energy Wallboards and Methods of Making Same - Wallboards, as well as other building materials, are produced by methods which use significantly reduced embodied energy, generating far less greenhouse gases when compared with the energy used to fabricate gypsum wallboard. A novel cementitious core, consisting in one embodiment of post-industrial waste such as slag and combined with pH modifiers, provides a controlled exothermic reaction to create a gypsum-wallboard-like core which can be wrapped in a selected material such as recycled paper and manufactured on a conveyor system to appear, weigh and handle similar to gypsum wallboard, but without the large amounts of energy required to make gypsum wallboard. The manufacturing process results in lower greenhouse gas emissions than the processes used to make gypsum wallboard. | 06-13-2013 |
Patent application number | Description | Published |
20120066791 | RICE TRANSGENIC EVENT 17314 AND METHODS OF USE THEREOF - The present invention provides a transgenic rice event 17314 and plants, plant cells, seeds, plant parts, and commodity products derived from event 17314. The present invention also provides polynucleotides specific for event 17314 and plants, plant cells, seeds, plant parts, and commodity products comprising polynucleotides specific for event 17314. The invention also provides methods related to event 17314. | 03-15-2012 |
20120096582 | RICE TRANSGENIC EVENT 17053 AND METHODS OF USE THEREOF - The present invention provides a transgenic rice event 17053 and plants, plant cells, seeds, plant parts, and commodity products derived from event 17053. The present invention also provides polynucleotides specific for event 17053 and plants, plant cells, seeds, plant parts, and commodity products comprising polynucleotides specific for event 17053. The invention also provides methods related to event 17053. | 04-19-2012 |
Patent application number | Description | Published |
20140080308 | RADICAL-COMPONENT OXIDE ETCH - A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a nitrogen-and-hydrogen-containing precursor. Reactants thereby produced etch the patterned heterogeneous structures with high silicon oxide selectivity while the substrate is at high temperature compared to typical Siconi™ processes. The etch proceeds without producing residue on the substrate surface. The methods may be used to remove silicon oxide while removing little or no silicon, polysilicon, silicon nitride or titanium nitride. | 03-20-2014 |
20140080310 | SILICON-CARBON-NITRIDE SELECTIVE ETCH - A method of etching exposed silicon-nitrogen-and-carbon-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-nitrogen-and-carbon-containing material. The plasma effluents react with the patterned heterogeneous structures to selectively remove silicon-nitrogen-and-carbon-containing material from the exposed silicon-nitrogen-and-carbon-containing material regions while very slowly removing selected other exposed materials. The silicon-nitrogen-and-carbon-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element controls the number of ionically-charged species that reach the substrate. The methods may be used to selectively remove silicon-nitrogen-and-carbon-containing material at a faster rate than exposed silicon oxide or exposed silicon nitride. | 03-20-2014 |
20140166617 | NON-LOCAL PLASMA OXIDE ETCH - A method of etching exposed titanium oxide on heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flawed into a substrate processing region where the plasma effluents may combine with a nitrogen-containing precursor such as an amine (N:) containing precursor. Reactants thereby produced etch, the patterned heterogeneous structures with high titanium oxide selectivity while the substrate is at elevated temperature. Titanium oxide etch may alternatively involve supplying a fluorine-containing precursor and a source of nitrogen-and-hydrogen-containing precursor to the remote plasma. The methods may be used to remove titanium oxide while removing little or no low-K dielectric, polysilicon, silicon nitride or titanium nitride. | 06-19-2014 |
20150079797 | SELECTIVE ETCH OF SILICON NITRIDE - A method of etching silicon nitride on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a nitrogen-and-oxygen-containing precursor. Plasma effluents from two remote plasmas are flowed into a substrate processing region where the plasma effluents react with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while very slowly removing silicon, such as polysilicon. The silicon nitride selectivity results partly from the introduction of fluorine-containing precursor and nitrogen-and-oxygen-containing precursor using distinct (but possibly overlapping) plasma pathways which may be in series or in parallel. | 03-19-2015 |
20150235863 | RADICAL-COMPONENT OXIDE ETCH - A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a nitrogen-and-hydrogen-containing precursor. Reactants thereby produced etch the patterned heterogeneous structures with high silicon oxide selectivity while the substrate is at high temperature compared to typical Siconi™ processes. The etch proceeds without producing residue on the substrate surface. The methods may be used to remove silicon oxide while removing little or no silicon, polysilicon, silicon nitride or titanium nitride. | 08-20-2015 |
20150371865 | HIGH SELECTIVITY GAS PHASE SILICON NITRIDE REMOVAL - A method of etching silicon nitride on patterned heterogeneous structures is described and includes a gas phase etch using partial remote plasma excitation. The remote plasma excites a fluorine-containing precursor and the plasma effluents created are flowed into a substrate processing region. A hydrogen-containing precursor, e.g. water, is concurrently flowed into the substrate processing region without plasma excitation. The plasma effluents are combined with the unexcited hydrogen-containing precursor in the substrate processing region where the combination reacts with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while retaining silicon, such as polysilicon. | 12-24-2015 |
20150371866 | HIGHLY SELECTIVE DOPED OXIDE REMOVAL METHOD - A method of etching doped silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using partial remote plasma excitation. The remote plasma excites a fluorine-containing precursor and the plasma effluents created are flowed into a substrate processing region. A hydrogen-containing precursor, e.g. water, is concurrently flowed into the substrate processing region without plasma excitation. The plasma effluents are combined with the unexcited hydrogen-containing precursor in the substrate processing region where the combination reacts with the doped silicon oxide. The plasmas effluents react with the patterned heterogeneous structures to selectively remove doped silicon oxide. | 12-24-2015 |