Patent application number | Description | Published |
20100052155 | METHODS OF PROMOTING ADHESION BETWEEN TRANSFER MOLDED IC PACKAGES AND INJECTION MOLDED PLASTICS FOR CREATING OVER-MOLDED MEMORY CARDS - A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package. | 03-04-2010 |
20100055836 | METHOD OF STACKING AND INTERCONNECTING SEMICONDUCTOR PACKAGES VIA ELECTRICAL CONNECTORS EXTENDING BETWEEN ADJOINING SEMICONDUCTOR PACKAGES - An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages. | 03-04-2010 |
20100055847 | METHODS OF PROMOTING ADHESION BETWEEN TRANSFER MOLDED IC PACKAGES AND INJECTION MOLDED PLASTICS FOR CREATING OVER-MOLDED MEMORY CARDS - A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package. | 03-04-2010 |
20100252315 | Printed Circuit Board With Coextensive Electrical Connectors And Contact Pad Areas - A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads. | 10-07-2010 |
20110316164 | CORRUGATED DIE EDGE FOR STACKED DIE SEMICONDUCTOR PACKAGE - A semiconductor die and semiconductor package formed therefrom, and methods of fabricating the semiconductor die and package, are disclosed. The semiconductor die includes an edge formed with a plurality of corrugations defined by protrusions between recesses. Bond pads may be formed on the protrusions. The semiconductor die formed in this manner may be stacked in the semiconductor package in staggered pairs so that the die bond pads on the protrusions of a lower die are positioned in the recesses of the upper die. | 12-29-2011 |
20120025396 | SEMICONDUCTOR DEVICE WITH DIE STACK ARRANGEMENT INCLUDING STAGGERED DIE AND EFFICIENT WIRE BONDING - A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package. | 02-02-2012 |
20120164828 | HIDDEN PLATING TRACES - A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided. | 06-28-2012 |
20130207280 | SEMICONDUCTOR DEVICE WITH DIE STACK ARRANGEMENT INCLUDING STAGGERED DIE AND EFFICIENT WIRE BONDING - A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package. | 08-15-2013 |
20130299959 | RIGID WAVE PATTERN DESIGN ON CHIP CARRIER SUBSTRATE AND PRINTED CIRCUIT BOARD FOR SEMICONDUCTOR AND ELECTRONIC SUB-SYSTEM PACKAGING - A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking. | 11-14-2013 |
20150054177 | RIGID WAVE PATTERN DESIGN ON CHIP CARRIER SUBSTRATE AND PRINTED CIRCUIT BOARD FOR SEMICONDUCTOR AND ELECTRONIC SUB-SYSTEM PACKAGING - A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking. | 02-26-2015 |