Patent application number | Description | Published |
20090174045 | Bump Pad Metallurgy Employing An Electrolytic Cu / Electorlytic Ni / Electrolytic Cu Stack - An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers. | 07-09-2009 |
20090184407 | METHOD TO RECOVER UNDERFILLED MODULES BY SELECTIVE REMOVAL OF DISCRETE COMPONENTS - Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate. | 07-23-2009 |
20090267228 | INTERMETALLIC DIFFUSION BLOCK DEVICE AND METHOD OF MANUFACTURE - One embodiment of the present invention is directed to an under bump metallurgy material. The under bump metallurgy material of this embodiment includes an adhesion layer and a conduction layer formed on top of the adhesion layer. The under bump metallurgy material of this embodiment also includes a barrier layer plated on top of the conduction layer and a sacrificial layer plated on top of the barrier layer. The conduction layer of this embodiment includes a trench formed therein, the trench contacting a portion of the barrier layer and blocking a path of intermetallic formation between the conduction layer and the sacrificial layer. | 10-29-2009 |
20100258335 | STRUCTURES FOR IMPROVING CURRENT CARRYING CAPABILITY OF INTERCONNECTS AND METHODS OF FABRICATING THE SAME - Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy. | 10-14-2010 |
20100258940 | BALL-LIMITING-METALLURGY LAYERS IN SOLDER BALL STRUCTURES - A solder ball structure and a method for forming the same. The structure includes (i) a first dielectric layer which includes a top dielectric surface, (ii) an electrically conductive line, (iii) a second dielectric layer, (iv) a ball-limiting-metallurgy (BLM) region, and (v) a solder ball. The BLM region is electrically connected to the electrically conductive line and the solder ball. The BLM region has a characteristic that a length of the longest straight line segment which is parallel to the top dielectric surface of the first dielectric layer and is entirely in the BLM region does not exceed a pre-specified maximum value. The pre-specified maximum value is at most one-half of a maximum horizontal dimension of the BLM region measured in a horizontal direction parallel to the top dielectric surface of the first dielectric layer. | 10-14-2010 |
20110162876 | CURRENT SPREADING IN ORGANIC SUBSTRATES - Solutions for improving current spreading in organic substrates are disclosed. In one aspect, a packaging substrate is disclosed, the packaging substrate comprising: a substrate base having a first surface and a second surface; and a controlled collapse chip connect (C4) pad over a portion of the first surface, the C4 pad including: an electrolessly plated copper (Cu) layer over the first surface; an electrolytic nickel (Ni) portion over the first electrolytic Cu portion; and a first electrolytic Cu portion over the electrolytic Ni portion; wherein the electrolessly plated Cu layer has a portion extending in one direction away from the C4 pad. | 07-07-2011 |
20120043216 | Working electrode design for electrochemical processing of electronic components - An electroplating apparatus is provided that includes a plating tank for containing a plating electrolyte. A counter electrode, e.g., anode, is present in a first portion of the plating tank. A cathode system is present in a second portion of the plating tank. The cathode system includes a working electrode and a thief electrode. The thief electrode is present between the working electrode and the counter electrode. The thief electrode includes an exterior face that is in contact with the plating electrolyte that is offset from the plating surface of the working electrode. In one embodiment, the thief electrode overlaps a portion of the working electrode about the perimeter of the working electrode. In one embodiment, a method is provided of using the aforementioned electroplating apparatus that provides increased uniformity in the plating thickness. | 02-23-2012 |
20120043217 | Rinsing and drying for electrochemical processing - An electroplating/etch apparatus including a fluid jet and a dryer present over the tank containing the electrolyte for the electroplating/etch process. The fluid jet and the dryer remove excess liquids, such as electrolyte, from the component being plated or etched, e.g., working electrode. The working electrode is present on a holder that traverses from a first position within the tank during a plating or etch operation to a second position that is outside the containing the plating electrolyte. The fluid jet rinses the working electrode when the holder is in the second position, and the forced air dryer blows any remaining fluid from the fluid jet and the electrolyte from the working electrode into the tank. | 02-23-2012 |
20120043301 | METHOD AND APPARATUS FOR CONTROLLING AND MONITORING THE POTENTIAL - An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided. | 02-23-2012 |
20120083113 | CREATION OF LEAD-FREE SOLDER JOINT WITH INTERMETALLICS - A method of coupling an integrated circuit to a substrate includes providing the substrate, forming a contact pad in the substrate, contacting the contact pad with a solder ball, and repeatedly exposing the solder ball to a thermal process to cause intermetallics based on a metal in the contact pad to be formed in the thermal ball. | 04-05-2012 |
20120139113 | UNDERCUT-REPAIR OF BARRIER LAYER METALLURGY FOR SOLDER BUMPS AND METHODS THEREOF - A method of making a semiconductor structure includes patterning a barrier layer metallurgy (BLM) which forms an undercut beneath a solder material, and forming a repair material in the undercut and on the solder material. The method also includes removing the repair material from the solder material, and reflowing the solder material. | 06-07-2012 |
20120152750 | MULTI-ANODE SYSTEM FOR UNIFORM PLATING OF ALLOYS - Disclosed are embodiments of an electroplating system and an associated electroplating method that allow for depositing of metal alloys with a uniform plate thickness and with the means to alter dynamically the alloy composition. Specifically, by using multiple anodes, each with different types of soluble metals, the system and method avoid the need for periodic plating bath replacement and also allow the ratio of metals within the deposited alloy to be selectively varied by applying different voltages to the different metals. The system and method further avoids the uneven current density and potential distribution and, thus, the non-uniform plating thicknesses exhibited by prior art methods by selectively varying the shape and placement of the anodes within the plating bath. Additionally, the system and method allows for fine tuning of the plating thickness by using electrically insulating selectively placed prescribed baffles. | 06-21-2012 |
20120187558 | STRUCTURES FOR IMPROVING CURRENT CARRYING CAPABILITY OF INTERCONNECTS AND METHODS OF FABRICATING THE SAME - Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy. | 07-26-2012 |
20120198692 | UNDERBUMP METALLURGY EMPLOYING AN ELECTROLYTIC Cu / ELECTORLYTIC Ni / ELECTROLYTIC Cu STACK - An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers. | 08-09-2012 |
20120325667 | MULTI-ANODE SYSTEM FOR UNIFORM PLATING OF ALLOYS - Disclosed are embodiments of an electroplating system and an associated electroplating method that allow for depositing of metal alloys with a uniform plate thickness and with the means to alter dynamically the alloy composition. Specifically, by using multiple anodes, each with different types of soluble metals, the system and method avoid the need for periodic plating bath replacement and also allow the ratio of metals within the deposited alloy to be selectively varied by applying different voltages to the different metals. The system and method further avoids the uneven current density and potential distribution and, thus, the non-uniform plating thicknesses exhibited by prior art methods by selectively varying the shape and placement of the anodes within the plating bath. Additionally, the system and method allows for fine tuning of the plating thickness by using electrically insulating selectively placed prescribed baffles. | 12-27-2012 |
20130001198 | METHOD AND APPARATUS FOR CONTROLLING AND MONITORING THE POTENTIAL - An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided. | 01-03-2013 |
20130008699 | BALL-LIMITING-METALLURGY LAYERS IN SOLDER BALL STRUCTURES - A structure. The structure includes: a first dielectric layer which includes a top dielectric surface; an electrically conductive line on the first dielectric layer; a second dielectric layer on the first dielectric layer and the electrically conductive line; a ball-limiting-metallurgy (BLM) region on the second dielectric layer and the electrically conductive line such that the BLM region is electrically connected to the electrically conductive line; and a solder ball on the BLM region. The BLM region has a characteristic that a length of the longest straight line segment which is parallel to the top dielectric surface and is entirely in the BLM region does not exceed a pre-specified maximum value, wherein the pre-specified maximum value is at most one-half of a maximum horizontal dimension of the BLM region measured in a horizontal direction parallel to the top dielectric surface. | 01-10-2013 |
20130062209 | WORKING ELECTRODE DESIGN FOR ELECTROCHEMICAL PROCESSING OF ELECTRONIC COMPONENTS - An electroplating apparatus including a plating tank for containing a plating electrolyte. A counter electrode, e.g., anode, is present in a first portion of the plating tank. A cathode system is present in a second portion of the plating tank. The cathode system includes a working electrode and a thief electrode. The thief electrode is present between the working electrode and the counter electrode. The thief electrode includes an exterior face that is in contact with the plating electrolyte that is offset from the plating surface of the working electrode. In one embodiment, the thief electrode overlaps a portion of the working electrode about the perimeter of the working electrode. In one embodiment, a method is provided of using the aforementioned electroplating apparatus that provides increased uniformity in the plating thickness. | 03-14-2013 |
20130284495 | ADDITIVES FOR GRAIN FRAGMENTATION IN Pb-FREE Sn-BASED SOLDER - In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder. | 10-31-2013 |
20130299989 | CHIP CONNECTION STRUCTURE AND METHOD OF FORMING - Chip connection structures and related methods of forming such structures are disclosed. In one case, an interconnect structure is disclosed, the structure including: a pillar connecting an integrated circuit chip and a substrate, the pillar including a barrier layer, a first copper layer over the barrier layer, and a first solder layer over the first copper layer. | 11-14-2013 |
20140021606 | CONTROL OF SILVER IN C4 METALLURGY WITH PLATING PROCESS - A solder structure for joining an IC chip to a package substrate, and method of forming the same are disclosed. In an embodiment, a structure is formed which includes a wafer having a plurality of solder structures disposed above the wafer. A ball limiting metallurgy (BLM) layer disposed beneath each of the solder structures, above the wafer. At least one of the plurality of solder structures has a first composition, and at least another of the plurality of solder structures has a second composition. | 01-23-2014 |
20140021607 | SOLDER VOLUME COMPENSATION WITH C4 PROCESS - An integrated circuit (IC) chip including solder structures for connection to a package substrate, an IC chip package, and a method of forming the same are disclosed. In an embodiment, an IC chip is provided comprising a wafer having a plurality of solder structures disposed above the wafer. A ball limiting metallurgy (BLM) layer is disposed between each of the plurality of solder structures and the wafer. At least one of the plurality of solder structures has a first diameter and a first height, and at least one other solder structure has a second diameter and a second height. The differing heights and volumes of solder structures facilitate solder volume compensation for chip join improvement on the IC chip side rather than the package side. | 01-23-2014 |
20140262458 | UNDER BALL METALLURGY (UBM) FOR IMPROVED ELECTROMIGRATION - An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer. | 09-18-2014 |
20140339699 | UNDER BALL METALLURGY (UBM) FOR IMPROVED ELECTROMIGRATION - An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer. | 11-20-2014 |
20150037971 | CHIP CONNECTION STRUCTURE AND METHOD OF FORMING - Chip connection structures and related methods of forming such structures are disclosed. In one case, an interconnect structure is disclosed, the structure including: a pillar connecting an integrated circuit chip and a substrate, the pillar including a barrier layer, a first copper layer over the barrier layer, and a first solder layer over the first copper layer. | 02-05-2015 |