Patent application number | Description | Published |
20120313552 | ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE - An organic electroluminescent display device includes a display array and a microlens array. The display array includes an organic light emitting surface, a plurality of pixel regions, and a plurality of spacing regions. Each of the spacing regions is disposed between two adjacent pixel regions. The microlens array is disposed on the organic light emitting surface and includes a plurality of first microlenses overlapping the spacing regions in a vertical projective direction. Each of the first microlenses includes a body part and a cambered part. Each of the first microlenses includes a first height and a diameter. The first height is larger than the diameter and smaller than twice the diameter. | 12-13-2012 |
20120313898 | TOUCH-SENSITIVE DEVICE - A touch-sensitive device including a display, a set of solar cells and a set of light sensors is provided. The display includes an external frame and a display panel. The external frame is located around the display panel. The set of solar cells is disposed within the external frame and applied to form a set of infrared light sources in the state of electro-luminescence. The set of light sensors is disposed within the external frame for receiving a corresponding light emitted by the set of infrared light sources. | 12-13-2012 |
20130135591 | OPTICAL FIBER AND PROJECTOR DEVICE - An optical fiber and a projector device are provided. The optical fiber has a main body with a light-emitting curved surface. A curvature radius of the center of the light emitting curved surface facing the main body substantially ranges between 0.05˜1 mm, so that the light emitted from the light-emitting curved surface via the main body is collimated. | 05-30-2013 |
20130207072 | OPTICAL STRUCTURE AND LIGHT EMITTING DEVICE - A light emitting device includes a substrate, a light emitting unit, and a first optical structure. The light emitting unit is disposed on a top surface of the substrate. The first optical structure is disposed on the light emitting unit. The first optical structure includes a plurality of first nanostructures and a plurality of first quantum dot units. Each of the first quantum dot units is disposed in the first nanostructure. The light emitting unit is used to generate a first color light. Each of the first quantum dot units is used to be excited by the first color light to generate a second color light different from the first color light. | 08-15-2013 |
20130249376 | ORGANIC LIGHT EMITTING DEVICE - An organic light emitting device including a first substrate, a second substrate parallel to the first substrate, and an organic light emitting unit disposed between the first substrate and the second substrate is provided. The first substrate has a plurality of first light guiding microstructures. A distribution density of the first light guiding microstructures is in a range of 100 to 2000 pcs/mm, wherein the first light guiding microstructures are located inside the first substrate and a material of the first substrate includes a photosensitive material. | 09-26-2013 |
20140028594 | TOUCH STEREOSCOPIC DISPLAY DEVICE - A touch stereoscopic display device includes a display panel, a touch panel, and a parallax barrier. The display panel has a display surface. The touch panel is disposed on a side of the display surface. The touch panel includes a cover lens and a touch sensing unit. The cover lens has a touch side and a non-touch side opposite to the touch side. The non-touch side faces the display panel. The touch sensing unit is disposed on the non-touch side of the cover lens. The parallax barrier is disposed in the touch panel, and the parallax barrier is used to generate a barrier stereoscopic display effect. The parallax barrier is disposed on the non-touch side of the cover lens. | 01-30-2014 |
20140063211 | NAKED EYE TYPE AND GLASSES TYPE SWITCHABLE STEREOSCOPIC DISPLAY DEVICE - A naked eye type and glasses type switchable stereoscopic display device includes a display panel and a switching module. The display panel provides first display image and second display image. The switching module includes a first transparent electrode, a second transparent electrode, a liquid crystal layer, and an electric field uniforming layer. The electric field uniforming layer is disposed between the liquid crystal layer and the second transparent electrode. The liquid crystal layer is driven by the second transparent electrode through the electric field uniforming layer to form liquid crystal lenses under a naked eye type stereoscopic display mode; the switching module provides a first phase retardation mode and a second phase retardation mode under a glasses type display mode. The first phase retardation mode provides a first polarization state to the first display image; the second phase retardation mode provides a second polarization state to the second display image. | 03-06-2014 |
20140077195 | ORGANIC LIGHT-EMITTING DIODE PACKAGE STRUCTURE AND METHOD OF MANUFACTURING CONCAVITY ON SUBSTRATE - The present invention provides an organic light-emitting diode package structure including a first substrate, a second substrate, at least an organic light-emitting diode device and a dam. The first substrate and a surface of the second substrate are disposed opposite to each other, wherein the surface of the second substrate includes a plurality of concavities, each of the concavities has an opening area, and a ratio of a sum of the opening areas of the concavities to an area of the first surface of the second substrate is substantially between 0 and 1. The organic light-emitting diode device is disposed on the first substrate, and a light emitting surface of the organic light-emitting diode device faces the second substrate. The dam is disposed between the first substrate and the second substrate to combine the first substrate and the second substrate, and the dam surrounds the organic light-emitting diode device. | 03-20-2014 |
20140104490 | IMAGE CAPTURE DEVICE - An image capture device including a housing, a first lens unit, a second lens unit, an image sensing element, and a beam spliter is provided. The housing includes a body, a first lens barrel, and a second lens barrel. The first lens unit is disposed within the first lens barrel and includes a first switchable light valve. The second lens unit is disposed within the second lens barrel and includes a second switchable light valve. The image sensing element faces to the first lens unit. The beam spliter is configured in front of the image sensing element so that the image sensing element is able to receive a first image light passing through the first lens unit and a second image light passing through the second lens unit. The first switchable light valve and the second switchable light valve present a transparent state at different timings. | 04-17-2014 |
20140160381 | 2D AND 3D SWITCHABLE DISPLAY DEVICE AND LIQUID CRYSTAL LENTICULAR LENS THEREOF - A liquid crystal lenticular lens includes a first transparent substrate, a second transparent substrate, a first transparent electrode, a second transparent electrode, a liquid crystal layer, a first alignment layer, a second alignment layer and a first electric field uniformizing layer. The first transparent electrode includes a plurality of first electrode bars disposed along a first direction and in parallel, and the first direction is non-parallel and non-perpendicular to the edges of the first transparent substrate. The first electric field uniformizing layer is disposed between the first alignment layer and the first transparent electrode or between the second alignment layer and the second transparent electrode. | 06-12-2014 |
Patent application number | Description | Published |
20120329261 | MANUFACTURING METHOD FOR METAL GATE - A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function. | 12-27-2012 |
20130020657 | METAL OXIDE SEMICONDUCTOR TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A method for manufacturing a MOS transistor is provided. A substrate has a high-k dielectric layer and a barrier in each of a first opening and a second opening formed by removing a dummy gate and located in a first transistor region and a second transistor region. A dielectric barrier layer is formed on the substrate and filled into the first opening and the second opening to cover the barrier layers. A portion of the dielectric barrier in the first transistor region is removed. A first work function metal layer is formed. The first work function metal layer and a portion of the dielectric barrier layer in the second transistor region are removed. A second work function metal layer is formed. The method can avoid a loss of the high-k dielectric layer to maintain the reliability of a gate structure, thereby improving the performance of the MOS transistor. | 01-24-2013 |
20130334650 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on the silicon rich layer and fills the recess. Furthermore, a semiconductor process forming said semiconductor structure is also provided. | 12-19-2013 |
20140035070 | METAL OXIDE SEMICONDUCTOR TRANSISTOR - A MOS transistor including a silicon substrate, a first gate structure and a second gate structure disposed on the silicon substrate is provided. The first gate structure and the second gate structure each includes a high-k dielectric layer disposed on the silicon substrate, a barrier layer disposed on the high-k dielectric layer, and a work function layer disposed on and contacted with the barrier layer. The MOS transistor further includes a dielectric material spacer. The dielectric material spacer is disposed on the barrier layer of each of the first gate structure and the second gate structure and surrounding the work function layer of each of the first gate structure and the second gate structure. | 02-06-2014 |
20140094017 | MANUFACTURING METHOD FOR A SHALLOW TRENCH ISOLATION - A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one trench is then formed in the substrate through an etching process, the hard mask layer is removed. Afterwards, a filler is formed at least in the trench and a planarization process is then performed on the filler. Since the planarization process is performed only on the filler, so the dishing phenomenon can effectively be avoided. | 04-03-2014 |
20140134824 | METHOD OF FABRICATING DIELECTRIC LAYER AND SHALLOW TRENCH ISOLATION - A method of fabricating a dielectric layer includes the following steps. At first, a dielectric layer is formed on a substrate, and a chemical mechanical polishing (CMP) process is performed on the dielectric layer. Subsequently, a surface treatment process is performed on the dielectric layer after the chemical mechanical polishing process, and the surface treatment process includes introducing an oxygen plasma. | 05-15-2014 |
20140213034 | METHOD FOR FORMING ISOLATION STRUCTURE - A method for forming an isolation structure includes the following steps. A hard mask layer is formed on a substrate and a trench is formed in the substrate and the hard mask layer. A protective layer is formed to cover the trench and the hard mask layer. A first isolation material is filled into the trench. An etching process is performed to etch back part of the first isolation material. | 07-31-2014 |
20140256115 | SEMICONDUCTOR PROCESS - A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on the silicon rich layer and fills the recess. Furthermore, a semiconductor process forming said semiconductor structure is also provided. | 09-11-2014 |
Patent application number | Description | Published |
20120015037 | FUNCTIONALIZED NANOPARTICLE, METHOD FOR PREPARING THE SAME AND APPLICATION THEREOF - The present invention relates to a new type of functionalized nanoparticles for drug delivery, comprising a type of polymer nanoparticles, a polymer stabilizer coating, and a drug, wherein said polymer stabilizer coating is coated on the surface of said type of polymer nanoparticles, and said drug is conjugated to said polymer stabilizer coating. The present invention also relates to a method for preparing the nanoparticles; and provides a method for treating an ischemic or degenerative disease, comprising administrating an effective amount of the type of functionalized nanoparticles to a subject. | 01-19-2012 |
20120035512 | UPPER LIMBS REHABILITATION DEVICE - An upper limbs rehabilitation device includes a main body, a rail, a movable member and a grip, wherein the main body has a first link and a second link pivotably connected to the first link. The rail is connected to the second link. The user holds the grip that is pivotably connected to the movable member and swings the upper limb to move the movable member along the rail so as to exercise the upper limb in multiple degrees of freedom. | 02-09-2012 |
20130096630 | INTERLOCKING BONE PLATE SYSTEM - An interlocking bone plate system includes an outer bone plate for being arranged outside a broken bone, an inner bone plate for being installed inside the medullary cavity of the broken bone, and screws for being inserted through and engaged with the outer bone plate and the broken bone and then engaged with the inner bone plate so as to interlock the out and inner bone plates together. The inner bone plate provides an added support in addition to the support provided by the outer bone plate, enhancing the structural strength of the whole bone fixation structure and lowering the risk of failed surgery. | 04-18-2013 |
20150085293 | Portable system for simultaneously operating optical far field imaging, tomography and spectroscopy - A portable optical tomography design for performing elastographic deformation mapping of tissues comprises a coherence light source providing one light beam; a scanning microscope comprising a waveguide having two terminals, a coupler disposed on one terminal, an actuating member connected to the waveguide or the coupler, a first optical reflection member, a beam splitter, and a Fourier-domain spectrometer. The waveguide is actuated by the actuator to traverse a horizontal and vertical motion to prescribe a two-dimensional plane for scanning the tissue sample. Optical fiber is used to connect above elements therebetween. The Fourier-domain spectrometer is coupled with the beam splitter and comprises a second reflection member and an interferogram capturing member. An interferogram produced from the Fourier-domain spectrometer is carried over to a digital signal processor and subsequently an optical coherence tomography image device to generate a three-dimensional image for the scanned tissue. | 03-26-2015 |
Patent application number | Description | Published |
20110265847 | THIN-FILM SOLAR CELL MODULE AND MANUFACTURING METHOD THEREOF - A thin-film solar cell module includes a substrate, a plurality of thin-film solar cells, a first ribbon, and a second ribbon. The thin-film solar cells are disposed on the substrate in a first direction, and the thin-film solar cell module has an isolation zone between the two thin-film solar cells next to each other. Each of the thin-film solar cells includes a first electrode layer, a photoelectric conversion layer, and a second electrode layer, in which the photoelectric conversion layer and the second electrode layer are disposed on the first electrode layer with a portion of the first electrode layer exposed. The first ribbon is used for connecting the exposed portion of the first electrode layer in each of the thin-film solar cells, and the second ribbon is used for connecting each of the second electrode layers. | 11-03-2011 |
20110265850 | SOLAR CELL MODULE - A solar cell module. In one embodiment, the solar cell module includes a substrate, a battery unit, a first strip electrode and a second strip electrode. The substrate has a plurality of power generation zones and at least one cutting zone, and the cutting zone is located among the power generation zones. The battery unit is disposed on the power generation zones and the cutting zones of the substrate. The first strip electrode is disposed on the battery unit, and located at a first end power generation zone of the power generation zones. The second strip electrode is disposed on the battery unit, and located at a second end power generation zone of the power generation zones. | 11-03-2011 |
Patent application number | Description | Published |
20120288042 | METHOD USED FOR PROVIDING AN ADAPTIVE RECEIVING IN WIRELESS COMMUNICATION - The present invention relates to an adaptive, high cost-performance efficient, and power-saving receiving method used for wireless communication systems, such as but not limited to Bluetooth (BT) system, in particular to a method which can detect the presence or absence of the adjacent channel interference (ACI) before the scheduled starting time for receiving a Bluetooth packet, and accordingly set the receiver configurations including the filter's pass-band bandwidth (BW), filter's order, the sampling rate or the number of analog-to-digital-converter (ADC) output bits, and the automatic-gain-control (AGC) algorithm to determine the low noise amplifier (LNA) and variable gain amplifier (VGA) settings | 11-15-2012 |
20120288043 | ADAPTIVE WIRELESS COMMUNICATION RECEIVER - The present invention relates to an adaptive, cost-performance efficient, power-saving apparatus for wireless communication systems, such as but not limited to Bluetooth (BT) receivers, and in particular to a packet-based receiver's decoding algorithm which can detect the presence or absence of the adjacent channel interference (ACI) before the scheduled starting time for receiving a Bluetooth packet, and accordingly set the receiver configurations including the filter's pass-band bandwidth (BW), filter's order, the sampling rate, the number of analog-to-digital-converter (ADC) output bits, and the automatic-gain-control (AGC) algorithm unit to determine the low noise amplifier (LNA) and variable gain amplifier (VGA) settings. | 11-15-2012 |
Patent application number | Description | Published |
20080304397 | OPTICAL HEAD - A micro optical head is provided, which provides sub-wavelength focusing spot and very long depth of focus. The optical head includes a transparent substrate, an opaque film, and at least one sub-wavelength annular channel. After coherent light transmits the transparent substrate supporting the optical head and passes through the appropriately designed sub-wavelength annular channel, the transmitted light can overcome the diffraction limit, and the transmission energy is improved efficiently. The transmitted light converges after a certain distance behind the optical head and forms a sub-wavelength-scale beam that maintains a very long distance without divergence. | 12-11-2008 |
20120169960 | BROADBAND CHOLESTERIC LIQUID CRYSTAL FILM, METHOD FOR FABRICATING THE SAME, POLARIZATION DEVICE, AND HIGH LIGHT EFFICIENCY LIQUID CRYSTAL DISPLAY EMPLOYING THE SAME - The invention provides a broadband cholesteric liquid crystal film, a method for fabricating the same, a polarization device employing the same, and high light efficiency liquid crystal display employing the same. The cholesteric liquid crystal film is a single-layer liquid crystal material structure, and has a top surface and a bottom surface. Further, the cholesteric liquid crystal film includes a first region, a second region, and a third region, and the first region is adjacent to the top surface of the cholesteric liquid crystal film, the third region is adjacent to the bottom surface of the cholesteric liquid crystal film, and the second region is located between the first and third regions, and the average helical pitch P | 07-05-2012 |
20130078151 | LIQUID CRYSTAL GAS SENSOR CELL AND THE USE THEREOF - A gas sensor cell using a liquid crystal composite material is provided. The gas sensor cell has recovery capability and can be reused. Upon gas adsorption, the liquid crystal composite material has visually detectable color changes and changes in electrical properties to facilitate the measurement of gas concentration from low to high. | 03-28-2013 |
20140004004 | LIQUID CRYSTAL GAS SENSOR CELL AND THE USE THEREOF | 01-02-2014 |
Patent application number | Description | Published |
20130050298 | DISPLAY AND OPERATING METHOD THEREOF - A display and an operating method thereof are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The source drivers are coupled to the timing controller and the display panel, and the source drivers are coupled to one another. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, a lock signal is output to the timing controller. The timing controller outputs a plurality of color data packets and at least one latch signal to the source drivers based on the lock signal. The source drivers respectively output a plurality of pixel voltages to the display panel according to the latch signal. The training packets and the color data packets are serially transmitted to the source drivers. | 02-28-2013 |
20140085357 | Source Driver for Driving at Least One Sub-Pixel - A source driver for driving at least one sub-pixel is disclosed, in which the source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a first gamma resistor string and an operation circuit. The first gamma resistor string includes a plurality of resistors electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage into the gamma voltages. The operation circuit optionally adds increments to the gamma voltages according to a timing control signal, wherein the increments are the same when the gamma voltages are added. The digital to analog converter selecting one of the gamma voltages generated by the operation circuit as a driving voltage based on received digital pixel data. | 03-27-2014 |
20140198086 | SOURCE DRIVER AND DISPLAY DEVICE - A source driver including a controller, a plurality of flip-flops, a plurality of shift registers and a plurality of driving channels is provided. The controller extracts control information from an image data stream. Each of the flip-flops respectively receives a corresponding control bit of the control information, and output the corresponding control bit. The shift registers correspond to the flip-flops one by one, and sequentially transmit an enable pulse. Each of the shift registers determines whether to output the enable pulse according to the control bit outputted by the corresponding flip-flop. The driving channels correspond to the shift registers one by one. Each of the driving channels switches an operation state into an enable mode or a disable mode according to the enable pulse outputted by the corresponding shift register. | 07-17-2014 |
Patent application number | Description | Published |
20120007099 | MULTI-GAS SENSOR AND METHOD OF FABRICATING THE SENSOR - The present invention is a multi-gas sensor and a method for fabricating the multi-gas sensor. | 01-12-2012 |
20140175527 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a gate, a dual spacer and two recesses. The gate is located on a substrate. The dual spacer is located on the substrate beside the gate. The recesses are located in the substrate and the dual spacers, wherein the sidewall of each of the recesses next to the gate has a lower tip and an upper tip, and the lower tip is located in the substrate while the upper tip is an acute angle located in the dual spacer and close to the substrate. The present invention also provides a semiconductor process formed said semiconductor structure. | 06-26-2014 |
20140273368 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device including the steps of providing a substrate having first type semiconductor regions and second type semiconductor regions, forming a conformal first epitaxy mask layer on the substrate, forming first type epitaxial layer in the substrate of the first type semiconductor regions, forming a conformal second epitaxy mask layer on the substrate, forming second type epitaxial layer in the substrate of the second type semiconductor regions, and removing the second epitaxy mask layer. | 09-18-2014 |
20140327055 | REPLACEMENT GATE PROCESS AND DEVICE MANUFACTURED USING THE SAME - A replacement gate process is disclosed. A substrate and a dummy gate structure formed on the substrate is provided, wherein the dummy gate structure comprises a dummy layer on the substrate, a hard mask layer on the dummy layer, spacers at two sides of the dummy layer and the hard mask layer, and a contact etch stop layer (CESL) covering the substrate, the spacers and the hard mask layer. The spacers and the CESL are made of the same material. Then, a top portion of the CESL is removed to expose the hard mask layer. Next, the hard mask layer is removed. Afterward, the dummy layer is removed to form a trench. | 11-06-2014 |
20140361373 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device includes a fin structure, an isolation structure, a gate structure and an epitaxial structure. The fin structure protrudes from the surface of the substrate and includes a top surface and two sidewalls. The isolation structure surrounds the fin structure. The gate structure overlays the top surface and the two sidewalls of a portion of the fin structure, and covers a portion of the isolation structure. The isolation structure under the gate structure has a first top surface and the isolation structure at two sides of the gate structure has a second top surface, wherein the first top surface is higher than the second top surface. The epitaxial layer is disposed at one side of the gate structure and is in direct contact with the fin structure. | 12-11-2014 |
20140363935 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and a gate structure partially overlapping the fin-shaped structure is formed. Subsequently, a dielectric layer is blanketly formed on the substrate, and a part of the dielectric layer is removed to form a first spacer on the fin-shaped structure and a second spacer besides the fin-shaped structure. Furthermore, the second spacer and a part of the fin-shaped structure are removed to form at least a recess at a side of the gate structure, and an epitaxial layer is formed in the recess. | 12-11-2014 |
20150035069 | FINFET AND METHOD FOR FABRICATING THE SAME - A method for fabricating fin-shaped field-effect transistor (FinFET) is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure in the substrate; forming a shallow trench isolation (STI) on the substrate and around the bottom portion of the fin-shaped structure; forming a first gate structure on the STI and the fin-shaped structure; and removing a portion of the STI for exposing the sidewalls of the STI underneath the first gate structure. | 02-05-2015 |
Patent application number | Description | Published |
20130093711 | TOUCH SENSING METHOD AND ELECTRONIC APPARATUS USING THE SAME - A touch sensing method adapted for an electronic apparatus including a touch panel is provided. A touch sensing method includes the following steps: obtaining a mutual-mode data by sensing a gesture applied on the touch panel in a mutual capacitance mode during a first period of a sensing frame; obtaining a self-mode data by sensing the gesture applied on the touch panel in a self capacitance mode during a second period of the sensing frame; and determining a touch location associated with the gesture on the touch panel based on the self-mode data or the mutual-mode data. Furthermore, an electronic apparatus to which the foregoing touch sensing method is applied is also provided. | 04-18-2013 |
20130093712 | TOUCH SENSING METHOD AND ELECTRONIC APPARATUS USING THE SAME - A touch sensing method adapted for an electronic apparatus including a touch panel is provided. The touch sensing method includes the following steps: driving the touch panel by a mutual capacitance mode and a self capacitance mode; sensing a gesture applied on the touch panel, wherein the gesture forms at least one touch area on the touch panel; determining at least one geometric center of the at least one touch area based on self-mode data obtained in the self capacitance mode; and determining at least one touch location associated with the gesture on the touch panel based on the at least one geometric center of the at least one touch area. Furthermore, an electronic apparatus to which the foregoing touch sensing method is applied is also provided. | 04-18-2013 |
20130328617 | TOUCH DEVICE AND METHOD FOR DETECTING TOUCH THEREOF - A touch device and a method for detecting touch on the touch device are provided. The method includes the following steps. A plurality of touch values corresponding to a plurality touch region of a touch panel are obtained. A touch block is determined according the touch values and a touch threshold value, which the touch regions within the touch block are adjacent to one another. The touch values of the adjacent touch regions within the touch block are compared with one another to determine whether there is a touch value trough point in the touch block. It is determined that whether the touch block corresponds to a single touch or a multi-touch according to whether there is the touch value trough point in the touch block. | 12-12-2013 |
20130328789 | TOUCH DEVICE AND OPERATING METHOD THEREOF - A touch device and an operating method of the touch device are provided. The operating method includes following steps. A plurality of touch values of a touch panel are obtained. During a first frame period, the obtained touch values are stored in a first memory unit, and a touch point is calculated according to the touch values stored in a second memory unit. During a second frame period, the obtained touch values are stored in the second memory unit, and the touch point is calculated according to the touch values stored in the first memory unit. | 12-12-2013 |
20130328790 | TOUCH DEVICE AND METHOD FOR DETECTING TOUCH POINT THEREOF - A touch device and method for detecting a touch point thereof are provided. The method includes: detecting a plurality of first touch values, second touch values and third touch values corresponding to a plurality of touch regions of a touch panel, respectively, during a first frame period, a second frame period and a third frame period; performing a value obtaining operation to output a median of the first touch value, the second touch value and the third touch value to which each of the touch regions correspond; and determining a real touch point according a touch threshold and the first touch values, the second touch values and the third touch values outputted by the value obtaining operation. | 12-12-2013 |
20130328823 | TOUCH DEVICE AND OPERATING METHOD THEREOF - A touch device and an operating method thereof are provided. The operating method includes the following steps. A plurality of data baseline values of the touch panel is calibrated and set during an initialization of a touch panel. A plurality of touch data is obtained after scanning the touch panel. A plurality of touch values corresponding to the touch panel is calculated according to the data baseline values and the touch data. A touch point is detected according to the touch values. When the touch data is complied with a re-calibration requirement, the data baseline values are re-calibrated and reset. | 12-12-2013 |
20140145964 | TOUCH DISPLAY APPARATUS AND TOUCH POSITION MAPPING METHOD THEREOF - A touch display apparatus and a touch position mapping method thereof are provided, by mapping a touch position detected by a touch module to a display area of a display module according to one fitting function, so that a touch position on the display area of the display module may be determined according to a mapping result. | 05-29-2014 |
20140145965 | TOUCH DEVICE AND DRIVING METHOD OF TOUCH PANEL THEREOF - A touch device and a driving method of the touch panel thereof are provided. By randomly driving the scan lines and performing a spatial filtering to the count values corresponding to the voltage noise, a circumstance of a touch position misjudgement caused by voltage noise may be improved. | 05-29-2014 |
20140145998 | TOUCH DEVICE AND DRIVING METHOD THEREOF - A touch device and a driving method thereof are provided. A scanning line driving frequency of the touch device is switched according to a plurality of preset driving frequency setting data groups, so as to prevent misjudgment of a touched position caused by electromagnetic noise. | 05-29-2014 |
20150042596 | TOUCH PANEL CAPABLE OF PERFORMING PROXIMITY FUNCTION AND A METHOD OF USING THE SAME - A touch panel capable of performing proximity function is disclosed. A voltage is applied to column electrode or row electrode during a self scan cycle, and a capacitive object close to a surface of the touch panel is measured on the same column electrode or row electrode. A voltage is applied to one axis during a mutual scan cycle, and a capacitive object close to the surface of the touch panel is measured on the other axis. | 02-12-2015 |
20150062058 | TOUCH PANEL CAPABLE OF DETECTING A STYLUS AND A METHOD OF USING THE SAME - A touch panel capable of detecting a stylus is disclosed. At least one self scan cycle and at least one mutual scan cycle are performed in each scan frame, and touch identification of the stylus is affirmed when both touch identifications via the self scan cycle and the mutual scan cycle are detected. | 03-05-2015 |
Patent application number | Description | Published |
20120292084 | FLEXIBLE BASE MATERIAL AND FLEXIBLE ELECTRONIC DEVICE - The invention provides a flexible base material and a flexible electronic device. The flexible base material includes a flexible substrate having a first surface and a second surface opposite to the first surface. A first organic composite barrier layer is deposited on the first surface of the flexible substrate, wherein the first organic composite barrier layer applies a first stress to the flexible substrate. An anti-curved layer is deposited on the second surface of the flexible substrate, wherein the anti-curved layer applies a second stress, which is cancelled off more than 90% of the first stress, to the flexible substrate. | 11-22-2012 |
20130298833 | EVAPORATION APPARATUS - An evaporation apparatus proposed includes a gas storage chamber, a first evaporator, a pressure gauge, a pyrolysis chamber and a deposition chamber. The first evaporator is connected with the gas storage chamber through a first pipe and the first pipe has a first valve. The pressure gauge is connected with the gas storage chamber through a second pipe. The pyrolysis chamber is connected with the gas storage chamber through a third pipe and the third pipe has a second valve, wherein the first evaporator is connected with the pyrolysis chamber through the gas storage chamber, and the gas storage chamber is disposed between the first evaporator and the pyrolysis chamber. The deposition chamber is connected with the pyrolysis chamber through a fourth pipe. | 11-14-2013 |
20140144382 | PLASMA APPARATUS - A plasma apparatus including a chamber, an electrode set and a gas supplying tube set is provided. The chamber has a supporting table. The gas supplying tube set is disposed in the chamber and located between the supporting table and the electrode set. The gas supplying tube set includes at least one outer gas supplying tube and at least one first inner gas supplying tube. The first inner gas supplying tube is telescoped within the outer gas supplying tube. The outer gas supplying tube and the first inner gas supplying tube both have a plurality of gas apertures, and an amount of the gas apertures of the outer gas supplying tube is greater than an amount of the gas apertures of the first inner gas supplying tube. | 05-29-2014 |
20140162054 | INTERPOSER LAYER FOR ENHANCING ADHESIVE ATTRACTION OF POLY(P-XYLYLENE) FILM TO SUBSTRATE - An embodiment of the present disclosure provides a laminate structure, including a substrate having a surface; a poly(p-xylylene) film over the surface of the substrate; and an interposer layer between the substrate and the poly(p-xylylene) film. The interposer layer is bonded to both the substrate and the poly(p-xylylene) film in a covalent manner, and a ratio of Si—C bonds and Si—X bonds in the interposer layer is in a range from about 0.3 to about 0.8, wherein X is O or N. | 06-12-2014 |
20150034011 | CHEMICAL VAPOR DEPOSITION APPARATUS - A chemical vapor deposition apparatus and a method for forming a parylene film are provided. The chemical vapor deposition apparatus includes a buffer chamber, a deposition chamber, a pyrolysis chamber, an evaporator, and a sorter. The buffer chamber has a first valve, a second valve, and a carrying apparatus. The evaporator is connected with the second valve. The pyrolysis chamber is connected with the evaporator through a first pipe, wherein the first pipe has a third valve. The deposition chamber is connected with the pyrolysis chamber. The sorter is connected with the buffer chamber through the first valve. | 02-05-2015 |
Patent application number | Description | Published |
20120315748 | METHOD FOR FABRICATING AN APERTURE - A method for fabricating an aperture is disclosed. The method includes the steps of: forming a hard mask containing carbon on a surface of a semiconductor substrate; and using a non-oxygen element containing gas to perform a first etching process for forming a first aperture in the hard mask. | 12-13-2012 |
20140038399 | METHOD FOR FABRICATING AN APERTURE - A method for fabricating an aperture is disclosed. The method includes the steps of: forming a hard mask containing carbon on a surface of a semiconductor substrate; and using a non-oxygen element containing gas to perform a first etching process for forming a first aperture in the hard mask. Before forming the hard mask, a gate which includes a contact etch stop layer and a dielectric layer is formed on the semiconductor substrate. | 02-06-2014 |
20140073104 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device is disclosed in the present invention. First, at least one gate structure and plurality of source/drain regions on a substrate are formed, a dielectric layer is then formed on the substrate, a first contact hole and a second contact hole are formed in the dielectric layer, respectively on the gate structure and the source/drain region, and a third contact hole is formed in the dielectric layer, wherein the third contact hole overlaps the first contact hole and the second contact hole. | 03-13-2014 |
20140154852 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE HAVING METAL CONNECTION - The present invention provides a method for forming a semiconductor structure having a metal connect. A substrate is provided, and a transistor and a first ILD layer are formed thereon. A first contact plug is formed in the first ILD layer to electrically connect the source/drain region. A second ILD layer and a third ILD layer are formed on the first ILD layer. A first opening above the gate and a second opening above the first contact plug are formed, wherein a depth of the first contact plug is deeper than that of the second opening. Next, the first opening and the second opening are deepened. Lastly, a metal layer is filled into the first opening and the second opening to respectively form a first metal connect and a second metal connect. | 06-05-2014 |
20140241027 | Static random access memory unit cell structure and static random access memory unit cell layout structure - A static random access memory unit cell layout structure is disclosed, in which a slot contact is disposed on one active area and another one across from the one. A static random access memory unit cell structure and a method of fabricating the same are also disclosed, in which, a slot contact is disposed on drains of a pull-up transistor and a pull-down transistor, and a metal-zero interconnect is disposed on the slot contact and a gate line of another pull-up transistor. Accordingly, there is not an intersection of vertical and horizontal metal-zero interconnects, and there is no place suffering from twice etching. Leakage junction due to stitch recess can be avoided. | 08-28-2014 |
20140315365 | METHOD OF FORMING SEMICONDUCTOR DEVICE - A method of forming a semiconductor device is provided. At least one gate structure including a dummy gate is formed on a substrate. A contact etch stop layer and a dielectric layer are formed to cover the gate structure. A portion of the contact etch stop layer and a portion of the dielectric layer are removed to expose the top of the gate structure. A dry etching process is performed to remove a portion of the dummy gate of the gate structure. A hydrogenation treatment is performed to the surface of the remaining dummy gate. A wet etching process is performed to remove the remaining dummy gate and thereby form a gate trench. | 10-23-2014 |
20140342553 | Method for Forming Semiconductor Structure Having Opening - According to one embodiment of the present invention, a method for forming a semiconductor structure having an opening is provided. First, a substrate is provided, wherein a first region and a second region are defined on the substrate and an overlapping area of the first region and the second region is defined as a third region. Then, a material layer is formed on the substrate. A first hard mask and a second hard mask are formed on the material layer. The first hard mask in the first region is removed to form a patterned first hard mask. The second hard mask in the third region is removed to form a patterned second hard mask. Lastly, the material layer is patterned by using the patterned second hard mask layer as a mask to form at least an opening in the third region only. | 11-20-2014 |
20140346575 | SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT AND METHOD OF MANUFACTURING THE SAME - A semiconductor device with a self-aligned contact and a method of manufacturing the same, wherein the method comprises the step of forming a 1st dielectric layer on gate structures, form a self-aligned contact trench between two gate structures, forming an 2nd dielectric layer on the 1st dielectric layer and in the self-aligned contact trench; patterning the 2nd dielectric layer into a 1st portion on the 1st dielectric layer and a 2nd portion filling in the self-aligned contact trench, using the 2nd dielectric layer as a mask to etch the 1st dielectric layer, and forming a metal layer and a self-aligned contact simultaneously in the 1st dielectric layer and in the self-aligned contact trench. | 11-27-2014 |
20140349236 | Method for Forming Semiconductor Structure Having Opening - A method for forming a semiconductor structure having an opening is provided. First, a substrate is provided, wherein a first region and a second region are defined on the substrate and an overlapping area of the first region and the second region is defined as a third region. A pattern density of the first region is substantially greater than that of the second region. Then, a material layer is formed on the substrate. A first hard mask and a second hard mask are formed on the material layer. The first hard mask in the first region is removed to form a patterned first hard mask. The second hard mask in the third region is removed to form a patterned second hard mask. Lastly, the material layer is patterned by using the patterned second hard mask layer as a mask to form at least an opening in the third region only. | 11-27-2014 |
20140349476 | MANUFACTURING METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE - The present invention provides a manufacturing method of a semiconductor device, at least containing the following steps: first, a substrate is provided, wherein a first dielectric layer is formed on the substrate, at least one metal gate is formed in the first dielectric layer and at least one source drain region (S/D region) is disposed on two sides of the metal gate, at least one first trench is then formed in the first dielectric layer, exposing parts of the S/D region. The manufacturing method for forming the first trench further includes performing a first photolithography process through a first photomask and performing a second photolithography process through a second photomask, and at least one second trench is formed in the first dielectric layer, exposing parts of the metal gate, and finally, a conductive layer is filled in each first trench and each second trench. | 11-27-2014 |
Patent application number | Description | Published |
20120110542 | METHOD TO SCALE DOWN IC LAYOUT - A method scales down an integrated circuit layout structure without substantially jeopardizing electronic characteristics of devices. First, a conductive line set includes a first conductive line and a second conductive line respectively passing through a first region and a second region. Second, a sizing-down operation is performed so that the first conductive line and the second conductive line respectively have a first region scaled-down line width, a first region scaled-down space and a first region scaled-down pitch in the first region as well as selectively have a second region original line width, a second region scaled-down space and a second region scaled-down pitch in the second region. The first region scaled-down line width and the second region original line width are substantially different from each other. | 05-03-2012 |
20120292184 | MICROBIAL IDENTIFICATION AND MANIPULATION OF NANOSCALE BIOMOLECULES - A method of microbial identification is disclosed. The method includes the steps of assembling dielectrophoretic particles modified with specific DNA probes on a surface thereof in a continuous fluid at a predetermined location in a microchannel to form a particle assembly by a negative dielectrophoretic force and a hydrodynamic force provided by the continuous fluid, narrowing gaps between the dielectrophoretic particles of the particle assembly to enhance the electric field in the gaps between the dielectrophoretic particles, injecting a fluid containing target DNAs of a target microbe into the microchannel at a predetermined flow rate to move the target DNAs toward the particle assembly and generating a positive dielectrophoretic force by the enhanced electric field to attract the target DNAs toward the dielectrophoretic particles of the particle assembly for hybridization with the DNA probes. The present invention also discloses a method of manipulation of nanoscale biomolecules. | 11-22-2012 |
20130008793 | METHOD FOR ANTIBIOTIC SUSCEPTIBILITY TESTING AND DETERMINING MINIMUM INHIBITORY CONCENTRATION OF THE ANTIBIOTIC - A method of antibiotic susceptibility testing is disclosed, and includes the following steps: (A) providing a sample to be tested wherein the sample contains a microbe; (B) adding an antibiotic into the sample, wherein the antibiotic serves to inhibit cell wall synthesis; (C) checking the sample by dielectrophoresis and observing a shape change of the microbe; and (D) determining whether the microbe is susceptible to the antibiotic according to the shape change thereof. The present invention also discloses a method for determining a minimum inhibitory concentration of the antibiotic. | 01-10-2013 |
20130252228 | METHOD AND DEVICE FOR SEPARATING CHARGED PARTICLES IN LIQUID SAMPLE AND MANUFACTURING METHOD OF THE DEVICE - A method for separating charged particles in a liquid sample is disclosed. The method includes the steps of driving the liquid sample containing a plurality of charged particles to flow, forming a non-uniform electric field in the direction relative to the flow direction of the liquid sample by two electrodes, and aggregating the charged particles under the non-uniform electric field so as to separating the charged particles from the liquid sample. When the liquid sample flows through the non-uniform electric field, it doesn't contact to the electrodes. A device and its manufacturing method for separating charged particles in a liquid sample are also disclosed, Accordingly, the charged particles can be separated from the liquid sample easily and more effectively. | 09-26-2013 |
20140083855 | BIO-CHIP AND METHOD FOR SEPARATING AND CONCENTRATING PARTICLES USING THE SAME - A bio-chip adapted for separating and concentrating particles in a solution includes a chip body defining a receiving space therein for receiving the solution, an inner electrode disposed in the receiving space, an outer electrode unit disposed in the receiving space of the chip body and including a first outer electrode that is spaced apart from and surrounds the inner electrode, and a second outer electrode that is spaced apart from and surrounds the first outer electrode, and a power source electrically connected to the inner electrode, the first outer electrode, and the second outer electrode. A method for using the bio-chip to separating and concentrating the particles in the solution is also disclosed in the present invention. | 03-27-2014 |
20140363827 | APPARATUS FOR IDENTIFYING CHARACTERISTIC OF LIQUID AND THE METHOD THEREOF - An apparatus and a method for identifying the characteristics of a liquid sample due to capillary force are disclosed. The apparatus and the method spread the blood sample (which is obtained from the blood of a subject, or a mixture containing the blood of two different subjects) having an agglutination portion in a distribution space due to the capillary force. | 12-11-2014 |
Patent application number | Description | Published |
20130137238 | METHOD FOR FORMING HIGH MOBILITY CHANNELS IN III-V FAMILY CHANNEL DEVICES - Provided is a method of fabricating a semiconductor device. The method includes forming a buffer layer over a surface of a silicon substrate. The method further includes forming openings that extend into the buffer layer. The method includes forming a shallow trench isolation (STI) structures in each of the openings. The method includes removing a predetermined amount of a top surface of the buffer layer relative to a top surface of the STI structures. The method includes forming an insulator layer over the top surface of the buffer layer and forming a channel layer over the insulator layer. | 05-30-2013 |
20130307021 | CMOS Device and Method of Forming the Same - A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a first region and a second region. The semiconductor device further includes a first buffer layer formed over the substrate and between first and second isolation regions in the first region and a second buffer layer formed over the substrate and between first and second isolation regions in the second region. The semiconductor device further includes a first fin structure formed over the first buffer layer and between the first and second isolation regions in the first region and a second fin structure formed over the second buffer layer and between the first and second isolation regions in the second region. The first buffer layer includes a top surface different from a top surface of the second buffer layer. | 11-21-2013 |
20140141582 | CMOS DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a first region and a second region. The semiconductor device further includes a first buffer layer formed over the substrate and between first and second isolation regions in the first region and a second buffer layer formed over the substrate and between first and second isolation regions in the second region. The semiconductor device further includes a first fin structure formed over the first buffer layer and between the first and second isolation regions in the first region and a second fin structure formed over the second buffer layer and between the first and second isolation regions in the second region. The first buffer layer includes a top surface different from a top surface of the second buffer layer. | 05-22-2014 |
20140209974 | Double Stepped Semiconductor Substrate - A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition (MOCVD) process, forming a rough surface on a region of a semiconductor substrate. The method further includes, with an annealing process used in the MOCVD process, forming double stepped surface on the region of the semiconductor substrate. | 07-31-2014 |
20140213031 | FinFETs and Methods for Forming the Same - A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin. A dummy gate is formed to cover a middle portion of the semiconductor fin. An Inter-Layer Dielectric (ILD) is formed to cover end portions of the semiconductor fin. The dummy gate is then removed to form a first recess, wherein the middle portion is exposed to the first recess. The middle portion of the semiconductor fin is removed to form a second recess. An epitaxy is performed to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions. A gate dielectric and a gate electrode are formed in the first recess. The gate dielectric and the gate electrode are over the semiconductor material. | 07-31-2014 |
20140264362 | Method and Apparatus for Forming a CMOS Device - A method and apparatus for forming a CMOS device are provided. The CMOS device may include an N-type channel region formed of an III-V material and a P-type channel region formed of a germanium material. Over each channel may be formed corresponding gates and source/drain regions. The source/drain regions may be formed of a germanium material and one or more metallization layers. An anneal may be performed to form ohmic contacts for the source/drain regions. Openings may be formed in a dielectric layer covering the device and conductive plugs may be formed to provide contact to the source/drain regions. | 09-18-2014 |
20140273366 | Semiconductor Devices and Methods of Manufacture Thereof - Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a workpiece including an n-type field effect transistor (N-FET) region, a p-type FET (P-FET) region, and an insulating material disposed over the N-FET region and the P-FET region. The method includes patterning the insulating material to expose a portion of the N-FET region and a portion of the P-FET region, and forming an oxide layer over the exposed portion of the N-FET region and the exposed portion of the P-FET region. The oxide layer over the P-FET region is altered, and a metal layer is formed over a portion of the N-FET region and the P-FET region. The workpiece is annealed to form a metal-insulator-semiconductor (MIS) tunnel diode over the N-FET region and a silicide or germinide material over the P-FET region. | 09-18-2014 |
20140273412 | Methods for Wet Clean of Oxide Layers over Epitaxial Layers - Methods for an oxide layer over an epitaxial layer. In an embodiment, a method includes forming an epitaxial layer of semiconductor material over a semiconductor substrate; forming an oxide layer over the epitaxial layer; applying a solution including an oxidizer to the oxide layer; and cleaning the oxide layer with a cleaning solution. In another embodiment, a densification process is applied to an oxide layer including treating with thermal energy, UV energy, or both. In an embodiment for a gate-all-around device, the cleaning process is applied to an oxide layer over an epitaxial portion of a fin. Additional methods are disclosed. | 09-18-2014 |
20150035113 | Epitaxial Structures and Methods of Forming the Same - An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed. | 02-05-2015 |
Patent application number | Description | Published |
20110256093 | Treating Disorders Associated with IL-20 Receptor-Mediated Signaling Pathway by Blocking IL-20 Receptor Activity - Treating a disorder (e.g., osteoporosis, renal failure, or diabetic nephropathy) associated with a signaling pathway mediated by IL-20 receptor with an agent that suppresses IL-20 receptor activity, e.g., an antibody that neutralizes IL-20 receptor via binding to IL-20R1, an antisense nucleic acid that suppresses expression of IL-20R1, a small molecule that inhibits IL-20 receptor activity, or a dominant negative mutant of IL-19, IL-20, or IL-24. | 10-20-2011 |
20130216534 | USE OF IL-20 ANTAGONISTS FOR TREATING RHEUMATOID ARTHRITIS AND OSTEOPOROSIS - The invention features methods and compositions for preventing or treating rheumatoid arthritis and osteoporosis by administering an antagonist of IL-20. The IL-20 antagonist may be an anti-IL-20 antibody, such as mAB 7E, that is capable of binding human IL-20 and blocking IL-20 interaction with its receptors. | 08-22-2013 |
20130315893 | HUMANIZED ANTI-IL-20 ANTIBODY AND USES THEREOF - The present disclosure provides humanized antibodies specific to human interleukin 20 (IL-20) and uses thereof in treating diseases associated with the IL-20 signaling pathway, e.g., osteoporosis, inflammatory disease (e.g., rheumatoid arthritis), cancer, stroke, and renal failure. | 11-28-2013 |
20140023648 | Treatment of Osteoarthritis Using IL-20 Antagonists - Methods for alleviating or delaying the onset of osteoarthritis in a subject in need of the treatment using an IL-20 antagonist, which can be an antibody that blocks a signaling pathway mediated by IL-20, e.g., an anti-IL-20 antibody. | 01-23-2014 |
20140044715 | TREATING ALLERGIC AIRWAY DISORDERS USING ANTI-IL-20 RECEPTOR ANTIBODIES - Treatment of an allergic airway disorder (e.g., asthma or bronchial airway obstruction) using anti-IL-20R1 antibodies such as mAb51D, mAb7GW, or functional variants thereof. | 02-13-2014 |
20140056886 | Humanized Anti-IL-20 Antibody And Uses Thereof - Humanized antibodies specific to human interleukin 20 (IL-20) and uses thereof in treating diseases associated with the IL-20 signaling pathway, e.g., osteoporosis, inflammatory disease (e.g., rheumatoid arthritis), cancer, stroke, and renal failure. | 02-27-2014 |
20140065144 | USE OF IL-20 ANTAGONISTS FOR PROMOTING BONE FRACTURE HEALING - Promoting bone fracture healing in a subject having a bone fracture using an IL-20 antagonist, which can be an antibody that blocks an IL-20-mediated signaling pathway. Such antibodies include anti-IL-20 antibodies and anti-IL-20R1 antibodies capable of blocking the IL-20-mediated signaling pathway. | 03-06-2014 |
20140120094 | Use of IL-20 Antagonists for Treating Liver Diseases - Reducing liver fibrosis in a subject having or being suspected of having a liver disease using an IL-20 antagonist, which can be an antibody that blocks a signaling pathway mediated by IL-20. Such antibodies include anti-IL-20 antibodies and anti-IL-20R antibodies that specifically block the IL-20 signaling pathway. | 05-01-2014 |
20140370014 | USE OF IL-20 ANTAGONISTS FOR ALLEVIATING OBESITY - Alleviating obesity in a subject (e.g., a human subject) having, being suspected of having, or at risk for obesity using an IL-20 antagonist, which can be an antibody that blocks a signaling pathway mediated by IL-20. Such antibodies include anti-IL-20 antibodies and anti-IL-20R antibodies that specifically block the IL-20 signaling pathway. | 12-18-2014 |
20140370015 | USE OF IL-20 ANTAGONISTS FOR ALLEVIATING SPINAL CORD INJURY - Alleviating neural injury, such as spinal cord injury, in a subject (e.g., a human subject) in need of the treatment using an IL-20 antagonist, which can be an antibody that blocks a signaling pathway mediated by IL-20. Such antibodies include anti-IL-20 antibodies and anti-IL-20R antibodies that specifically block the IL-20 signaling pathway. | 12-18-2014 |
Patent application number | Description | Published |
20080232876 | DUPLEX AUTOMATIC SHEET FEEDER - In a duplex automatic sheet feeder, a passageway group, connected to a supply tray and a discharge tray, includes a plurality of passageways and an image processing region. A sheet detector disposed in the passageway group is for detecting each sheet and thus outputting a sheet detecting signal. A transporting mechanism is for transporting the sheet from the supply tray to the discharge tray through the passageway group. Each sheet is transported across the image processing region at least twice and processed in the image processing region. A control module connected to the transporting mechanism and the sheet detector is for driving the transporting mechanism to transport each sheet, and for making the transporting mechanism switch from a forward-rotating state to a backward-rotating state according to the sheet detecting signal and a predetermined physical quantity so that each sheet is transported by a predetermined distance. | 09-25-2008 |
20090086285 | SCAN APPARATUS HAVING AN ADJUSTABLE LIGHT SOURCE AND SCAN METHOD THEREOF - A scan apparatus includes a control signal generating module, a light source module, a lighting module and a scanning module. The control signal generating module generates a control signal. The light source module provides light rays. The lighting module, electrically connected to the light source module and the control signal generating module, lights up a corresponding section of the light source module according to the control signal and extinguishes other sections of the light source module to output corresponding light rays to illuminate a document. The scanning module receives corresponding light rays processed by the document and generates an image signal corresponding to an image of the document. | 04-02-2009 |
20090147318 | Scanning device having positioning element for adjusting scanning area - A scanning device includes a housing, an optical module and a positioning element. The optical module is movably disposed in the housing. The positioning element disposed on the housing is movable in a direction substantially parallel to a moving path of the optical module so as to adjust the range of a scanning area. When a to-be-scanned document is scanned, the optical module moves inside the scanning area for performing scanning. | 06-11-2009 |
Patent application number | Description | Published |
20100165885 | WIRELESS COMMUNICATION NETWORK AND ROUTING METHOD - A wireless communication network, including a destination node, a first node transmitting a first routing message, wherein the first node has a first routing table including a first entry for the destination node, and the first entry includes a first list field for child node(s). The network further includes a second node generating and transmitting a second routing message according to the first routing message, wherein the second routing message includes a second parent node field, and the second parent node field is marked as the first node that transmitted the first routing message. The first node further receives the second routing message and stores a first mark in the first list field for child node(s) of the first entry after determining that the second parent node field of the second routing message is marked as the first node, and the first mark denotes the second node. | 07-01-2010 |
20110231850 | BLOCK-BASED TRANSMISSION SCHEDULING METHODS AND SYSTEMS - Block-based transmission scheduling methods and systems are provided. First, a plurality of packets corresponding to at least one data flow is received. The packets of the data flow are accumulated to form a data block. Then, the data block of the data flow is scheduled and transmitted according to a transmission scheduling algorithm based on the unit of block. In some embodiments, when the length of the accumulated data block equals to or is greater than a predefined or dynamically calculated block length threshold, the data block is scheduled and transmitted according to the transmission scheduling algorithm. In some embodiments, when current time is equal to a specific time point derived from a dynamically calculated or a fixed time duration, the data block is scheduled and transmitted according to the transmission scheduling algorithm. | 09-22-2011 |
20130148670 | METHOD OF RESOURCE ALLOCATION AND RESOURCE ARBITRATOR - A method of resource allocation and a resource arbitrator for allocating a resource to one or more users are provided. The method includes the following steps: selecting one of the users according to a sequence; determining an available amount of the selected user according to a benefit amount of the selected user in the current selected turn; determining a service amount of the selected user according to a requirement amount and the available amount of the selected user and allocating the resource to the selected user according to the service amount; accumulating a system benefit level or a benefit amount of each user in a subset of the users according to a residual amount obtained by subtracting the service amount from the available amount, and a weight of each user in the subset; and repeating all of the above steps to allocate the resource to the one or more users. | 06-13-2013 |
20130163568 | METHOD AND SYSTEM FOR RESOURCE ALLOCATION IN DISTRIBUTED TIME-DIVISION MULTIPLEXING SYSTEMS - In one exemplary embodiment, a system for resource allocation in a distributed time-division multiplexing (TDM) system comprises a plurality of users with each user having a corresponding weight and taking turns to use the resources of the distributed TDM system. The each user repeats the execution of obtaining a resource usage right, reading a first message of a user having an active weight sum and a system benefit level; computing a resource usage quantity of the user, computing a resource residual quantity of the user, updating the active weight sum, and storing an individual benefit basis of the user; dividing the resource residual quantity by an updated value of the active weight sum and accumulating a divided result to the system benefit level; and transferring a second message having the updated value of the active weight sum and an accumulated value of the system benefit level to a next user obtaining the resource usage right. | 06-27-2013 |
Patent application number | Description | Published |
20120154193 | SUBRANGE ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF - The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC). | 06-21-2012 |
20120154194 | SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER HAVING AUXILIARY PREDICTION CIRCUIT AND METHOD THEREOF - The configurations and adjusting method of a successive approximation analog-to-digital converter (SAR ADC) are provided. The provided SAR ADC includes at least one capacitor with a first and a second terminals, and a plurality of bits, each of which is connected to the at least one capacitor, wherein the first terminal receives an input signal, and the second terminal selectively receives one of a first and a second reference voltages, and a first comparator receiving an adjustable third reference voltage and a first voltage value generated by the input signal, wherein a connection of the second terminal of each the capacitor of the capacitor array is switched when the first voltage value is larger than the third reference voltage. | 06-21-2012 |
20140341258 | MULTI-POINT TEMPERATURE SENSING METHOD FOR INTEGRATED CIRCUIT CHIP AND SYSTEM OF THE SAME - A multi-point temperature sensing method for integrated circuit chips and a system of the same are revealed. The system includes at least one slave temperature sensor embedded at preset positions for measuring temperature of a block and a master temperature sensor embedded in an integrated circuit chip and electrically connected to each slave temperature sensor. Variations of the slave temperature sensor induced by variations of process, voltage and temperature are corrected by the master temperature sensor. Thus the area the temperature sensors required on the integrated circuit chip is dramatically reduced and the stability of the temperature control system is improved. The problem of conventional System-on-a-Chip that only a limited number of temperature sensors could be used due to the area they occupied can be solved. | 11-20-2014 |
Patent application number | Description | Published |
20130082784 | OSCILLATOR CALIBRATION APPARATUS AND OSCILLATOR CALIBRATION METHOD - An oscillator calibration apparatus includes a counter, a comparator and an adjusting unit. The counter is utilized for receiving a first clock signal and a second clock signal, and utilizing the first clock signal to sample the second clock signal to generate at least one counting value, where the first clock signal is generated from a first oscillator, and the second clock signal is generated from a second oscillator different from the first oscillator; the comparator is coupled to the counter, and is utilized for comparing the counting value with a predetermined value to generate at least one calibration signal; and the adjusting unit is coupled to the comparator, and is utilized for adjusting a frequency of the second oscillator according to the calibration signal. | 04-04-2013 |
20130234979 | TOUCH CELL APPLIED TO CAPACITIVE TOUCH PANEL AND ASSOCIATED CAPACITIVE TOUCH PANEL - A touch cell applied to a capacitive touch panel includes a first electrode and a second electrode, where the first electrode is connected to a scan signal transmitting circuit of the capacitive touch panel, and is utilized for receiving a scan signal, and the second electrode is connected to a detecting circuit of the capacitive touch panel. In addition, the second electrode is not connected to the first electrode, the second electrode has a fish-bone pattern, and a width of a tail of branches of the fish-bone pattern is greater than a width of a head of the branches of the fish-bone pattern. | 09-12-2013 |
20130265247 | TOUCH PANEL - A touch panel including a substrate and a sensing array is provided. The sensing array is disposed on the substrate and includes a plurality of sensing units. Each sensing unit has a first sensing electrode and a second sensing electrode which are arranged in a staggered manner and are electrically insulated from each other. The first sensing electrode includes two parallel first sensing pads and a first connection portion. The second sensing electrode includes two parallel second sensing pads and a second connection portion. The first sensing pads, the first connection portion, the second sensing pads, and the second connection portion are in rectangular shapes, and short sides of the first connection portion and the second connection portion are electrically connected to middle portions of long sides of the first sensing pads and the second sensing pads respectively. The second connection portion and the first connection portion intersect each other. | 10-10-2013 |
20130278509 | INPUT SYSTEM UTILIZING STYLUS PEN WHICH RECEIVES ELECTRICAL SIGNALS VIA CONNECTION LINK - An input system includes a touch panel, a control circuit, a stylus pen, and a connection link. The control circuit generates an electrical signal. The stylus pen is external to the control circuit. The connection link is coupled between the control circuit and the stylus pen, and transmits the electrical signal to the stylus pen, wherein the electrical signal is coupled to the touch panel via the stylus pen. The connection link may be a wired link or a wireless link. | 10-24-2013 |
20140306920 | TOUCH SCREEN STRUCTURE FOR RECEIVING AND PROCESSING TOUCH SIGNAL - A touch screen structure for receiving and processing touch signal is disclosed, in which the touch screen structure includes a substrate, a plurality of conductive patterns, a plurality of first routing traces, and a plurality of second routing traces. The conductive patterns are disposed on the substrate, in which each of the conductive patterns has a first side and a second side disposed opposite to the first side. The first routing traces are disposed on the substrate, in which the first routing traces are electrically connected to the first sides of the conductive patterns. The second routing traces are disposed on the substrate, in which the second routing traces are electrically connected to the second sides of the conductive patterns. | 10-16-2014 |
20140333546 | TOUCH DISPLAY DEVICE AND METHOD - A touch display device including an active matrix, a driving module, a sensing module and a control unit is provided. The active matrix includes a plurality of common electrodes, scan lines, and data lines. At least parts of the common electrodes form a first touch electrode set and at least parts of the data lines form a second touch electrode set. The control unit is configured to cause the driving module to drive the scan lines, the data lines, and the common electrodes in at least one display driving period to perform a displaying function, and to cause the driving module to drive one of the first touch electrode set and the second touch electrode set and cause the sensing module to receive signals from the other in at least one touch sensing period so as to perform a touch sensing function. A touch display method is also provided. | 11-13-2014 |
20140368446 | IN-CELL TOUCH SCREEN AND APPARATUS OF DRIVING THE SAME - An apparatus of driving an in-cell touch screen, a transmitter (TX) driving unit generates TX driving signals coupled to a common-voltage electrode substrate, and RX detection signals are then induced on an RX electrode substrate that is coupled to and detected by an RX detection unit. The voltage swing of the TX driving signal is determined according to current leakage in thin film transistor (TFT) unit cells of a liquid crystal module (LCM). | 12-18-2014 |
20140368449 | TOUCH DISPLAY PANEL AND DRIVING METHOD THEREOF - A touch display panel, including first electrode patterns, second electrode patterns, active elements, third electrode patterns and fourth electrode patterns is provided. The second electrode patterns and the first electrode pattern are set to form pixel areas. Each of the active elements is disposed in one of the pixel areas and electrically connected to the corresponding first electrode pattern and second electrode pattern. The third electrode patterns are arranged along a direction of an arrangement direction of the second electrode patterns and divide the second electrode patterns into groups, wherein each third pattern covers columns of the pixel areas. The fourth electrode patterns are electrically insulated to the third electrode patterns. Each fourth electrode pattern is disposed in one of the pixel areas and electrically connected to the corresponding active element. A driving method of a touch display panel is also provided. | 12-18-2014 |
20140375591 | TOUCH SCREEN AND APPARATUS OF DRIVING THE SAME - In apparatus of driving a touch screen, a transmitter (TX) driving unit generates TX driving signals coupled to a TX electrode substrate, and receiver (RX) detection signals are then induced on an RX electrode substrate that is coupled to and detected by an RX detection unit. A plurality of the TX driving signals are simultaneously generated and fed to the TX electrode substrate, and the TX driving signals during a given period have different phases, respectively. | 12-25-2014 |
20140375595 | TOUCH SYSTEM - In a touch system, a transmitter (TX) driving unit generates at least one pair of orthogonal drive signals, each pair having a specific frequency. At least one pair of TX electrode lines is simultaneously driven by the at least one pair of orthogonal drive signals, respectively. A sense signal is induced on a receiver (RX) electrode line by capacitances disposed between the TX electrode lines and the RX electrode line. An RX detection unit detects the sense signal to simultaneously result in two sense components that respectively estimate the capacitances associated with the TX electrode lines of the pair. | 12-25-2014 |
20150029413 | TOUCH DISPLAY APPARATUS - A touch display apparatus is provided. Data lines are used to transmit display data signals or touch scan signals during different periods, wherein the data lines, the scan lines of the touch display apparatus and touch sensing lines of the touch display apparatus are disposed on a same substrate. | 01-29-2015 |
Patent application number | Description | Published |
20080266278 | COLOR CHOLESTERIC LIQUID CRYSTAL DISPLAY DEVICES AND DRIVING METHODS THEREOF - Color cholesteric liquid crystal display devices and driving methods thereof are provided. A color cholesteric liquid crystal display device includes a color cholesteric liquid crystal display panel with a plurality of sub-pixels. A driving module exerts a first voltage on a portion of sub-pixels of the color cholesteric liquid crystal display panel to hold displaying states of the biased sub-pixels. An input element exerts pressure on the color cholesteric liquid crystal display panel to change displaying states of the unbiased sub-pixels. | 10-30-2008 |
20120327350 | DISPLAY DEVICE - A display device includes a first substrate, at least a first protrusion, a first electrode, a second substrate, at least a second protrusion, a second electrode and a display medium. The first protrusion is disposed on the first substrate. The first electrode is disposed on the first protrusion. The second substrate is disposed opposite to the first substrate. The second protrusion is disposed on the second substrate. The second electrode is disposed on the second protrusion, wherein the first electrode and the second electrode are displaced in a horizontal direction so as to form a lateral electric field therebetween. The display medium is sandwiched between the first and the second substrates. | 12-27-2012 |
20150047885 | PATTERNED CONDUCTIVE FILM, METHOD OF FABRICATING THE SAME, AND APPLICATION THEREOF - Provided is a patterned conductive film may include a conductive interconnected nano-structure film. The conductive interconnected nano-structure film may include a first region and a second region adjacent to the first region. A conductivity of the first region may be at least 1000 times a conductivity of the second region. | 02-19-2015 |