Patent application number | Description | Published |
20090141534 | DETECTION APPARATUS AND METHOD FOR SEQUENTIALLY PROGRAMMING MEMORY - A detection apparatus for sequentially programming a memory is provided. The detection apparatus comprises a current sensor and a programming controller. The current sensor is coupled to a programming source and a memory cell. The current sensor detects change of a programming current between the programming source and the memory cell and generates a control signal according to the detection result. The programming controller is coupled to the current sensor. The programming controller receives the control signal and generates a programming state signal. | 06-04-2009 |
20090238023 | MEMORY SYSTEM - A memory system is provided, comprising at least one memory unit and a source power supply circuit. Each memory unit is coupled between a source voltage and a ground voltage and accesses digital data according to a word line signal and a bit line signal. The source power supply circuit provides the source voltage to the memory units. When the memory unit is in a writing status, the source voltage is the first power voltage. When the memory unit is in a reading status, the source voltage is the second power voltage. The second power voltage equals to the first power voltage subtracted by a specific voltage for avoiding rewriting error. | 09-24-2009 |
20100177556 | ASYMMETRIC STATIC RANDOM ACCESS MEMORY - An asymmetric static random access memory (SRAM) device that includes at least one SRAM cell is provided. The SRAM cell includes the first inverter and the second inverter. The first inverter is coupled between a first power and a ground power, and includes a first output terminal coupled to a first node and a first input terminal coupled to a second node. The second inverter is coupled between the first power and the ground power, and includes a second input terminal coupled to the first node and a second output terminal coupled to the second node. When the first inverter and the second inverter receive current from the first power, the SRAM cell is programmed to a predetermined value in advance according to different conductance levels of the first inverter and the second inverter. | 07-15-2010 |
20100202219 | BURN-IN METHODS FOR STATIC RANDOM ACCESS MEMORIES AND CHIPS - A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure. | 08-12-2010 |
Patent application number | Description | Published |
20120056767 | SIGNAL PROCESSING APPARATUS WITH SIGMA-DELTA MODULATING BLOCK COLLABORATING WITH NOTCH FILTERING BLOCK AND RELATED SIGNAL PROCESSING METHOD THEREOF - One signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is arranged to perform a notch filtering operation upon the signal output for generating a filtered signal output. Another signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is enabled for performing a notch filtering operation upon the signal output when the signal processing apparatus operates in a first operational mode, and the notch filtering block is disabled when the signal processing apparatus operates in a second operational mode. | 03-08-2012 |
20120177094 | POLAR TRANSMITTER AND RELATED SIGNAL TRANSMITTING METHOD - A polar transmitter includes: a processor arranged to convert signals from a specific coordinate system to a polar coordinate system, wherein the signals in the polar coordinate system comprises a phase component and an amplitude component; a PM path configured to have a constant PM group delay, for processing the phase component; an AM path, of which an AM group delay is capable of being determined, for processing the amplitude component; and an adjustable delay circuit, arranged to adjust delay of the signals in the specific coordinate system according to the constant PM group delay and the calibrated AM group delay. | 07-12-2012 |
20120212296 | SIGNAL GENERATING CIRCUIT AND SIGNAL GENERATING METHOD - A signal generating circuit includes: an operating circuit arranged to generate a first control signal according to a reference clock signal and a feedback oscillating signal; a controllable oscillator arranged to generate an output oscillating signal according to the first control signal and a second control signal; a feedback circuit arranged to generate the feedback oscillating signal according to the output oscillating signal and a third control signal; a control circuit arranged to generate the second control signal and the third control signal according to an input signal; and a calibrating circuit arranged to calibrate the control circuit to adjust the second control signal by detecting a phase difference between the reference clock signal and the feedback oscillating signal. | 08-23-2012 |
20130141153 | ELECTRONIC DEVICE AND TRANSMITTER DC OFFSET CALIBRATION METHOD THEREOF - An embodiment of the invention provides an electronic device. The electronic device includes a digital-to-analog converter (DAC), a transmitter front-end (TX FE), an amplifier, an analog-to-digital converter (ADC), and a swap circuitry. The TX FE has a first and a second input end coupled to a first and a second output end of the DAC, respectively. The ADC has a first and a second input end coupled to a first and a second output end of the amplifier, respectively. The swap circuitry is configured to couple the first and second output ends of the DAC to a first and a second input end of the amplifier in a normal state, respectively, and couple the first and second output ends of the DAC to the second and first input ends of the amplifier in a swapped state, respectively. | 06-06-2013 |
20130142274 | SLICED TRANSMITTER FRONT-END - An embodiment of the invention provides a sliced transmitter front-end (TX FE). The sliced TX FE includes first TX FE slices and a second TX FE slice that are connected in parallel. As a whole the first TX FE slices contributes a high-gain section to a superimposed gain range of the sliced TX FE. The second TX FE slice has a gain range that constitutes a low-gain section of the superimposed gain range of the sliced TX FE. A minimum gain of the gain range of the second TX FE slice is smaller than a minimum gain of the high-gain section. | 06-06-2013 |
20130188675 | Power Detection Method and Related Communication Device - A communication device with a power detection scheme is disclosed. The communication device includes a transmitter for transmitting an RF signal, a demodulator for demodulating the RF signal by utilizing a phase-modulated (PM) signal provided from the transmitter to generate a demodulated signal, a loopback circuit coupled between the transmitter and the demodulator for transmitting the RF signal and the PM signal from the transmitter to the demodulator when the power detection scheme is enabled, and a power detector for detecting power of the demodulated signal. | 07-25-2013 |
20140029694 | SIGNAL TRANSMITTING DEVICE AND SIGNAL TRANSMITTING METHOD - A signal transmitting device includes: a signal processing circuit arranged to process an input signal to generate a processed input signal according to a compensating signal; a signal converting circuit arranged to convert the processed input signal to generate an output signal according to an oscillating signal; and an arithmetic circuit arranged to generate the compensating signal according to the power of a predetermined component in the output signal, wherein the signal processing circuit uses the compensating signal to update the input signal, and the signal converting circuit converts the updated input signal to reduce the power of the predetermined component in the output signal. | 01-30-2014 |
20140086360 | TRANSMITTER SUPPORTING TWO MODES - A transmitter includes a first channel and a second channel. The first channel includes a first mixer, and is used for processing a first input signal to generate a first output signal; the second channel includes a second mixer, where the second channel does not receive any input signal. When the transmitter is operated under a first mode, both the first mixer and the second mixer receive oscillation signals. | 03-27-2014 |
20140347127 | SWITCHING POWER AMPLIFIER AND METHOD FOR CONTROLLING THE SWITCHING POWER AMPLIFIER - A switching power amplifier includes: a first transistor controlled by a first digital signal to selectively output a first output signal; a second transistor controlled by a second digital signal to selectively output a second output signal; and a control circuit arranged to generate the second digital signal according to the first digital signal and a third digital signal; wherein the first output signal and the second output signal are outputted on a common connected node of the first transistor and the second transistor. | 11-27-2014 |
20140348264 | DIGITAL TRANSMITTER AND METHOD FOR CALIBRATING DIGITAL TRANSMITTER - A digital transmitter includes: a plurality of adjustable delay lines arranged to delay a plurality of digital input signals by a plurality of delay times to generate a plurality of delayed digital input signals respectively; a plurality of converting devices arranged to convert the plurality of delayed digital input signals into a plurality of converting signals respectively; and a calibration device arranged to adjust a delay time of at least one adjustable delay line in the plurality of adjustable delay lines to make the plurality of converting devices convert the plurality of delayed digital input signals at respective desire time points. | 11-27-2014 |
20140348265 | DIGITAL TRANSMITTER AND METHOD FOR COMPENSATING MISMATCH IN DIGITAL TRANSMITTER - A digital transmitter includes: a plurality of converting devices arranged to generate a plurality of converting signals according to a plurality of digital input signals; a compensation device arranged to generate at least one compensation signal according to the plurality of digital input signals; and a combining circuit arranged to output an amplified output signal according to the plurality of converting signals and the at least one compensation signal. | 11-27-2014 |
20140348269 | DATA CONVERTING DEVICE, DIGITAL TRANSMITTING APPARATUS USING THE DATA CONVERTING DEVICE, AND RALATED DATA CONVERTING METHOD - A data converting device includes: a data sampling circuit arranged to up-sample a digital signal to generate an up-sampling signal according to a clock signal; a voltage level generating circuit arranged to generate an adjustable voltage; and a signal converting circuit arranged to generate a converting signal according to the adjustable voltage and the up-sampling signal. | 11-27-2014 |
20140348279 | DIGITAL SIGNAL UP-CONVERTING APPARATUS AND RELATED DIGITAL SIGNAL UP-CONVERTING METHOD - A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal. | 11-27-2014 |
20140350872 | TRANSMIT POWER MEASUREMENT APPARATUS HAVING PROGRAMMABLE FILTER DEVICE THAT IS SET AT LEAST BASED ON FREQUENCY RESPONSE OF TRANSMIT POWER DETECTION PATH AND RELATED TRANSMIT POWER MEASUREMENT METHOD THEREOF - A transmit power measurement apparatus includes a transmit power detection path, a compensation circuit and a tracking circuit. The compensation circuit includes a programmable filter device and a compensation controller. The programmable filter device generates a filter output. The compensation controller sets the programmable filter device at least based on a frequency response of the transmit power detection path. The tracking circuit generates a transmit power tracking result at least based on the filter output. | 11-27-2014 |
Patent application number | Description | Published |
20130009740 | COMMON MODE FILTER AND METHOD OF MANUFACTURING THE SAME - A common mode filter having heterogeneous laminates includes a first magnetic layer, a nonmagnetic insulating substrate, a second magnetic layer, a first coil layer, and a second coil layer. The second magnetic layer is formed on the nonmagnetic insulating substrate, between the nonmagnetic insulating substrate and the first magnetic layer. The first coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a first coil. The second coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a second coil. The first and second coil layers are separated from each other, and the first and second coils are magnetically coupled to each other. | 01-10-2013 |
20130244343 | METHOD FOR PREPARING A THIN FILM DEVICE AND METHOD FOR PREPARING A COMMON MODE FILTER USING THE SAME - One aspect of the present invention provides a method for preparing a thin film device with an insulation layer from a dry polyimide film and a method for preparing a common mode filter using the same. A method for preparing a thin film device according to this aspect of the present invention includes the steps of forming at least one first conductive pattern on a substrate; placing a dry polyimide film on the first conductive pattern; applying a force to the dry polyimide film such that the dry polyimide film fills spaces in the first conductive pattern; and forming at least one second conductive pattern on the dry polyimide film. | 09-19-2013 |
20140186526 | COMMON MODE FILTER AND METHOD OF MANUFACTURING THE SAME - A common mode filter having heterogeneous laminates includes a first magnetic layer, a nonmagnetic insulating substrate, a second magnetic layer, a first coil layer, and a second coil layer. The second magnetic layer is formed on the nonmagnetic insulating substrate, between the nonmagnetic insulating substrate and the first magnetic layer. The first coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a first coil. The second coil layer is disposed between the first magnetic layer and the second magnetic layer, and includes a second coil. The first and second coil layers are separated from each other, and the first and second coils are magnetically coupled to each other. | 07-03-2014 |
Patent application number | Description | Published |
20090145844 | SEQUENCING BATCH MEMBRANE BIOREACTOR AND METHOD THEREOF - A sequencing batch membrane bioreactor is provided, comprising a wastewater reservoir, at least one sequencing batch bioreactor, and a membrane reactor. The wastewater reservoir collects and stores wastewater. The sequencing batch bioreactor receives the wastewater in batches from the wastewater reservoir for performing a stirring and aeration process to remove ammonia-based nitrogen, phosphoric ions and organic substance from the wastewater. The membrane reactor is disposed outside of the sequencing batch bioreactor, wherein the wastewater is introduced from the sequencing batch bioreactor to the membrane reactor, treated with solid-liquid separation, and discharged. | 06-11-2009 |
20100133179 | SYSTEM AND METHOD FOR TREATING WASTEWATER CONTAINING AMMONIA - Treatment system for wastewater containing ammonium is provided. The treatment system of the present invention includes an ammonia oxidation reactor and a membrane reactor disposed on the back of the ammonia oxidation reactor. The ammonia oxidation reactor includes biological carriers for carrying the ammonium oxidation bacteria and nitrite oxidation bacteria, a pH level controller for increasing the pH level to above 7.5, and a DO (dissolved oxygen) controller for reducing the DO content to less than 1.0 mg/L. The membrane reactor composed of a membrane and an aerator is used to separate the solids and liquids of the effluent of the ammonia oxidation reactor. In addition, a method for treating wastewater containing ammonium is also provided. | 06-03-2010 |
20100163482 | SYSTEM AND METHOD FOR TREATING AMMONIA-BASED WASTEWATER - A system for treating ammonia-based wastewater is provided. The system includes a first reactor, including: denitrification bacteria for denitrification; a second reactor disposed on the back of the first reactor, wherein the second reactor includes an aerator and aerobic heterotrophic bacteria, and has an HRT of less than 6 hours; a third reactor disposed on the back of the first reactor, wherein the third reactor contains nitrification bacteria carried on the carriers for improving nitrification; and a solid-liquid-separating reactor disposed on the back of the third for separating the solids and liquids in the effluent of the third reactor. | 07-01-2010 |
Patent application number | Description | Published |
20140121607 | SWITCHABLE DEVICE FOR CLOSED SUCTION CATHETERS AND SYSTEMS THEREOF - A switchable device for closed suction catheters includes a device body and a two-way switch valve. The device body is formed with a valve sleeve, a patient tubing adaptor, a side port, and a catheter adaptor. The valve sleeve is formed with a cavity therein to allow the two-way switch valve to correspondingly rotate with respect to the device body. The catheter adaptor and the patient tubing adaptor are formed on opposing ends of the valve sleeve, thereby able to establish an unobstructed path therebetween. The side port is slantingly formed and extended from the patient tubing adaptor for smooth passage of flow therebetween. A groove is formed on one end of the patient tubing adaptor as a 360-degree freely rotatable coupling element thereof. | 05-01-2014 |
20150157799 | NEEDLELESS CONNECTOR MODULE - A needleless connector module comprises: a sleeve tube, an elastic valve, and a flow guiding unit. The elastic valve sleeves an upper guiding tube of the flow guiding unit. A hollow shoulder portion of the elastic valve abuts a slanted retaining wall of the sleeve tube. Under a first usage condition, the hollow head portion of the elastic valve encloses the upper guiding tube narrow portion, hiding the first guiding opening in the airtight seam. Under a second usage condition, an injection tube presses the top face of the elastic valve, a hollow head portion of the elastic valve presses downward, driving the valve inner wall to abut a waist platform formed on the guiding tube, such that the first guiding opening is exposed outside the airtight seam, and such that the first guiding opening is connected to an injection opening of the injection tube. | 06-11-2015 |
20150157800 | NEEDLELESS CONNECTOR MODULE - A needleless connector module comprises: a sleeve tube, an elastic valve, a flow guiding unit and an extension unit. The elastic valve sleeves a guiding tube of the flow guiding unit. A hollow shoulder portion of the elastic valve abuts a slanted retaining wall of the sleeve tube. Under a first usage condition, the hollow head portion of the elastic valve encloses the guiding tube narrow portion, hiding the first guiding opening in the airtight seam. Under a second usage condition, an injection tube presses the top face of the elastic valve, a hollow head portion of the elastic valve presses downward, driving the valve inner wall to abut a waist platform formed on the guiding tube, such that the first guiding opening is exposed outside the airtight seam, and such that the first guiding opening is connected to an injection opening of the injection tube. | 06-11-2015 |
Patent application number | Description | Published |
20120106783 | OBJECT TRACKING METHOD - An object tracking method includes steps of obtaining multiple first classifications of pixels within a first focus frame in a first frame picture, wherein the first focus frame includes an object to be tracked and has a first rectangular frame in a second frame picture; performing a positioning process to obtain a second rectangular frame; and obtaining color features of pixels around the second rectangular frame sequentially and establishing multiple second classifications according to the color feature. The established second classifications are compared with the first classifications sequentially to obtain an approximation value, compared with a predetermined threshold. The second rectangular frame is progressively adjusted, so as to establish a second focus frame. By analyzing color features of the pixels of the object and with a classification manner, the efficacy of detecting a shape and size of the object so as to update information of the focus frame is achieved. | 05-03-2012 |
20130235227 | IMAGE CAPTURING DEVICE AND METHOD THEREOF AND HUMAN RECOGNITION PHOTOGRAPH SYSTEM - This invention discloses an image capturing device, an image capturing method, and a human recognition photograph system. The image capturing device comprises: a capturing module sensing an image; a human detecting module detecting the number of at least one person in an image generating detecting signal; a face recognition module generates recognition signal by recognizing a face condition of the at least one person in the image; and a processing module that receives detecting signal and recognition signal and calculates the number of at least one person and face condition value according to the detecting signal and the recognition signal respectively. The processing module determines whether the number of at least one person and face condition value correspond to a predetermined number and a predetermined face condition value respectively; if so, generating an image capturing signal to control the capturing module to capture image and generate image data. | 09-12-2013 |
20130250106 | LICENSE PLATE IMAGE-PICKUP DEVICE AND IMAGE EXPOSURE ADJUSTMENT METHOD THEREOF - The present invention discloses a license plate image-pickup device and an image exposure adjustment method thereof. The license plate image-pickup device comprises an image-sensing module, a recognition module and a processing module. The license plate image-pickup device takes a scene. The image-sensing module senses the scene to produce an image. The recognition module detects a vehicle object. The processing module adjusts the exposure of the vehicle object to produce an exposure adjusted vehicle object, and then the recognition module detects a license plate object from the exposure adjusted vehicle object, and the processing module adjusts the exposure of the license plate object. | 09-26-2013 |
20140307054 | AUTO FOCUS METHOD AND AUTO FOCUS APPARATUS - An auto focus (AF) method adapted to an AF apparatus is provided. The AF method includes following steps. A target object is selected and photographed by a first image sensor and a second image sensor to generate a first image and a second image. A procedure of three-dimensional (3D) depth estimation is performed according to the first image and the second image to generate a 3D depth map. An optimization process is performed on the 3D depth map to generate an optimized 3D depth map. A piece of depth information corresponding to the target object is determined according to the optimized 3D depth map, and a focusing position regarding the target object is obtained according to the pieces of depth information. The AF apparatus is driven to execute an AF procedure according to the focusing position. Additionally, an AF apparatus is provided. | 10-16-2014 |
20140327743 | AUTO FOCUS METHOD AND AUTO FOCUS APPARATUS - An auto focus (AF) method and an AF apparatus are provided. The method includes the following steps. At least one target object is selected and photographed by a first image sensor and a second image sensor to generate a three-dimensional (3D) depth map. A block covering at least one initial focusing point is selected. The 3D depth map is queried for reading depth information of a plurality of pixels in the block. It is determined whether depth information of the pixels is enough to operate. If yes, a first statistics operation is performed, and focusing depth information is obtained. If not, the position of the block is moved or the size of the block is enlarged to obtain the focusing depth information. A focusing position is obtained according to the focusing depth information and the AF apparatus is driven to perform an AF procedure according to the focusing position. | 11-06-2014 |
20150201182 | AUTO FOCUS METHOD AND AUTO FOCUS APPARATUS - An auto focus (AF) method adapted to an AF apparatus is provided. The AF method includes following steps. A first image is captured by using the first image sensor. At least one characteristic is detected based on the first image, and whether the characteristic meets a predetermined condition is determined. If the characteristic meets the predetermined condition, a focus depth is calculated according to a three-dimensional (3D) depth information and movement of a first lens of the first sensor is driven according to the focus depth for focusing. If the characteristic does not meet the predetermined condition, the first lens is driven to move for many times to obtain a plurality of contrast values, such that movement of the first lens is driven according to the contrast values for focusing. Additionally, an AF apparatus is provided. | 07-16-2015 |
20150292873 | IMAGE CAPTURE DEVICE, DEPTH GENERATING DEVICE AND METHOD THEREOF - An image capture device, a depth generating device and a method thereof are disclosed. The present disclosure is characterized in that a depth calculation technology with a structure light projection and a pictorial depth calculation technology are combined to better both of resolution and accuracy of the calculated image depth. In addition, the utilization of a modified flashlight enables the combination of the two technologies to be applied to a hand-held capture device. | 10-15-2015 |
20150304527 | LENS DISTORTION CORRECTION METHOD - The present disclosure illustrates a lens distortion correction method to solve influence for distortion correction caused by an alignment error between a lens center and a center of image sensor unit during assembling. The present disclosure is characterized in that the spatial geometric calibration is incorporated with the lens distortion correction and different image centers are selected repeatedly when transformation relationship of image coordinates id used to perform the lens distortion correction, so as to correct the image center of the image to be corrected and enhance the accuracy of lens distortion correction. | 10-22-2015 |
20150319421 | METHOD AND APPARATUS FOR OPTIMIZING DEPTH INFORMATION - Method and apparatus for optimizing depth information are provided. One of a left image and a right image is divided into a plurality of segmentations for obtaining a plurality of segmentation maps. A necessary repair depth map is obtained, and the necessary repair depth map is partitioned into a plurality of depth planes according to a plurality of primary depth values and a camera parameter. The primary depth values are recorded in the necessary repair depth map having a plurality of holes. A plurality of optimized depth values are respectively generated for the holes in each of the depth planes by using the segmentation maps, and the optimized depth values are filled into the depth planes to obtain an optimized depth map. | 11-05-2015 |
20160080654 | METHOD OF CAPTURING IMAGES AND IMAGE CAPTURING DEVICE USING THE METHOD - The present invention discloses a method of capturing images and an image capturing device using the method. The image capturing device has a first lens module and a second lens module having a view angle which is smaller than that of the first lens module. The method comprises: increasing an exposure time and reducing a light sensitivity value of the first lens module and capturing a first image by using the first lens module; reducing the exposure time and increasing the light sensitivity value of the first lens module and capturing a second image by using the second lens module; extracting a plurality of image features from the first image and the second image respectively and determining a region corresponding to the second image in the first image; and merging the second image into the region in the first image to generate an output image. | 03-17-2016 |
20160080657 | IMAGE CAPTURING DEVICE AND DIGITAL ZOOM METHOD - The present invention discloses an image capturing device and a digital zoom method. The image capturing device comprises a first lens module, a second lens module, a feature extraction unit, an image zooming-deformation unit and an image merging unit. The first lens module and the second lens module are applied to capture a first image and a second image, respectively. The feature extraction unit extracts a plurality of first image features and second image features from the first image and the second image, respectively, and generating pixel offset characteristics. Based on a zoom factor and the pixel offset characteristics, the image zooming-deformation unit zooms and deforms the first and second images to generate a third image and a fourth image. The image merging unit bases the zoom factor to merge the third image and the fourth image for obtaining a combined image. | 03-17-2016 |
20160093032 | METHOD FOR GENERATING IMAGE BOKEH EFFECT AND IMAGE CAPTURING DEVICE - An image capturing device and a method for generating a bokeh effect are provided. The method includes the following steps. An image including a current input pixel is captured. Next, blurring processes are performed on the image by using a first image blur filter and a second image blur filter so as to generate a plurality of first blur images and second blur images corresponding to different blur levels. A distance between the current input pixel and a focal plane is calculated to obtain a current distance. A first current blur image and a second current blur image are respectively selected from the first blur images and the second blur images according to the current distance. Next, a first current blur pixel of the first current blur image and a second current blur pixel of the second current blur image are combined to generate a current output pixel. | 03-31-2016 |
20160105615 | IMAGE PROCESSING SYSTEM AND METHOD FOR OBJECT-TRACING - An image processing system and a method for object-tracing are provided. The method includes: receiving a first wide field of view image and a first narrow field of view image, and determining a to-be-traced object therefrom and choosing one image therefrom for serving as a first output image; using an area size of the to-be-traced object in the first output image as a reference area; comparing the reference area with the area sizes of the to-be-traced object from a second wide field of view image and a second narrow field of view image respectively so as to determine one of that as a main image, and respectively zooming and deforming the main image and an area corresponding to the other image, and then fusing a zoomed and deformed second image as a second output image. | 04-14-2016 |
Patent application number | Description | Published |
20080303559 | ELECTRONIC DEVICE AND RELATED METHOD FOR PERFORMING COMPENSATION OPERATION ON ELECTRONIC ELEMENT - The present invention discloses an electronic device and related method for performing a compensation operation on an electronic element, wherein the electronic device includes: a control module, for outputting a control signal according to an input signal; a driver module, coupled to the control module and the electronic element, for providing a driving current to the electronic element according to the control signal; a sensor module, for outputting at least a sensor signal according to a variation of an operation environment; a compensation control module, coupled to the sensor module, for outputting at least a compensation control signal according to the at least a sensor signal and the input signal; and a compensation driver module, coupled to the electronic element and the compensation control module, for providing at least a compensation driving current to the electronic element according to the at least a compensation control signal. | 12-11-2008 |
20100026372 | Power switch for transmitting a power source of low voltage between regular mode and deep-power-down mode - A low-voltage power switch includes a gate-controlled circuit and a switch. The gate-controlled circuit generates a control voltage lower than the voltage of ground according to a control signal. The switch includes a first end, a second end, and a control end. The first end of the switch is coupled to a power supply of a low voltage, the control end of the switch is coupled to the gate-controlled circuit for receiving the gate-controlled signal, and the second end of the switch couples the first end of the switch when the switch receives the gate-controlled signal for outputting the power supply of the low voltage. | 02-04-2010 |
20120063254 | Voltage Regulator for Memory - A voltage regulator includes a first transistor, a second transistor, a third transistor, a feedback unit, a comparison unit, a first control unit and a second control unit. The first transistor is controlled by the feedback unit and the comparison unit, for stabilizing the voltage of the output node. When the first control unit turns on the second transistor, the voltage of the output node rises. When the first control unit turns off the second transistor, it triggers the second control unit turning on the third transistor, so the first transistor is turned on completely. Therefore, when the third transistor is turned off, the first transistor can be controlled by the feedback unit and the comparison unit for stabilizing the voltage of the output node. | 03-15-2012 |
20120206161 | CIRCUIT HAVING AN EXTERNAL TEST VOLTAGE - A circuit having an external test voltage includes an amplifier, a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, at least one reference resistor, at least one test resistor, a first upper resistor, a second upper resistor and a lower resistor. The second P-type metal-oxide-semiconductor transistor is the same as the first P-type metal-oxide-semiconductor transistor. A difference between a voltage of a test output terminal of each test resistor and a voltage of a reference output terminal of a corresponding reference resistor is kept at a predetermined value by duplicating a current flowing through the first P-type metal-oxide-semiconductor transistor to the second P-type metal-oxide-semiconductor transistor, and feeding an external test voltage to a second terminal of the second upper resistor. | 08-16-2012 |
20120326696 | VARIABLE VOLTAGE GENERATION CIRCUIT - A variable voltage generation circuit includes an amplifier, a P-type metal-oxide-semiconductor transistor, at least one variable resistor, and a lower resistor. Each variable resistor includes M resistors and M switches. An i | 12-27-2012 |
20130033250 | POWER-UP INITIAL CIRCUIT - A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator. | 02-07-2013 |
20130033298 | DOUBLE-SWING CLOCK GENERATOR AND CHARGE PUMP - A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock. | 02-07-2013 |
20130234684 | IMMEDIATE RESPONSE LOW DROPOUT REGULATION SYSTEM AND OPERATION METHOD OF A LOW DROPOUT REGULATION SYSTEM - An immediate response low dropout regulation system includes a low dropout regulation unit, a tracking voltage generation unit, and a self-driving unit. The low dropout regulation unit is used for generating and outputting an inner output voltage according to a reference voltage. The tracking voltage generation unit is used for generating and outputting a tracking voltage according to the reference voltage. The self-driving unit is coupled to the low dropout regulation unit and the tracking voltage generation unit. When a voltage difference between the tracking voltage and the inner output voltage is greater than a constant times threshold voltage, the self-driving unit provides a compensation current to an output terminal of the low dropout regulation unit. | 09-12-2013 |
20130234694 | INITIAL VOLTAGE GENERATION CIRCUIT AND METHOD OF GENERATING AN INITIAL VOLTAGE - An initial voltage generation circuit includes a reference voltage generator, a reference voltage selector, at least one initial voltage level regulator, and a plurality of stabilization capacitors. The reference voltage generator generates a plurality of reference voltage candidate groups. The reference voltage selector includes a plurality of selection switch groups and a plurality of switch control circuits. Each selection switch group includes a plurality of parallel switches. Each switch control circuit corresponds to a selection switch group for generating a switch signal to control the selection switch group to output a reference voltage candidate of a corresponding reference voltage candidate group. Each initial voltage level regulator generates an inner reference voltage according to a power-up signal, and a stabilization capacitor corresponding to the initial voltage level regulator is used for stabilizing the inner reference voltage. | 09-12-2013 |
20130234766 | INPUT RECEIVER AND OPERATION METHOD THEREOF - An input receiver includes a first input receiving unit, a second input receiving unit, a delay unit, and a first logic unit. The first input receiving unit receives an inverse wake-up signal, an external clock enable signal, a first voltage, and a reference signal, and then generates a first enable signal according to the external clock enable signal and the reference signal. The second input receiving unit receives the external clock enable signal, the first voltage, and an inverse enable voltage, and then generates a second enable signal as its output according to the external clock enable signal. The delay unit generates a wake-up signal according to the second enable signal. The first logic unit receives the wake-up signal and the first enable signal, and then generates an internal clock enable signal according to the wake-up signal and the first enable signal. | 09-12-2013 |
20140025879 | DYNAMIC RANDOM ACCESS MEMORY APPLIED TO AN EMBEDDED DISPLAY PORT - A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V. | 01-23-2014 |
20140210438 | MULTI-INPUT LOW DROPOUT REGULATOR - A multi-input low dropout regulator includes an amplifier, a first metal-oxide-semiconductor transistor, and a resistor. The amplifier has a plurality of first input terminals, a second input terminal, and an output terminal. Each first input terminal of the plurality of first input terminals is used for receiving an internal voltage. The first metal-oxide-semiconductor transistor has a first terminal for receiving a first voltage, a second terminal coupled to the output terminal of the amplifier, and a third terminal coupled the second input terminal of the amplifier. The resistor has a first terminal coupled to the third terminal of the first metal-oxide-semiconductor transistor, and a second terminal for receiving a second voltage. The third terminal of the first metal-oxide-semiconductor transistor is further used for coupling to a monitor pad, and the monitor pad is used for outputting the internal voltage. | 07-31-2014 |
Patent application number | Description | Published |
20110141034 | TOUCH PANEL - A touch panel having a transparent region and a peripheral region surrounding the transparent region is provided. The touch panel includes a transparent cover, a touch device, a light-shielding layer, a layer of conductive lines, and a touch chip. The transparent cover has a touch surface and a device mounting surface opposite thereto. The touch device is disposed on the device mounting surface and at least located at the transparent region. The light-shielding layer is disposed on the transparent cover and located inside the peripheral region. The layer of conductive lines is disposed on the device mounting surface, located inside the peripheral region, and electrically connected to the touch device. The touch chip is disposed on the layer of conductive lines through a chip-on-glass process. | 06-16-2011 |
20130249413 | LIGHT EMITTING ELEMENT PIXEL DRIVING CIRCUIT - A pixel circuit includes a control switch module, a capacitor, a driving switch, and a light emitting element. The control switch module is enabled and disabled according to a scan signal. A first end of the capacitor can be electrically connected to the control switch module, and a second end of the capacitor can be electrically connected to a voltage level. The capacitor receives and stores a predetermined driving voltage when the control switch module is enabled. Area of the capacitor occupies more than 20% area of the pixel circuit. The driving switch can be electrically connected to the capacitor and a voltage source for controlling a driving current flowing through the driving switch according to the predetermined driving voltage stored in the capacitor. The light emitting element emits light according to the driving current flowing through the driving switch. | 09-26-2013 |
20130249856 | TOUCH DEVICE AND TOUCH SENSING METHOD THEREOF - A touch device, having a touch sensing region, includes a touch sensing structure and at least one object detecting device. The touch sensing structure is disposed in the touch sensing region. The touch sensing region is divided into a plurality of sub sensing regions, and the touch structure includes a plurality of sensing units for providing a function of positioning touch points. The object detecting device is disposed outside the touch sensing region. The object detecting device is employed to detect whether an object getting is close to the touch device and to determine which one of the sub sensing regions is going to be touched by the object so as to further enable the sensing units within the sub sensing region that is going to be touched by the object. | 09-26-2013 |
20130265510 | THREE-DIMENSIONAL DISPLAY DEVICE AND ACTIVE OPTICAL ELEMENT THEREOF - A three-dimensional display device and an active optical element thereof are provided. The three-dimensional display device includes a display panel, a polarizing element, and an active optical element between the display panel and the polarizing element. The active optical element includes a first substrate, a second substrate, a first electrode structure layer disposed on the first substrate, a second electrode structure layer disposed on the second substrate and a liquid crystal layer. The first electrode structure layer includes a plurality of first electrodes, a plurality of second electrodes alternately arranged with the first electrodes, and a first insulating layer located between the first electrodes and the second electrodes. The first electrodes and the second electrodes are extended along a first direction, and a first gap is formed between two adjacent second electrodes. An area of each first electrode fills one corresponding first gap. | 10-10-2013 |
20130314372 | DISPLAY STRUCTURE WITH TOUCH CONTROL FUNCTION - An organic light emitting diode display structure with touch control function includes a plurality of organic light emitting diodes arranged in a matrix form, a plurality of first switches, a plurality of first sensing stripes arranged along a first direction, a plurality of second sensing stripes arranged along a second direction, and a touch control circuit. Each of the first switches is coupled between a first end of one of the plurality of organic light emitting diodes and a voltage source. Each of the second sensing stripes is coupled to a plurality of second ends of at least one of rows of the plurality of organic light emitting diodes. The touch control circuit is for generating touch signals according to capacitance values between the plurality of first sensing stripes and the plurality of second sensing stripes. | 11-28-2013 |
20140022468 | TOUCH PANEL - A touch panel having a transparent region and a peripheral region surrounding the transparent region is provided. The touch panel includes a transparent cover, a touch device, a light-shielding layer, a layer of conductive lines, and a touch chip. The transparent cover has a touch surface and a device mounting surface opposite thereto. The touch device is disposed on the device mounting surface and at least located at the transparent region. The light-shielding layer is disposed on the transparent cover and located inside the peripheral region. The layer of conductive lines is disposed on the device mounting surface, located inside the peripheral region, and electrically connected to the touch device. The touch chip is disposed on the layer of conductive lines through a chip-on-glass process. | 01-23-2014 |
20140022469 | TOUCH PANEL - A touch panel having a transparent region and a peripheral region surrounding the transparent region is provided. The touch panel includes a transparent cover, a touch device, a light-shielding layer, a layer of conductive lines, and a touch chip. The transparent cover has a touch surface and a device mounting surface opposite thereto. The touch device is disposed on the device mounting surface and at least located at the transparent region. The light-shielding layer is disposed on the transparent cover and located inside the peripheral region. The layer of conductive lines is disposed on the device mounting surface, located inside the peripheral region, and electrically connected to the touch device. The touch chip is disposed on the layer of conductive lines through a chip-on-glass process. | 01-23-2014 |
20140184950 | TOUCH PANEL - A touch panel, having a peripheral region, includes a first substrate, a touch-sensing structure, first outer traces, a first ground wire and an outer device. The first outer trace is electrically connected to the touch-sensing structure. The first outer traces extend to a connection region in the peripheral region. The first ground wire extends to the connection region, and the first ground wire has at least one discontinuous section in the connection region. The outer device is electrically connected to the first ground wire and the first outer traces in the connection region. The outer device electrically connects two ends of the discontinuous section of the first ground wire in the connection region, and the two ends of the discontinuous section of the first ground wire are electrically connected via the outer device. | 07-03-2014 |
20140285468 | TOUCH CONTROL DEVICE, TOUCH CONTROL DISPLAY DEVICE, DISPLAY DEVICE AND CONTROL METHOD THEREOF - A touch control device includes a touch area, a border area, a inductive coil, a proximity sensing unit, a near field communication unit, and a switch module. The touch area is for sensing touch input. The border area is located at periphery of the touch area. The inductive coil is located on the border area. The proximity sensing unit is for transmitting a driving signal to the inductive coil when being coupled to a first end of the inductive coil, and determining whether the inductive coil is close to an object according to a sensing signal generated by the inductive coil. The near field communication unit is for performing near field communication when being coupled to the first end and a second end of the inductive coil. The switch module is for controlling coupling statuses of the proximity sensing unit and the near field communication unit to the inductive coil. | 09-25-2014 |
Patent application number | Description | Published |
20090230538 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove and an outer receiving groove formed around the central receiving groove. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 09-17-2009 |
20090278159 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE WITHOUT SUBSTRATES FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure without substrates for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove for receiving the semiconductor chip. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 11-12-2009 |
20090283881 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-DOWN ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-down electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers, and one side of each first conductive layer is electrically connected with the corresponding conductive pad. The second conductive unit has a plurality of second conductive layers respectively formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 11-19-2009 |
20110003434 | SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME - A semiconductor chip package structure for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first insulative unit, a first conductive unit, a second conductive unit, and a second insulative unit. The package unit has a central receiving groove and an outer receiving groove formed around the central receiving groove. The semiconductor chip has a plurality of conductive pads. The first insulative unit has a first insulative layer formed between the conductive pads. The first conductive unit has a plurality of first conductive layers. The second conductive unit has a plurality of second conductive layers formed on the first conductive layers. The second insulative unit is formed between the first conductive layers and between the second conductive layers. | 01-06-2011 |