Patent application number | Description | Published |
20140134265 | TEC FAMILY KINASE INHIBITOR ADJUVANT THERAPY - Described herein are methods and compositions comprising a covalent TEC family kinase inhibitor for use in adjuvant therapy, including adjuvant cancer therapy, vaccination and treatment of immune disorders and pathogenic infections. | 05-15-2014 |
20140371241 | TEC FAMILY KINASE INHIBITOR ADJUVANT THERAPY - Described herein are methods and compositions comprising a covalent TEC family kinase inhibitor for use in adjuvant therapy, including adjuvant cancer therapy, vaccination and treatment of immune disorders and pathogenic infections. | 12-18-2014 |
20150118222 | TREATMENT USING BRUTON'S TYROSINE KINASE INHIBITORS AND IMMUNOTHERAPY - Combinations of Bruton's tyrosine kinase (Btk) inhibitors, e.g., 1-((R)-3-(4-amino-3-(4-phenoxyphenyl)-1H-pyrazolo[3,4-d]pyrimidin-1-yl)piperidin-1-yl)prop-2-en-1-one, with immunotherapy are provided. Also provided are methods of treating cancers, and autoimmune disorders by administering combinations of Bruton's tyrosine kinase (Btk) inhibitors, e.g., 1-((R)-3-(4-amino-3-(4-phenoxyphenyl)-1H-pyrazolo[3,4-d]pyrimidin-1-yl)piperidin-1-yl)prop-2-en-1-one, and an immune checkpoint inhibitor. | 04-30-2015 |
Patent application number | Description | Published |
20080243080 | Method and apparatus for vascular access - A method and apparatus is described that facilitates appropriate placement of a closure device and allows ease of placement with repeated access without bleeding. A suitable biocompatible polymer diaphragm such as silicone or nipple is place on the adventitia of the vessel through a small cutdown incision. The puncture surface is a diaphragm that functions as a self-sealing valve. For embodiments designed for small catheter access such as 4 to 9 Fr, this may be a polymer that elastically seals around the puncture once the catheter is removed. Especially for larger access catheters, such as 10 French to 24 French, a preformed aperture or slit may be cut into the material, allowing controlled and atraumatic penetration of the device and artery. The sealing element may also be fixed to the outside wall of the vessel with holdfasts through a method that facilitates percutaneous delivery through the use of a guiding wire. A method and apparatus is also described that minimizes the potential migration of emboli generated upstream from the access site, an anchoring cannula and method for facilitating localizing of the access device. | 10-02-2008 |
20090018455 | METHOD AND APPARATUS FOR TREATING A CAROTID ARTERY - One disclosed embodiment comprises a method for treating lesions in the carotid artery of a mammalian body. The method comprises transcervical access and blocking of blood flow through the common carotid artery (with or without blocking of blood flow through the external carotid artery), shunting blood from the internal carotid artery and treating the lesion in the carotid artery. | 01-15-2009 |
20100191169 | METHOD AND APPARATUS FOR TREATING A CAROTID ARTERY - One disclosed embodiment comprises a method for treating lesions in the carotid artery of a mammalian body. The method comprises transcervical access and blocking of blood flow through the common carotid artery (with or without blocking of blood flow through the external carotid artery), shunting blood from the internal carotid artery and treating the lesion in the carotid artery. | 07-29-2010 |
20100191170 | METHOD AND APPARATUS FOR TREATING A CAROTID ARTERY - One disclosed embodiment comprises a method for treating lesions in the carotid artery of a mammalian body. The method comprises transcervical access and blocking of blood flow through the common carotid artery (with or without blocking of blood flow through the external carotid artery), shunting blood from the internal carotid artery and treating the lesion in the carotid artery. | 07-29-2010 |
20110082408 | METHOD AND APPARATUS FOR TREATING A CAROTID ARTERY - One disclosed embodiment comprises a method for treating lesions in the carotid artery of a mammalian body. The method comprises transcervical access and blocking of blood flow through the common carotid artery (with or without blocking of blood flow through the external carotid artery), shunting blood from the internal carotid artery and treating the lesion in the carotid artery. | 04-07-2011 |
20110125131 | ENDOLUMINAL DELIVERY OF ANESTHESIA - Described herein are methods and devices for selectively applying fluids (particularly anesthetics) to a target tissue from within a blood vessel while minimizing the amount of fluid applied to non-target tissue. The injection catheters described herein may include an elongate body, a directional injector, and one or more holdfasts for securing the catheter before extending the injector. The methods of selectively applying anesthetic to a target structure generally include the steps of inserting an injection catheter into a body vessel, positioning the injection catheter within the body vessel near the target structure, anchoring the injection catheter before extending a directional injector from the injection catheter, and applying anesthetic from the injection catheter to the target structure. | 05-26-2011 |
Patent application number | Description | Published |
20080279185 | ENHANCED PACKET CLASSIFICATION - A method for classifying a data packet containing a header is provided. The method may comprise parsing the header of a data packet into header elements. Rules in secondary lookup tables generated from a primary lookup table may be accessed. The respective header elements of the data packet may be compared to the respective fields of each of the secondary lookup tables, and rule results for each of the secondary lookup tables in a combinable format may be generated. In another embodiment, a method for generating secondary lookup tables from a primary lookup table is provided. The method may comprise accessing a primary lookup table defining packet classification rules and generating multiple secondary lookup tables from the primary lookup table. For each secondary lookup table, a selection of classification rules and a selection of fields of the multiple fields based on a rule set identifying predefined entries may be extracted. | 11-13-2008 |
20090024826 | GALOIS-BASED INCREMENTAL HASH MODULE - Various systems and methods for implementing a Galois-based incremental hash module are disclosed. For example, a method involves computing a first hash of a first string of an input stream. The first hash is computed by performing one or more Galois mathematical operations upon portions of the first string. A second hash of a second string, which overlaps the first string, can then be computed by processing the first hash. | 01-22-2009 |
20100309917 | ENHANCED PACKET CLASSIFICATION - A method for classifying a data packet containing a header is provided. The method may comprise parsing the header of a data packet into header elements. Rules in secondary lookup tables generated from a primary lookup table may be accessed. The respective header elements of the data packet may be compared to the respective fields of each of the secondary lookup tables, and rule results for each of the secondary lookup tables in a combinable format may be generated. In another embodiment, a method for generating secondary lookup tables from a primary lookup table is provided. The method may comprise accessing a primary lookup table defining packet classification rules and generating multiple secondary lookup tables from the primary lookup table. For each secondary lookup table, a selection of classification rules and a selection of fields of the multiple fields based on a rule set identifying predefined entries may be extracted. | 12-09-2010 |
Patent application number | Description | Published |
20120065604 | DEGRADABLE HEMOSTATIC SPONGE AND EXTRUSION SYSTEM AND METHOD FOR MANUFACTURING THE SAME - A degradable hemostatic sponge that can be self-degraded and absorbed by a human body has poly lactic acid as its main material and mixed with a moisture-absorbent material, such as collagen, chitosan, starch and the like, at a specific ratio. Given grinding, mixing and melting steps, the materials using a supercritical fluid as a foaming agent can be used to manufacture the degradable hemostatic sponge having an open-cell microcellular form by a continuous extrusion foaming process. In addition, the present invention also includes a system and a method for manufacturing the degradable hemostatic sponge. | 03-15-2012 |
20120065741 | GUIDED TISSUE REGENERATION MEMBRANE - A guided tissue regeneration membrane has a top surface, a bottom surface and a plurality of through holes formed through the top and bottom surfaces. Each of the plurality of through holes has a base opening on the top surface and a tip opening on the bottom surface. The diameter of the base opening is larger than that of the tip opening. The guided tissue regeneration membrane is placed between a hard tissue and a soft tissue of gums with the top surface thereof facing the hard tissue so as to hinder the soft tissue from rapidly growing. The tip openings are available for the soft tissue to supply nutrient to the hard tissue therethrough. The hard tissue can grow from the base openings, through the corresponding through holes and to the soft tissue to repair periodontal tissue. | 03-15-2012 |
20140080096 | Guided Tissue Regeneration Membrane - A guided tissue regeneration membrane has a top surface, a bottom surface and the two surfaces are characterized by the plurality of through conical holes. Each of the plurality of through holes has a base opening on the top surface and a tip opening on the bottom surface. The diameter of the base opening is larger than that of the tip opening The guided tissue regeneration membrane is placed between a hard tissue and a soft tissue of gums with the top surface thereof facing the hard tissue so as to hinder the soft tissue from rapidly growing. The tip openings are available for the soft tissue to supply nutrient to the hard tissue therethrough. The hard tissue can grow from the base openings, through the corresponding through holes and to the soft tissue to repair periodontal tissue. In order to achieve a better affinity for cell growth, the guided tissue membrane surface facing the bony surface is coated with a hydrophilic, bioactive and biocompatible nano scaled oxidation layer. | 03-20-2014 |
Patent application number | Description | Published |
20120023112 | Method for measuring similarity of diverse binary objects comprising bit patterns - An apparatus, system, and method for measuring the similarity of diverse binary objects, such as files, is disclosed. The method comprises determining a plurality of digital signatures in each of a plurality of dissimilar objects, for each digital signature, accessing a location in a store which has object identifiers for each object which also exhibits at least one instance of the digital signature, writing into the store the object identifiers of all the objects which have the corresponding pattern and the number of times the pattern is found, and making a list of all the objects which share a pattern found in each object. Analyzing the list determines the degree of similarity of a particular object with each of a plurality of diverse binary objects. | 01-26-2012 |
20130097195 | Method For Measuring Similarity Of Diverse Binary Objects Comprising Bit Patterns - An apparatus, system, and method for measuring the similarity of binary objects is disclosed. The method determines at least one pattern signature in an Nth binary object, accessing a location in a similarity store which has object identifiers for each of the previous N−1 binary objects which contain the corresponding pattern, and writing the object identifier of the Nth binary object at that same location in the similarity store. Reporting the number of locations in similarity store which contain the object identifiers of two apparently diverse binary objects is a measure of similarity to each other. | 04-18-2013 |
20140380471 | Binary Document Content Leak Prevention Apparatus, System, and Method of Operation - An apparatus, system, and method for measuring the similarity of communication packet binary objects to classified object binary objects is disclosed. The method determines at least one pattern signature in an Nth binary object, accessing a location in a similarity store which has object identifiers for each of the previous N−1 binary objects which contain the corresponding pattern, and writing the object identifier of the Nth binary object at that same location in the similarity store. Reporting the number of locations in similarity store which contain the object identifiers of a communication packet and a classified object is a measure of similarity to each other. Outgoing packets are blocked if they correlate highly with confidential documents or objects. | 12-25-2014 |
Patent application number | Description | Published |
20100163818 | FORMING A CARBON PASSIVATED OVONIC THRESHOLD SWITCH - By making an ovonic threshold switch using a carbon interfacial layer having a thickness of less than or equal to ten percent of the thickness of the associated electrode, cycle endurance may be improved. In some embodiments, a glue layer may be used between the carbon and the chalcogenide of the ovonic threshold switch. The glue layer may be effective to improve adherence between carbon and chalcogenide. | 07-01-2010 |
20130299767 | DEPOSITING TITANIUM SILICON NITRIDE FILMS FOR FORMING PHASE CHANGE MEMORIES - Organometallic precursors may be utilized to form titanium silicon nitride films that act as heaters for phase change memories. By using a combination of TDMAT and TrDMASi, for example in a metal organic chemical vapor deposition chamber, a relatively high percentage of silicon may be achieved in reasonable deposition times, in some embodiments. In one embodiment, two separate bubblers may be utilized to feed the two organometallic compounds in gaseous form to the deposition chamber so that the relative proportions of the precursors can be readily controlled. | 11-14-2013 |
20130344676 | PHASE CHANGE MEMORY INCLUDING OVONIC THRESHOLD SWITCH WITH LAYERED ELECTRODE AND METHODS FOR FORMING THE SAME - Erosion of chalcogenides in phase change memories using ovonic threshold switch selectors can be reduced by controlling columnar morphology in electrodes used in the ovonic threshold switch. The columnar morphology may cause cracks to occur which allow etchants used to etch the ovonic threshold switch to sneak through the ovonic threshold switch and to attack chalcogenides, either in the switch or in the memory element. In one embodiment, the electrode may be split into two metal nitride layers separated by an intervening metal layer. | 12-26-2013 |
20140003123 | LOW POWER PHASE CHANGE MEMORY CELL | 01-02-2014 |
20150123066 | ELECTRODE MATERIALS AND INTERFACE LAYERS TO MINIMIZE CHALCOGENIDE INTERFACE RESISTANCE - A phase-change memory cell having a reduced electrode-chalcogenide interface resistance and a method for making the phase-change memory cell are disclosed: An interface layer is formed between an electrode layer and a chalcogenide layer that and provides a reduced resistance between the chalcogenide-based phase-change memory layer and the electrode layer. Exemplary embodiments provide that the interface layer comprises a tungsten carbide, a molybdenum carbide, a tungsten boride, or a molybdenum boride, or a combination thereof. In one exemplary embodiment, the interface layer comprises a thickness of between about 1 nm and about 10 nm. | 05-07-2015 |
Patent application number | Description | Published |
20090140579 | Relay Switch Including an Energy Detection Circuit - A semiconductor relay switch having two data ports receiving incoming signals and a power supply terminal receiving a power supply voltage is responsive to a power supply voltage level and an energy level of the incoming signals to open and close its conduction paths. The relay switch is open when a valid power supply level is detected and when there is no supply power on the power supply terminal but a high energy level is detected in the incoming signals. The relay switch is closed to allow conduction between the two data ports only when there is no power supply voltage on the power supply terminal and an energy level below a predetermined threshold is detected in the incoming signals. In one embodiment, the semiconductor relay switch includes a main conduction switch circuit, an energy detect circuit and a control signal generator. | 06-04-2009 |
20090206886 | Line Driver With Tuned On-Chip Termination - A line driver includes current sources and resistors that form a bridge circuit in which a bridge resistor is connected between an internal node and ground, and a series resistor connected between the internal node and the driver's output node. The internal node is connected to receive a unit current from a first stage transistor, and the output node is connected to receive an amplified current from a second stage transistor that is N times the unit current. The bridge resistor is formed with a resistance value set such that the voltages at the internal node and the output node are equal, i.e., such that no current flows through the series resistor. The resistance value of the series resistor is thus adjustable to optimize output impedance in a manner independent of the driver's gain. An echo cancellation circuit is utilized to eliminate noise from two associated line drivers. | 08-20-2009 |
20100066405 | Line Driver With Tuned On-Chip Termination - A line driver includes current sources and resistors that form a bridge circuit in which a bridge resistor is connected between an internal node and ground, and a series resistor connected between the internal node and the driver's output node. The internal node is connected to receive a unit current from a first stage transistor, and the output node is connected to receive an amplified current from a second stage transistor that is N times the unit current. The bridge resistor is formed with a resistance value set such that the voltages at the internal node and the output node are equal, i.e., such that no current flows through the series resistor. The resistance value of the series resistor is thus adjustable to optimize output impedance in a manner independent of the driver's gain. An echo cancellation circuit is utilized to eliminate noise from two associated line drivers. | 03-18-2010 |
20110051819 | SYSTEM AND METHOD FOR TRANSMITTER ELECTROMAGNETIC INTERFERENCE (EMI) REDUCTION - A device for Electro-Magnetic Interference (EMI) reduction in an Ethernet system has an Ethernet compatible device. The Ethernet compatible device has a filter for adjusting a signal outputted by the Ethernet compatible device for EMI reduction. | 03-03-2011 |
20120287829 | Adaptive pause time energy efficient ethernet PHY - An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device. | 11-15-2012 |
20130229926 | Ethernet Communication Device with Reduced EMI - A network device includes a physical layer transceiver configured to receive incoming data on a data link at an input clock rate and to store the incoming data in a buffer. The physical layer transceiver includes a Media Independent Interface (MII) controller configured to receive the incoming data stored in the buffer and to transmit the incoming data over a MII bus based on a MII clock where the MII clock is a spread spectrum clock. The network device further includes a Media Access Control (MAC) device configured to receiving incoming data from the physical layer transceiver over the MII bus where the incoming data is clocked by the spread spectrum MII clock. | 09-05-2013 |
Patent application number | Description | Published |
20110059608 | METHOD FOR IMPROVING ADHESION OF LOW RESISTIVITY TUNGSTEN/TUNGSTEN NITRIDE LAYERS - Methods of improving the adhesion of low resistivity tungsten/tungsten nitride layers are provided. Low resistivity tungsten/tungsten nitride layers with good adhesion are formed by treating a tungsten or tungsten nitride layer before depositing low resistivity tungsten. Treatments include a plasma treatment and a temperature treatment. According to various embodiments, the treatment methods involve different gaseous atmospheres and plasma conditions. | 03-10-2011 |
20110159690 | DEPOSITING TUNGSTEN INTO HIGH ASPECT RATIO FEATURES - Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner. | 06-30-2011 |
20120009785 | Depositing Tungsten Into High Aspect Ratio Features - Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials are provided. The method involves providing a partially fabricated semiconductor substrate and depositing a tungsten-containing layer on the substrate surface to partially fill one or more high aspect ratio features. The method continues with selective removal of a portion of the deposited layer such that more material is removed near the feature opening than inside the feature. In certain embodiments, removal may be performed at mass-transport limited conditions with less etchant available inside the feature than near its opening. Etchant species are activated before being introduced into the processing chamber and/or while inside the chamber. In specific embodiments, recombination of the activated species is substantially limited and/or controlled during removal, e.g., operation is performed at less than about 250° C. and/or less than about 5 Torr. | 01-12-2012 |
20120115329 | DEPOSITING TUNGSTEN INTO HIGH ASPECT RATIO FEATURES - Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner. | 05-10-2012 |
20130330926 | DEPOSITING TUNGSTEN INTO HIGH ASPECT RATIO FEATURES - Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner. | 12-12-2013 |
Patent application number | Description | Published |
20080239955 | ADAPTIVE CROSS-NETWORK MESSAGE BANDWIDTH ALLOCATION BY MESSAGE SERVERS - In one embodiment, a network device is described as including a rate monitor to monitor an actual individual message rate of event messages sent from each one of a plurality of sending devices operatively in communication with the network device, an allocator to allocate an individual message rate limit to each of the plurality of sending devices, and a communication module to communicate a rate limit instruction to at least one of the sending devices, the rate limit instruction to limit the transmission rate of event messages. | 10-02-2008 |
20080301506 | SYSTEM DIAGNOSTICS WITH DYNAMIC CONTEXTUAL INFORMATION OF EVENTS - A network device and a method for monitoring operational messages is described. The method comprises monitoring an occurrence of an operational message of the network device, and storing dynamic context information at the time that the operational message occurred. The stored dynamic context information is then associated with the operational message. The operational message (e.g., a syslog message) may be stored together with the dynamic context information in a metalog memory and may comprise a snapshot of a procedure stack, the procedure stack including information indicative of a sequence of procedure invocations. | 12-04-2008 |
20090003345 | NETWORK DEVICE DYNAMIC HELP - There are provided a method, system, logic and network device to provide additional information and at least one recommended action relating to error information reported by a feature module of the network device. The method comprises generating a request that includes error information reported by a feature module of a network device, the error information including one or more runtime parameters associated with the network device. The method further comprises transmitting the generated request and receiving a response to the request including additional information and the at least one recommended action relating to the error information, the additional information and the at least one recommended action being based at least in part on the one or more runtime parameters. The network device comprises a feature module to report error information including one or more runtime parameters associated with the network device, a help module to generate a request including the error information reported by the feature module and to receive a response to the request, the response including additional information and at least one recommended action relating to the error information, the additional information and the at least one recommended action being based at least in part on the one or more runtime parameters, and a communication module to transmit the generated request and to receive the response to the request. | 01-01-2009 |
20100042820 | SELF-RESTARTING NETWORK DEVICES - A method and apparatus for self-monitoring to identify an occurrence of a threshold and rebooting in response to the occurrence of the threshold is provided. In an embodiment, a data processing apparatus comprises one or more processors; logic coupled to the one or more processors and comprising one or more stored sequences of instructions which, when executed by one or more processors, cause the one or more processors to obtain a threshold associated with the apparatus; self-monitor the apparatus to identify an occurrence of the threshold; and self-reboot the apparatus responsive to the occurrence of the threshold. | 02-18-2010 |
20110055637 | ADAPTIVELY COLLECTING NETWORK EVENT FORENSIC DATA - In an embodiment, a data processing system comprises a repository configured to store a plurality of event message definitions for error messages, syslog messages, or other notification messages that may be emitted by one or more managed network elements; event annotation logic coupled to the data repository and configured to receive and store one or more annotations to each of the event message definitions, wherein each of the annotations specifies event context information to be collected in the managed network elements when an associated event message occurs; event forensics definitions generator logic coupled to the event annotation logic and configured to generate an event forensics definitions file capable of interpretation by one or more managed network elements and comprising event type identifiers and context information identifiers for context information to be collected, and configured to cause distributing the event forensics definitions file to the one or more managed network elements. | 03-03-2011 |
20120110371 | SELF-RESTARTING NETWORK DEVICES - A method and apparatus for self-monitoring to identify an occurrence of a threshold and rebooting in response to the occurrence of the threshold is provided. In an embodiment, a data processing apparatus comprises one or more processors; logic coupled to the one or more processors and comprising one or more stored sequences of instructions which, when executed by one or more processors, cause the one or more processors to obtain a threshold associated with the apparatus; self-monitor the apparatus to identify an occurrence of the threshold; and self-reboot the apparatus responsive to the occurrence of the threshold. | 05-03-2012 |
20120185775 | VISUALIZATION OF PERFORMANCE DATA OVER A NETWORK PATH - A system and technique for visualizing performance data over a network path are disclosed. More specifically, a network management system generates and displays an object that represents data for one or more performance characteristics related to a plurality of network nodes in the network path. In one embodiment, a graph having an x-axis and a y-axis is displayed, the x-axis being associated with two or more network nodes in the network path and the y-axis being associated with a first performance characteristic. Data corresponding to the first performance characteristic is plotted as data points corresponding to the network nodes associated with the x-axis. Data corresponding to a second performance characteristic may be represented via the size or the color of the data points. Alternatively, a characterization of the data corresponding to the first performance characteristic may be represented by the size or color of the data points. | 07-19-2012 |
20120198346 | VISUALIZATION OF CHANGES AND TRENDS OVER TIME IN PERFORMANCE DATA OVER A NETWORK PATH - A system and technique for visualizing changes and trends in performance data over a network path are disclosed. More specifically, a network management system generates and displays an object that represents data for one or more performance characteristics related to a plurality of network nodes in the network path. The object is dynamically updated to include updated data related to the one or more performance characteristics. In one embodiment, a representation of the updated data is superimposed over representations of previously collected data relating to the performance characteristics. The transparency of the representations associated with the previously collected data may reflect a difference in time between the current time and the time at which the data was collected. In another embodiment, a timeline is included in the object that tracks the state of the object at one or more previous points in time. | 08-02-2012 |
20120324106 | ADAPTIVE CROSS-NETWORK MESSAGE BANDWIDTH ALLOCATION BY MESSAGE SERVERS - The network device is described that comprises an allocator to adaptively allocate respective event message rate limits to client network devices that is in communication with an event-based system logging server to send event messages to the logging server for processing. The adaptively allocated event message rate limits are communicated to the client network devices so that limiting of a global rate of event messages received by the logging server comprises limiting the respective rates at which the client network devices can transmit event messages to the logging server. Measurement of respective event message rates comprises a count of event messages actually received by the logging server from the corresponding client device within a defined time window. | 12-20-2012 |
Patent application number | Description | Published |
20130271684 | DEVICES AND METHODS FOR REDUCING THE SIZE OF DISPLAY PANEL ROUTINGS - Disclosed embodiments relate to signal routings for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and columns. Each of the pixels includes a pixel electrode and a thin-film transistor (TFT). The LCD may include a conductive signal routing portion having a first metallic layer, a second metallic layer formed directly on the first metallic layer, and a third metallic layer formed directly on the second metallic layer. The first metallic layer may include a contact terminal. The second metallic layer when combined with the third metallic layers may decrease the resistance of the third metallic layer. | 10-17-2013 |
20130300681 | LOW COMPLEXITY GATE LINE DRIVER CIRCUITRY - Gate driver circuitry that controls an array of display elements is described. The gate driver circuitry has gate drivers that apply a control pulse to each of a number of gate lines in sequence, from a previous gate line to a current gate line, during a frame interval in which the array of display elements is filled with pixel values. Each gate driver has a latch stage followed by an output stage. The output stage is coupled to drive a current gate line, and the latch stage is coupled to drive a) a first hold circuit that holds the current gate line at a predetermined voltage, and b) a second hold circuit that holds a previous gate line at a predetermined voltage. Other embodiments are also described and claimed. | 11-14-2013 |
20130328053 | Thin Film Transistor with Increased Doping Regions - A transistor that may be used in electronic displays to selectively activate one or more pixels. The transistor includes a metal layer, a silicon layer deposited on at least a portion of the metal layer, the silicon layer includes an extension portion that extends a distance past the metal layer, and at least three lightly doped regions positioned in the silicon layer. The at least three lightly doped regions have a lower concentration of doping atoms than other portions of the silicon layer forming the transistor. | 12-12-2013 |
20140043552 | Display with Multilayer and Embedded Signal Lines - A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors. | 02-13-2014 |
20140070225 | Hydrogenation and Crystallization of Polycrystalline Silicon - A TFT stack for a liquid crystal display is provided. The TFT stack includes a silicon layer that includes a heavily doped region, a non-doped region, and a lightly doped region between the heavily doped region and the non-doped region. The heavily doped region is hydrogenated. The TFT stack also includes an insulation layer that includes a first portion formed over the lightly doped region and a second portion disposed over the non-doped region and a gate metal electrode layer formed over the second portion of the non-doped region. The TFT stack also includes a first dielectric layer disposed over the gate metal electrode and over the first portion of the insulation layer. The heavily doped region is hydrogenated to reduce the dependence of the capacitance between the gate metal electrode and the conductive layer C | 03-13-2014 |
20140146026 | Electronic Device with Compact Gate Driver Circuitry - An electronic device display may have an array of display pixels that are controlled using a grid of data lines and gate lines. The display may include compact gate driver circuits that perform gate driver operations to drive corresponding gate lines. Each compact gate driver circuit may include a first driver stage and a second driver stage. The first driver stage may receive a start pulse signal and produce a control signal. The control signal may be stored by a capacitor to identify a control state of the gate driver circuit. The second driver stage may receive the control signal, a clock signal, and a corresponding inverted clock signal and drive the corresponding gate line based on the received signals. The second driver stage may include pass transistor circuitry that passes the clock signal to the corresponding gate line and may include short circuit protection circuitry. | 05-29-2014 |
20140232626 | DISPLAY PANEL SOURCE LINE DRIVING CIRCUITRY - An electronic display system has a light transmissive panel, a region of display elements on the panel, and source lines coupled to the display elements. A demultiplexor circuit has multiple groups of pass gates. Each pass gate has a pair of complimentary on-panel transistors, and the signal outputs of each group are connected to a respective group of the source lines. A display driver integrated circuit (IC) receives video data and timing control signals. A signal input of each group of pass gates is connected to a respective output pin of the driver IC. The display driver IC provides digital timing control signals to control the pass gates of the demultiplexor circuit. Other embodiments are also described. | 08-21-2014 |
20140232955 | Display Circuitry with Reduced Pixel Parasitic Capacitor Coupling - A touch screen display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. Each display pixel in the TFT layer may include first and second TFTs coupled in series between a data line and a storage capacitor. The first TFT may have a gate that is coupled to a gate line. The second TFT may have a gate that is coupled to a control line that is different than the gate line. A global enable signal may be provided on the control line, where the enable signal is asserted during display intervals and is deasserted during touch intervals. The second TFT may be formed using a top-gate TFT or a bottom-gate TFT arrangement. | 08-21-2014 |
20140327632 | Displays with Integrated Touch and Improved Image Pixel Aperture - A display may be provided with integral touch functionality. The display may include a common electrode layer having row electrodes arranged in rows and column electrodes interposed between the row electrodes of each row. The row electrodes may be electrically coupled by conductive paths. The row and column electrodes may be coupled to touch sensor circuitry that uses the row and column electrodes to detect touch events. Each electrode of the common electrode layer may cover a respective portion of an array of pixels. Each pixel of the display may have a respective aperture. The conductive paths that electrically couple row electrodes of the common electrode layer may cover or otherwise block some light from passing through pixels, resulting in reduced apertures. Dummy structures may be provided for other pixels that modify the apertures of the other pixels to match the reduced apertures associated with the conductive paths. | 11-06-2014 |
20150015559 | LIQUID CRYSTAL DISPLAY USING DEPLETION-MODE TRANSISTORS - Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel. | 01-15-2015 |
20150054799 | Display Driver Circuitry For Liquid Crystal Displays With Semiconducting-Oxide Thin-Film Transistors - An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure. | 02-26-2015 |
20150055047 | Liquid Crystal Displays with Oxide-Based Thin-Film Transistors - An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure. | 02-26-2015 |
Patent application number | Description | Published |
20110149666 | BITLINE FLOATING DURING NON-ACCESS MODE FOR MEMORY ARRAYS - Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery. | 06-23-2011 |
20110161783 | METHOD AND APPARATUS ON DIRECT MATCHING OF CACHE TAGS CODED WITH ERROR CORRECTING CODES (ECC) - An apparatus and method is described herein directly matching coded tags. An incoming tag address is encoded with error correction codes (ECCs) to obtain a coded, incoming tag. The coded, incoming tag is directly compared to a stored, coded tag; this comparison result, in one example, yields an m-bit difference between the coded, incoming tag and the stored, coded tag. ECC, in one described embodiment, is able to correct k-bits and detect k+1 bits. As a result, if the m-bit difference is within 2k+2 bits, then valid codes—coded tags—are detected. As an example, if the m-bit difference is less than a hit threshold, such as k-bits, then a hit is determined, while if the m-bit difference is greater than a miss threshold, such as k+1 bits, then a miss is determined. | 06-30-2011 |
Patent application number | Description | Published |
20080221806 | SENSOR HAVING A THIN-FILM INHIBITION LAYER, NITRIC OXIDE CONVERTER AND MONITOR - Sensors and detection systems suitable for measuring analytes, such as biomolecule, organic and inorganic species, including environmentally and medically relevant volatiles and gases, such as NO, NO2, CO2, NH3, H2, CO and the like, are provided. Certain embodiments of nanostructured sensor systems are configured for measurement of medically important gases in breath. Applications include the measurement of endogenous nitric oxide (NO) in breath, such as for the monitoring or diagnosis of asthma and other pulmonary conditions. | 09-11-2008 |
20090056419 | HIGH EFFICIENCY, LOW LOSS NO TO NO2 CATALYTIC CONVERTER - Provided herein are catalytic converters that have improved characteristics. According to various embodiments, the converters include high surface area catalyst supports conformally coated with nanoparticulate thin films of a catalyst (e.g., Pt, Pd and Rh). The films are continuous, preventing absorption of species within the converter on the catalyst support. The converters provide higher oxidation efficiency than conventional catalytic converters, in certain embodiments approaching the stoichiometric ratio for the reaction. The converters also provide minimal loss of chemical species within the converter. Also provided are novel methods of fabricating catalytic converters that involve atomic layer deposition of Pt or other catalyst on the support, as well as methods and devices for sensing NO in samples that involve catalytic conversion of NO to NO2. | 03-05-2009 |
20090142472 | METHODS OF FABRICATION EMPLOYING NANOSCALE MANDRELS - Synthetic nanopore fabrication methods and structures are provided. Nanoscale transistor fabrication methods and structures are provided. | 06-04-2009 |
20100268106 | BREATH CONDENSATE SAMPLER AND DETECTOR AND BREATH/BREATH CONDENSATE SAMPLER AND DETECTOR - The present invention provides a direct sampler and detector for analytes found in exhaled breath condensate. Analytes in the breath condensate are detected instantaneously as they condense prior to reaching the sensor surface or condense directly on the sensor surface. Because the analysis or assay is performed immediately after patient exhalation, analyte stability is significantly improved providing accurate, reliable, consistent, and clinically applicable results. In certain embodiments, combined breath condensate/breath samplers and detectors are provided, enabling multiplexed analysis of condensed and vapor-phase analytes provided in a single sampling session. Breath is collected and directed to one or more subsystems. Within each subsystem, the breath portion is either condensed or prevented from condensing. The technique also allows real-time continuous monitoring, thus allowing immediate feedback to both medical professionals and additional hardware such as ventilators, anesthesia machines, drug infusion systems and cardiac pacemakers. | 10-21-2010 |
20120006102 | SENSOR HAVING A THIN-FILM INHIBITION LAYER - Sensors and detection systems suitable for measuring analytes, such as biomolecule, organic and inorganic species, including environmentally and medically relevant volatiles and gases, such as NO, NO2, CO2, NH3, H2, CO and the like, are provided. Certain embodiments of nanostructured sensor systems are configured for measurement of medically important gases in breath. Applications include the measurement of endogenous nitric oxide (NO) in breath, such as for the monitoring or diagnosis of asthma and other pulmonary conditions. | 01-12-2012 |
20120178187 | MAGNETIC CARBON NANOTUBE BASED BIODETECTION - Provided herein is a new hybrid material system, mCNT, including magnetic carbon nanotubes for biological and medical sensing applications. In certain embodiments, the systems include magnetic material on the interior of carbon nanotubes (CNTs). The amount of magnetic particles inside CNTs may be such that mCNT can respond to small, low cost, portable magnet. The exterior CNT surface is kept intact for biomolecular attachments or other functionalizations. Performance enhancement with this novel material includes improved sensitivity, reduced response time, and reduced sample volume. According to various embodiments, the mCNTs are substrates for the adherence of molecules participating in these assays or as active sensing elements. Also provided are methods of fabricating two-dimensional mCNT and CNT networks on printed electrodes. | 07-12-2012 |
20130075690 | Ammonia Nanosensors, and Environmental Control System - Embodiments of nanoelectronic sensors are described, including sensors for detecting analytes such ammonia. An environmental control system employing nanoelectronic sensors is described. A personnel safety system configured as a disposable badge employing nanoelectronic sensors is described. A method of dynamic sampling and exposure of a sensor providing a number of operational advantages is described. | 03-28-2013 |
20130075693 | COALESCED NANOWIRE STRUCTURES WITH INTERSTITIAL VOIDS AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer. | 03-28-2013 |
20130075794 | NANO-ELECTRONIC SENSORS FOR CHEMICAL AND BIOLOGICAL ANALYTES, INCLUDING CAPACITANCE AND BIO-MEMBRANE DEVICES - Embodiments of nanoelectronic sensors are described, including sensors for detecting analytes inorganic gases, organic vapors, biomolecules, viruses and the like. A number of embodiments of capacitive sensors having alternative architectures are described. Particular examples include integrated cell membranes and membrane-like structures in nanoelectronic sensors. | 03-28-2013 |
20130287644 | HIGH EFFICIENCY, LOW LOSS NO TO NO2 CATALYTIC CONVERTER - Provided herein are catalytic converters that have improved characteristics. According to various embodiments, the converters include high surface area catalyst supports conformally coated with nanoparticulate thin films of a catalyst (e.g., Pt, Pd and Rh). The films are continuous, preventing absorption of species within the converter on the catalyst support. The converters provide higher oxidation efficiency than conventional catalytic converters, in certain embodiments approaching the stoichiometric ratio for the reaction. The converters also provide minimal loss of chemical species within the converter. Also provided are novel methods of fabricating catalytic converters that involve atomic layer deposition of Pt or other catalyst on the support, as well as methods and devices for sensing NO in samples that involve catalytic conversion of NO to NO2. | 10-31-2013 |
Patent application number | Description | Published |
20090079409 | VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD - A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”. | 03-26-2009 |
20090273328 | VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD - A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”. | 11-05-2009 |
20110062872 | Adaptive Switch Mode LED Driver - An adaptive switch mode LED driver provides an intelligent approach to driving multiple strings of LEDs. The LED driver determines an optimal current level for each LED channel from a limited set of allowed currents. The LDO driver then determines a PWM duty cycle for driving the LEDs in each LED channel to provide precise brightness control over the LED channels. Beneficially, the LED driver minimizes the power dissipation in the LDO circuits driving each LED string, while also ensuring that the currents in each LED string are maintained within a limited range. A sample and hold LDO allows PWM control over extreme duty cycles with very fast dynamic response. Furthermore, fault protection circuitry ensures fault-free startup and operation of the LED driver. | 03-17-2011 |
20120293144 | VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD - A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”. | 11-22-2012 |