Casselman
Daniel Casselman, Bloomington, IL US
Matthew D. Casselman, Lexington, KY US
Patent application number | Description | Published |
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20150372333 | NON-AQUEOUS REDOX FLOW BATTERIES INCLUDING 3,7-PERFLUOROALKYLATED PHENOTHIAZINE DERIVATIVES - A non-aqueous redox flow battery includes a negative electrode immersed in a first non-aqueous liquid electrolyte solution, a positive electrode immersed in a second non-aqueous liquid electrolyte solution, and a semi-permeable separator interposed between the negative and positive electrodes, wherein the second the non-aqueous liquid electrolyte solution comprises a compound of the formula: | 12-24-2015 |
Ron Casselman, Kanata CA
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20140177456 | Mobile Device Assisted Coordinated Multipoint Transmission and Reception - Idle mobile devices are used as cooperating devices to support coordinated multipoint transmission and reception for uplink and downlink communications between a primary mobile device and its serving base station. For uplink communications, the cooperating mobile devices receive the uplink transmission from the primary mobile device and retransmit the received data signal to the serving base station for the primary mobile device. For downlink communications, the cooperating mobile devices receive the downlink transmission from the serving base station and retransmit the received data signal to the primary mobile device. | 06-26-2014 |
Ronald Casselman, Kanata CA
Patent application number | Description | Published |
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20150071175 | Mobile Device Assisted Coordinated Multipoint Transmission and Reception - Idle mobile devices are used as cooperating devices to support coordinated multipoint transmission and reception for uplink and downlink communications between a primary mobile device and its serving base station. For uplink communications, the cooperating mobile devices receive the uplink transmission from the primary mobile device and retransmit the received data signal to the serving base station for the primary mobile device. For downlink communications, the cooperating mobile devices receive the downlink transmission from the serving base station and retransmit the received data signal to the primary mobile device. | 03-12-2015 |
20150071176 | Mobile Device Assisted Coordinated Multipoint Transmission and Reception - Idle mobile devices are used as cooperating devices to support coordinated multipoint transmission and reception for uplink and downlink communications between a primary mobile device and its serving base station. For uplink communications, the cooperating mobile devices receive the uplink transmission from the primary mobile device and retransmit the received data signal to the serving base station for the primary mobile device. For downlink communications, the cooperating mobile devices receive the downlink transmission from the serving base station and retransmit the received data signal to the primary mobile device. | 03-12-2015 |
Steven Casselman, Santa Clara, CA US
Patent application number | Description | Published |
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20110066832 | Configurable Processor Module Accelerator Using A Programmable Logic Device - A configurable processor module accelerator using a programmable logic device is described. According to one embodiment, the accelerator module includes a circuit board having coupled thereto a first programmable logic device, a controller, and a first memory. The first programmable logic device has access to a bitstream which is stored in the first memory. Access to the bitstream by the first programmable logic device is controlled by the controller. The bitstream is capable of being instantiated in the first programmable logic device using programmable logic thereof to provide at least a transport interface for communication between the first programmable logic device and one or more other devices associated with the motherboard using the microprocessor interface. | 03-17-2011 |
20110125960 | FPGA Co-Processor For Accelerated Computation - A co-processor module for accelerating computational performance includes a Field Programmable Gate Array (“FPGA”) and a Programmable Logic Device (“PLD”) coupled to the FPGA and configured to control start-up configuration of the FPGA. A non-volatile memory is coupled to the PLD and configured to store a start-up bitstream for the start-up configuration of the FPGA. A mechanical and electrical interface is for being plugged into a microprocessor socket of a motherboard for direct communication with at least one microprocessor capable of being coupled to the motherboard. After completion of a start-up cycle, the FPGA is configured for direct communication with the at least one microprocessor via a microprocessor bus to which the microprocessor socket is coupled. | 05-26-2011 |
Steven Mark Casselman, Sunnyvale, CA US
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20140258995 | Compiler and Language for Parallel and Pipelined Computation - A compiler and language using the comma as a parallelism operator may ensure that variables on the left hand side of a line of code are only used once, and that the variables on the left hand side of the line of code are not being used as function arguments. Commas may be replaced with semi-colons. | 09-11-2014 |
Steven Mark Casselman, Santa Clara, CA US
Patent application number | Description | Published |
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20110295967 | Accelerator System For Remote Data Storage - Data processing and an accelerator system therefor are described. An embodiment relates generally to a data processing system. In such an embodiment, a bus and an accelerator are coupled to one another. The accelerator has an application function block. The application function block is to process data to provide processed data to storage. A network interface is coupled to obtain the processed data from the storage for transmission. | 12-01-2011 |
20110296440 | ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE - Data processing and an accelerator system therefore are described. An embodiment relates generally to a data processing system. In such an embodiment, a bus and an accelerator are coupled to one another. The accelerator has an application function block. The application function block is to process data to provide processed data to storage. A network interface is coupled to obtain the processed data from the storage for transmission. | 12-01-2011 |
20140108726 | ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE - Data processing and an accelerator system therefore are described. An embodiment relates generally to a data processing system. In such an embodiment, a bus and an accelerator are coupled to one another. The accelerator has an application function block. The application function block is to process data to provide processed data to storage. A network interface is coupled to obtain the processed data from the storage for transmission. | 04-17-2014 |
Tyler Casselman, San Francisco, CA US
Patent application number | Description | Published |
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20140019528 | VALIDATION OF DEVICE ACTIVITY VIA LOGIC SHARING - Methods for validating device activity by way of logic sharing are presented. In an example of the method, a text file comprising a script defining programming logic to be executed is received at a first device. The text file is accessed at a second device. Input data for an application executing at the first device is received at the first device. The input data is transmitted from the first device to the second device. The script is executed at the first device from the application using the input data to produce a first result. The script is also executed at the second device from an application using the input data to produce a second result equal to the first result. | 01-16-2014 |