Carrie
Alain Carrie, Charenton Le Pont FR
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20080269188 | Oatp-C Gene C463a Polymorphism Underlies Variable Response to Statin Therapy - The present invention relates to a method for determining variable response to statin therapy in patients afflicted with or susceptible to develop cardiovascular diseases, hypercholesterolemia, Diabetes and metabolic disorders involving high baseline plasma lipid level such as high LDL-C level, comprising detecting the presence or absence of the Pro 155T hr (C463A) variant in the Organic Anion Transporting Polypeptide-C(OATP-C) gene, wherein the presence of said variant is indicative of superior response to statin therapy. It also concerns tailored treatment of different populations of patients according to the Pro155Thr (C463A) variant genotype. | 10-30-2008 |
Aude Carrie, Les Billaux FR
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20150335713 | SINGLE DOSE RECOMBINANT BOVINE FSH AFTER FOLLICULAR SYNCHRONISATION - The present invention relates to methods and compositions for increasing reproduction performance in non-human mammals using a biologically active recombinant Follicle Stimulating Hormone (rFSH). The invention also relates to methods for increasing ovulation or embryo production or pregnancies in non-human mammal using rFSH. The invention may be used in particular in ungulates such as bovine or equine. | 11-26-2015 |
Carl Carrie, Manhasset Hills, NY US
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20130304621 | Algorithmic Trading Management System and Method - Embodiments of the invention are directed to a computer-implemented system and method for facilitating electronic market participation of traders. The algorithmic trading management system may comprise an algorithm and/or sequence usage and construction module providing conditional user interface features for allowing traders to construct algorithms or sequences to structure trading orders. The system may additionally include sequence modification components for allowing traders to modify algorithms collected from external sources in order to customize trading orders. The system may further include operator intervention tools for allowing traders to manually influence sequence execution through a user interface. | 11-14-2013 |
Christophe Carrie, Avignon FR
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20100024368 | JOINTING CEMENT CONTAINING HOLLOW SPHERES, FOR A PARTICLE FILTER - Jointing cement intended in particular for fastening together a plurality of filter blocks of a filtering body for filtering exhaust gas particles of an internal combustion engine of a motor vehicle, the cement including, in percentages by weight relative to the weight of the mineral material, apart from possible water and a possible mineral resin, | 02-04-2010 |
Daniel Carrie, Vezin Le Coquet FR
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20120184706 | METHOD FOR SYNTHESIZING POLYESTERS IN AN ACIDIC IONIC LIQUID MEDIUM - The present invention relates to a method for synthesizing polyesters or copolyesters having a mean molar mass in mass M | 07-19-2012 |
Guillaume Carrie, Grepiac FR
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20150316656 | METHOD FOR DETERMINING THE POSITION OF A SATELLITE NAVIGATION SYSTEM RECEIVER, AND ASSOCIATED SYSTEM - A method is provided for determining the position of a satellite navigation system receiver in which use is made of a probabilistic weighting of the signals received, the weighting using a coefficient K | 11-05-2015 |
Kent M. Carrie, Gilbert, AZ US
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20140055156 | USING FLUID TO POSITION A DEVICE IN A SOCKET FOR TESTING - Provided are a method and system for using fluid to position a device in a socket for testing. The device is positioned within a socket and a body is coupled to the socket. Fluid is delivered to a chamber defined in part by the body, a first surface of the device to provide pressure onto the device to move the device within the socket. | 02-27-2014 |
Sebastien Carrie, Guyancourt FR
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20120137866 | STANDOFF PROTECTION DEVICE INTENDED TO FULLY COVER A DOOR - A standoff protection device intended to fully cover a door and incorporating an opening panel giving access to the door, said opening panel and door each comprising hinge means whose axes of rotation are parallel to one another, wherein said opening panel is wider than said door and is positioned facing said door such that said opening panel completely covers said door, said axis of rotation of said door namely facing said opening panel, said opening panel further incorporating at least one slide perpendicular to said axis of rotation of said opening panel, said slide being connected to said door by rigid hooking means integral with said door. | 06-07-2012 |
Susan Carrie, Mountain View, CA US
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20100275208 | Reduction Of Memory Latencies Using Fine Grained Parallelism And Fifo Data Structures - Software rendering and fine grained parallelism are utilized to reduce/ovoid memory latency in a multi-processor (MP) system. According to one embodiment, the management of the transfer of data from one processor to another in the MP environment is moved into a low overhead hardware system. The low overhead hardware system may be a FIFO (“First In First Out”) hardware control. Each FIFO may be real or virtual. | 10-28-2010 |
20120159090 | SCALABLE MULTIMEDIA COMPUTER SYSTEM ARCHITECTURE WITH QOS GUARANTEES - Versions of a multimedia computer system architecture are described which satisfy quality of service (QoS) guarantees for multimedia applications such as game applications while allowing platform resources, hardware resources in particular, to scale up or down over time. Computing resources of the computer system are partitioned into a platform partition and an application partition, each including its own central processing unit (CPU) and, optionally, graphics processing unit (GPU). To enhance scalability of resources up or down, the platform partition includes one or more hardware resources which are only accessible by the multimedia application via a software interface. Additionally, outside the partitions may be other resources shared by the partitions or which provide general purpose computing resources. | 06-21-2012 |
20120272011 | PROCESSOR CACHE TRACING - A method for refining multithread software executed on a processor chip of a computer system. The envisaged processor chip has at least one processor core and a memory cache coupled to the processor core and configured to cache at least some data read from memory. The method includes, in logic distinct from the processor core and coupled to the memory cache, observing a sequence of operations of the memory cache and encoding a sequenced data stream that traces the sequence of operations observed. | 10-25-2012 |
20130179377 | DECISION TREE COMPUTATION IN HARDWARE - A computing device for use in decision tree computation is provided. The computing device may include a software program executed by a processor using portions of memory of the computing device, the software program being configured to receive user input from a user input device associated with the computing device, and in response, to perform a decision tree task. The computing device may further include a decision tree computation device implemented in hardware as a logic circuit distinct from the processor, and which is linked to the processor by a communications interface. The decision tree computation device may be configured to receive an instruction to perform a decision tree computation associated with the decision tree task from the software program, process the instruction, and return a result to the software program via the communication interface. | 07-11-2013 |
20150293709 | FINE-GRAINED BANDWIDTH PROVISIONING IN A MEMORY CONTROLLER - Systems and methods for applying a fine-grained QoS logic are provided. The system may include a memory controller, the memory controller configured to receive memory access requests from a plurality of masters via a bus fabric. The memory controller determines the priority class of each of the plurality of masters, and further determines the amount of memory data bus bandwidth consumed by each master on the memory data bus. Based on the priority class assigned to each of the masters and the amount of memory data bus bandwidth consumed by each master, the memory controller applies a fine-grained QoS logic to compute a schedule for the memory requests. Based on this schedule, the memory controller converts the memory requests to memory commands, sends the memory commands to a memory device via a memory command bus, and receives a response from the memory device via a memory data bus. | 10-15-2015 |
Susan E. Carrie, Mountain View, CA US
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20080301378 | TIMESTAMP BASED TRANSACTIONAL MEMORY - A hardware implemented transactional memory system includes a mechanism to allow multiple processors to access the same memory system. A set of timestamps are stored that each correspond to a region of memory. A time stamp is updated when any memory in its associated region is updated. For each memory transaction, the time at which the transaction begins is recorded. Write operations that are part of a transaction are performed by writing the data to temporary memory. When a transaction is to be recorded, the hardware automatically commits the transaction by determining whether the timestamps associated with data read for the transaction are all prior to the start time for the transaction. In this manner, the software need not check the data for all other processes or otherwise manage collision of data with respect to different processes. The software need only identify which reads and writes are part of a transaction. | 12-04-2008 |
20140341223 | METHODS AND SYSTEMS FOR SELECTIVELY PROCESSING VIRTUAL LOCAL AREA NETWORK (VLAN) TRAFFIC FROM DIFFERENT NETWORKS WHILE ALLOWING FLEXIBLE VLAN IDENTIFIER ASSIGNMENT - Methods and systems for selectively processing VLAN traffic from different networks while allowing flexible VLAN identifier assignment are disclosed. According to one aspect, a layer 2 switch includes a virtual switch identifier data structure that associates a VLAN identifier extracted from a layer 2 frame and a port identifier corresponding to a port on which a frame is received with a virtual switch identifier. The virtual switch identifier is used to select a per-virtual-switch data structure, such as a forwarding table. The per-virtual-switch data structure is used to control processing of the layer 2 frame on a per-virtual-switch basis. The per-virtual-switch data structure may also be updated separately from the data structures assigned to other virtual switches. | 11-20-2014 |
Susan Elizabeth Carrie, Mountain View, CA US
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20090006875 | Media Device Power Conservation - Power is dynamically conserved in a device by analyzing past processing performance of the device and predicting the amount of power required for future execution. In an example embodiment, a video frame is analyzed to determine what portion of the video frame was needed to render data. If less than the full video frame was needed, at least one power conservation technique is applied to the device for subsequent rendering of data. Power conservation techniques include adjusting the operating frequency of circuitry utilized to render data, adjusting the voltage applied to circuitry utilized to render data, and/or turning off/on circuitry utilized to render data. | 01-01-2009 |
Taylor Carrie, Noblesville, IN US
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20120066156 | Systems and methods for dispensing reusable shopping bags - A system for dispensing and collecting reusable bags at a store includes a purchase system, including a supply of bags, and a return system, disposed in a store, for receiving returned bags for reuse. The purchase system includes a store checkout stand, a store scanner, and at least one of a cash register, a store customer service counter, and/or a kiosk located near the entrance/exit of the store. The return system includes the store customer service counter, cash register, and/or kiosk. The kiosk includes a display screen, a scanner/RFID reader, a credit card reader, a bag dispenser, a return chute, and a voucher/refund dispenser. Various methods of use of such a system for dispensing and collecting reusable bags are disclosed. | 03-15-2012 |