Patent application number | Description | Published |
20080261451 | PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN - Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line. | 10-23-2008 |
20090021264 | METHOD AND APPARATUS FOR REPEATABLE DRIVE STRENGTH ASSESSMENTS OF HIGH SPEED MEMORY DIMMS - The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided. | 01-22-2009 |
20090106976 | METHOD FOR REDUCING NOISE COUPLING IN HIGH SPEED DIGITAL SYSTEMS - Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer. | 04-30-2009 |
20090107705 | METHODS AND SYSTEMS FOR REDUCING NOISE COUPLING IN HIGH SPEED DIGITAL SYSTEMS - Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer. | 04-30-2009 |
20100231209 | Testing An Electrical Component - Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters. | 09-16-2010 |
20110080973 | COMMON MODE CANCELLATION IN DIFFERENTIAL NETWORKS - Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase. | 04-07-2011 |
20110234238 | SIMULATION OF PRINTED CIRCUIT BOARD IMPEDANCE VARIATIONS AND CROSSTALK EFFECTS - A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway. | 09-29-2011 |
20120249162 | SIMULATION OF PRINTED CIRCUIT BOARD IMPEDANCE VARIATIONS AND CROSSTALK EFFECTS - A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway. | 10-04-2012 |
20120327622 | PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN - Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line. | 12-27-2012 |
20130025119 | Printed Circuit Board With Reduced Dielectric Loss - A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB. | 01-31-2013 |