Patent application number | Description | Published |
20100110607 | Vertical capacitors and method of fabricating same - A fabrication method which forms vertical capacitors in a substrate. The method is preferably an all-dry process, comprising forming a through-substrate via hole in the substrate, depositing a first conductive material layer into the via hole using atomic layer deposition (ALD) such that it is electrically continuous across the length of the via hole, depositing an electrically insulating, continuous and substantially conformal isolation material layer over the first conductive layer using ALD, and depositing a second conductive material layer over the isolation material layer using ALD such that it is electrically continuous across the length of the via hole. The layers are arranged such that they form a vertical capacitor. The present method may be successfully practiced at temperatures of less than 200° C., thereby avoiding damage to circuitry residing on the substrate that might otherwise occur. | 05-06-2010 |
20100207229 | NON-PLANAR MICROCIRCUIT STRUCTURE AND METHOD OF FABRICATING SAME - A foldable microcircuit is initially a planar semiconductor wafer on which circuitry has been formed. The wafer is segmented into a plurality of tiles, and a plurality of hinge mechanisms are coupled between adjacent pairs of tiles such that the segmented wafer can be folded into a desired non-planar configuration having a high fill-factor and small gaps between tiles. The hinge mechanisms can comprise an organic material deposited on the wafer such that it provides mechanical coupling between adjacent tiles, with metal interconnections between tiles formed directly over the organic hinges, or routed between adjacent tiles via compliant bridges. Alternatively, the interconnection traces between tiles can serve as part or all of a hinge mechanism. The foldable microcircuit can be, for example, a CMOS circuit, with the segmented tiles folded to form, for example, a semi-spherical structure arranged to provide a wide FOV photodetector array. | 08-19-2010 |
20100225436 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 09-09-2010 |
20110121427 | THROUGH-SUBSTRATE VIAS WITH POLYMER FILL AND METHOD OF FABRICATING SAME - An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole, and depositing a polymer material over the conductive material such that any continuous top-to-bottom openings present in the via holes are filled by the polymer material. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias. | 05-26-2011 |
20110131798 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 06-09-2011 |
20110147367 | SYSTEM FOR HEATING A VAPOR CELL - A vapor cell includes an interrogation cell in a substrate, the interrogation cell having an entrance window and an exit window, and a first transparent thin-film heater in thermal communication with the entrance window. The transparent thin-film heater has a first layer in communication with a first pole contact at a proximal end of the heater and a layer coupler contact at a distal end, a second layer in communication with a second pole contact at the proximal end, and the second layer electrically coupled to the layer coupler contact at the distal end. An insulating layer is sandwiched between the first and second layers. The insulating layer has an opening at the distal end to admit the layer coupler contact and to insulate the remainder of the second layer from the first layer. The first and second pole contacts are available to complete an electric circuit at the proximal end, with magnetic fields for each of the first and second layers oriented in opposing directions when a current is applied through the circuit. | 06-23-2011 |
20110232782 | SYSTEM FOR CHARGING A VAPOR CELL - A system is disclosed for charging a compact vapor cell, including placing an alkali-filled capillary into a reservoir cell formed in a substrate, the reservoir cell in vapor communication with an interrogation cell in the substrate and bonding a transparent window to the substrate on a common face of the reservoir cell and the interrogation cell to form a compact vapor cell. Capillary action in the capillary delays migration of alkali in the alkali-filled capillary from the reservoir cell into the interrogation cell during the bonding. | 09-29-2011 |
20120057839 | RUGGEDIZED WAVEGUIDE ENCAPSULATION FIXTURE - A waveguide component encapsulation device may include a housing having first and second surfaces, the housing defining a channel extending through the first and second surfaces, a micromachined waveguide component configured to be positioned in the channel, the waveguide component having first and second ends extending outside the channel and beyond the first and second surfaces of the housing by a finite length, and a pair of spacing members configured to align and stabilize the waveguide component within the channel. | 03-08-2012 |
20130293314 | Micro-scale System to Provide Thermal Isolation and Electrical Communication Between Substrates - An apparatus includes a chip-scale atomic clock (CSAC) alkali vapor cell seated on a silicon substrate that is suspended in a package by a metalized Parylene strap having Parylene anchors embedded in a silicon frame, the Parylene strap comprising an extended rigidizing structure, and a plurality of electrical pins extending into an interior of the package, the plurality of electrical pins in electrical communication with the CSAC cell through the metalized Parylene strap, where the CSAC cell is mechanically connected to the package and thermally insulated from the package. | 11-07-2013 |
20140205231 | METHOD OF FABRICATING SILICON WAVEGUIDES WITH EMBEDDED ACTIVE CIRCUITRY - A method of fabricating silicon waveguides with embedded active circuitry from silicon-on-insulator wafers utilizes photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices. | 07-24-2014 |