Patent application number | Description | Published |
20130032941 | ROUTING LAYER FOR MITIGATING STRESS IN A SEMICONDUCTOR DIE - A routing layer for a semiconductor die is disclosed. The routing layer includes traces interconnecting integrated circuit bond-pads to UBMs. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces arranged underneath the UBMs as to absorb stress from solder bumps attached to the UMBs. Traces beneath the UBMs protect parts of the underlying dielectric material proximate the solder bumps, from the stress. | 02-07-2013 |
20130054851 | METHOD AND DEVICE FOR DISABLING A HIGHER VERSION OF A COMPUTER BUS AND INTERCONNECTION PROTOCOL FOR INTEROPERABILITY WITH A DEVICE COMPLIANT TO A LOWER VERSION OF THE COMPUTER BUS AND INTERCONNECTION PROTOCOL - A method and a device for disabling a lower version of a computer bus and interconnection protocol (e.g., Peripheral Component Interconnect Express (PCIe) 2.0 or higher) for interoperability with a receiver compliant to a lower version of the protocol are disclosed. The device detects a presence of a receiver, and starts link training. During the link training, the number of link training failures or the elapsed time is counted. The device transmits a training sequence including symbols set in accordance with a higher version of the protocol that the device supports on each lane that the receiver is detected as long as the number of link training failures or the elapsed time is below a predetermined threshold. If the number of link training failures or the elapsed time reaches a predetermined threshold, the device transmits a training sequence including symbols set in accordance with a lower version of the protocol. | 02-28-2013 |
20130076776 | METHOD AND APPARATUS FOR PROVIDING INDEPENDENT GAMUT REMAPPING FOR MULTIPLE SCREEN SUBSECTIONS - An apparatus and method for providing display information generates, independently from an operating system, different screen subsections of a screen image using independent gamut remapping configurations to generate an output image in a target gamut space of a display. The method and apparatus also provides the generated output image for display or may display the generated output image. | 03-28-2013 |
20130095614 | WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS - A method of manufacturing semiconductor packages at the wafer level is disclosed. A wafer has multiple integrated circuits (ICs) formed on its active surface, with each IC in communication with a plurality under-bump metallization (UBM) pads formed on one surface the package. The UBM pads include a larger pads near the center of package and smaller UBM pads near the periphery. The method includes attaching a stiffener to an inactive surface of the wafer; forming under bump metallization pads; and forming solder bumps extending from the UBM pads. | 04-18-2013 |
20130113818 | IMAGE QUALITY CONFIGURATION APPARATUS, SYSTEM AND METHOD - A method includes detecting one of an application access or a file type access, and configuring, in response to detecting the application or file type access, automatically without user interaction, a display system in an image quality configuration for the application or the file type where the image quality configuration is based on providing best image quality with respect to the application or the file type. Configuring the display system in an image quality configuration, may involve determining that a profile associated with the application or associated with the file type is stored in memory, and configuring the display system according to the profile. The method may adjust at least one anti-aliasing parameter or at least one anisotropic filter parameter. The method may monitor an operating system to obtain an indication that an application has been accessed or that a file type has been accessed. | 05-09-2013 |
20130147815 | MULTI-PROCESSOR ARCHITECTURE AND METHOD - Embodiments of a multi-processor architecture and method are described herein. Embodiments provide alternatives to the use of an external bridge integrated circuit (IC) architecture. For example, an embodiment multiplexes a peripheral bus such that multiple processors can use one peripheral interface slot without requiring an external bridge IC. Embodiments are usable with known bus protocols. | 06-13-2013 |
20130148947 | VIDEO PLAYER WITH MULTIPLE GRPAHICS PROCESSORS - A device and method for playing digital video are disclosed. The device includes multiple graphics processing units. The method involves using the multiple graphics processors to decode and output compressed audiovisual stream to a display and a speaker. Audiovisual bit streams possibly containing multi-stream video are efficiently decoded and displayed by sharing decoding-related tasks among multiple graphical processing units. | 06-13-2013 |
20130162682 | VERTICAL SCAN PANEL WITH CONVERSION MODE CAPABILITY - A method and apparatus for providing an image on a vertical scan panel determines whether a mode of operation for a vertical scan panel is either a scan conversion pass-through mode or a horizontal scan conversion mode. If the determined mode is the horizontal scan conversion mode, the method and apparatus converts display data in the vertical scan panel from a horizontal scan format to a vertical scan format and displays the converted display data on the vertical scan panel. However, if the determined mode is the scan conversion pass-through mode, the method and apparatus includes displaying display data on the vertical scan panel in a vertical scan format without applying a scan conversion operation on the display data. | 06-27-2013 |
20130162911 | DOWNSTREAM VIDEO COMPOSITION - A video source, a display and a method of processing multilayered video are disclosed. The video source decodes a multilayered video bit stream to transmit synchronized streams of decompressed video images and corresponding overlay images to an interconnected display. The display receives separate streams of video and overlay images. Transmission and reception of corresponding video and overlay images is synchronized in time. A video image received in the display can be selectively processed separately from its corresponding overlay image. The video image as processed at the display is later composited with its corresponding overlay image to form an output image for display. | 06-27-2013 |
20130166875 | WRITE DATA MASK METHOD AND SYSTEM - In various embodiments, dedicated mask pins are eliminated by sending a data mask on address lines of the interface. A memory controller receives a request for a memory write operation from a memory client and determines the granularity of the write data from a write data mask sent by the client. Granularity, as used herein, indicates a quantity of write data to which each bit of the received write data mask applies. In an embodiment, the memory controller generates a particular write command and a particular write data mask based on the granularity of the write data. The write command generated is typically the most efficient of several write commands available, but embodiments are not so limited. The write command is transmitted on command lines of the interface, and the write data mask is transmitted on address lines of the interface. | 06-27-2013 |
20130182069 | 3D VIDEO PROCESSING - A method, an apparatus, and a non-transitory computer readable medium for performing 2D to 3D conversion are presented. A 2D input source is extracted into left and right 3D images. Motion vectors are calculated for the left and right 3D images. Frame rate conversion is performed on the left 3D image and the right 3D image, using the respective calculated motion vectors, to produce motion compensated left and right 3D images. The left and right 3D images and the motion compensated left and right 3D images are reordered for display. | 07-18-2013 |