Patent application number | Description | Published |
20080257409 | PHOTOVOLTAICS ON SILICON - Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material. | 10-23-2008 |
20080265299 | Strained channel dynamic random access memory devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 10-30-2008 |
20090039361 | LATTICE-MISMATCHED SEMICONDUCTOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR DEVICE FABRICATION - A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening. | 02-12-2009 |
20090065047 | Multi-Junction Solar Cells - Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions. | 03-12-2009 |
20100176371 | Semiconductor Diodes Fabricated by Aspect Ratio Trapping with Coalesced Films - A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials. | 07-15-2010 |
20100176375 | Diode-Based Devices and Methods for Making the Same - In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate. | 07-15-2010 |
20100213511 | Lattice-Mismatched Semiconductor Structures and Related Methods for Device Fabrication - Lattice-mismatched materials having configurations that trap defects within sidewall-containing structures. | 08-26-2010 |
20100252861 | Devices Formed from a Non-Polar Plane of a Crystalline Material and Method of Making the Same - Materials, methods, structures and device including the same can provide a semiconductor device such as an LED using an active region corresponding to a non-polar face or surface of III-V semiconductor crystalline material. In some embodiments, an active diode region contains more non-polar III-V material oriented to a non-polar plane than III-V material oriented to a polar plane. In other embodiments, a bottom region contains more non-polar m-plane or a-plane surface area GaN than polar c-plane surface area GaN facing an active region. | 10-07-2010 |
20100301391 | Tri-Gate Field-Effect Transistors Formed By Aspect Ratio Trapping - Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach | 12-02-2010 |
20110049568 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 03-03-2011 |
20110073908 | III-V Semiconductor Device Structures - The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. | 03-31-2011 |
20110114996 | Inducement of Strain in a Semiconductor Layer - Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces. | 05-19-2011 |
20110210374 | Tri-Gate Field-Effect Transistors Formed by Aspect Ratio Trapping - Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach | 09-01-2011 |
20110318893 | METHODS FOR FORMING SEMICONDUCTOR DEVICE STRUCTURES - The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. | 12-29-2011 |
20120199876 | Defect Reduction Using Aspect Ratio Trapping - Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls. | 08-09-2012 |
20120282718 | Diode-Based Devices and Methods for Making the Same - In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate. | 11-08-2012 |
20120302032 | Methods for Forming Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 11-29-2012 |
20130034924 | Semiconductor Diodes Fabricated by Aspect Ratio Trapping with Coalesced Films - A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials. | 02-07-2013 |
20130034943 | Tri-Gate Field-Effect Transistors Formed by Aspect Ration Trapping - Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach | 02-07-2013 |
20130040433 | Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same - Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced. | 02-14-2013 |
20130081684 | Multi-Junction Solar Cells - Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions. | 04-04-2013 |
20130105860 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication | 05-02-2013 |
20130134480 | Formation of Devices by Epitaxial Layer Overgrowth - Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping and epitaxial layer overgrowth. A method includes forming an opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer. | 05-30-2013 |
20130241035 | Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 09-19-2013 |
20130252361 | Light-Emitter-Based Devices with Lattice-Mismatched Semiconductor Structures - Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material. | 09-26-2013 |
20130285116 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 10-31-2013 |
20140051230 | Methods for Forming Semiconductor Device Structures - The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. | 02-20-2014 |
20140106546 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 04-17-2014 |
20140147981 | Inducement of Strain in a Semiconductor Layer - Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces. | 05-29-2014 |
20140162438 | Devices Formed from a Non-Polar Plane of a Crystalline Material and Method of Making the Same - Materials, methods, structures and device including the same can provide a semiconductor device such as an LED using an active region corresponding to a non-polar face or surface of III-V semiconductor crystalline material. In some embodiments, an active diode region contains more non-polar III-V material oriented to a non-polar plane than III-V material oriented to a polar plane. In other embodiments, a bottom region contains more non-polar m-plane or a-plane surface area GaN than polar c-plane surface area GaN facing an active region. | 06-12-2014 |
20140220755 | Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same - Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced. | 08-07-2014 |
20140242778 | Methods of Forming Strained-Semiconductor-on-Insulator Device Structures - The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. | 08-28-2014 |
20140264272 | Semiconductor Diodes Fabricated by Aspect Ratio Trapping with Coalesced Films - A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials. | 09-18-2014 |
20140327060 | Semiconductor Sensor Structures with Reduced Dislocation Defect Densities and Related Methods for the Same - Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique. | 11-06-2014 |
20140342536 | Defect Reduction Using Aspect Ratio Trapping - Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls. | 11-20-2014 |
20140374798 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 12-25-2014 |
20150060972 | Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 03-05-2015 |