Patent application number | Description | Published |
20080235477 | COHERENT DATA MOVER - A method and system for dynamically relocating regions of memory in computing systems. During the execution of software application(s) on a computing system, a relocation of data in a region of memory may be performed. A coherent data mover is coupled to system memory, memory controller(s), and processor(s) of a computing system. The mover executes commands such as copying a specific region of memory from its current source location in system memory to a new target location in system memory without suspending access of the data. During a copy of data from the first portion to the second portion, the mover monitors transactions which modify data in the first portion which has already been copied. Subsequent to copying all of the data, the mover re-copies those data elements which were detected to be modified during the copy operation. | 09-25-2008 |
20090092248 | ENCRYPTION-BASED AUTHENTICATION FOR BINDING MODULES - A first electronic module authenticates a second electronic module via encrypted communications between the first electronic module and the second electronic module. In response to determining the second electronic module is authenticated, the first electronic module is configured to conduct unencrypted communications with the second electronic module. Otherwise, in response to determining the second electronic module is unauthenticated, the first electronic module is configured to disable one or more functions of the first electronic module. | 04-09-2009 |
20090158015 | Uses of Known Good Code for Implementing Processor Architectural Modifications - In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC. | 06-18-2009 |
20090183245 | Limited Functionality Mode for Secure, Remote, Decoupled Computer Ownership - In one embodiment, a computer system comprises one or more components and a secure computing environment coupled to the components. The secure computing environment is configured to program at least one of the components to enter a limited functionality mode responsive to expiration of a use right to the computer system, wherein operation of the computer system in the limited functionality mode is reduced compared to operation when the use right has not expired. The secure computing environment is configured to monitor the components in the limited functionality mode to detect that a limited functionality mode configuration has been modified by an unauthorized entity and to cause the computer system to enter a second mode in which operation of the computer system is reduced compared to operation in the limited functionality mode in response. In another embodiment, the secure computing environment detects a non-temporal event that indicates a violation of an owner-imposed restriction and enters a limited functionality mode. | 07-16-2009 |
20090193230 | COMPUTER SYSTEM INCLUDING A MAIN PROCESSOR AND A BOUND SECURITY COPROCESSOR - A computer system includes a main processor and a security control processor that is coupled to the main processor and configured to control and monitor an operational state of the main processor. To ensure the computer system may be trusted, the security control processor may be configured to hold the main processor in a slave mode during initialization of the security control processor such that the main processor is not operable to fetch and execute instructions from an instruction source external to the main processor, for example. In addition, the security control processor may be configured to initialize the operational state of the main processor to a predetermined state by transferring to the main processor via a control interface one or more instructions and to cause the main processor to execute the one or more instructions while the main processor is held in the slave mode. | 07-30-2009 |
20100011012 | Selective Compression Based on Data Type and Client Capability - A method and apparatus are provided for generating virtual channels to selectively compress and deliver different data streams over a communication medium to a thin client receiving device by selecting a compression technique for each data stream that takes into account the data stream type, the bandwidth/latency characteristics of the communication channel, and the processing capabilities of the thin client that is the target or source of the data. By selectively compressing data streams within multiple virtual channels that are aggregated into a combined data stream to the receiving device, each individual data stream is individually compressed and packetized within its virtual channel based on the specific different delivery, bandwidth, latency and data fidelity requirements for that data stream, as well as the processing capability of the receiving device. | 01-14-2010 |
20100013839 | Integrated GPU, NIC and Compression Hardware for Hosted Graphics - A computer graphics processing system includes an integrated graphics and network hardware device having a PCI Express interface logic unit, a graphics processor unit, a graphics memory, a compression unit and a network interface unit, all connected together on a PCI Express adapter card using one or more dedicated communication interfaces so that data traffic for graphics processing and network communication need not be routed over a peripheral interface circuit which has a communications bandwidth that must be shared with other system components. | 01-21-2010 |
20100141664 | Efficient GPU Context Save And Restore For Hosted Graphics - A computer graphics processing system provides efficient migrating of a GPU context as a result of a context switching operation. More specifically, the efficient migrating provides a graphics processing unit with context switch module which accelerates loading and otherwise accessing context data representing a snapshot of the state of the GPU. The snapshot includes its mapping of GPU content of external memory buffers. | 06-10-2010 |
20100174890 | Known Good Code for On-Chip Device Management - In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC. | 07-08-2010 |
20140129810 | Known Good Code for On-Chip Device Management - In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC. | 05-08-2014 |