Patent application number | Description | Published |
20080276208 | OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMING INFORMATION - A method is provided that includes: determining a minimum clock cycle that can be used to propagate a signal about the critical cycle in a circuit design; wherein the critical cycle is a cycle in the design that has a highest proportionality of delay to number of registers; determining for a circuit element in the circuit design, sequential slack associated with the circuit element; wherein the sequential slack represents a minimum delay from among respective maximum delays that can be added to respective structural cycles of which the circuit element is a constituent, based upon the determined limit upon clock cycle duration; using the sequential slack to ascertain sequential optimization based design flexibility throughout multiple stages of a design flow. | 11-06-2008 |
20080276209 | Optimizing integrated circuit design through use of sequential timing information - A method is provided that includes: determining a minimum clock cycle that can be used to propagate a signal about the critical cycle in a circuit design; wherein the critical cycle is a cycle in the design that has a highest proportionality of delay to number of registers; determining for a circuit element in the circuit design, sequential slack associated with the circuit element; wherein the sequential slack represents a minimum delay from among respective maximum delays that can be added to respective structural cycles of which the circuit element is a constituent, based upon the determined limit upon clock cycle duration; using the sequential slack to ascertain sequential optimization based design flexibility throughout multiple stages of a design flow. | 11-06-2008 |
20080276210 | Optimizing integrated circuit design through use of sequential timing information - A method is provided that includes: determining a minimum clock cycle that can be used to propagate a signal about the critical cycle in a circuit design; wherein the critical cycle is a cycle in the design that has a highest proportionality of delay to number of registers; determining for a circuit element in the circuit design, sequential slack associated with the circuit element; wherein the sequential slack represents a minimum delay from among respective maximum delays that can be added to respective structural cycles of which the circuit element is a constituent, based upon the determined limit upon clock cycle duration; using the sequential slack to ascertain sequential optimization based design flexibility throughout multiple stages of a design flow. | 11-06-2008 |
20100115477 | OPTIMIZING INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL TIMING INFORMATION - A method is provided that includes: determining a minimum clock cycle that can be used to propagate a signal about the critical cycle in a circuit design; wherein the critical cycle is a cycle in the design that has a highest proportionality of delay to number of registers; determining for a circuit element in the circuit design, sequential slack associated with the circuit element; wherein the sequential slack represents a minimum delay from among respective maximum delays that can be added to respective structural cycles of which the circuit element is a constituent, based upon the determined limit upon clock cycle duration; using the sequential slack to ascertain sequential optimization based design flexibility throughout multiple stages of a design flow. | 05-06-2010 |
20110252389 | REDUCING CRITICAL CYCLE DELAY IN AN INTEGRATED CIRCUIT DESIGN THROUGH USE OF SEQUENTIAL SLACK - A method is provided that includes: determining a minimum clock cycle that can be used to propagate a signal about the critical cycle in a circuit design; wherein the critical cycle is a cycle in the design that has a highest proportionality of delay to number of registers; determining for a circuit element in the circuit design, sequential slack associated with the circuit element; wherein the sequential slack represents a minimum delay from among respective maximum delays that can be added to respective structural cycles of which the circuit element is a constituent, based upon the determined limit upon clock cycle duration; using the sequential slack to as certain sequential optimization based design flexibility throughout multiple stages of a design flow. | 10-13-2011 |
20140096113 | POLICY EVALUATION BASED UPON DYNMAMIC OBSERVATION, STATIC ANALYSIS AND CODE CHANGE HISTORY - A method is provided to evaluate tests of computer program code comprising: configuring a computer to produce, in a computer readable storage device, a code filter to indicate one or more respective portions of the computer program code to respectively either omit from or to include in a determination of adequacy of results; and comparing test results with the computer program code with the one or more respective portions filtered using the code filter to respectively either omit the respective portions from or include the respective portions in the determination as indicated by the code filter. | 04-03-2014 |
20140130020 | STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A CODE COMPONENT UPON A DEPENDENT CODE COMPONENT - A method is provided method to evaluate impact of a change in code of a depended upon component of a system stored in a non-transitory computer readable storage device, upon a dependent component of the system, the method comprising: identifying a dependency relationship between a first component stored in a storage device and a second component stored in the storage device; in response to a determination that the second component depends upon the first component, configuring a computer system to obtain a first property evaluation corresponding to the first component; and in response to obtaining the first property evaluation corresponding to the first component, configuring the computer system to associate the first property evaluation with the second component, and determine a second property evaluation corresponding to the second component, is the second component being associated with the first property evaluation. | 05-08-2014 |
20150317236 | STATIC ANALYSIS OF COMPUTER CODE TO DETERMINE IMPACT OF CHANGE TO A CODE COMPONENT UPON A DEPENDENT CODE COMPONENT - A method is provided method to evaluate impact of a change in code of a depended upon component of a system stored in a non-transitory computer readable storage device, upon a dependent component of the system, the method comprising: identifying a dependency relationship between a first component stored in a storage device and a second component stored in the storage device; in response to a determination that the second component depends upon the first component, configuring a computer system to obtain a first property evaluation corresponding to the first component; and in response to obtaining the first property evaluation corresponding to the first component, configuring the computer system to associate the first property evaluation with the second component, and determine a second property evaluation corresponding to the second component, is the second component being associated with the first property evaluation. | 11-05-2015 |