Patent application number | Description | Published |
20100262738 | COMMAND AND INTERRUPT GROUPING FOR A DATA STORAGE DEVICE - A data storage device may include multiple memory chips and a controller that is operably coupled to the memory chips and that is arranged and configured to receive a group of commands from a host, where each of the commands in the group includes a same group number to identify the commands as part of the group, process the group of the commands using the memory chips and generate and send a single interrupt to the host when the group of the commands completes processing. | 10-14-2010 |
20100262740 | MULTIPLE COMMAND QUEUES HAVING SEPARATE INTERRUPTS - A host device may include a driver that is arranged and configured to communicate commands to a data storage device and multiple pairs of queues, where each of the pairs of queues may include a command queue that is populated with commands for retrieval by the data storage device and a response queue that is populated with responses by the data storage device for retrieval by the host device, where each response queue is associated with an interrupt and an interrupt handler. | 10-14-2010 |
20100262757 | DATA STORAGE DEVICE - A data storage device may include a first memory board having multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that is arranged and configured to control command processing for multiple different types of memory chips, automatically recognize a type of the memory chips on the first memory board, receive commands from the host using the interface, and execute the commands using the memory chips. | 10-14-2010 |
20100262758 | DATA STORAGE DEVICE - A data storage device may include a first memory board including multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that includes a power module and that is arranged and configured to control command processing for multiple memory chips having different voltages, automatically recognize a voltage of the memory chips on the first memory board, configure the power module to operate at the recognized voltage of the memory chips, receive commands from the host using the interface and execute the commands using the memory chips. | 10-14-2010 |
20100262759 | DATA STORAGE DEVICE - A data storage device may include a first memory board and a second memory board, where the first memory board and the second memory board each comprise multiple memory chips. The data storage device may include a controller board that is arranged and configured to operably connect to the first memory board and the second memory board, where the controller board includes a high speed interface and a controller that is arranged and configured to receive commands from a host using the high speed interface and to execute the commands, where the first memory board and the second memory board are each separately removable from the controller board. | 10-14-2010 |
20100262760 | COMMAND PROCESSOR FOR A DATA STORAGE DEVICE - An apparatus for queuing and ordering commands for a data storage device may include a slot tracker module that is arranged and configured to track available slots for commands from a host, a command transfer module that is operably coupled to the slot tracker module and that is arranged and configured to retrieve commands from the host based on a number of the available slots, a pending command module that is operably coupled to the command transfer module and that is arranged and configured to queue and order the commands from the host for processing using an ordered list that is based on an age of the commands and a task dispatch module that is operably coupled to the pending command module and that is arranged and configured to dispatch the commands for processing using the ordered list from the pending command module and an availability of storage locations. | 10-14-2010 |
20100262761 | PARTITIONING A FLASH MEMORY DATA STORAGE DEVICE - A method of partitioning a data storage device that has a plurality of memory chips includes determining a number memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips, defining a second partition of the data storage device via the host where the second partition includes a second subset of the plurality of memory chips, such that the first subset does not include any memory chips of the second subset and wherein the second subset does not include any memory chips of the first subset. | 10-14-2010 |
20100262762 | RAID CONFIGURATION IN A FLASH MEMORY DATA STORAGE DEVICE - A method of storing data in a flash memory data storage device that includes a plurality of memory chips is disclosed. The method includes determining a number of memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips and defining a second partition of the data storage device via a host coupled to the data storage device, where the second partition includes a second subset of the plurality of memory chips. First data is written to the first partition while reading data from the second partition, and first data is written to the second partition while reading data from the first partition. | 10-14-2010 |
20100262766 | GARBAGE COLLECTION FOR FAILURE PREDICTION AND REPARTITIONING - A method of formatting a data storage device that includes a plurality of flash memory chips includes monitoring a failure rate of memory blocks of one or more flash memory chips of a storage device that has a first usable size for user space applications, estimating a future usable size of the data storage device based on the monitored failure rate, and defining, via a host coupled to the data storage device, a second usable size of the data storage device for user space applications based on the monitored failure rate. | 10-14-2010 |
20100262767 | DATA STORAGE DEVICE - A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers. | 10-14-2010 |
20100262773 | DATA STRIPING IN A FLASH MEMORY DATA STORAGE DEVICE - A method is disclosed for striping data from a host to a data storage device that includes a plurality of memory chips and a plurality of physical channels for communication of data between the host and the plurality of memory chips, where each channel is operably connected to a different plurality of the memory chips. The method includes determining a number of physical channels in the plurality of channels, determining a first channel chunk size with which to write data to memory chips connected to separate channels, segmenting, via the host, logically sequential data into first channel chunk size segments, and striping data to different channels of the data storage device in first channel chunk size units. | 10-14-2010 |
20100262894 | ERROR CORRECTION FOR A DATA STORAGE DEVICE - An apparatus for error correction for a data storage device may include an input interface that is configured to receive individual error correction requests to correct data from multiple channel controllers and that is configured to receive error correction information corresponding to the error correction requests, where each of the channel controllers is arranged and configured to control operations associated with one or more memory chips. The apparatus may include a corrector module that is operably coupled to the input interface and that is arranged and configured to perform error correction using an error correction algorithm and the error correction information to generate correction solutions, where the corrector module is a shared resource for the multiple channel controllers. The apparatus may include an output interface that is operably coupled to the corrector module and that is arranged and configured to communicate the correction solutions to the channel controllers. | 10-14-2010 |
20100262979 | CIRCULAR COMMAND QUEUES FOR COMMUNICATION BETWEEN A HOST AND A DATA STORAGE DEVICE - A method for communicating commands between a host and a flash memory data storage device includes populating a circular command queue of a driver on the host with commands for retrieval by the data storage device, transferring commands from the circular command queue to the data storage device via a device initiated direct memory access operation, populating, via a direct memory access operation initiated by the data storage device, a circular response queue of the host with responses by the data storage device for retrieval by the host device, where each response acknowledges the reception of a command from the host by the data storage device, and consuming responses from the circular response queue at the host. | 10-14-2010 |
20100269015 | DATA STORAGE DEVICE - A data storage device may include an interface that is arranged and configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller may be arranged and configured to receive a read metadata command for a specified one of the memory devices from the host using the interface, read metadata from the specified memory device and communicate the metadata to the host using the interface. | 10-21-2010 |
20100287217 | HOST CONTROL OF BACKGROUND GARBAGE COLLECTION IN A DATA STORAGE DEVICE - An apparatus includes a flash memory data storage device and a host operably coupled to the data storage device via an interface. The flash memory data storage device includes a plurality of memory chips. The host includes a host activity monitoring engine configured to monitor activity of the host and a garbage collection control engine configured to control the background garbage collection performed by the data storage device's garbage collector. | 11-11-2010 |
20120030416 | DATA STORAGE DEVICE - A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface. | 02-02-2012 |
20120030507 | DATA STORAGE DEVICE - A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface. | 02-02-2012 |
20120030542 | DATA STORAGE DEVICE - A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a copy command from the host using the interface, read data from a source memory device in response to the copy command, write the data to a destination memory device in response to the copy command and communicate results to the host using the interface. | 02-02-2012 |