Ahn
Ahn Choi, Gyeonggi-Do KR
Patent application number | Description | Published |
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20130215696 | ANTI-FUSE CIRCUIT OF SEMICONDUCTOR DEVICE AND METHODS OF TESTING INTERNAL CIRCUIT BLOCK THEREOF - A method of testing an internal circuit block of anti-fuse circuit and a circuit for detecting a defect in the operation of the internal circuit block such as a defect in a sensing part or in a transfer part thereof. Forming a sensing part testing path in a sensing part connected to an output terminal of anti-fuse array; obtaining a sensing output signal through a sense amplifier in the sensing part by applying a test signal through the sensing part testing path while the anti-fuses in the anti-fuse array are not ruptured; detecting defects in the sensing part by comparing the sensing output signal with a reference data corresponding to the test signal. Defectively operating chips may be effectively repaired by adjusting control terminals within a specific control range upon detection of a defect of internal circuit block. | 08-22-2013 |
Ahn Choi, Suwon-Si KR
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20150049546 | METHOD OF PROGRAMMING FUSE CELLS AND REPAIRING MEMORY DEVICE USING THE PROGRAMMED FUSE CELLS - A plurality of fuse cells includes a first fuse cell and a second fuse cell. Each of the first and second fuse cells includes a first anti-fuse and a second anti-fuse. A method of programming the fuse cells includes rupturing the first anti-fuse of the first fuse cell based on first data loaded to a program control circuit. The method includes rupturing the second anti-fuse of the first fuse cell before loading second data to the program control circuit. The second data is for rupturing the first anti-fuse of the second fuse cell or the second anti-fuse of the second fuse cell. | 02-19-2015 |
Ahn Lee, Seoul KR
Patent application number | Description | Published |
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20130104835 | BALANCE SHAFT MODULE OF V6 ENGINE | 05-02-2013 |
20130118436 | BALANCE SHAFT MODULE OF ENGINE - A balance shaft module of an engine, may include a crank sprocket driving gear for receiving a power of a crankshaft of the engine, a crank sprocket driven gear engaged with the crank sprocket driving gear and receiving a power of the crank sprocket driving gear, a first balance shaft arranged coaxially with the crank sprocket driven gear and having a first driving gear to receive a power from the crank sprocket driven gear, and a second balance shaft receiving a power through a second driven gear engaged with the first driving gear. | 05-16-2013 |
20130133607 | STRUCTURE OF BALANCE SHAFT - A balance shaft structure for offsetting a secondary unbalance force due to a crankshaft of an engine may include a plurality of balance shafts rotating with the crankshaft, and a balance weight formed on a circumferential surface of each corresponding balance shaft and offsetting the secondary unbalance force, wherein the balance shafts may be disposed at the left and right of the crankshaft respectively and symmetric with respect to a longitudinal axis of the crankshaft, and disposed to be biased at a front part or a rear part of the engine, such that the center of weight may be offset by the center of weight of the engine, and a moment balance weight formed to each corresponding balance shaft and offsetting a pitch moment of the crankshaft generated by offsetting. | 05-30-2013 |
20140238357 | STRUCTURE OF ENGINE - A structure of an engine includes: a crankshaft module configured to convert reciprocal motion of a piston into rotational motion; and a first balance shaft module and a second balance shaft module configured to reduce vibration of the engine, in which the first balance shaft module is directly gear-meshed with the crankshaft module, and the second balance shaft module is gear-meshed with the crankshaft module through an intermediate gear. | 08-28-2014 |
Ahn Sunghoon, Gyeonggi-Do KR
Patent application number | Description | Published |
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20090083567 | APPARATUS AND METHOD FOR CLOCK GENERATION WITH PIECEWISE LINEAR MODULATION - An apparatus and method for generating a clock using piecewise linear modulation are provided. The apparatus includes: a modulation profile generator for outputting an M-bit digital profile obtained by quantizing a piecewise linear modulation profile consisting of two or more linear signals; a delta-sigma modulator for receiving the M-bit digital profile and outputting a K-bit profile obtained by delta-sigma modulating the M-bit digital profile, K being a smaller number than M; a phase-frequency comparator for outputting up and down pulses having the same phase difference as that between a reference clock and a feedback clock; a charge pump for outputting a predetermined current for a time corresponding to the phase difference between the up and down pulses; a loop filter for outputting a control voltage corresponding to the predetermined current; a voltage controlled oscillator (VCO) for outputting a multi-phase clock having a frequency corresponding to a level of the control voltage; and a fractional divider for receiving the multi-phase clock of the VCO, selecting a divider according to the K-bit profile, and outputting a divided clock as the feedback clock. Therefore, it is possible to minimize electromagnetic interference (EMI) using piecewise linear modulation, and to readily implement the apparatus and method on a chip due to the modulation profile consisting of two or more linear signals. In addition, the delicate fractional divider using a multi-phase clock of the VCO and a phase interpolator allows precise frequency interpolation. Furthermore, unnecessary power consumption can be reduced by preventing application of a clock to an unused block. | 03-26-2009 |