52nd week of 2009 patent applcation highlights part 19 |
Patent application number | Title | Published |
20090315541 | ANGULAR POSITION SENSOR - An angular position sensor and method that relies on a stationary circular array of Hall sensors and a rotatable circular array of magnets arranged about a common axis. A periodic and simultaneous reading of all of the Hall sensor outputs is used to determine angular velocity. | 2009-12-24 |
20090315542 | Pole Position Measuring Device for a Magnetic Levitation Vehicle on a Magnetic Levitation Track and Method for Operation Thereof - A pole position measuring device for a magnetic levitation vehicle on a magnetic levitation track has a magnetic field sensor pair, for measuring the stator magnetic field of a track side stator, both magnetic field sensors of the magnetic field sensor pair being arranged at a given separation from each other and an evaluation device, which determines the pole orientation angle between the stator magnetic field of the track side stator and the magnetic reference axis of the magnetic levitation vehicle by means of the measured values from both magnetic field sensors. The separation between the two magnetic field sensors is less than half the wavelength of the fundamental wave of the track side stator magnetic field and the evaluation device is configured to determine the pole orientation angle from the measured values of the magnetic field sensors arranged thus. | 2009-12-24 |
20090315543 | Gear tooth sensor (GTS) with magnetoresistive bridge - The invention discloses a method and apparatus for determining the rotational status of a gear wheel whether or not it is actually turning. A key feature is the magnetic angle sensor that is used. Said sensor comprises a bridge structure of four MR devices in a square array. The direction of the pinned reference layer is the same for all four devices and lies along one of the diagonals of said square array. A single wafer process is used to manufacture the invented device. | 2009-12-24 |
20090315544 | Rotation detection device and rotation detector equipped bearing assembly - There is provided a rotation detection device | 2009-12-24 |
20090315545 | Apparatus for Measurement of Volume-or-Mass-Flow of a Medium - The invention relates to an apparatus for measuring volume- or mass-flow of a medium flowing through a measuring tube ( | 2009-12-24 |
20090315546 | Magnetic Field Response Sensor For Conductive Media - A magnetic field response sensor comprises an inductor placed at a fixed separation distance from a conductive surface to address the low RF transmissivity of conductive surfaces. The minimum distance for separation is determined by the sensor response. The inductor should be separated from the conductive surface so that the response amplitude exceeds noise level by a recommended 10 dB. An embodiment for closed cavity measurements comprises a capacitor internal to said cavity and an inductor mounted external to the cavity and at a fixed distance from the cavity's wall. An additional embodiment includes a closed cavity configuration wherein multiple sensors and corresponding antenna are positioned inside the cavity, with the antenna and inductors maintained at a fixed distance from the cavity's wall. | 2009-12-24 |
20090315547 | Magnetic Field Sensor Arrangement and Method for Non-Contact Measurement of a Magnetic Field - A magnetic field sensor arrangement ( | 2009-12-24 |
20090315548 | HIGH SENSITIVITY MAGNETIC SENSOR - A sensor device comprising a base substrate and first and second flux concentrator fixedly attached to the base substrate. The first flux concentrator and the second flux concentrator are positioned with their proximal end regions facing and spaced apart, defining a gap therebetween. A magnetic sensor element is positioned in the gap, the sensor element moveable towards and away from the base substrate. The sensor device has a first system to offset stray magnetic fields, a second system to modulate the sensor element to detect KHz frequency, and a third system to dither noise from the first and second flux concentrators. | 2009-12-24 |
20090315549 | METHOD FOR PROCESSING SENSOR SIGNALS SUBJECT TO AN OFFSET AND SENSOR ARRANGEMENT DESIGNED TO CARRY OUT THE METHOD - The present invention relates to a method and a sensor arrangement for processing sensor signals, which are subject to an offset, of a sensor ( | 2009-12-24 |
20090315550 | CIRCUIT ASSEMBLY AND METHOD FOR PROGRAMMING A HALL SENSOR HAVING AN UPSTREAM CONTROLLER - A method for programming a Hall sensor having a controller in which the Hall sensor or a programmable circuit component integrated therein is programmed by clocking or modulating a Hall sensor power supply voltage (VDD). A clocked or modulated controller power supply voltage (VBAT) is applied to the controller in clocked or modulated form; and where the clock or modulated Hall sensor power supply voltage (VDD) is applied to the Hall sensor by the controller as a function of the clocked or modulated controller power supply voltage (VBAT). | 2009-12-24 |
20090315551 | Linear magnetoresistance sensor - A linear (or substantially linear) magnetoresistance sensor is provided. The magnetoresistance sensor may use one of the following magnetotransport mechanisms: classical magnetoresistance (MR) or quantum MR effects. In the classical regime, the sensor may be composed of a polycrystalline narrow gap semiconductor that has a varying mobility (instead of a constant mobility). The material's varying mobility enables the magnetoresistive sensor to have: (1) a linear magnetoresistance; (2) a high temperature response; and (3) an ability to respond to the highest possible fields. In the quantum regime, the sensor may be composed of a single crystal narrow gap semiconductor that is sufficiently doped so that the material may exhibit a linear response in a temperature range of 50K-175 K. | 2009-12-24 |
20090315552 | MAGNETIC DETECTION DEVICE HAVING BRIDGE CIRCUIT PROVIDED WITH RESISTANCE ADJUSTMENT PORTION AND METHOD OF MANUFACTURING THE SAME - In a magnetic detection device using a magnetic resistance element, the resistance of a layer having a multi-layer structure can be easily adjusted without causing damages to the layer. A magneto-resistance layer is connected in series to a reference resistance layer, and a magneto-resistance layer is connected in series to a reference resistance layer on a substrate. A voltage is applied between a power supply layer and a grounding layer. A first output conductive layer and the reference resistance layer extend in parallel to each other so that they are partially electrically connected to each other via a connection layer. A second output conductive layer and the reference resistance layer extend in parallel to each other so that they are partially electrically connected to each other via a connection layer. Accordingly, it is possible to adjust the resistance of the reference resistance layers by selecting the respective positions of the connection layers. | 2009-12-24 |
20090315553 | Axially Symmetric Vertical Magnetic Field Component Exciting Sensor System - The present invention provides an axially symmetric vertical magnetic field component sensor system capable of intensifying vertical magnetic field components. The sensor system comprises an axially symmetrical magnetic substance comprising a circular, oval or polygonal shaped flat disk and a protrusion formed on a center of the flat disk. The sensor system is used for a response system having an IC wound by a coil which generates signals and the sensor system is mounted on a metal surface or buried in a hollow formed on the metal surface. | 2009-12-24 |
20090315554 | INTEGRATED THREE-DIMENSIONAL MAGNETIC SENSING DEVICE AND METHOD TO FABRICATE AN INTEGRATED THREE-DIMENSIONAL MAGNETIC SENSING DEVICE - A three-axis magnetic sensing device included on a single chip. An example three-axis magnetic sensing device includes first and second sensing components that sense magnetic fields along two orthogonal axes planar to a surface of a substrate and a third sensing component that senses a magnetic field along an axis out of plane of the surface of the substrate. The third sensing component includes a carbon-based material. In one example, the first and second sensing components are anisotropic magnetoresistive sensors. In another example, the carbon-based material includes carbon nanotubes and the third sensing component includes a needle attached to the carbon-based material and electrodes that make contact with the carbon-based material. | 2009-12-24 |
20090315555 | Power cable magnetic field sensor - A method and apparatus to detect non-cancelled magnetic field produced when current flows through an electric conductor are provided. The sensor includes multiple coils, which allow the sensor to be arbitrarily oriented and attach to the outside of an electrical power cable. Arbitrary orientation provides for easy of field installation. | 2009-12-24 |
20090315556 | SYSTEM AND METHOD FOR ELECTRICALLY CONTACTING LOCAL COILS WITH A SIGNAL PROCESSOR REMOTE THEREFROM IN A MAGNETIC RESONANCE SCANNER - In a contacting system and method for contacting magnetic resonance local coils with a unit for additional signal processing of a magnetic resonance data acquisition unit, a number of coil coupler elements are electrically connected with the magnetic resonance local coils and apparatus coupler elements are mounted at the magnetic resonance tomograph, and are electrically connected with a unit for signal processing. The coil coupler elements and the apparatus coupler elements are fashioned so that, given a movement of the local coils along a movement path in the magnetic resonance data acquisition unit, a successive contacting of at least a portion of the coil coupler elements with apparatus coupler elements ensues at least over a specific path segment of the movement. | 2009-12-24 |
20090315557 | METHOD AND APPARATUS FOR CHARACTERIZING THE TEMPORAL RESOLUTION OF AN IMAGING DEVICE - A system and method for determining the temporal resolution of a tomographic imaging device uses an apparatus to drive one or more dynamic phantoms composed of multiple materials. The apparatus is placed at or near the isocenter of the imaging device and the one or more phantoms are moved to produce a plurality of dynamic features, each having a specified frequency. The dynamic features are imaged with the device and the acquired image data corresponding to the dynamic features is analyzed to determine a temporal modulation transfer value at each of the known specified frequencies. The temporal resolution of the imaging device is determined using these temporal modulation transfer values. | 2009-12-24 |
20090315558 | SELF-REFOCUSED SPATIAL-SPECTRAL PULSE - A method for frequency selective and slice selective magnetic resonance imaging (MRI) is provided. A B | 2009-12-24 |
20090315559 | BLACK-BLOOD STEADY-STATE FREE PRECESSION MAGNETIC RESONANCE IMAGING - In an imaging method, periodic maintenance radio frequency pulses (α, −α) are applied to maintain a steady state magnetic resonance excitation in an imaging region. Readout ( | 2009-12-24 |
20090315560 | APPARATUS AND METHOD FOR DECREASING BIO-EFFECTS OF MAGNETIC GRADIENT FIELD GRADIENTS - A magnetic field generator includes a power source and a coil connected to the power source to generate a time-varying magnetic field. Energy is applied to the coil so that the coil generates a time-varying magnetic field gradient with a magnitude of at least 1 milliTesla per meter and a rise-time of less than 10 microseconds. One or more of a capacitor, a multi-stage high-voltage switch, and/or a pulse-forming network may assist with the generation of the magnetic field gradient. | 2009-12-24 |
20090315561 | MAGNETIC RESONANCE DATA ACQUISITION SYSTEM AND METHOD WITH PARAMETER ADJUSTMENT DURING PATIENT MOVEMENT - In a method and a magnetic resonance (MR) system for acquisition of MR data of a measurement subject in an MR examination in the magnetic resonance system, MR data of the measurement subject (are acquired according to measurement parameters while the measurement subject is moved relative to the magnetic resonance system, the acquired MR data are analyzed, and the measurement parameters are automatically adapted. | 2009-12-24 |
20090315562 | SYSTEM AND APPARATUS FOR REDUCING HIGH FIELD SHADING IN MR IMAGING - A system for receiving MR data that includes an RF coil array for a magnetic resonance (MR) imaging apparatus. The RF coil array includes a plurality of non-concentric receiver coils arrayed along a first direction. A receiver coil at a first end of the RF coil array has a perimeter width greater than a perimeter width of a receiver coil at a second end of the RF coil array that is opposite from the first end along the first direction. | 2009-12-24 |
20090315563 | Detection of Resistivity of Offshore Seismic Structures Mainly Using Vertical Magnetic Component of Earth's Naturally Varying Electromagnetic Field - The invention measures the vertical component Hz of a magnetic field arising from natural sources (MT) simultaneously at a plurality of points ( | 2009-12-24 |
20090315564 | LOW COST CURRENT AND TEMPERATURE SENSOR - A battery health or prognosis system may employ a ferrite disc embedded in a printed wiring board (PWB) to perform both a battery current sensing role and a temperature sensing role. The ferrite disc may be surrounded with a coil that may be comprised of surface conductors and electrically conductive vias of the PWB. Excursions of coil current may be produced to generate observable hysterisis loops in the ferrite disc. The generated hysterisis loops may be compared to a temperature-dependent family of hysterisis loops for the magnetic material from which the ferrite disc is constructed. A processor mounted on the PWB may collect and process outputs from a Hall-effect sensor to develop both temperature and battery current information to produce a prognosis for the battery. | 2009-12-24 |
20090315565 | ADAPTIVE PULSE WIDTH TIME DOMAIN REFLECTOMETER - An adaptive pulse width (APW) Time Domain Reflectometer (TDR) comprises an enhancement to the standard Pulse TDR by adjusting the effective pulse width as a function of time. Improved resolution for a large range of cable lengths is obtained, as well as allowing an all-in-one view of the processed return signal trace. | 2009-12-24 |
20090315566 | AC Current Sensor for Measuring Electric AC Current in a Conductor and an Indicator System Comprising Such a Sensor - The invention concerns a current sensor ( | 2009-12-24 |
20090315567 | ELECTRICAL CONDITIONING OF MEMS DEVICE AND INSULATING LAYER THEREOF - A method of fabricating a MEMS device includes conditioning of an insulating layer by applying a voltage across the insulating layer via a conductive sacrificial layer for a period of time, prior to removal of the conductive sacrificial layer. This conditioning process may be used to saturate or stabilize charge accumulated within the insulating layer. The resistance across the insulating layer may also be measured to detect possible defects in the insulating layer. | 2009-12-24 |
20090315568 | Manually Pre-Settable Proof of Flow Current Sensor Apparatus, System, and/or Method - The present invention relates to motor status monitoring and equipment protection applications for industrial automation, HVAC, and other implementations, and more particularly, to use of current sensors in detecting loss of flow conditions. Presently described embodiments can comprise simplified, compact current sensors devices that can be economical to build, inventory, distribute, and purchase, and can be easily manually configured prior to installation and automatically offer proof of flow detection once properly installed and energized. | 2009-12-24 |
20090315569 | IMPEDANCE MEASURING INSTRUMENT AND IMPEDANCE MEASURING METHOD FOR FINE PARTICLE COLLECTOR - An impedance measuring instrument of a fine particle collector comprising a fine particle collection body for collecting fine particles in a fluid, a conductive can body for containing the fine particle collection body, and a buffering body disposed between the fine particle collection body and the conductive can body, wherein two or more electrodes are arranged on the fine particle collection body, at least one of the electrodes is connected with an AC power supply, at least the other electrode is connected with an ammeter, the AC power supply and the ammeter are interconnected and further connected with the conducive can body, and the conducive can body is grounded. | 2009-12-24 |
20090315570 | CAPACITIVE SENSING DEVICE - A capacitive sensing device including a substrate, a sensor electrode disposed over the substrate, a first trace electrically coupled to the sensor electrode, and a second trace proximate the first trace. The second trace is for distinguishing proximity of an object with the sensor electrode from proximity of the object with the first trace. | 2009-12-24 |
20090315571 | Method and device for measuring the conductivity of a pure or ultrapure liquid - The invention relates to a method of measuring the conductivity of a pure or ultrapure liquid, notably water, using electrodes, characterized in that it consists in determining the conductivity by modeling the liquid in the form of an equivalent electrical circuit diagram comprising a resistor R, a capacitor Cp in parallel with the resistor R, and a series capacitor Cs. | 2009-12-24 |
20090315572 | Method and Apparatus for Estimating a Mechanical Property - An apparatus for estimating or supervising one or more internal mechanical properties of a metal alloy object with a known chemical composition based on the resistivity of the metal alloy object. The apparatus includes a device for measuring the resistivity of the metal alloy object, and a computation unit adapted to calculate the content of dissolved alloying elements in the metal alloy object based on the measured resistivity and the known chemical composition of the metal alloy, and based thereon to calculate at least one internal mechanical property of the metal alloy object. | 2009-12-24 |
20090315573 | Component with a detection structure for mechanical damage - A component made of electrically insulating material with a detection structure for mechanical damage such as cracks is disclosed. The detection structure is a conductor. The electrical properties of the detection structure are modified as more and more cracks are formed such that the component will be replaced in time before breaking. The electrical conductor is formed by particles that are in contact with each other and have a metallic surface such that an electrical conductor is created which is particularly sensitive to mechanical damage, thus rendering the detection structure highly sensitive. Furthermore, if the metallic surface is produced merely by cladding the particles while the inside of the particles is made of the same material as the component, a conductor featuring an adapted thermal expansion behavior is created for components that are subject to great thermal stress, e.g. heat shield panels. | 2009-12-24 |
20090315574 | OIL-DEGRADATION DETECTING APPARATUS - An oil-degradation detecting apparatus that can more accurately judge oil degradation and a mechanical system having a rotating part or a sliding part and including the oil-degradation detecting apparatus are provided. Two plates ( | 2009-12-24 |
20090315575 | SENSOR THRESHOLD CIRCUIT - There is provided a sensor threshold circuit that makes available a hysteresis width that is not dependent on the change in a threshold point. Since a bias current I | 2009-12-24 |
20090315576 | PROBE CARD ASSEMBLY AND TEST PROBES THEREIN - Disclosed are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and contains therein a core that is wrapped by an insulation layer. | 2009-12-24 |
20090315577 | PROBE CARD ASSEMBLY - Disclosed is a probe card assembly including a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and the probe base. Each of the power probe and the signal probes further contains therein a core that is wrapped by an insulation layer. | 2009-12-24 |
20090315578 | PROBE AND PROBE CARD FOR INTEGRATED CIRCUIT DEVICES USING THE SAME - A vertical probe comprises a linear body, a tip portion connected to one side of the linear body, and at least one slot positioned on the linear body. In particular, the vertical probe includes a depressed structure having a plurality of slots positioned on the linear body in parallel and on one side of the linear body. The present application also provides a probe card for integrated circuit devices comprising an upper guiding plate having a plurality of fastening holes, a bottom guiding plate having a plurality of guiding holes and a plurality of vertical probes positioned in the guiding holes. The vertical probe includes a linear body positioned in the guiding holes, a tip portion connected to one side of the linear body and at least one slot positioned on the linear body. | 2009-12-24 |
20090315579 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 2009-12-24 |
20090315580 | PROBE APPARATUS - A probe apparatus includes a mounting table having a mounting table main body and a chuck top, cylinder mechanisms surrounding a mount of the chuck top, and a connecting mechanism to releasably connect the cylinder mechanisms to a head plate horizontally supporting a probe card. When a semiconductor wafer, mounted on the mount, comes into contact with probes of the probe card, a control unit operates the cylinder mechanisms and the connecting mechanism to connect the cylinder mechanisms to the head plate. Thereafter, the control unit further operates the cylinder mechanisms, to move the chuck top upward from the mounting table main body by a predetermined overdrive amount. Accordingly, the probe apparatus achieves an originally required contact load between the semiconductor wafer and the probes of the probe card while preventing the probe card from being displaced upward during overdriving of the semiconductor wafer, thereby enabling a highly reliable test. | 2009-12-24 |
20090315581 | CHUCK FOR SUPPORTING AND RETAINING A TEST SUBSTRATE AND A CALIBRATION SUBSTRATE - A chuck for supporting and retaining a test substrate includes a device for supporting and retaining a calibration substrate. The chuck comprises a first support surface for supporting a test substrate and a second support surface, which is laterally offset to the first support surface, for supporting a calibration substrate The calibration substrate has planar calibration standards for calibration of a measuring unit of a prober, and dielectric material or air situated below the calibration substrate at least in the area of the calibration standard. In order to be able to take the actual thermal conditions on the test substrate and in particular also on known and unknown calibration standards and thus the thermal influence on the electrical behavior of the calibration standard used into consideration, the second support surface is equipped for temperature control of the calibration substrate. | 2009-12-24 |
20090315582 | Test mode enable circuit - A test mode enable circuit for putting a device in a test mode includes a serial-to-parallel shift register reset by a reset signal, a decoder circuit, and a gate circuit. The shift register receives and converts a control signal in serial form to control data in parallel form. The decoder circuit receives and decodes the control data to a test mode enable signal that puts the device in the test mode. The decoder circuit outputs the test mode enable signal to the gate circuit only when the control data matches a predetermined key pattern. The gate circuit outputs the test mode enable signal to the device only when at least one of the control signal and the reset signal has a predetermined voltage level. | 2009-12-24 |
20090315583 | TESTABLE INTEGRATED CIRCUIT AND IC TEST METHOD - A circuit portion ( | 2009-12-24 |
20090315584 | MEASURING BOARD FOR EXAMINING DIFFERENT TYPES OF SECTIONS OF MCP PRODUCT - A measuring board includes: a first memory section measuring socket having a first memory section measuring socket terminal, the first memory section measuring socket terminal being connected to a first memory section terminal of a first memory section of an MCP product; and a second memory section measuring socket having a second memory section measuring socket terminal, the second memory section measuring socket terminal being connected to a second memory section terminal of a second memory section of the MCP product, and the second memory section measuring socket terminal is connected to the first memory section measuring socket terminal. | 2009-12-24 |
20090315585 | TRANSISTOR DIAGNOSTIC CIRCUIT - In one embodiment, a diagnostic circuit is used to test the on-resistance of a transistor. | 2009-12-24 |
20090315586 | Setting Operating Mode of an Interface Using Multiple Protocols - This invention is an integrated circuit having at least one data pin connecting to external circuits. The invention includes a plurality of operational units each having at least one data input/output for data transfer and an enable input. The operational unit have a normal mode and a stall mode controlled by an enable input. The operational units can exchange data via the data input/output in normal mode and are not capable of exchanging data in the stall mode. A selection logic selectively enables an operation unit and connects the data input/output of the enabled operation unit to the at least one data pin. The selection logic is responsive to external signals on at least one data pin to selectively enable operation units. | 2009-12-24 |
20090315587 | Key Based Pin Sharing Selection - This invention is an integrated circuit having at least one data pin connecting to external circuits. The invention plural operational units each having a normal mode and a stall mode controlled by an enable input. Selection logic selectively enables an operation unit and connects the data input/output of the enabled operation unit to the data pin. The operational units are responsive to a preceding or following key to enter the normal mode. Each operational unit switches between stall mode and the normal mode upon receiving a corresponding predetermined selection number of pulses at while the clock input receives a non-cycling signal. Greater number of pulses deselect all operational units, switch operational units to the normal mode if the correct key is received and switch all operational units to the stall mode. | 2009-12-24 |
20090315588 | VARIABLE SIZED SOFT MEMORY MACROS IN STRUCTURED CELL ARRAYS, AND RELATED METHODS - The logic cells (HLEs) of a structured application-specific integrated circuit (structured ASIC) can be used to provide memory blocks of various sizes. Any one or more of several techniques may be employed to facilitate doing this for various user designs that may have different requirements (e.g., in terms of size) for such memory blocks. For example, pre-designed macros of memory blocks may be provided and then combined as needed to provide memory blocks of various sizes. Placement constraints may be observed for certain portions of the memory circuitry (e.g., the memory core), while other portions (e.g., address predecoder circuitry, write and read data registers, etc.) may be located relatively freely. | 2009-12-24 |
20090315589 | ADJUSTING METHOD AND CIRCUIT USING THE SAME - A method adjusts driving ability of an output buffer. The output buffer has multiple driving ability classes. The method includes the following steps. First, the driving ability of the output buffer is initialized as an initial class among the driving ability classes. Next, a voltage at an output terminal of the output buffer is initialized to an initial voltage. Then, an input voltage is inputted via the input terminal at a first time instant. Next, an output voltage outputted from the output terminal is sampled to obtain a voltage value at a second time instant. Then, whether the voltage value satisfies a predetermined condition is judged. Next, if the voltage value satisfies the predetermined condition, the driving ability class of the output buffer is recorded and set. | 2009-12-24 |
20090315590 | Logic circuits, inverter devices and methods of operating the same - An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor. | 2009-12-24 |
20090315591 | POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION - A power up circuit that having reduced power consumption during power saving modes, while maintaining an active flag signal indicating that the power supply voltage is satisfactory. This is achieved by turning off the power up circuit during the power saving mode, and using a status holding circuit to maintain the active flag signal in response to the power down signal. The status holding circuit is responsive to an internal node of the power up circuit for generating the active flag signal when the internal node has reached a predetermined level. The power down signal can be one or both a sleep mode signal and a deep power down signal. The status holding comprises an override circuit for maintaining the active flag signal in the power saving mode, and a restore circuit for rapidly resetting at least the internal node of the power up circuit upon exit of the power saving mode. | 2009-12-24 |
20090315592 | PREEMPHASIS DRIVER WITH REPLICA BIAS - In one embodiment, a system includes a replica driver that includes n-type digital-to-analog converter (NDAC) current sources. The replica driver can produce a reference voltage based on current supplied by the NDAC current sources. The system includes driver fingers that are coupled to the replica driver and each include a driver bias circuit and an output driver. The driver bias circuit includes an operational amplifier (op-amp) that can adjust current-source gate voltage in the output driver to produce voltages at output nodes of the driver fingers that approximately match the reference voltage produced by the replica driver. | 2009-12-24 |
20090315593 | Partial Switch Gate Driver - A power switch driver includes a top driver switch, a bottom driver switch, a driver node between them, and driver logic. The power switch driver can turn on the power switch by controlling a gate voltage of the power switch to a first voltage level and to turn off the power switch by controlling the gate voltage from a lower second voltage level. The driver logic may include a pulse width generator programmer and a pulse width generator. The pulse width generator is controlled by the pulse width generator programmer and an input signal. Some power switch drivers include a feedback loop, coupled to the driver node and to the driver logic. The feedback loop may include a track-and-hold circuit, coupled to the driver node, to the pulse width generator through an error amplifier and to the input terminal. | 2009-12-24 |
20090315594 | Source/Emitter Follower Buffer Driving a Switching Load and Having Improved Linearity - A source follower or emitter follower buffer provided according to an aspect of the present invention includes a capacitor connected between the input path and a node formed by the junction of a pair of transistors forming a cascoded current source connected to the output of the buffer. The capacitor passes input signal current directly to a switching load connected to the output of the buffer, and very little signal-dependant current flows through the transistor receiving the input signal. As a result, input-output non-linearity due to signal-dependant modulation (variation) of transconductance of the transistor receiving the input signal is minimized. When incorporated in switched-capacitor analog to digital converters, the buffer facilitates generation of digital codes that represent an input signal more accurately. | 2009-12-24 |
20090315595 | OUTPUT DRIVE CIRCUIT - An output drive circuit includes: a totem-pole output including: a high-side transistor (HST) with drain and source, an output stage power supply voltage applied to the drain, the source connected to the first node (N | 2009-12-24 |
20090315596 | MATCHING CIRCUIT FOR A COMPLEX RADIO FREQUENCY (RF) WAVEFORM - A complex waveform frequency matching device is disclosed. In various embodiments, the matching device comprises a plurality of radio frequency generators coupled in parallel with one another. Each subsequent one of the plurality of radio frequency generators is configured to produce a harmonic frequency related by an integral multiple to a frequency produced by any lower-frequency producing radio frequency generator, thereby generating a complex waveform. A plurality of frequency splitter circuits is coupled to an output of the plurality of radio frequency generators, and each of a plurality of matching networks has an input coupled to an output of one of the plurality of frequency splitter circuits and an output configured to be coupled to a plasma chamber. | 2009-12-24 |
20090315597 | Clock Selection for a Communications Processor having a Sleep Mode - A clock selector operative on two clocks operating on different domains and responsive to a SELECT input provides a transition from a first clock to a second clock, and from a second clock to a first clock with a dead zone therebetween. The delay is provided by a doublet register having a first register coupled to a second register, the two registers operative on one of the clock domains. Additionally, a clock selector is operative on two clocks which are each accompanied by a clock availability signal where the state machine provides a variety of states to create a dead zone between selections, and to bring the state machine to a known state until a clock signal is again available. | 2009-12-24 |
20090315598 | CONSTANT VOLTAGE BOOST POWER SUPPLY - A constant voltage boost power supply according to an aspect of the invention includes a voltage-controlled variable frequency oscillator that produces and supplies a clock signal and changes an oscillating frequency of the supplied clock signal according to an input control voltage; a charge pump into which the clock signal is fed, the charge pump performing a pumping operation in synchronization with the clock signal to boost an input voltage and supply an output voltage in which the input voltage is boosted; a voltage dividing circuit that divides the output voltage of the charge pump to supply a monitor voltage; and a differential amplifier into which the monitor voltage and a reference voltage are fed, the differential amplifier amplifying a potential difference between the monitor voltage and the reference voltage to supply the control voltage. | 2009-12-24 |
20090315599 | CIRCUIT WITH A REGULATED CHARGE PUMP - A circuit, method for regulation, and use thereof is provided, whereby the circuit can include a charge pump that is connected to a supply voltage terminal in order to produce a pump voltage from a supply voltage, and includes a control circuit whose inputs are connected to the output of the charge pump and to the supply voltage terminal in order to sense a difference between the pump voltage and the supply voltage as a controlled variable. The circuit is designed to compare the controlled variable to a reference variable, and output is connected to a control input of the charge pump in order to control the charge pump as a function of the comparison. | 2009-12-24 |
20090315600 | LOCKED-LOOP QUIESCENCE APPARATUS, SYSTEMS, AND METHODS - Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to a variable delay line associated with the DLL and/or to a variable frequency oscillator associated with the PLL. An output clock phase associated with the DLL or PLL may thus be held substantially constant following a DLL initialization period. Additional embodiments are disclosed and claimed. | 2009-12-24 |
20090315601 | DEVICE AND METHOD FOR TIMING ERROR MANAGEMENT - A device having timing error management capabilities and a method for timing error management. The device includes a first input node adapted to receive input data; a first latch, a second latch and a comparator, rising a first multiplexer and a second multiplexer; wherein the second multiplexer is adapted to provide input data to the second latch from the first input mode during a first operational mode of the device and to provide a first latch output signal to the second latch during a second operational mode; wherein the comparator is adapted to compare, during a first clock phase, between the first latch output signal and between a second latch output signal and in response to the comparison selectively generate an error signal. | 2009-12-24 |
20090315602 | Single-ended to differential converter - A single-ended to differential converter is presented. The converter may be configured to convert full-swing single-ended signals to low-swing differential signals within a single-stage, thereby reducing signal distortion. The converter may include a passive network of resistive elements, for example resistors and/or metal oxide semiconductor (MOS) devices operating in a linear region. The converter may also allow for adjustable design parameters such as a common mode, differential amplitude, and an output swing. The adjustments may all be made within the single-stage of the converter. | 2009-12-24 |
20090315603 | DETECTION OF A DISTURBANCE IN THE STATE OF AN ELECTRONIC CIRCUIT FLIP-FLOP - A method and a circuit for detecting a disturbance of a state of at least one first flip-flop from a group of several first flip-flops of an electronic circuit, wherein: the respective outputs of the first flip-flops in the group are, independently from their functional purpose, combined to provide a signal and its inverse, triggering two second flip-flops having data inputs forced to a same state, the respective outputs of the second flip-flops being combined to provide the result of the detection; and a pulse signal comprising a pulse at least for each triggering edge of one of the first flip-flops in the group initializes the second flip-flops. | 2009-12-24 |
20090315604 | CLOCK SIGNAL GENERATION APPARATUS AND DISCRETE-TIME CIRCUIT - In a clock signal generation apparatus, a clock signal delay calculation section has a delay detection circuit for monitoring the delay characteristics of the variable delay circuits of a clock signal generation circuit due to external variation factors and calculates the delay amounts of N-phase clock signals, and a clock signal delay control section varies the delay amounts of the variable delay circuits on the basis of delay variation data, external variation factors being used as parameters thereof, stored in a delay variation data section and the calculated delay amounts of the N-phase clock signals. In the case that, for example, clock signals required for a discrete-time circuit have changed due to external variation factors, such as power supply voltage and environmental temperature, the non-overlap times and the duty ratios of the clock signals required for the discrete-time circuit can be set to optimal values. | 2009-12-24 |
20090315605 | VARIABLE DELAY APPARATUS - It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay block | 2009-12-24 |
20090315606 | OUTPUT CIRCUIT - The present invention is aimed at providing an output circuit that is of relatively small scale and may perform adjustment to make the output-signal rise slew rate and the fall slew rate equal to each other. An output circuit includes a signal output unit configured to produce at a signal output node a signal that makes transition between a first potential and a second potential, a load circuit having a variable load, and a first switch circuit configured to select one of electrical conduction and non-conduction between the signal output node and the load circuit. | 2009-12-24 |
20090315607 | PROGRAMMABLE CIRCUIT FOR DRIFT COMPENSATION - Systems and methods relating to programmable circuits are described. Several embodiments relate to systems and methods for controlling the long-term stability and accuracy of circuits that produce waveforms varying in frequency and amplitude. Such embodiments may include a circuit comprising a common vacuum environment that houses a pair of heater-thermocouples. The circuit may compare signals outputted by each heater-thermocouple and then may produce a resultant value based on the comparison. The resultant value may be used by the circuit to control the long-term stability and accuracy of the circuit. Such control of the long-term stability and accuracy of the circuit may include drift compensation associated with certain components of the circuit. | 2009-12-24 |
20090315608 | Energy Saving Driving Circuit and Associated Method for a Solid State Relay - An energy saving driving circuit and method is provided for use with a solid state relay (SSR). The circuit and method reduce the overall energy required to drive a solid state relay by maintaining the SSR in an “on” state with a minimal maintenance or holding current after applying a turn-on current. The driving circuit includes a control circuit configured for outputting a control signal; a turn-on circuit configured for providing an output current at a first current level for a first time period in response to the control signal; and a holding circuit configured for maintaining said output current at a second reduced current level for a second time period. The maintenance or holding current is reduced in respect of that of a conventional driving current, and in some cases may be an order of magnitude or more less in magnitude than a conventional driving current, thereby resulting in less energy consumed by the SSR. | 2009-12-24 |
20090315609 | Level shift circuit and power semiconductor device - A level shift circuit includes a drive transistor, a first PMOS transistor, and first and second clamp transistors of PMOS type. The drive transistor, which drives the gate of the high-side NMOS transistor in a power semiconductor device, has a source-drain path coupled between a boot potential generated by a bootstrap circuit provided in the semiconductor device and a source potential of the high-side NMOS transistor. The first PMOS transistor has a source coupled to the boot potential, and a drain coupled to the gate of the drive transistor. The first clamp transistor has a gate coupled to the source potential of the high-side NMOS transistor, and a source coupled to the drain of the first PMOS transistor. The second clamp transistor has a gate coupled to the source potential of the high-side NMOS transistor, and a source coupled to the gate of the first PMOS transistor. | 2009-12-24 |
20090315610 | Integrated Circuit Devices Having Level Shifting Circuits Therein - Level shifting circuits generate multiple tracking signals that are in-phase with an input signal, but are also level-shifted with wider voltage swings relative to the input signal. These input tracking signals are provided as separate inputs to an inverter having at least one PMOS pull-up transistor and at least one NMOS pull-down transistor therein. A level shifting circuit may include a differential input circuit, which is responsive to true and complementary input signals. A first load circuit is electrically coupled to the differential input circuit. This first load circuit is configured to generate first and second tracking signals at respective first and second nodes therein. These first and second tracking signals are in-phase, level-shifted versions of each other, and have respective voltage swings that are greater than a voltage swing of the complementary input signals. The inverter includes a pull-up transistor responsive to the first tracking signal and a pull-down transistor responsive to the second tracking signal. | 2009-12-24 |
20090315611 | QUADRATURE MIXER CIRCUIT - A mixer is disclosed. In one embodiment, the mixer includes a polyphase filter that generates linear quadrature signals. The mixer also includes a potentiometric mixer that performs a frequency-conversion operation on the quadrature signal. According to the embodiments disclosed herein, the output of the potentiometric mixer has high linearity. | 2009-12-24 |
20090315612 | Switch driver with low impedance initial drive and higher impedance final drive - A driver circuit (for example, in a switching power supply or in a Class-D switching amplifier) drives a gate of a switch during a transition with a low output impedance during an initial period and then for the remainder of the transition drives the gate with a midrange output impedance. The switch in turn switches current flow through an inductor. The driver circuit includes a “Drive Node Voltage Dependent Impedance Circuit” (DNVDIC) that couples the gate to a supply voltage node. In one embodiment, there are two resistive current paths through the DNVDIC. A non-linear device in the first current path switches from having a small to a large impedance when a voltage drop across the device falls below a threshold voltage. The resulting increase in impedance of the first current path decreases voltage edge rates and reduces noise, whereas the low initial impedance reduces transition power losses. | 2009-12-24 |
20090315613 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor element and a connector. The semiconductor element has a power device of a voltage drive type for controlling an on operation and an off operation of a main current by input of a drive signal. The connector receives the drive signal without making contact with an issuing unit issuing the drive signal, and transmits the drive signal to the semiconductor element. The semiconductor element preferably includes a control unit for converting the drive signal received by the connector into a voltage value, and transmitting the voltage value to the semiconductor element. | 2009-12-24 |
20090315614 | DIVERSITY SIGNAL PROCESSING SYSTEM AND A PRODUCING METHOD THEREOF - Each of APRM units equipped for each of the diversity channels has printed circuit boards having circuit patterns thereon and a circuit description elements installed on the printed circuit board. The circuit description elements are FPGA elements manufactured by mutually different providers for example and implemented an electric circuit described in a hardware description language by a configuration tool. The circuit description elements can be implemented mutually different descriptions of the electric circuit, or can be implemented the electric circuit by mutually different configuration tools. Also, the printed circuit boards for the diversity channels can be different from each other. | 2009-12-24 |
20090315615 | CHARGE COUPLED PUMP-EFFICIENT CHARGE PUMP REGULATOR WITH MOS CAPACITOR - A charge pump with a MOS-type capacitor, where the MOS-type capacitor is operated in an inversion region in which capacitance varies as a function of the frequency of the applied signal. The charge pump is switched to transfer charge from an input node to the capacitor and from the capacitor to an output node. During a transition interval, a relatively high frequency switching signal is used to lower the capacitance and increase efficiency. During a settling interval, a relatively low frequency switching signal is used, in which case the capacitance is higher, but similar to a level which would be seen if the capacitor was operated in an accumulation region. MOS capacitor dimensions and switching intervals are mutually optimized to provide high efficiency and required throughput. The charge pump may be configured as a voltage multiplier, divider, inverter or follower, for instance. | 2009-12-24 |
20090315616 | Clock Generator Circuit for a Charge Pump - A charge pump system is formed on an integrated circuit that can be connected to an external power supply. The system includes a charge pump and a clock generator circuit. The clock circuit is coupled to provide a clock output, at whose frequency the charge pump operates and generates an output voltage from an input voltage. The clock frequency is a decreasing function of the voltage level of the external power supply. This allows for reducing power consumption in the charge pump system formed on a circuit connectable to an external power supply. | 2009-12-24 |
20090315617 | Method and Algorithm of High Precision On-Chip Global Biasing Using Integrated Resistor Calibration Circuits - Systems and methods for providing bias currents to multiple analog circuits are disclosed. An integrated circuit comprises a calibration circuit which compares a high tolerance external component to a plurality of internal components manufactured to span the variability of the process, voltage and temperature. The best fitting internal component is communicated to bias circuits which can select an internal component from a local plurality of internal components with matching desired characteristics. In this manner, analog circuits can be locally biased with the tolerance usually associated with a high tolerance external reference component, without the necessity for a local external reference component. | 2009-12-24 |
20090315618 | CURRENT MIRROR CIRCUIT - A current mirror circuit includes a first transistor, a plurality of second transistors whose bases are connected to a base of the first transistor, and a compensation transistor having a gate connected to a collector of the first transistor, a source and a back gate connected to the base of the first transistor and the bases of the plurality of second transistors, and a drain connected to a power source. The first transistor and the plurality of second transistors are bipolar transistors. The compensation transistor is a MOS-type transistor. A current corresponding to a current flowing in the first transistor is permitted to flow in the plurality of second transistors. | 2009-12-24 |
20090315619 | CIRCUIT FOR ADJUSTING CUTOFF FREQUENCY OF FILTER - A cutoff frequency adjusting circuit includes a filter circuit ( | 2009-12-24 |
20090315620 | POWER AMPLIFIER - A power amplifier based on EER technology or ET technology extracts an amplitude-modulated component from a modulated signal as an input signal which includes the amplitude-modulated component and a phase-modulated component, and decomposes the amplitude-modulated component into two control signals whose product is proportional to the amplitude-modulated component. One of the control signals is amplified by a highly efficient amplifier, and thereafter is used to amplitude-modulate an output from an RF amplifier. The other control signal is converted by a pulse modulator into a rectangular-wave signal, which is then mixed with the phase-modulated component or the modulated signal and input to the RF amplifier. | 2009-12-24 |
20090315621 | AMPLIFIER WITH GAIN EXPANSION STAGE - Techniques are disclosed for extending an amplifier's linear operating range by concatenating an amplifier exhibiting gain compression with a gain expansion stage. In an exemplary embodiment, a gain expansion stage incorporates a Class-B stage, a Class-AB stage, or a combination of the two. In an exemplary embodiment, both the gain compression stage and gain expansion stage are provided with a replica current biasing scheme to ensure stable biasing current over variations in temperature, process, and/or supply voltage. Further disclosed is an output voltage biasing scheme to set the DC output voltage to ensure maximum linear operating range. | 2009-12-24 |
20090315622 | FEEDFORWARD AMPLIFIER AND CONTROL METHOD THEREOF - In a feedforward amplifier ( | 2009-12-24 |
20090315623 | CLASS D AUDIO AMPLIFIER - A class D amplifier ( | 2009-12-24 |
20090315624 | ACTIVE RESISTOR USED IN A FEEDBACK AMPLIFIER PARTICULARLY USEFUL FOR PROXIMITY COMMUNICATION - An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used. | 2009-12-24 |
20090315625 | METHOD AND SYSTEM FOR PROCESSING SIGNALS VIA AN INTEGRATED LOW NOISE AMPLIFIER HAVING CONFIGURABLE INPUT SIGNALING MODE - Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals. | 2009-12-24 |
20090315626 | High Sensitivity Optical Receiver Employing a High Gain Amplifier and an Equalizing Circuit - An optical receiver includes a light receiving element for converting an optical signal to an electrical signal having a first bandwidth and an amplifier for amplifying the electrical signal. The amplifier has a first gain response that yields a second bandwidth that is less than the first bandwidth. The optical receiver also includes an equalizing circuit operationally coupled to the amplifier. The equalizing circuit has a second gain response that compensates for the first gain response of the amplifier so that a substantially constant net gain is imparted by the amplifier and the equalizing circuit to the electrical signal over the first bandwidth. | 2009-12-24 |
20090315627 | PHASE-LOCKED LOOP CIRCUITRY WITH MULTIPLE VOLTAGE-CONTROLLED OSCILLATORS - Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements. One or more of the voltage-controlled oscillators may be implemented using a separate integrated circuit connected using through-silicon vias. | 2009-12-24 |
20090315628 | VARIANCE CORRECTION METHOD, PLL CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the voltage controlled oscillator based on an output clock of the voltage controlled oscillator. | 2009-12-24 |
20090315629 | ATOMIC OSCILLATOR - An atomic oscillator includes: a gas cell in which a gaseous metal atom is sealed; heating units heating the gas cell to a predetermined temperature and being a first heater and a second heater; a light source of exciting light exciting the metal atom in the gas cell; a light detecting unit detecting the exciting light which has passed through the gas cell; a substrate including at least a temperature controlling circuit for the heating units; a first heater wiring coupling the first heater and the substrate; a second heater wiring coupling the second heater and the substrate; and a third heater wiring coupling the first heater and the second heater. In the atomic oscillator, the gas cell includes a cylindrical portion; and windows which respectively seal openings at both ends of the cylindrical portion and constitute an incident surface and an emitting surface on an optical path of the exciting light. The first heater and the second heater are respectively formed on the windows at an incident surface side and an emitting surface side and made of transparent heating materials. | 2009-12-24 |
20090315630 | CMOS POWER OSCILLATOR WITH FREQUENCY MODULATION - CMOS power oscillator and a method of frequency modulating a CMOS power oscillator. The oscillator comprises a transformer-based feedback CMOS power oscillator circuit formed on a chip-substrate, the oscillator circuit including a transformer coupled to a transistor; means for modulating the capacitance of the transformer to the chip-substrate for frequency modulating an output of the power oscillator. | 2009-12-24 |
20090315631 | Methods and Apparatus Utilizing Quantum Inductance of Nanoscale Structures - Methods and apparatus utilizing the quantum inductance of one-dimensional (ID) nanoscale structures (e.g., nanowires, carbon nanotubes). In one exemplary circuit implementation, all elements of a high-frequency circuit path are constituted by nanoscale structures without significant intervening structures (e.g., metal contacts) that would introduce undesirable resistance in the high-frequency circuit path. In this manner, the deleterious effects of contact resistance (e.g., metal-to-nanostructure interfaces) on the quality factor associated with the quantum inductance, and ultimately operation of the circuit, may be significantly reduced or avoided. | 2009-12-24 |
20090315632 | Modulation Circuit, Modulation Method, Program and Communication Apparatus - There is provided a modulation circuit including a sampling unit that over-samples an input digital signal based on a multiplying clock signal, and outputs a first over-sampling signal, a first frequency conversion unit that outputs a first high-frequency signal based on the first over-sampling signal and a reference signal, a first filter unit that outputs a second high-frequency signal based on a second over-sampling signal obtained by delaying the first over-sampling signal by one clock and the reference signal, a second filter unit that outputs a third high-frequency signal based on a third over-sampling signal obtained by delaying the second over-sampling signal by one clock and the reference signal, and an adder unit that adds the first high-frequency signal, the second high-frequency signal, and the third high-frequency signal, and outputs an output signal. | 2009-12-24 |
20090315633 | Design Structure, Structure and Method for Providing an On-Chip Variable Delay Transmission Line With Fixed Characteristic Impedance - A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance. | 2009-12-24 |
20090315634 | EMULATION OF ANISOTROPIC MEDIA IN TRANSMISSION LINE - In one exemplary embodiment, a transmission line geometry or structure may readily be realized as periodic printed coupled/uncoupled microstrip lines on dielectric and/or suitable biased ferromagnetic substrates. An example of a transmission line geometry or structure may be adapted to emulate extraordinary propagation modes within bulk periodic assemblies of anisotropic dielectric and magnetic materials. For instance, wave propagation in anisotropic media may be emulated by using a pair of coupled transmission lines ( | 2009-12-24 |
20090315635 | TRANSMISSION CIRCUIT - A transmission circuit includes a plurality of transmission lines connected in a ring to propagate signals among a plurality of devices. The plurality of transmission lines have a predetermined same propagation delay, and a predetermined transmission line impedance, and the predetermined transmission line impedance is a half or less of an output impedance of each of the plurality of devices. When a signal outputted from a first optional one of the plurality of devices is propagated to the plurality of devices other than the first optional device, the signal outputted from the first optional device exceeds a predetermined threshold of a signal voltage at a same time. | 2009-12-24 |
20090315636 | BALANCED-TO-UNBALANCED TRANSFORMER AND AMPLIFIER CIRCUIT MODULE - A balanced-to-unbalanced transformer includes a +90° phase shift circuit, which is disposed between a branch point connected to an unbalanced terminal and a first terminal, and a −90° phase shift circuit, which is disposed between the branch point and a second terminal. A first inductor is connected between the first terminal and a power supply terminal, and a second inductor is connected between the branch point and the power supply terminal. A power-supply-terminal-side capacitor is connected in shunt between the power supply terminal and a ground. A second-terminal-side series inductor is connected in series between the branch point and the second terminal. | 2009-12-24 |
20090315637 | METHOD AND SYSTEM FOR COMMUNICATING VIA FLIP-CHIP DIE AND PACKAGE WAVEGUIDES - Methods and systems for communicating via flip-chip die and package waveguides are disclosed and may include communicating one or more signals between sections of an integrated circuit via one or more waveguides integrated in a multi-layer package. The integrated circuit may be bonded to the multi-layer package. The waveguides may be configured via switches in the integrated circuit or by MEMS switches integrated in the multi-layer package. The signals may include a microwave signal and a low frequency control signal that may configure the microwave signal. The low frequency control signal may include a digital signal. The waveguides may comprise metal and/or semiconductor layers deposited on and/or embedded within the multi-layer package. | 2009-12-24 |
20090315638 | MILLIMETER WAVE LOW-LOSS HIGH-ISOLATION SWITCH - A switch for selectively providing an input signal to an output terminal. The switch includes a first waveguide terminal, a second waveguide terminal, a reduced-width waveguide connecting the first waveguide terminal to the second waveguide terminal, and at least one switching element spanning the reduced-width waveguide between the first and second waveguide terminals. The reduced-width waveguide is configured to pass a signal from the first waveguide terminal to the second waveguide terminal when the at least one switching element is in a first state and block a signal when the at least one switching element is in a second state. In some embodiments, the switch also includes at least one additional waveguide terminal and the reduced-width waveguide also connects the first waveguide terminal to the at least one additional waveguide terminal. | 2009-12-24 |
20090315639 | DPDT RF Switch and TMA Using the Same - Disclosed is a DPDT RF switch. The DPDT RF switch includes: first to fourth transmission lines for forming first to fourth ports, respectively; and first to fourth slot line pattern sections. The first slot line pattern section includes: a first slot line; and a first switching device for blocking signal transfer by short-circuiting a gap of a slot line. The third slot line pattern section includes: a third slot line; and a third switching device for blocking signal transfer by short-circuiting a gap of a slot line. The second slot line pattern section includes: a first loop-shaped slot line; a second slot line; and a second switching device for blocking signal transfer by short-circuiting a gap of a slot line. The fourth slot line pattern section includes: a second loop-shaped slot line; a fourth slot line; and a fourth switching device for blocking signal transfer by short-circuiting a gap of a slot line. | 2009-12-24 |
20090315640 | DUPLEXER - A duplexer includes a transmitting filter including serial resonators and parallel resonators connected in a ladder configuration, and a receiving filter. A resonator of the serial resonators and the parallel resonators in the transmitting filter that is arranged closest to a common terminal of the transmitting filter and the transmitting filter includes a surface acoustic wave resonator, and at least one resonator excluding the resonator that is arranged closest to the common terminal includes a film bulk acoustic wave resonator. | 2009-12-24 |