51st week of 2008 patent applcation highlights part 13 |
Patent application number | Title | Published |
20080308753 | FLEXIBLE INFRARED DELIVERY APPARATUS AND METHOD - A flexible infrared delivery apparatus useful for endoscopic infrared coagulating of human or animal blood and tissue or for other uses employs a source of infrared radiation which is not a laser and an elongated flexible fiber optic member which transmits radiation from the source to a contact portion at a distal end of the member and to a material such as human or animal tissue proximate the contact portion. The elongated member has an outer diameter which enables it to be inserted into and through an accessory channel of an endoscope to view the human or animal tissue or material to be treated with infrared radiation. A connector on the proximal end of the member allows the elongated member to be quickly connected to and disconnected from the apparatus where the member is aligned for receiving infrared radiation from the source. The contact portion defines a size, direction and shape of a radiation delivery area from the member to the human or animal tissue or material proximate the contact portion. | 2008-12-18 |
20080308754 | Multi-Layered Radiation Protection Wall and Radiation Protection Chamber - The invention relates to a multi-layered radiation protection wall for shielding against the gamma and/or the particle radiation of a reaction site on an accelerator facility, wherein the radiation protection wall comprises a sandwich-like structure with at least a first and a second layer arrangement, wherein the first layer arrangement has at least a primary shielding layer and the second layer arrangement has at least a secondary shielding layer. | 2008-12-18 |
20080308755 | Mechanical joint having optical interconnection - A mechanical joint having at least first and second joint elements arranged in contact with each other. A first surface of the first joint element abuts a second surface of the second joint element and is at least partially provided with at least one optically emitting module. The respective abutting second surface of the second element is provided, at least in part, with at least one optically receiving module. | 2008-12-18 |
20080308756 | ELECTROMAGNETIC VALVE - A circular cap is slidably fitted upon an outer periphery of a tip end portion of a movable core. The movable core is biased in a direction to separate from a fixed core by means of a return spring via the cap. A tip end of a pushrod extending from a holding member for holding a valve element is allowed to be in contact with a tip end of the cap. A biasing force of the return spring is applied from the cap to the valve element via the pushrod when the movable core is separated from the fixed core by means of the return spring by demagnetization of an exciting coil, and the valve element is allowed to be in contact with a valve seat. | 2008-12-18 |
20080308757 | SOLENOID VALVE - In a solenoid valve including a cylindrical sleeve which is formed with an input port, an output port, a drain port and a feedback port, and a spool which is inserted into the sleeve and which is formed with a plurality of lands for closing the individual ports, and a communication portion for communicating the individual ports; an input notch is formed in an end edge of the land located near the input port, while a drain notch is formed in an end edge of the land located near the drain port, and an axial height Hin of the input notch and an axial height Hdr of the drain notch are set so that the proportion α (=Hin/(Hin+Hdr)) of the height Hin to the sum of the heights Hin and Hdr may fall within a range of at least 0.72 (preferably, 0.85) and less than 1.0. | 2008-12-18 |
20080308758 | SOLENOID VALVE - A movable iron core unit includes a movable iron core, which is attracted toward a fixed iron core under excitation of a coil, and a guide member made from a resin material and mounted on an outer circumferential side of the movable iron core. The guide member is constructed from a pair of ring members and connecting members that interconnect the ring members. The ring members and the connecting members are mounted in mounting grooves, which are formed on an outer circumferential surface of the movable iron core, and project only slightly from the outer circumferential surface. | 2008-12-18 |
20080308759 | SOLENOID VALVE ASSEMBLY - A socket housing formed on the side of a solenoid valve body includes a socket thereinside connected with a coil of a solenoid operation section. A power feeding terminal box for holding a pin-shaped power feeding terminal connected with a power feeding line is housed in a terminal cover. Installation of the terminal cover on the side of the solenoid valve body causes the power feeding terminal to be electrically connected with the socket and at the same time the power feeding terminal box to be locked into a locking stopper formed inside the terminal cover, thereby allowing the terminal cover to be locked and held in place. | 2008-12-18 |
20080308760 | SOLENOID VALVE - A solenoid valve that is constructed as follows: a cap is mounted on a movable iron core such that forward movement thereof is restricted; a pressing member is displaceably arranged between abutting seat surfaces of the cap and the movable iron core; biasing forces F | 2008-12-18 |
20080308761 | TWO-PORT SOLENOID VALVE - A first cap is mounted at a movable iron core, a second cap holding a valve member is fitted to the first cap, capable of displacement, an biasing force F | 2008-12-18 |
20080308762 | PIEZOELECTRIC LAMINATE, SURFACE ACOUSTIC WAVE DEVICE, THIN-FILM PIEZOELECTRIC RESONATOR, AND PIEZOELECTRIC ACTUATOR - A piezoelectric laminate including a base and a first piezoelectric layer formed above the base and including potassium sodium niobate. The first piezoelectric layer is shown by a compositional formula (K | 2008-12-18 |
20080308763 | AZEOTROPE-LIKE COMPOSITIONS OF TETRAFLUOROPROPENE AND HYDROFLUOROCARBONS - Provided are azeotrope-like compositions comprising tetrafluoropropene and hydrofluorocarbons and uses thereof, including use in refrigerant compositions, refrigeration systems, blowing agent compositions, and aerosol propellants. | 2008-12-18 |
20080308764 | Leaching resistant pre-wetted deicer composition - A deicer comprises a mixture of a deicing agent, a pre-wetting agent, and a leaching inhibitor. The leaching inhibitor results in decreased liquid migration within and out of a mass of pre-wetted deicer. The deicer can include a deicing salt such as sodium chloride, a pre-wetting agent comprised of magnesium chloride, and a leaching inhibitor such as xanthan gum. The deicer can also include a corrosion inhibitor and/or radiation absorber. | 2008-12-18 |
20080308765 | Process for Preparing Vinyl Carboxylates - The present invention relates to a process for preparing vinyl carboxylates, wherein a carboxylic acid is reacted with an alkyne compound in the presence of a catalyst which is selected from carbonyl complexes, halides and oxides of rhenium, of manganese, of tungsten, of molybdenum, of chromium and of iron and rhenium metal at a temperature of ≦300° C. | 2008-12-18 |
20080308766 | STABILITY IMPROVEMENT OF LIQUID HYPOCHLORITE-CONTAINING WASHING AND CLEANING COMPOSITIONS - The improvement of shelf stability in hypochlorite-containing aqueous liquid washing and/or cleaning agents that contain colored metal pigment is achieved by the use of an alkali iodide and a sterically hindered amine. | 2008-12-18 |
20080308767 | INCREASING THE STABILITY OF LIQUID HYPOCHLORITE-CONTAINING WASHING AND CLEANING COMPOSITIONS - The improvement of shelf stability in hypochlorite-containing aqueous liquid washing and/or cleaning agents that contain colored metal pigment is achieved by the use of a specific aromatic fragrance. | 2008-12-18 |
20080308768 | Liquid Crystalline Medium - The present invention relates to a liquid-crystalline medium based on a mixture of polar compunds having negative dielectric anisotropy (Δε), which is distinguished by the fact that it has a value for the ratio γ | 2008-12-18 |
20080308769 | Method for Simultaneously Producing Hydrogen and Carbon Monoxide - The invention relates to a method for simultaneously producing hydrogen and carbon monoxide consisting in generating a synthesis gas and in processing it by decarbonising and removing water and remaining carbon dioxide by passing said gas through a bed of adsorbents, in separating remaining components by forming at least one H2-rich flow, a CO flow containing at least one type of impurity selected from nitrogen and argon, a methane-rich purge gas flow and a flash gas flow. The inventive method also consists in regenerating the bed of adsorbents by passing a regeneration gas comprising at least one non-zero proportion of the formed H2flow and in recycling at least the purge and flash gases for feeding the synthesis gas generation stage. | 2008-12-18 |
20080308770 | MONO AND BIS-ESTER DERIVATIVES OF PYRIDINIUM AND QUINOLINIUM COMPOUNDS AS ENVIRONMENTALLY FRIENDLY CORROSION INHIBITORS - A quaternary nitrogen-containing corrosion inhibitor of formula | 2008-12-18 |
20080308771 | AREA LICONDUCTIVE POLYMERS HAVING HIGHLY ENHANCED SOLUBILITY IN ORGANIC SOLVENT AND ELECTRICAL CONDUCTIVITY AND SYNTHESIZING PROCESS THEREOFGHT - The present invention relates to a new process of synthesizing conductive polymers from monomers substituted with amine group. The process provides simple synthesizing steps for the conductive polymers without using other additives such as stabilizers or emulsifiers. The conductive polymers synthesized according to the present invention have highly enhanced solubility in common organic solvents and electrical conductivity compared to conventional conductive polymers. Therefore, the conductive polymers synthesized according to the present process can be utilized in applications that require high electrical conductivity, for example an electro-magnetic interference shield or a transparent electrode of thin film, as well as in specific applications such as various conductive films, fibers, polymer blends, battery electrodes or conductive etch mask layers. | 2008-12-18 |
20080308772 | Method of Carbon Nanotube Separation, Dispersion Liquid and Carbon Nanotube Obtained by the Separation Method - A method of realizing selective separation of metallic single-walled carbon nanotubes and semiconducting carbon nanotubes from bundled carbon nanotubes; and obtaining of metallic single-walled carbon nanotubes separated at high purity through the above method. Metallic single-walled carbon nanotubes are dispersed one by one from bundled carbon nanotubes not only by the use of a difference in interaction with amine between metallic single-walled carbon nanotubes and semiconducting carbon nanotubes due to a difference in electrical properties between metallic single-walled carbon nanotubes and semiconducting carbon nanotubes but also by the use of the fact that an amine is an important factor in SWNTs separation. The thus dispersed carbon nanotubes are subjected to centrifugation, thereby attaining separation from non-dispersed semiconducting carbon nanotubes. | 2008-12-18 |
20080308773 | NOVEL COCRYSTALLINE METALLIC COMPOUNDS AND ELECTROCHEMICAL REDOX ACTIVE MATERIAL EMPLOYING THE SAME - The present invention includes an electrochemical redox active material. The electrochemical redox active material includes a cocrystalline metallic compound having a general formula A | 2008-12-18 |
20080308774 | Sputtering Target, Transparent Conductive Film, and Their Manufacturing Method - A sputtering target including indium oxide and tin oxide, the content by percentage of the tin atoms therein being from 3 to 20 atomic % of the total of the indium atoms and the tin atoms, and the maximum grain size of indium oxide crystal in the sputtering target being 5 μm or less. When a transparent conductive film is formed by sputtering, this sputtering target makes it possible to suppress the generation of nodules on the surface of the target and to conduct the sputtering stably. | 2008-12-18 |
20080308775 | Near Infrared Absorbing Fiber and Fiber Article Using Same - An inexpensive fiber that has heat retaining properties, satisfactory weather resistance and heat absorption efficiency, and includes a heat absorbing material having excellent transparency; and a fiber article that uses the fiber. A particle dispersion of Cs | 2008-12-18 |
20080308776 | CHEMILUMINESCENT COMPOSITIONS AND METHODS OF MAKING AND USING THEREOF - Described herein are chemiluminescent compositions that can be applied to a variety of substrates that are generally sensitive to existing chemiluminescent compositions. Methods for producing the chemiluminescent compositions are also provided. | 2008-12-18 |
20080308777 | Modular jack apparatus for lifting floors and other structures - An apparatus which is positionable between a structure to be lifted and an underlying support surface for lifting the structure utilizes a bottom plate and a cap between which a spacer member, such as a piece of tubing, is positionable and a threaded rod which is threadably received by an internally-threaded opening in the cap. By rotating the threaded rod within the cap, the threaded rod moves lengthwise relative to the cap. Therefore, by positioning the apparatus between a structure to be lifted and an underlying support surface and then rotating the threaded rod within the cap, the bottom plate and the threaded rod act between the structure to be lifted and the underlying support surface to lift the structure. | 2008-12-18 |
20080308778 | Storage Apparatus - A storage apparatus is disclosed. The storage apparatus comprises a mounting mechanism, a hoist system and a storage member. The hoist system, which is attached to the mounting mechanism, comprises at least one pulley. A hoist wire is disposed within each of the at least one pulleys. A hoist wire mount receives a first end of each of the hoist wires and also includes a power source. Finally, the storage member is affixed to a second end of each of the hoist wires. | 2008-12-18 |
20080308779 | Resin Guardrail - The present invention relates to a resin guardrail including a post, a plurality of guard plates coupled to the post, and connection members for connecting the guard plates to one another. Each of the guard plates of the guardrail is manufactured through extrusion. The guard plate comprises a hollow base body that takes the shape of a wave in cross section to include a rear ridge protruding rearward and having a flat portion and a front ridge protruding forward. The flat portion of the rear ridge and the front ridge are formed with first and second fastening holes, respectively, and the base body has solid portions for reinforcing regions with the first and second fastening holes formed therein. The guard plate further comprises wavy ribs that are positioned within a hollow portion of the base body to connect upper and lower ends of the base body to each other and have the same sectional shape as the base body; and alternately arranged horizontal ribs for establishing connection between the wavy ribs and between the wavy ribs and inner surfaces of the base body. | 2008-12-18 |
20080308780 | SECURITY FENCE SYSTEM - A security fence system provides one or more lengths of fence and/or one or more gates, at least one of which includes at least one generally horizontal cable, and preferably earth anchors that secure the at least one cable to the ground. The security fence and/or gates preferably include one or more of the following features: little or no concrete; strong and damage-resistant fence panels that allow authorities to see fairly well through the fence; resistance to prying or otherwise tearing the fence panel away from the posts; resistance to vehicles ramming the fence; or manual and/or automatic gates that are resistant to vehicles ramming the gate(s) and that cooperate with the cable system of the preferred fence. Cables approaching the gate, from the fence, may meet and be secured to each other at a location along the gate. Alternatively, automatically-locking gates may include a hook and loop system that engages only when a ramming vehicle pushes and/or bends the gate. The preferred fence and/or gates has some flexibility and bendability, and may be described as catching a ramming vehicle in a net-like system rather than providing a rigid wall that attempts to immediately stop the vehicle; this allows for a much lighter and simple gate than those intended to remain rigid and immovable upon vehicle impact. The preferred fencing and/or gates do not require the large amounts of concrete typically used for anchoring conventional security fences and/or gates, and, therefore, the preferred fencing and/or gates do not require the time-consuming, disruptive, and expensive excavation and concrete work of conventional security installations. | 2008-12-18 |
20080308781 | STRUCTURE AND PROCESS FOR A RESISTIVE MEMORY CELL WITH SEPARATELY PATTERNED ELECTRODES - Methods of making MIM structures and the resultant MIM structures are provided. The method involves forming a top electrode layer over a bottom electrode and an insulator on a substrate and forming a top electrode by removing portions of the top electrode layer. The bottom electrode, insulator, or combination thereof is isolated from the top electrode forming process, thereby mitigating damage to the resultant metal-insulator-metal structure. The resultant MIM structure can be a portion of a resistive memory cell. | 2008-12-18 |
20080308782 | SEMICONDUCTOR MEMORY STRUCTURES - A semiconductor structure includes a transistor over a substrate, the transistor comprising a gate and a contact region, which is adjacent to the gate and within the substrate. A first dielectric layer is over the contact region. A contact structure is within the first dielectric layer and over the contact region. A first electrode and a second electrode are within the first dielectric layer, wherein at least one of the first electrode and the second electrode is over the contact structure. The first electrode and second electrodes may be laterally or vertically separated. A phase change structure is disposed between the first electrode and the second electrode. The phase change structure includes at least one spacer within the first dielectric layer and a phase change material (PCM) layer over the spacer. | 2008-12-18 |
20080308783 | Memory devices and methods of manufacturing the same - Memory devices and methods of manufacturing the same are provided. In a memory device, a memory-switch structure is formed between a first and second electrode. The memory-switch structure includes a memory resistor and a switch structure. The switch structure controls current supplied to the memory resistor. A memory region of the memory resistor and a switch region of the switch structure are different from each other. | 2008-12-18 |
20080308784 | VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME - Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming an ohmic layer on an upper surface of a conductive structure and extending away from the structure along at least a portion of a sidewall of an opening in an insulation layer. An electrode layer is formed on the ohmic layer. A variable resistivity material is formed on the insulation layer and electrically connected to the electrode layer. | 2008-12-18 |
20080308785 | PHASE CHANGE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a phase change memory device and a method for forming the phase change memory device. The method includes forming a phase change material layer by providing reactive radicals to a substrate. The reactive radicals may comprise precursors for a phase change material and nitrogen. | 2008-12-18 |
20080308786 | Manufacturing Method for the Integration of Nanostructures Into Microchips - State-of-the-art synthesis of carbon nanostructures ( | 2008-12-18 |
20080308787 | LIGHT EMITTING DIODE HAVING ACTIVE REGION OF MULTI QUANTUM WELL STRUCTURE - Disclosed is a light emitting diode (LED) having an active region of a multiple quantum well structure in which well layers and barrier layers are alternately laminated between a GaN-based N-type compound semiconductor layer and a GaN-based P-type compound semiconductor layer. The LED includes a middle barrier layer having a bandgap relatively wider than the first barrier layer adjacent to the N-type compound semiconductor layer and the n-th barrier layer adjacent to the P-type compound semiconductor layer. The middle barrier layer is positioned between the first and n-th barrier layers. Accordingly, positions at which electrons and holes are combined in the multiple quantum well structure to emit light can be controlled, and luminous efficiency can be enhanced. Furthermore, an LED is provided with enhanced luminous efficiency using a bandgap engineering or impurity doping technique. | 2008-12-18 |
20080308788 | QUANTUM DOT SEMICONDUCTOR DEVICE - A quantum dot semiconductor device includes an active layer having a plurality of quantum dot layers each including a composite quantum dot formed by stacking a plurality of quantum dots and a side barrier layer formed in contact with a side face of the composite quantum dot. The stack number of the quantum dots and the magnitude of strain of the side barrier layer from which each of the quantum dot layers is formed are set so that a gain spectrum of the active layer has a flat gain bandwidth corresponding to a shift amount of the gain spectrum within a desired operation temperature range. | 2008-12-18 |
20080308789 | Field Effect Transistor and Method of Producing the Same - An object of the present invention is to provide a field effect transistor showing high field-effect mobility and a high ON/OFF ratio, which can be produced simply by using a porphyrin compound with excellent crystallinity and orientation. The field effect transistor according to the present invention transistor contains at least an organic semiconductor layer, wherein the organic semiconductor layer contains at least a porphyrin compound and has a maximum diffraction intensity I | 2008-12-18 |
20080308790 | Organic Siloxane Film, Semiconductor Device Using the Same, Flat Panel Display Device, and Raw Material Liquid - Disclosed is materials design for prolonging the duration of the low relative dielectric constant of an organic siloxane film having a low relative dielectric constant. Specifically, in an organic siloxane film having a relative dielectric constant of not more than 2.1, the elemental ratio of carbon to silicon in the film is set to not less than 0.10 and not more than 0.55. | 2008-12-18 |
20080308791 | ORGANIC FIELD EFFECT TRANSISTOR AND MAKING METHOD - In an organic field effect transistor with an electrical conductor-insulator-semiconductor structure, the semiconductor layer is made of an organic compound, and the insulator layer is made of a polymer obtained through polymerization or copolymerization of 2-cyanoethyl acrylate and/or 2-cyanoethyl methacrylate. | 2008-12-18 |
20080308792 | DISPLAY DEVICE - A single-crystal semiconductor layer which is separated from a single-crystal semiconductor substrate, and bonded to and provided over a supporting substrate is used, whereby a transistor having uniform characteristics can be formed. A reference circuit having a bipolar transistor is provided, whereby temperature dependence of a driving transistor which is driven by supplying current to the light-emitting element of a pixel is compensated. | 2008-12-18 |
20080308793 | Composition and organic insulator prepared using the same - Disclosed are a composition including a silane-based organic/inorganic hybrid material having a multiple bond and one or more organic metal compounds and/or one or more organic polymers, an organic insulator including the composition, an organic thin film transistor (OTFT) including the organic insulator and an electronic device including the OTFT. The organic insulator including the composition for preparing an organic insulator has increased charge mobility and an increased on/off current ratio, thus exhibiting improved properties, and the organic thin film transistor manifests uniform properties due to the absence of hysteresis. | 2008-12-18 |
20080308794 | Light-emitting device, electronic device, and manufacturing method of light-emitting device - The present invention provides a light-emitting element and a light-emitting device which have high contrast, and specifically, provides a light-emitting device whose contrast is enhanced, not by using a polarizing plate but using a conventional electrode material. Reflection of external light is suppressed by provision of a light-absorbing layer included between a non-light-transmitting electrode and a light-emitting layer. As the light-absorbing layer, a layer is used, which is obtained by adding a halogen atom into a layer including an organic compound and a metal oxide. Further, the light-absorbing layer is formed also over a region in which a thin film transistor for driving a light-emitting element is formed, a region in which a wiring is formed, and the like, and thus light is extracted from the side opposite to the region in which the TFT is formed, thereby reducing reflection of external light. | 2008-12-18 |
20080308795 | Thin film transistor array panel and manufacturing method thereof - The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer. | 2008-12-18 |
20080308796 | Semiconductor Device and Manufacturing Method Thereof - An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region. | 2008-12-18 |
20080308797 | Semiconductor Device and Manufacturing Method Thereof - An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region. | 2008-12-18 |
20080308798 | Semiconductor Device - A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and assembly are provided in a first area above a main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, and a plurality of assembly pads which are not used in the probing test are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test being not permitted in the second area. | 2008-12-18 |
20080308799 | WIRING STRUCTURE AND MANUFACTURING METHOD THEREFOR - A wiring structure including a wiring pattern formed in an insulation film on a substrate, a pattern for measurement which is formed in the insulation film on the substrate in a region different from a region where the wiring pattern is formed and is irradiated with measuring light, and a light transmission inhibiting film formed directly below the pattern for measurement, wherein the pattern for measurement is the same pattern as the wiring pattern, and the light transmission inhibiting film is made of a material having light transmissivity that is smaller than light transmissivity of a material of the insulation film forming the pattern for measurement. | 2008-12-18 |
20080308800 | METHOD OF EVALUATING THERMAL STRESS RESISTANCE OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR WAFER HAVING TEST ELEMENT - A thermal stress resistance evaluating method of a semiconductor device includes: forming a test circuit on a corner of each of unit regions arranged on a wafer in an array arrangement; forming a TEG chip by dicing a TEG chip region which is determined by grouping at least two of the unit regions in a predetermined shape; assembling a packaged TEG chip from the TEG chip; and executing a temperature cycling test on the packaged TEG chip by using the test circuit on the TEG chip. According to such a configuration, by adjusting the predetermined shape, the packaged TEG chip of various sizes can be formed in accordance with the design of the product chip size. | 2008-12-18 |
20080308801 | STRUCTURE FOR STOCHASTIC INTEGRATED CIRCUIT PERSONALIZATION - A method of forming a stochastically based integrated circuit encryption structure includes forming a lower conductive layer over a substrate, forming a short prevention layer over the lower conductive layer, forming an intermediate layer over the short prevention layer, wherein the intermediate layer is characterized by randomly structured nanopore features. An upper conductive layer is formed over the random nanopore structured intermediate layer. The upper conductive layer is patterned into an array of individual cells, wherein a measurable electrical parameter of the individual cells has a random distribution from cell to cell with respect to a reference value of the electrical parameter. | 2008-12-18 |
20080308802 | Capacitor-Less Memory - It is an object of the present invention to provide a capacitor-less memory which can prevent a change of a threshold voltage due to flowing out of carriers and improve the memory retention property without a complicated structure. In the capacitor-less memory which uses a transistor, the transistor includes a source region, a drain region, an active layer region which is provided between the source region and the drain region, and a gate electrode which is adjacent to the active layer region with an insulating film interposed therebetween. The source region is formed of a semiconductor having a larger band gap than a band gap of a semiconductor of the active layer region and a band gap of a semiconductor of the drain region, and a heterojunction is formed at the interface between the source region and the active layer region. | 2008-12-18 |
20080308803 | Thin film transistor and display panel having the same - A thin film transistor includes a gate part which includes a gate electrode and a light blocking electrode extending from the gate electrode. The light blocking electrode prevents a light provided from beneath the gate electrode from being guided to a semiconductor layer. The light blocking electrode is overlapped by two source electrodes and a drain electrode arranged between the two source electrodes, all of which have an I-shape. The width of the light blocking electrode is selected so that a parasitic capacitance between a source part and the gate part may be controlled. Thus, a photocurrent of the thin film transistor may be reduced, and a kickback voltage difference between pixels in the display panel may also be reduced. | 2008-12-18 |
20080308804 | Semiconductor Device and Manufacturing Method Thereof - An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region. | 2008-12-18 |
20080308805 | Semiconductor Device and Manufacturing Method Thereof - An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region. | 2008-12-18 |
20080308806 | Semiconductor Device and Manufacturing Method Thereof - An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region. | 2008-12-18 |
20080308807 | Display device and manufacturing method thereof - It is an object to provide a manufacturing method by which display devices can be manufactured in quantity without degrading the characteristics of thin film transistors. In a display device including a thin film transistor in which a microcrystalline semiconductor film, a gate insulating film in contact with the microcrystalline semiconductor film, and a gate electrode overlap with each other, an antioxidant film is formed on a surface of the microcrystalline semiconductor film. The antioxidant film on the surface of the microcrystalline semiconductor film can prevent a surface of a microcrystal grain from being oxidized, thereby preventing the mobility of the thin film transistor from decreasing. | 2008-12-18 |
20080308808 | Thin film transistor array substrate and method for fabricating same - An exemplary TFT array substrate includes an insulating substrate, a gate electrode provided on the insulating substrate, a gate insulating layer covering the gate electrode and the insulating layer, an amorphous silicon (a-Si) pattern formed on the gate insulating layer, a heavily doped a-Si pattern formed on the a-Si pattern, a source electrode formed on the gate insulating layer and the heavily doped a-Si pattern and a drain electrode formed on the gate insulating layer and the heavily doped a-Si pattern. The source electrode and the drain electrode are isolated by a slit formed between the source electrode and the drain electrode, and the a-Si pattern includes a high resistivity portion corresponding to the slit whose resistance is higher than a resistance of the a-Si material. | 2008-12-18 |
20080308809 | THIN FILM TRANSISTOR, METHOD OF FABRICATING THE THIN FILM TRANSISTOR, AND DISPLAY DEVICE INCLUDING THE THIN FILM TRANSISTOR - A thin film transistor (TFT), a method of fabricating the TFT, and a display device including the TFT are provided. The TFT includes a semiconductor layer having a channel region and source and drain regions is crystallized using a crystallization-inducing metal. The crystallization-inducing metal is gettered by either a metal other than the crystallization-inducing metal or a metal silicide of a metal other than the crystallization-inducing metal. A length and width of the channel region of the semiconductor layer and a leakage current of the semiconductor layer satisfy the following equation: Ioff/W=3.4E-15 L | 2008-12-18 |
20080308810 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - The invention relates to a semiconductor device and a method for manufacturing the semiconductor device, which includes: an insulating film over a substrate; a first pixel electrode embedded in the insulating film; an island-shaped single-crystal semiconductor layer over the insulating film; a gate insulating film and a gate electrode; an interlayer insulating film which covers the island-shaped single-crystal semiconductor layer and the gate electrode; a wiring which electrically connects a high-concentration impurity region and the first pixel electrode to each other; a partition which covers the interlayer insulating film, the island-shaped single-crystal semiconductor layer, and the gate electrode and has an opening in a region over the first pixel electrode; a light-emitting layer formed in a region which is over the pixel electrode and surrounded by the partition; and a second pixel electrode electrically connected to the light-emitting layer. A surface of the first pixel electrode, which is in contact with the light-emitting layer, is flat, and a surface where the insulating film is in contact with the island-shaped single-crystal semiconductor layer roughly coincides with a surface where the first pixel electrode is in contact with the light-emitting layer. | 2008-12-18 |
20080308811 | Display device - The present invention provides a display device having thin film transistors which can reduce an OFF current in spite of the extremely simple constitution. In the display device having thin film transistors on a substrate, each thin film transistor includes a gate electrode which is connected with a gate signal line, a semiconductor layer which is formed astride the gate electrode by way of an insulation film, a drain electrode which is connected with a drain signal line and is formed on the semiconductor layer, and a source electrode which is formed on the semiconductor layer in a state that the source electrode faces the drain electrode in an opposed manner, and a side of the drain electrode which faces the source electrode does not overlap the gate electrode as viewed in a plan view, and a side of the source electrode which faces the drain electrode does not overlap the gate electrode as viewed in a plan view. | 2008-12-18 |
20080308812 | Ga-Containing Nitride Semiconductor Single Crystal, Production Method Thereof, and Substrate and Device Using the Crystal - A Ga-containing nitride semiconductor single crystal characterized in that (a) the maximum reflectance measured by irradiating the Ga-containing nitride semiconductor single crystal with light at a wavelength of 450 nm is 20% or less and the difference between the maximum reflectance and the minimum reflectance is within 10%, (b) the ratio of maximum value to minimum value (maximum value/minimum value) of the dislocation density measured by a cathode luminescence method is 10 or less, and/or (c) the lifetime measured by a time-resolved photoluminescence method is 95 ps or more. | 2008-12-18 |
20080308813 | HIGH BREAKDOWN ENHANCEMENT MODE GALLIUM NITRIDE BASED HIGH ELECTRON MOBILITY TRANSISTORS WITH INTEGRATED SLANT FIELD PLATE - High breakdown enhancement mode gallium nitride (GaN) based high electron mobility transistors (HEMTs) with integrated slant field plates. These HEMTs have an epilayer structure comprised of AlGaN/GaN buffer. Before the formation of the gate electrode, a passivation layer is deposited, and then the opening for the gate is patterned. The passivation layer below the gate is etched using an etch condition that creates a slanted sidewalls. Then, the charge below the channel is removed either by Fluorine-based plasma treatment and/or by a recess etch. The gate metal is deposited with an angled rotation to form a gate structure with an inherent field plate with rounded edges. | 2008-12-18 |
20080308814 | GALLIUM NITRIDE SUBSTRATE AND GALLIUM NITRIDE LAYER FORMATION METHOD - There is disclosed a method for forming a gallium nitride layer of which resistivity is 1×10 | 2008-12-18 |
20080308815 | GaN Substrate, Substrate with an Epitaxial Layer, Semiconductor Device, and GaN Substrate Manufacturing Method - Affords a GaN substrate from which enhanced-emission-efficiency light-emitting and like semiconductor devices can be produced, an epi-substrate in which an epitaxial layer has been formed on the GaN substrate principal surface, a semiconductor device, and a method of manufacturing the GaN substrate. The GaN substrate is a substrate having a principal surface with respect to whose normal vector the [0001] plane orientation is inclined in two different off-axis directions. | 2008-12-18 |
20080308816 | TRANSISTORS FOR REPLACING METAL-OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTORS IN NANOELECTRONICS - Junction field effect transistors (JFETs) are shown to be a viable replacement for metal oxide semiconductor field effect transistors (MOSFETs) for gate lengths of less than about 40 nm, providing an alternative to the gate leakage problems presented by scaled down MOSFETs. Integrated circuit designs can have complementary JFET (CJFET) logic cells substituted for existing MOSFET-based logic cells to produce revised integrated circuit designs. Integrated circuits can include JFETS where the channel comprises a wide bandgap semiconductor material and the gate comprises a narrow bandgap semiconductor material. Mixtures of JFET and MOSFET transistors can be included on an integrated circuit design. | 2008-12-18 |
20080308817 | Galvanic Isolator Having Improved High Voltage Common Mode Transient Immunity - A galvanic isolator having a transmitter die, a receiver die, and a lead frame is disclosed. The transmitter die includes an LED having first and second contacts for powering the LED, and the receiver die includes a photodetector. The lead frame includes first and second transmitter leads, and first and second receiver leads. The transmitter die is bonded to the first lead, the first contact being connected electrically to the first transmitter lead and the second contact being connected to the second transmitter lead. The receiver die is connected to the first and second receiver leads. The LED and the photodetector are positioned such that light generated by the LED is received by the photodetector. The first and second transmitter leads are capacitively coupled to the first receiver lead. The capacitive couplings are characterized by first and second capacitance values that are substantially the same. | 2008-12-18 |
20080308818 | Light-emitting device - A light-emitting device includes an LED chip emitting a primary light, and a phosphor deposited on the LED chip for absorbing the primary light to excite a secondary light, wherein the wavelength of the primary light is shorter than 430 nm and the LED chip is driven by current density greater than 200 mA/cm | 2008-12-18 |
20080308819 | Light-Emitting Diode Arrays and Methods of Manufacture - Light-emitting diode arrays, methods of manufacture and displays devices are provided. A representative display device includes: a single LED element type having a single type of semiconductor stack; wherein color layers are located on a light output side of the semiconductor stack, and each color layer is arranged to convert radiation emitted by the single type semiconductor stack into radiation in either a red, a green or a blue portion of the electromagnetic spectrum in dependence on a position of the LED element within the display device. | 2008-12-18 |
20080308820 | Light-Emitting Diode Arrays and Methods of Manufacture - A representative LED array includes: a base substrate (BS) and a plurality of light emitting diodes, each of the light emitting diodes comprising a stack of a first contact layer, a semiconductor stack and a second contact layer, the semiconductor stack being on top of the first contact layer, the second contact layer being on top of the semiconductor stack; the plurality of light emitting diodes being arranged in pixel matrix on the base substrate as LEDs of at least three types (R, G, B); the LEDs according to their type (R, G, B) being arranged as at least a first, second and third sub-pixel in the pixel matrix for emission of radiation of a respective specific at least first, second and third color; and interconnection circuitry on the substrate, operative to connect to the light emitting diodes of the array for addressing each of the light emitting diodes. | 2008-12-18 |
20080308821 | DIELECTRIC LAYER AND THIN FILM TRANSISTOR - A dielectric layer including a film with silicon compound contain oxygen and a film with silicon compound contain nitrogen is provided. A ratio of Si—N group absorption intensity to a thickness of the film with silicon compound contain nitrogen in an FTIR spectrum is substantially greater than or substantially equal to 0.67/μm. The dielectric layer can be incorporated in switch devices. | 2008-12-18 |
20080308822 | PACKAGE STRUCTURE OF LIGHT EMITTING DIODE FOR BACKLIGHT - A package structure of a light emitting diode for a backlight comprises a long-wavelength LED die and a short-wavelength LED die. The lights emitted from the two LED dies are mixed with the light emitted from excited fluorescent powders for serving as the backlight of a liquid crystal display. A partition plate is disposed between the two LED dies for separating them from each other. The effective light output of the package structure is increased because each of the two LED dies cannot absorb the light from the other. | 2008-12-18 |
20080308823 | OVERVOLTAGE-PROTECTED LIGHT-EMITTING SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATION - A light-generating semiconductor region is grown by epitaxy on a silicon substrate. The light-generating semiconductor region is a lamination of layers of semiconducting nitrides containing a Group III element or elements. The silicon substrate has a p-type impurity-diffused layer formed therein by thermal diffusion of the Group III element or elements from the light-generating semiconductor region as a secondary product of the epitaxial growth of this region on the substrate. The p-type impurity-diffused layer is utilized as a part of overvoltage protector diodes which are serially interconnected with each other and in parallel with the LED section of the device between a pair of electrodes. | 2008-12-18 |
20080308824 | Thin Flash or Video Recording Light Using Low Profile Side Emitting LED - Very thin flash modules for cameras are described that do not appear as a point source of light to the illuminated subject. Therefore, the flash is less objectionable to the subject. In one embodiment, the light emitting surface area is about 5 mm×10 mm. Low profile, side-emitting LEDs optically coupled to solid light guides enable the flash module to be thinner than 2 mm. The flash module may also be continuously energized for video recording. The module is particularly useful for cell phone cameras and other thin cameras. | 2008-12-18 |
20080308825 | Encapsulant with scatterer to tailor spatial emission pattern and color uniformity in light emitting diodes - A light emitting device having an encapsulant with scattering features to tailor the spatial emission pattern and color temperature uniformity of the output profile. The encapsulant is formed with materials having light scattering properties. The concentration of these light scatterers is varied spatially within the encapsulant and/or on the surface of the encapsulant. The regions having a high density of scatterers are arranged in the encapsulant to interact with light entering the encapsulant over a desired range of source emission angles. By increasing the probability that light from a particular range of emission angles will experience at least one scattering event, both the intensity and color temperature profiles of the output light beam can be tuned. | 2008-12-18 |
20080308826 | THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE - A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced. | 2008-12-18 |
20080308827 | PROCESS FOR PREPARING A BONDING TYPE SEMICONDUCTOR SUBSTRATE - The process comprises a step of growing epitaxially mixed crystals of a compound semiconductor represented by the composition formula In | 2008-12-18 |
20080308828 | Phosphor-containing adhesive silicone composition, composition sheet formed of the composition, and method of producing light emitting device using the sheet - An addition curable adhesive silicone composition containing a phosphor dispersed uniformly therein is provided. The dispersive state of the phosphor remains stable over time. The composition, in an uncured state at room temperature, is either a solid or a semisolid, and is therefore easy to handle, and is suited to an adhesive silicone composition sheet which is able to be formed easily on an LED chip using a conventional assembly apparatus. | 2008-12-18 |
20080308829 | VERTICAL LED WITH CURRENT GUIDING STRUCTURE - Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided. | 2008-12-18 |
20080308830 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode. | 2008-12-18 |
20080308831 | SEMICONDUCTOR STRUCTURE INCLUDING MIXED RARE EARTH OXIDE FORMED ON SILICON - A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon. | 2008-12-18 |
20080308832 | Light-emitting device - A light-emitting device comprises a semiconductor light-emitting stack; and an optical field tuning layer formed on the semiconductor light-emitting stack to change beam angles of the light-emitting device. | 2008-12-18 |
20080308833 | Group III nitride-based compound semiconductor light-emitting device - The refractive index of a titanium oxide layer is modified by adding an impurity (e.g., niobium (Nb)) thereto within a range where good electrical conductivity is obtained. The Group III nitride-based compound semiconductor light-emitting device of the invention includes a sapphire substrate, an aluminum nitride (AlN) buffer layer, an n-contact layer, an n-cladding layer, a multiple quantum well layer (emission wavelength: 470 nm), a p-cladding layer, and a p-contact layer. On the p-contact layer is provided a transparent electrode made of niobium titanium oxide and having an embossment. An electrode is provided on the n-contact layer. An electrode pad is provided on a portion of the transparent electrode. Since the transparent electrode is formed from titanium oxide containing 3% niobium, the refractive index with respect to light (wavelength: 470 nm) becomes almost equal to that of the p-contact layer. Thus, the total reflection at the interface between the p-contact layer and the transparent electrode can be avoided to the smallest possible extent. In addition, by virtue of the embossment, light extraction performance is increased by 30%. | 2008-12-18 |
20080308834 | LIGHT-EMITTING DIODE - A light-emitting diode (LED) is provided, wherein the LED comprises an epitaxial structure, a bonding layer and a composite substrate. The composite substrate comprises a patterned substrate having a pattern and a conductive material layer disposed around the patterned substrate. The bonding layer is formed on the composite substrate. The epitaxial structure is formed on the bonding layer. | 2008-12-18 |
20080308835 | SILICON BASED SOLID STATE LIGHTING - A semiconductor device includes a substrate comprising a first surface having a first orientation and a second surface having a second orientation and a plurality of III-V nitride layers on the substrate, wherein the plurality of III-V nitride layers are configured to emit light when an electric current is produced in one or more of the plurality of III-V nitride layers. | 2008-12-18 |
20080308836 | Nitride Semiconductor Device and Method for Growing Nitride Semiconductor Crystal Layer - There are provided a nitride semiconductor device such as a nitride semiconductor light emitting device, a transistor device or the like, obtained by forming a buffer layer of a single crystal of the nitride semiconductor, in which both a-axis and c-axis are aligned, directly on a substrate lattice-mismatched with the nitride semiconductor without forming an amorphous low temperature buffer layer, and growing epitaxially the nitride semiconductor layer on the buffer layer of the single crystal. In this device, a single crystal buffer layer ( | 2008-12-18 |
20080308837 | VERTICAL CURRENT CONTROLLED SILICON ON INSULATOR (SOI) DEVICE SUCH AS A SILICON CONTROLLED RECTIFIER AND METHOD OF FORMING VERTICAL SOI CURRENT CONTROLLED DEVICES - A Silicon on Insulator (SOI) Integrated Circuit (IC) chip with devices such as a vertical Silicon Controlled Rectifier (SCR), vertical bipolar transistors, a vertical capacitor, a resistor and/or a vertical pinch resistor and method of making the device(s). The devices are formed in a seed hole through the SOI surface layer and insulator layer to the substrate. A buried diffusion, e.g., N-type, is formed through the seed hole in the substrate. A doped epitaxial layer is formed on the buried diffusion and may include multiple doped layers, e.g., a P-type layer and an N-type layer. Polysilicon, e.g., P-type, may be formed on the doped epitaxial layer. Contacts to the buried diffusion are formed in a contact liner. | 2008-12-18 |
20080308838 | Power switching transistors - In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode. A first electrical connection ties the gates of the first VJFET, the gates of the second VJFET, and the anode of the JBS diode to a common gate electrode and a second electrical connection ties the source of the first VJFET and the source of the second VJFET to a common source electrode. | 2008-12-18 |
20080308839 | INSULATED GATE BIPOLAR TRANSISTOR - The invention realizes IGBT having an NPT structure which has a smaller variation in switching characteristics and the like and lower on-resistance. In the IGBT of the invention, by setting a ratio of a width of a trench to an interval between the trenches within a range of 1 to 2, electron current density and a conductivity modulation effect are optimized, a breakdown voltage is secured, a variation in characteristics is minimized, and on-resistance is largely reduced. | 2008-12-18 |
20080308840 | PHOTO-FIELD EFFECT TRANSISTOR AND INTEGRATED PHOTODETECTOR USING THE SAME - A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state. | 2008-12-18 |
20080308841 | Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate - A semiconductor substrate ( | 2008-12-18 |
20080308842 | Forming silicides with reduced tailing on silicon germanium and silicon - A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; an epitaxial region having at least a portion in the semiconductor substrate and adjacent to the gate stack, wherein the epitaxial region comprises an impurity of a first conductivity type; a first portion of the semiconductor substrate adjoining the epitaxial region, wherein the first portion of the semiconductor substrate is of the first conductivity type; and a second portion of the semiconductor substrate adjoining the first portion. The second portion of the semiconductor substrate is of a second conductivity type opposite the first conductivity type. A silicide region is formed on the epitaxial region and the first and the second portions of the semiconductor substrate. | 2008-12-18 |
20080308843 | FIELD EFFECT TRANSISTOR HAVING A COMPOSITIONALLY GRADED LAYER - A GaN heterojunction FET has an Al | 2008-12-18 |
20080308844 | Spin Transistor Using Perpendicular Magnetization - A spin transistor useful for device miniaturization and high-density integration is provided. The spin transistor includes: a semiconductor substrate including a channel layer; ferromagnetic source and drain disposed on the semiconductor substrate to be separated from each other and to be magnetized in a direction perpendicular to a surface of the channel layer; a gate formed on the semiconductor substrate between the source and the drain to adjust spins of electrons passing through the channel layer, wherein spin-polarized electrons are injected from the source to the channel layer, and the electrons injected into the channel layer pass though the channel layer and are injected into the drain, and wherein the spins of the electrons passing through the channel layer undergo precession due to a spin-orbit coupling induced magnetic field according to a voltage of the gate. | 2008-12-18 |
20080308845 | Heterogeneous Group IV Semiconductor Substrates - Embodiments of the present invention include heterogeneous substrates, integrated circuits formed on such heterogeneous substrates. The heterogeneous substrates according to certain embodiments of the present invention include a first Group IV semiconductor layer (e.g., silicon), a second Group IV pattern (e.g., a silicon-germanium pattern) that includes a plurality of individual elements on the first Group IV semiconductor layer, and a third Group IV semiconductor layer (e.g., a silicon epitaxial layer) on the second Group IV pattern and on a plurality of exposed portions of the first Group IV semiconductor layer. The second Group IV pattern may be removed in embodiments of the present invention. In these and other embodiments of the present invention, the third Group IV semiconductor layer may be planarized. | 2008-12-18 |
20080308846 | DEVICE AND METHOD FOR DETECTING BIOMOLECULES USING ADSORPTIVE MEDIUM AND FIELD EFFECT TRANSISTOR - A device for detecting biomolecules includes: a semiconductor substrate; a source region and a drain region separately provided at the substrate; a chamber formed at the substrate including a region between the source region and the drain region, the chamber configured to contain a sample including the biomolecules; and an electrode which applies a voltage to the sample in the chamber. The biomolecules are mobile with respect to the electrode and sample. Methods for detecting biomolecules are also disclosed. | 2008-12-18 |
20080308847 | METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE SAME FIN ORIENTATION FOR MULTIPLE GATE MOSFET WITH DSB SUBSTRATE - A method of forming an integrated circuit device that includes a plurality of MuGFETs is disclosed. A PMOS fin of a MuGFET is formed on a substrate. The PMOS fin includes a channel of a first surface of a first crystal orientation. A NMOS fin of another MuGFET is formed on the substrate. The NMOS fin includes a channel on the substrate at one of 0° and 90° to the PMOS fin and includes a second surface of a second crystal orientation. | 2008-12-18 |
20080308848 | SEMICONDUCTOR DEVICE - A semiconductor device according to an aspect of the invention comprises an n-type FinFET which is provided on a semiconductor substrate and which includes a first fin, a first gate electrode crossing a channel region of the first fin via a gate insulating film in three dimensions, and contact regions provided at both end of the first fin, a p-type FinFET which is provided on the semiconductor substrate and which includes a second fin, a second gate electrode crossing a channel region of the second fin via a gate insulating film in three dimensions, and contact regions provided at both end of the second fin, wherein the n- and the p-type FinFET constitute an inverter circuit, and the fin width of the contact region of the p-type FinFET is greater than the fin width of the channel region of the n-type FinFET. | 2008-12-18 |
20080308849 | SEMICONDUCTOR APPARATUS AND COMPLIMENTARY MIS LOGIC CIRCUIT - A configuration is adopted comprising an NchMOS transistor | 2008-12-18 |
20080308850 | TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS - A device includes a first transistor including a fin and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor. In a method, the fin of the first transistor is treated to have a lower charge carrier mobility than the fin of the second transistor. | 2008-12-18 |
20080308851 | Photoelectric conversion element having a semiconductor and semiconductor device using the same - A semiconductor device, particularly, a photoelectric conversion element having a semiconductor layer is demonstrated. The photoelectric conversion element of the present invention comprises, over a substrate, a photoelectric conversion layer and first and second electrodes which are electrically connected to the photoelectric conversion layer. The photoelectric conversion element further comprises a wiring board over which a third and fourth electrodes are provided. The characteristic point of the present invention is that a bonding layer, which readily forms an alloy with a conductive material, is formed over the first and second electrodes. This bonding layer improves the bonding strength between the first and third electrodes and the second and fourth electrode, which contributes to the prevention of the connection defect between the substrate and the wiring board and consequentially to high reliability of the photoelectric conversion element. | 2008-12-18 |
20080308852 | IMAGE SENSOR CIRCUITS INCLUDING SHARED FLOATING DIFFUSION REGIONS - An image sensor can include a plurality of photoelectric conversion elements arranged in a matrix. A plurality of floating diffusion regions can be shared by respective corresponding pairs of adjacent photoelectric conversion elements. A plurality of charge-transmission transistors can respectively correspond to the photoelectric conversion elements, where each of the charge-transmission transistors are connected between a corresponding one of the plurality of photoelectric conversion elements and a corresponding one of the plurality of floating diffusion regions. A plurality of charge-transmission lines can be commonly connected to gates of respective corresponding pairs of adjacent rows of charge-transmission transistors, where each of the respective corresponding pairs of adjacent rows of charge-transmission transistors can be connected to respective ones of the plurality of photoelectric conversion elements in different adjacent rows of floating diffusion regions. | 2008-12-18 |