49th week of 2011 patent applcation highlights part 16 |
Patent application number | Title | Published |
20110298079 | SEMICONDUCTOR ELEMENT AND SOLID-STATE IMAGING DEVICE - A semiconductor element includes: a p-type semiconductor region; an n-type light-receiving surface buried region buried in the semiconductor region; an n-type charge accumulation region buried in the semiconductor region, continuously to the light-receiving surface buried region, establishing a deeper potential well depth than the light-receiving surface buried region; a charge read-out region configured to read out the charges accumulated in the charge accumulation region; an exhaust-drain region buried in the semiconductor region, configured to extract the charges from the light-receiving surface buried region; a first potential controller configured to extract the charges from the light-receiving surface buried region to the exhaust-drain region; and a second potential controller configured to transfer the charges from the charge accumulation region to the charge read-out region. | 2011-12-08 |
20110298080 | METHOD FOR MANUFACTURING THERMOELECTRIC CONVERSION MODULE, AND THERMOELECTRIC CONVERSION MODULE - There is provided a method for manufacturing a thermoelectric conversion module that can yield a thermoelectric conversion module with a high insulating property and high density without requiring positioning of the thermoelectric conversion elements, as well as a thermoelectric conversion module manufactured by the method. The method for manufacturing a thermoelectric conversion module | 2011-12-08 |
20110298081 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, a surface electrode formed on the semiconductor substrate, an ineffective region formed to surround the surface electrode, and an ID-indicating portion made of a different material than the surface electrode and formed on the surface electrode to indicate an ID. The area of the ineffective region is smaller than the area of the surface electrode. | 2011-12-08 |
20110298082 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DRIVING THE SAME - A transistor causes fluctuation in the threshold and mobility due to the factor such as fluctuation of the gate length, the gate width, and the gate insulating film thickness generated by the difference of the manufacturing steps and the substrate to be used. As a result, there is caused fluctuation in the current value supplied to the pixel due to the influence of the characteristic fluctuation of the transistor, resulting in generating streaks in the display image. A light emitting device is provided which reduces influence of characteristics of transistors in a current source circuit constituting a signal line driving circuit until the transistor characteristics do not affect the device and which can display a clear image with no irregularities. A signal line driving circuit of the present invention can prevent streaks in a displayed image and uneven luminance. Also, the present invention makes it possible to form elements of a pixel portion and driving circuit portion from polysilicon on the same substrate integrally. In this way, a display device with reduced size and current consumption is provided as well as electronic equipment using the display device. | 2011-12-08 |
20110298083 | SOI WAFER, METHOD FOR PRODUCING SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An SOI wafer including: a supporting substrate | 2011-12-08 |
20110298084 | METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT - A method for manufacturing a semiconductor element of the present invention, has: a laser irradiation step of focusing a pulsed laser beam inside of a substrate constituting a wafer, thereby forming a plurality of isolated processed portions along an intended dividing line inside of the substrate, and creating a fissure that runs from the processed portions at least to the surface of the substrate and links adjacent processed portions; and a wafer division step of dividing the wafer along the intended dividing line. | 2011-12-08 |
20110298085 | SHALLOW TRENCH ISOLATION AREA HAVING BURIED CAPACITOR - A semiconductor chip includes a substrate including a surface, an active transistor region and a substrate contact region formed on the substrate, a shallow trench isolation (STI) area formed in the surface and disposed at least partially between the active transistor region and the substrate contact region, and at least one capacitor at least partially buried in the STI area. | 2011-12-08 |
20110298086 | Fuse Structures, E-Fuses Comprising Fuse Structures, and Semiconductor Devices Comprising E-Fuses - A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and second electrodes extending in a first direction, and spaced a predetermined distance apart from each other and having one ends thereof facing each other, an insulation layer formed between the one end of the first electrode and the one end of the second electrode facing each other, and a conductive film overlapping portions of the first and second electrodes on the insulation layer and contacting the first electrode and the one end of the second electrode. | 2011-12-08 |
20110298087 | ELECTRICAL FUSE DEVICE BASED ON A PHASE-CHANGE MEMORY ELEMENT AND CORRESPONDING PROGRAMMING METHOD - A fuse device has a fuse element provided with a first terminal and a second terminal and an electrically breakable region, which is arranged between the first terminal and the second terminal and is configured to undergo breaking as a result of the supply of a programming electrical quantity, thus electrically separating the first terminal from the second terminal. The electrically breakable region is of a phase-change material, in particular a chalcogenic material, for example GST. | 2011-12-08 |
20110298088 | Semiconductor Package with Integrated Inductor - A semiconductor package includes a semiconductor chip. An inductor is applied to the semiconductor chip. The inductor has at least one winding. An encapsulation body is formed of an encapsulation material. The encapsulation material contains a magnetic component and fills a space within the winding to form a magnetic winding core. | 2011-12-08 |
20110298089 | TRENCH CAPACITOR AND METHOD OF FABRICATION - An improved trench capacitor and method of fabrication are disclosed. The trench capacitor utilizes a rare-earth oxide layer to reduce depletion effects, thereby improving performance of the trench capacitor. | 2011-12-08 |
20110298090 | Capacitors, Systems, and Methods - Capacitors, systems, and methods are disclosed. In one embodiment, the capacitor includes a first electrode. The capacitor may also include a first insulator layer having a positive VCC adjacent to the first electrode. The capacitor may further include a second insulator layer having a negative VCC adjacent to the first insulator layer. The capacitor may also include a third insulator layer having a positive VCC adjacent to the second insulator layer. The capacitor may also include a second electrode adjacent to the third insulator layer. | 2011-12-08 |
20110298091 | SEMICONDUCTOR DEVICE HAVING CAPACITORS - A capacitor is formed over a semiconductor substrate. The capacitor includes a lower electrode, a capacitor dielectric film and an upper electrode in this order recited, and has an area S equal to or larger than 1000 μm | 2011-12-08 |
20110298092 | DIODES WITH A DOG BONE OR CAP-SHAPED JUNCTION PROFILE TO ENHANCE ESD PERFORMANCE, AND OTHER SUBSTRUCTURES, INTEGRATED CIRCUITS AND PROCESSES OF MANUFACTURE AND TESTING - An integrated circuit structure includes a semiconductor doped area (NWell) having a first conductivity type, and a layer (PSD) that overlies a portion of said doped area (NWell) and has a doping of an opposite second type of conductivity that is opposite from the first conductivity type of said doped area (NWell), and said layer (PSD) having a corner in cross-section, and the doping of said doped area (NWell) forming a junction beneath said layer (PSD) with the doping of said doped area (NWell) diluted in a vicinity below the corner of said layer (PSD). Other integrated circuits, substructures, devices, processes of manufacturing, and processes of testing are also disclosed. | 2011-12-08 |
20110298093 | Thermal Processing of Substrates with Pre- and Post-Spike Temperature Control - Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods. | 2011-12-08 |
20110298094 | EPITAXIAL WAFER AND METHOD OF PRODUCING THE SAME - An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices. | 2011-12-08 |
20110298095 | PASSIVATION LAYER EXTENSION TO CHIP EDGE - Embodiments of the invention provide a semiconductor chip having a passivation layer extending along a surface of a semiconductor substrate to an edge of the semiconductor substrate, and methods for their formation. One aspect of the invention provides a semiconductor chip comprising: a semiconductor substrate; a passivation layer including a photosensitive polyimide disposed along a surface of the semiconductor substrate and extending to at least one edge of the semiconductor substrate; and a channel extending through the passivation layer to the surface of the semiconductor substrate. | 2011-12-08 |
20110298096 | Semiconductor chip - A semiconductor wafer | 2011-12-08 |
20110298097 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device is provided wherein stacked semiconductor substrates are electrically coupled together in a satisfactory state by a conductor buried in the interior of a through hole. A first semiconductor substrate includes a substrate having main surfaces, further includes a semiconductor element formed within and over the substrate, a wiring coupled to the semiconductor element electrically, and a conductive layer formed in the interior of a through hole, the through hole extending through mutually confronting first and second main surfaces as the main surfaces of the substrate and reaching the wiring. The first semiconductor substrate and a second semiconductor substrate are stacked and the conductive layer is coupled to a wiring of the second semiconductor substrate electrically. In a second main surface of the conductive layer, a recess is formed around an end portion of the through hole so that a bottom wall surface of the recess is present in the interior of the substrate. A conductive material which constitutes the conductive layer is filled in the interior of the recess. | 2011-12-08 |
20110298098 | EXPITAXIAL FABRICATION OF FINS FOR FINFET DEVICES - A fin for a finFET is described. The fin is a portion of a layer of material, where, another portion of the layer of material resides on a sidewall. | 2011-12-08 |
20110298099 | SILICON DIOXIDE LAYER DEPOSITED WITH BDEAS - A silicon dioxide layer is deposited onto a substrate using a process gas comprising BDEAS and an oxygen-containing gas such as ozone. The silicon dioxide layer can be part of an etch-resistant stack that includes a resist layer. In another version, the silicon dioxide layer is deposited into through holes to form an oxide liner for through-silicon vias. | 2011-12-08 |
20110298100 | SEMICONDUCTOR DEVICE PRODUCING METHOD AND SEMICONDUCTOR DEVICE - Disclosed are a semiconductor device producing method and a semiconductor device. The semiconductor device producing method is comprised of a step of forming a diffusion suppressing mask composed of at least two of a thick film portion, an opening portion, and a thin film portion, on a surface of a semiconductor substrate; a step of applying dopant diffusing agents containing dopants to the entirety of a surface of the diffusion suppression mask; and a step of diffusing the dopants obtained from the dopant diffusing agents onto the surface of the semiconductor substrate. In the semiconductor device, a high concentration first conductive dopant diffusion layer, a high concentration second conductive dopant diffusion layer, a low concentration first conductive dopant diffusion layer, and a low concentration second conducive dopant diffusion layer are provided on one of the surfaces of the semiconductor substrate. | 2011-12-08 |
20110298101 | Semiconductor Device and Method of Forming EMI Shielding Layer with Conductive Material Around Semiconductor Die - A semiconductor device has a plurality of first semiconductor die mounted over an interface layer formed over a temporary carrier. An encapsulant is deposited over the first die and carrier. A flat shielding layer is formed over the encapsulant. A channel is formed through the shielding layer and encapsulant down to the interface layer. A conductive material is deposited in the channel and electrically connected to the shielding layer. The interface layer and carrier are removed. An interconnect structure is formed over conductive material, encapsulant, and first die. The conductive material is electrically connected through the interconnect structure to a ground point. The conductive material is singulated to separate the first die. A second semiconductor die can be mounted over the first die such that the shielding layer covers the second die and the conductive material surrounds the second die or the first and second die. | 2011-12-08 |
20110298102 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the present invention includes a substrate, which is formed with a ground circuit and mounted with a semiconductor chip on one surface, a conductive ground layer, which is formed on the other surface of the substrate and connected with the ground circuit, a molding, which seals up the ground layer and the substrate having the semiconductor chip mounted thereon, and a conductive shield, which covers the molding and is connected with the ground layer. With a semiconductor package in accordance with an embodiment of the present invention, grounding for shielding is possible even in an entirely molded structure, and a double shielding structure to improve the shielding property. | 2011-12-08 |
20110298103 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the present invention includes a substrate, which has a ground circuit formed thereon, a semiconductor chip, which is mounted on the substrate, a conductive first shield, which is formed on an upper surface of the semiconductor chip and connected with the ground circuit, and a conductive second shield, which covers the substrate and the semiconductor chip and is connected with the first shield. With a semiconductor package in accordance with an embodiment of the present invention, grounding is possible between semiconductor chips because a shield is also formed on an upper surface of the semiconductor chip, and the shielding property can be improved by a double shielding structure. | 2011-12-08 |
20110298104 | Semiconductor Body with a Protective Structure and Method for Manufacturing the Same - A semiconductor body comprises a protective structure. The protective structure ( | 2011-12-08 |
20110298105 | Semiconductor Device and Method of Forming Shielding Layer After Encapsulation and Grounded Through Interconnect Structure - A method of manufacturing a semiconductor device includes providing a substrate having a conductive bump formed over the substrate and a semiconductor die with an active surface oriented to the substrate. An encapsulant is deposited over the semiconductor die and the conductive bump, and the encapsulant is planarized to expose a back surface of the semiconductor die opposite the active surface while leaving the encapsulant covering the conductive bump. A channel is formed into the encapsulant to expose the conductive bump. The channel extends vertically from a surface of the encapsulant down through the encapsulant and into a portion of the conductive bump. The channel extends through the encapsulant horizontally along a length of the semiconductor die. A shielding layer is formed over the encapsulant and the back surface of the semiconductor die. The shielding layer includes a docking pin extending into the channel and into the portion of the conductive bump to electrically connect to the conductive bump and provide isolation from inter-device interference. | 2011-12-08 |
20110298106 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MAGNETIC FILM AND METHOD OF MANUFACTURE THEREOF - An integrated circuit packaging system including: connecting a first integrated circuit device and a package substrate; attaching a support bump to the package substrate; providing a second integrated circuit device having an inner encapsulation; applying a magnetic film on the inner encapsulation of the second integrated circuit device; and mounting the second integrated circuit device over the first integrated circuit device with the magnetic film on the first integrated circuit device and the support bump. | 2011-12-08 |
20110298107 | SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a shielded stacked integrated circuit packaging system includes: forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure. | 2011-12-08 |
20110298108 | NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE GROUND SITES - A non-leaded integrated circuit package system includes: a die paddle of a lead frame; a dual row of terminals including an outer terminal and an inner terminal; and an inner terminal and an adjacent inner terminal to form a fused lead. | 2011-12-08 |
20110298109 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE - A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies extending from the plate. The bodies define a plurality of cavities in the shielding frame. A penetrable material is deposited in the cavities of the shielding frame. The shielding frame is mounted over the semiconductor die such that the penetrable material encapsulates the die. The carrier is removed. An interconnect structure is formed over the die, shielding frame, and penetrable material. The bodies of the shielding frame are electrically connected through the interconnect structure to a ground point. The shielding frame is singulated through the bodies or through the plate and penetrable material to separate the die. TIM is formed over the die adjacent to the plate of the shielding frame. A heat sink is mounted over the plate of the shielding frame. | 2011-12-08 |
20110298110 | Semiconductor Device and Method of Forming Thermally Conductive Layer Between Semiconductor Die and Build-Up Interconnect Structure - A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant. | 2011-12-08 |
20110298111 | SEMICONDUCTOR PACKAGE AND MANUFACTRING METHOD THEREOF - There is provided a semiconductor package capable of protecting a passive element, a semiconductor chip, or the like included in the package from external force and having enhanced Electro Magnetic Interference (EMI) and Electro Magnetic Susceptibility (EMS) characteristics and a manufacturing method thereof. The semiconductor package includes a substrate having at least one cavity formed in a side surface thereof and an electrode provided within the cavity; at least one electronic component mounted on a surface of the substrate; a mold part sealing the electronic component and having insulating properties; and a shield part attached to the mold part to cover an outer surface of the mold part, electrically connected to the electrode provided within the cavity, and having conductive properties. | 2011-12-08 |
20110298112 | SEMICONDUCTOR MODULE AND SEMICONDUCTOR DEVICE - A semiconductor module includes a semiconductor chip, a semiconductor frame, a circuit board, and a screw. The semiconductor frame has a main surface having a concave portion in which the semiconductor chip is mounted. The semiconductor frame is thermally and electrically connected with the semiconductor chip through a die bonding material. The circuit board has a grounding pattern and is arranged above the main surface of the semiconductor frame. The screw electrically connects the main surface of the semiconductor frame and the outer peripheral portion of the concave portion to the grounding pattern of the circuit board and mechanically connects the semiconductor frame to the circuit board. | 2011-12-08 |
20110298113 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INCREASED CONNECTIVITY AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a lead frame having contact pads and connection leads; coupling a base integrated circuit to the contact pads; coupling a chip interconnect between the base integrated circuit, the connection leads, the contact pads, or a combination thereof; molding a package body on the connection leads, the base integrated circuit, and the chip interconnects, including having the contact pads exposed; and forming a bottom surface on the package body including forming the connection leads to be coplanar with the bottom surface. | 2011-12-08 |
20110298114 | STACKED INTERPOSER LEADFRAMES - A stacked leadframe assembly is disclosed. The stacked leadframe assembly includes a first die having a surface that defines a mounting plane, a first leadframe stacked over and attached to the first die, a second die stacked over and attached to the first leadframe; and a second leadframe stacked over and attached to the second die. The leadframes have die paddles with extended side panels that have attachment surfaces in the mounting plane. | 2011-12-08 |
20110298115 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component is configured to permit the determination of circuit parameters. A high side FET has a gate terminal coupled to an output terminal of a high side gate drive circuit, a drain terminal coupled for receiving an input voltage, and a source terminal coupled to the drain terminal of a low side FET. The gate terminal of the low side FET is coupled to the output terminal of low side drive circuit and the source terminal of the low side FET is coupled for receiving a source of operating potential. The high side gate drive circuit has a bias terminal coupled for receiving a floating potential where the bias terminal is electrically isolated or decoupled from the commonly connected source and drain terminals of the high side FET and the low side FET, respectively. | 2011-12-08 |
20110298116 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF - An object of the present invention is to improve the quality control of a semiconductor device. By forming an inscription comprising a culled or pixel skipping pattern of dimples on the upper surface of a die pad in a QFN, it is possible to confirm the inscription by X-ray inspection or the like even after individuation and specify a cavity of a resin molding die. Further, it is possible to specify the position of a device region in a lead frame. As a result, when a defect appears, it is possible to sort a defective QFN by appearance inspection and improve quality control in the assembly of a QFN. | 2011-12-08 |
20110298117 | PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY - Embodiments of the present disclosure provide an electronic package assembly comprising a solder mask layer, the solder mask layer having at least one opening, and a plurality of pads coupled to the solder mask layer, wherein at least one pad of the plurality of pads includes (i) a first side, (ii) a second side, the first side being disposed opposite to the second side, (iii) a terminal portion and (iv) an extended portion, wherein the first side at the terminal portion is configured to receive a package interconnect structure through the at least one opening in the solder mask layer, the package interconnect structure to route electrical signals between a die and another electronic device that is external to the electronic package assembly, and wherein the second side at the extended portion is configured to receive one or more electrical connections from the die. Other embodiments may be described and/or claimed. | 2011-12-08 |
20110298118 | SEMICONDUCTOR DEVICE - A semiconductor device, including: a substrate having an upper face on which a first ground pad, a first power supply pad, a first signal pad, and a second signal pad are formed; a first substrate formed on the substrate and having an upper face on which a third signal pad connected to the first signal pad and a first circuit are formed; and a semiconductor element including a second substrate having a reverse face on which a bump electrode connected to the first circuit and a second circuit are formed and an upper face on which a fourth signal pad connected to the second signal pad is formed, with a signal through via connected to the second circuit and the fourth signal pad being buried in the second substrate. | 2011-12-08 |
20110298119 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system includes: forming a non-inverted internal stacking module including: fabricating an internal stacking module (ISM) substrate having an ISM component side and an ISM coupling side, coupling an internal stacking module integrated circuit to the ISM component side, coupling stacking structures, adjacent to the internal stacking module integrated circuit, on the ISM component side, and molding a stacking module body having a top surface that is coplanar with and exposes the stacking structures; forming a base package substrate under the non-inverted internal stacking module; coupling middle structures between the base package substrate and the ISM coupling side; and forming a base package body on the base package substrate, the middle structures, and the non-inverted internal stacking module including exposing the top surface of the stacking module body to be coplanar with the base package body. | 2011-12-08 |
20110298120 | Apparatus for Thermally Enhanced Semiconductor Package - A semiconductor package includes a semiconductor die having contact pads. An encapsulant is disposed around the semiconductor die, and conductive vias are disposed in the encapsulant. Electrically conductive traces are disposed between the contact pads and conductive vias, a thermally conductive channel is disposed in the encapsulant separate from the conductive vias, and a thermally conductive layer is disposed over an area of heat generation of the semiconductor die. A thermally conductive trace is disposed between the thermally conductive layer and thermally conductive channel. The thermally conductive layer, thermally conductive trace, and thermally conductive channel are electrically isolated from the contact pads of the semiconductor die and the electrically conductive traces. The semiconductor package further comprises broad thermal traces disposed over the encapsulant, and a thermally conductive material interconnecting the broad thermal traces and the thermally conductive layer. | 2011-12-08 |
20110298121 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device according to the present invention includes a heat sink made of Cu and having a thickness of 2 to 3 mm, an insulating substrate bonded on the heat sink with interposition of a first bonding layer (under-substrate solder), and a power semiconductor element mounted on the insulating substrate. In the heat sink, a buffer slot is formed at a periphery of a region bonded to the insulating substrate. | 2011-12-08 |
20110298122 | INTEGRATED CIRCUIT APPARATUS, SYSTEMS, AND METHODS - High density circuit modules are formed by stacking integrated circuit (IC) chips one above another. Unused input/output (I/O) locations on some of the chips can be used to connect other I/O locations, resulting in decreased impedance between the chips. Additional apparatus, systems, and methods are disclosed. | 2011-12-08 |
20110298123 | CU PILLAR BUMP WITH NON-METAL SIDEWALL SPACER AND METAL TOP CAP - A bump has a non-metal sidewall spacer on a lower sidewall portion of Cu pillar, and a metal top cap on a top surface and an upper sidewall portion of the Cu pillar. The metal top cap is formed by an electroless or immersion plating technique after the non-metal sidewall spacer formation. | 2011-12-08 |
20110298124 | Semiconductor Structure - A semiconductor structure is provided. By using a composite bump with replace of a gold bump, the consumption of gold can be reduced and the manufacturing cost can be decreased accordingly. Moreover, by using an encapsulation material formed on a metal layer, the heat transferring efficiency of the semiconductor structure can be improved and the stability thereof can be increased. | 2011-12-08 |
20110298125 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a pillar ball; mounting an interposer having a first functional side and a second functional side over the pillar ball and a semiconductor chip; encapsulating the interposer, the pillar ball, and the semiconductor chip with an encapsulation; forming a via through the first functional side and the second functional side of the interposer, and through the encapsulation to expose a portion of the pillar ball; and filling the via with a pillar post. | 2011-12-08 |
20110298126 | CARRIER-FREE SEMICONDUCTOR PACKAGE AND FABRICATION METHOD - A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality. | 2011-12-08 |
20110298127 | Semiconductor Device - A semiconductor device has a semiconductor substrate which has a plurality of pad electrodes provided on a top surface thereof and has an approximately rectangular shape; a rewiring layer which is provided with a plurality of contact wiring lines connected to the plurality of pad electrodes, is disposed on the semiconductor substrate through an insulating film, and has an approximately rectangular shape; and a plurality of ball electrodes which are provided on the rewiring layer. A plurality of first pad electrodes among the plurality of pad electrodes are arranged on an outer circumference of the semiconductor substrate to be along a first side of the semiconductor substrate, a plurality of first ball electrodes among the plurality of ball electrodes are arranged on an outer circumference of the rewiring layer to be along the first side, and any one of the plurality of first ball electrodes is connected to the first pad electrode positioned below the corresponding ball electrode through the contact wiring lines, and the first pad electrodes are not disposed on the lower side of the first ball electrodes positioned at an end of the first side. | 2011-12-08 |
20110298128 | MULTI-CHIP PACKAGE WITH PILLAR CONNECTION - A semiconductor device has a substrate having a first plurality of substrate bonding pads disposed on a bonding surface thereof. A plurality of semiconductor dice is disposed on the substrate. Each die of the plurality of dice has a first plurality of die bonding pads arranged along at least one first edge thereof. A plurality of bonding pillars extends substantially vertically from the substrate bonding pads. Each bonding pillar electrically connects one of the first plurality of substrate bonding pads to a corresponding one of the first plurality of die bonding pads. A method of assembling a semiconductor device is also described. | 2011-12-08 |
20110298129 | STACKED PACKAGE - A stacked package for an electronic device and a method of manufacturing the stacked package include a first semiconductor package being formed with a first conductive pad and a second conductive pad. A second semiconductor package is formed with a third conductive pad and a fourth conductive pad and is disposed over the first semiconductor package. A first conductive connecting member electrically connects the first conductive pad and the third conductive pad. A second conductive connection member electrically connects the second conductive pad and the fourth conductive pad. | 2011-12-08 |
20110298130 | SEMICONDUCTOR DEVICES WITH THROUGH-SILICON VIAS - Through silicon vias (TSVs) include a first metal plug having a cylindrical shape, passing through a semiconductor substrate, and with an outer peripheral surface surrounded by a first insulating film; an isolated semiconductor substrate in the semiconductor substrate and surrounding a first metal plug surrounded by a first insulating film; and a second metal plug surrounding the isolated semiconductor substrate and being surrounded by a second insulating film. A first bias voltage is applied to the isolated semiconductor substrate so that a depletion layer is formed in the isolated semiconductor substrate from an interface between the isolated semiconductor substrate and the first insulating film. The first bias voltage is different from a second bias voltage applied to the semiconductor substrate, which is a main semiconductor substrate, with a device forming area where transistors constituting circuits are formed. | 2011-12-08 |
20110298131 | Yttrium contacts for germanium semiconductor radiation detectors - A germanium semiconductor radiation detector contact made of yttrium metal. A thin (˜1000 Å) deposited layer of yttrium metal forms a thin hole-barrier and/or electron-barrier contact on both p- and n-type germanium semiconductor radiation detectors. Yttrium contacts provide a sufficiently high hole barrier to prevent measurable contact leakage current below ˜120 K. The yttrium contacts can be conveniently segmented into multiple electrically independent electrodes having inter-electrode resistances greater than 10 GΩ. Germanium semiconductor radiation detector diodes fabricated with yttrium contacts provide good gamma-ray spectroscopy data. | 2011-12-08 |
20110298132 | ULTRA-LOW POWER SWNT INTERCONNECTS FOR SUB-THRESHOLD CIRCUITS - Ultra-low power single metallic single-wall-nano-tube (SWNT) interconnects for sub-threshold circuits are provided. According to some embodiments, an interconnect structure for use in electronic circuits can generally comprise a first substrate, a second substrate, and an interconnect. The first substrate can be spaced apart from the second substrate. The interconnect is preferably a single wall carbon nanotube (SWNT) interconnect. The SWNT interconnect can be disposed between the first and second substrates to electrically connect the substrates. The substrates can form parts of electrical components (e.g., a transistor, processor, memory, filters, etc.) operating in a subthreshold operational state. Other aspects, features, and embodiments are claimed and described. | 2011-12-08 |
20110298133 | SEMICONDUCTOR DEVICE - The reliability of a porous Low-k film is improved. The mean diameter of first pores and second pores in an interlayer insulation film of a second fine layer including a porous Low-k film is set at 1.0 nm or more and less than 1.45 nm. This prevents the formation of a modified layer over the surface of the interlayer insulation film by process damages. Further, the formation of the moisture-containing modified layer is inhibited to prevent oxidation of a barrier film and a main conductor film forming respective wirings. This prevents deterioration of breakdown voltage between respective wirings. This prevents deterioration of the EM lifetime of wirings formed adjacent to the interlayer insulation film and the inter-wiring TDDB lifetime of the wirings. | 2011-12-08 |
20110298134 | THREE DIMENSIONAL INTERCONNECT STRUCTURE AND METHOD THEREOF - A three-dimensional interconnect includes a first substrate bonded to a second substrate, the first substrate including a device layer and a bulk semiconductor layer, a metal pad disposed on the second substrate, an electrically insulating layer disposed between the first and second substrates. The structure has a via-hole extending through the device layer, the bulk semi-conductor layer and the electrically insulating layer to the metal pad on the second substrate. The structure has a dielectric coating on a sidewall of the via-hole, and a plasma-treated region of the metal pad disposed on the second substrate. The structure includes a via metal monolithically extending from the plasma-treated region of the metal pad through the via-hole and electrically interconnecting the device layer of the first substrate to the metal pad of the second substrate. | 2011-12-08 |
20110298135 | INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF - A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material. | 2011-12-08 |
20110298136 | MEMS INTEGRATED CHIP WITH CROSS-AREA INTERCONNECTION - The present invention discloses a MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a conductive layer on the surface of the substrate below the guard ring, or a well in the substrate below the guard ring, as a cross-area interconnection electrically connecting the MEMS device area and the microelectronic device area. | 2011-12-08 |
20110298137 | Semiconductor Device and Method of Forming Sacrificial Adhesive Over Contact Pads of Semiconductor Die - A semiconductor wafer contains a plurality of semiconductor die each having a plurality of contact pads. A sacrificial adhesive is deposited over the contact pads. Alternatively, the sacrificial adhesive is deposited over the carrier. An underfill material can be formed between the contact pads. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is mounted to a temporary carrier such that the sacrificial adhesive is disposed between the contact pads and temporary carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and sacrificial adhesive is removed to leave a via over the contact pads. An interconnect structure is formed over the encapsulant. The interconnect structure includes a conductive layer which extends into the via for electrical connection to the contact pads. The semiconductor die is offset from the interconnect structure by a height of the sacrificial adhesive. | 2011-12-08 |
20110298138 | STANDARD CELL AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - This invention prevents a break in a signal wire disposed between wire ends due to attenuation and improves production yields of devices. In a standard cell, a first signal wire extends in a first direction. Second and third signal wires extend in a second direction substantially perpendicular to the first direction and are facing each other across the first signal wire. The second and third signal wires have the widths larger than the width of the first signal wire. | 2011-12-08 |
20110298139 | Semiconductor Package - The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and a second chip. The substrate has a first surface, a second surface and at least one through hole. The first chip is disposed adjacent to the first surface of the substrate. The first chip includes a first active surface and a plurality of first signal pads. Part of the first active surface is exposed to the through hole. The position of the first signal pads corresponds to the through hole. The second chip is disposed adjacent to the second surface. The second chip includes a second active surface and a plurality of second signal pads. Part of the second active surface is exposed to the through hole. The position of the second signal pads corresponds to the through hole, and the second signal pads are capacitively coupled to the first signal pads of the first chip, so as to provide proximity communication between the first chip and the second chip. Whereby, the strength of the first chip and the second chip is increased after being mounted to the substrate, so the yield of the semiconductor package is increased. | 2011-12-08 |
20110298140 | Component having a through-contact - A method for manufacturing a component having a through-contact includes: providing a substrate; forming an insulating layer on the substrate; structuring the insulating layer, the insulating layer being removed at least in a predetermined trenching area surrounding a selected substrate area; performing an etching process in which the structured insulating layer functions as a mask to remove substrate material in the trenching area and to create a trench structure surrounding the selected substrate area; and forming a metallic layer on the insulating layer, the metallic layer sealing the trench structure. | 2011-12-08 |
20110298141 | DESUPERHEATER SEAT-RING APPARATUS - The present invention relates to an apparatus and method of deploying a desuperheater with a Seat-Ring designed to provide coolant injection at high temperature differential. The present invention's robust design provides for a high level of flexibility that allows operating at high temperature differentials between the coolant and the superheated fluid. The desuperheater Seat-Ring is made as a split hollow ring with a perpendicular slit traversing the ring's circumference. The opened slit design provides a high level of flexibility, which allows the seat ring to sustain severe temperature extremes by reducing thermal stress. The coolant is supplied to the seat ring through a specially designed coolant nipple liner connected to the seat-ring. | 2011-12-08 |
20110298142 | MICRO-BUBBLE GENERATING DEVICE - A micro-bubble generating device is provided which is capable of mixing or dispersing micro-bubbles into a liquid with high stability and has a simple structure that permits reduction of a cost of manufacture. A first member and a first packing are superposed on each other on one side of a gas-permeable film, while a second member and a second packing are superposed on each other on the other side of the gas-permeable film. A pressurized gas delivered via a gas inlet of the first member flows through a fluid passage of the first packing, permeates through the gas-permeable film, and is ejected as micro-bubbles into a liquid flowing through a fluid passage in the form of a narrow shallow strip-like groove provided in the second packing. | 2011-12-08 |
20110298143 | COPOLYCARBONATE AND OPTICAL LENS - A copolycarbonate having a high refractive index, a small birefringence, high processability and excellent transparency and an optical lens formed from the copolycarbonate. | 2011-12-08 |
20110298144 | OPTICAL WAVEGUIDE PRODUCTION METHOD - An optical waveguide production method, employs a light-transmissive mold having higher dimensional accuracy for formation of an over-cladding layer. The mold for the formation of the over-cladding layer is unitarily produced by molding a light-transmissive resin with the use of a mold component having the same shape as the over-cladding layer. A recess formed in the mold by removing the mold component in the production of the mold serves as a cavity for the formation of the over-cladding layer. For the formation of the over-cladding layer, a photosensitive resin for the over-cladding layer is injected into the cavity of the mold, and exposed through the mold to be cured while a core formed in a predetermined pattern on a surface of an under-cladding layer is immersed in the photosensitive resin. | 2011-12-08 |
20110298145 | DEVICE AND METHOD FOR MANUFACTURING PLASTIC CONTAINERS - A device for manufacturing plastic containers, including a clocked preform manufacturing means, a temperature control means for thermal conditioning preforms manufactured in the preform manufacturing means, and a continuously working blow molding machine, where the temperature control means is designed and/or configured such that preforms that have been manufactured in one cycle of the preform manufacturing means can be differently temperature controlled. | 2011-12-08 |
20110298146 | Device and Method for Plasticization Control of Electric Injection Molding Machine - The exact method with small time-lag of detecting screw back pressure for controlling the screw back pressure in the plasticizing process of an electric-motor driven injection molding machine without using a pressure detector has been asked for because the pressure detector is very expensive, necessitates troublesome works for mounting, an electric protection against noise and the works for zero-point and span adjustings and causes a complicate mechanical structure. | 2011-12-08 |
20110298147 | FORMING PLASTIC PANELS - A method of moulding articles from powdered material, comprising the steps of laying down at least two layers of powdered material of different granular fineness which include a heat mouldable material, in an open-topped mould, applying a top closure to the mould, and then heating the mould and the closure to melt and fuse the powdered material. In this way an article such as a building panel can be made to include recycled material, with three layers, including two outer skins of relatively fine-grained material, and an inner core including coarse-grained material such as ground-up waste. | 2011-12-08 |
20110298148 | PRODUCTION METHOD FOR FILAMENT NON-WOVEN FABRIC - A production method for a filament non-woven fabric includes a) obtaining filaments having a crystallization temperature not exceeding 112° C. by melting a resin containing polyethylene sulfide as a main component which is not substantially copolymerized with trichlorobenzene; b) pulling and drawing fiber threads formed by discharging the melted resin from spinning nozzles at a spinning speed of at least 5,000 m/min and less than 6,000 m/min by an ejector disposed such that a distance between a bottom face of the spinning nozzles and a compressed air emission outlet of the ejector is 450-650 mm; c) collecting obtained filaments on a moving net, forming a non-woven web; and d) thermocompression bonding the obtained non-woven web using a heating roller. | 2011-12-08 |
20110298149 | INORGANIC NANOWIRES - An inorganic nanowire having an organic scaffold substantially removed from the inorganic nanowire, the inorganic nanowire consisting essentially of fused inorganic nanoparticles substantially free of the organic scaffold, and methods of making same. For example, a virus-based scaffold for the synthesis of single crystal ZnS, CdS and free-standing L10 CoPt and FePt nanowires can be used, with the means of modifying substrate specificity through standard biological methods. Peptides can be selected through an evolutionary screening process that exhibit control of composition, size, and phase during nanoparticle nucleation have been expressed on the highly ordered filamentous capsid of the M13 bacteriophage. The incorporation of specific, nucleating peptides into the generic scaffold of the M13 coat structure can provide a viable template for the directed synthesis of a variety of materials including semiconducting and magnetic materials. Removal of the viral template via annealing can promote oriented aggregation-based crystal growth, forming individual crystalline nanowires. The unique ability to interchange substrate specific peptides into the linear self-assembled filamentous construct of the M13 virus introduces a material tenability not seen in previous synthetic routes. Therefore, this system provides a genetic tool kit for growing and organizing nanowires from various materials including semiconducting and magnetic materials. | 2011-12-08 |
20110298150 | Insertion Of Metal Wire Elements In Artificial Stone - A method of inserting metal wire elements in an artificial stone is provided. One or more metal wire elements in multiple arrangements are placed on a surface. An uncured artificial stone mix is deposited on the metal wire elements and on the surface. The uncured artificial stone mix is allowed to cure at room temperature or at an elevated temperature and transformed into an artificial stone inserted with the metal wire elements. The artificial stone comprising the inserted metal wire elements is polished thereby generating a flat metal surface that visually implies metal inlay work. The metal wire elements may also be laid or adhered to a release layer deposited on the surface prior to depositing the uncured artificial stone mix. The metal wire used to create the metal wire elements comprises holes for secure anchoring in the artificial stone. The metal wire cross-section may be polygonal or circular. | 2011-12-08 |
20110298151 | APPARATUS AND METHOD FOR THE PRODUCTION OF BI-MATERIAL HOLLOW BODIES BY MEANS OF INJECTION OVERMOLDING - An apparatus and method for the production of bi-material hollow bodies by injection overmolding. The apparatus includes: n base molding cavities or groups of base molding cavities inserted between n+1 overmolding cavities or groups of overmolding cavities or vice versa; and 2n cores or groups of cores which are fixed to a core holder plate mounted such that it can move in a transverse direction on a base plate that is actuated to move in a longitudinal direction in order alternately to insert each core into one of the base molding cavities, so as to mold a first layer, and into one of the overmolding cavities, so as to overmold a second layer. The apparatus also includes an ejecting device for ejecting the finished bi-material hollow bodies and a valve for alternately distributing the molding material to one or the other of the outer cavities. | 2011-12-08 |
20110298152 | Thermoplastic Fiber Material Spun from a Raw Material Containing Polyhydroxyether, Methods for Its Production and Uses for It - The invention describes a new synthetic fiber material of polyhydroxyether, as well as a melt-spinning method for its production. The new material can be used, in particular, for stabilization of the reinforcement fibers of high-performance fiber composite materials before they are embedded in the matrix material. During this usage, the polyhydroxyether fiber material dissolves at a temperature above its glass transition temperature entirely in the matrix material, so that the reinforcement fibers can be arranged largely free of kinking. In addition, it forms cross-links with the matrix material to form a homogeneous matrix and thus does not constitute a disruptive third phase in the composite material. The compatibility of the matrix and reinforcement fiber is also improved. It was possible to improve the bending strength of test slabs by 12% as compared to that of reference slabs with polyester filament. | 2011-12-08 |
20110298153 | GOLF-BALL-COVER CASTING MOLDS WITH SELF-CENTERING MOLD-CAVITY INSERTS - Molds are disclosed for forming golf-ball covers by casting. An exemplary mold includes first and second support members that are placeable in face-to-face opposition to each other. At least one respective mold-cavity insert, defining a respective hemispherical cavity, is mounted to each support member. The mold-cavity insert is floatable in at least three (e.g., x, y, z) degrees of freedom relative to the respective support member. Each mold-cavity insert on the first support member is in face-to-face opposition to a respective mold-cavity insert on the second support member whenever the support members are in face-to-face opposition to each other, such that the respective hemispherical cavities of each opposing pair of inserts form respective spherical ball-cover cavities. A respective z-direction bias is associated with each mold-cavity insert. Also, a respective self-centering device is associated with each opposing pair of inserts. The self-centering device urges movement of at least one mold-cavity insert of the opposing pair in any of at least three degrees of freedom as required to center the mold-cavity inserts of the opposing pair with each other. | 2011-12-08 |
20110298154 | APPARATUSES AND METHOD - An apparatus comprises a conveying device provided with seat elements arranged for receiving objects, the seat elements being movable along a curved path, and a further conveying device provided with a transferring arrangement arranged for delivering the objects to, and/or removing the objects from, the conveying device, wherein the transferring arrangement comprises coupling elements arranged for engaging the seat elements in such a way that the seat elements and the transferring arrangement are maintained mutually coupled along a portion of the curved path. | 2011-12-08 |
20110298155 | Method For Manufacturing Solid Ink Sticks With An Injection Molding Process - A method manufactures solid ink sticks by forming a solid ink paste and injecting the paste into a mold having internal cavities. The solid ink paste can be formed by mixing liquid ink and solid ink in a barrel of an injection molding machine. The liquid ink is formed by melting solid ink particulates in the barrel with a heated conveyor and the solid ink particulates are maintained in a solid phase by cooling a portion of the barrel. Movement produced by the heated conveyor mixes the liquid ink and the solid ink in an area between the cooled portion of the barrel and the heated conveyor. | 2011-12-08 |
20110298156 | METHODS AND SYSTEMS FOR LASER PROCESSING A WORKPIECE USING A PLURALITY OF TAILORED LASER PULSE SHAPES - Tailored laser pulse shapes are used for processing workpieces. Laser dicing of semiconductor device wafers on die-attach film (DAF), for example, may use different tailored laser pulse shapes for scribing device layers down to a semiconductor substrate, dicing the semiconductor substrate, cutting the underlying DAF, and/or post processing of the upper die edges to increase die break strength. Different mono-shape laser pulse trains may be used for respective recipe steps or passes of a laser beam over a scribe line. In another embodiment, scribing a semiconductor device wafer includes only a single pass of a laser beam along a scribe line using a mixed-shape laser pulse train that includes at least two laser pulses that are different than one another. In addition, or in other embodiments, one or more tailored pulse shapes may be selected and provided to the workpiece on-the-fly. The selection may be based on sensor feedback. | 2011-12-08 |
20110298157 | Method of cleaning molds for producing tire profiles - In a method for cleaning profile molds for producing tire profiles on treads of vehicle tires, the profile molds are cleaned in rinsing suds by using ultrasound. The profile molds are moved successively through a pre-cleaning and a primary cleaning chamber between which they are rinsed in a rinsing bath. After cleaning in the primary cleaning chamber, the profile molds are checked with respect to remaining contaminants and valves disposed in air vent openings in the profile molds are inspected and loosened by ultrasound application to ensure their mobility. Subsequently, the profile molds are cleaned again. The invention also relates to an arrangement for carrying out the method. | 2011-12-08 |
20110298158 | Nanolithography process - A method for replicating a pattern, comprising: (a) providing a patterned template comprising a patterned template surface having a plurality of recessed or protruded areas formed therein; (b) contacting a volume of a curable perfluoropolyether composition [composition (C)] with the patterned template surface, the composition C comprising: at least one functional perfluoropolyether compound [compound (E)] which comprises a (per)fluoropolyoxyalkylene chain [chain (R | 2011-12-08 |
20110298159 | IMPRINTING APPARATUS AND IMPRINTING METHOD USING THE SAME - Disclosed is an imprinting apparatus and imprinting method using the same that prevent a process of forming a pattern on a substrate from being affected by flatness of a stage. The imprinting apparatus comprises a chamber unit in which a process of forming a pattern on a substrate is carried out; a stage for supporting the substrate on which a resin layer is formed; an installing member positioned above the stage and having a mold member attached to transform the resin layer so as to form the pattern on the substrate; and a first spraying unit for spraying fluid to separate the substrate supported by the stage from the stage, wherein the installing member moves the mold member in the direction getting near to the substrate separated from the stage so that the mold member and the resin layer are brought into contact with each other. | 2011-12-08 |
20110298160 | METHOD FOR MANUFACTURING RESIN MOLDING AND LASER BEAM IRRADIATION APPARATUS - A method for manufacturing a resin molding can be provided that uses a laser beam. The method can include providing the resin molding including welded portions that can impart high level of adhesion, have excellent appearance and provide very strong bonding strength. The method can also include arranging and pressing a weld region of a light-absorbing resin member and corresponding weld region of a light-transmitting resin member that are opposed to each other, and setting a plurality of irradiation areas in the extending direction of the welded regions. The method can also include arranging a plurality of laser irradiation scanning heads corresponding to the irradiation areas. Here, the irradiation areas can include a single irradiation area which the corresponding scanning head can irradiate with the laser beam and a composite irradiation area which the adjacent scanning heads can irradiate with respective laser beams. The method can further include causing the plurality of laser beams emitted from the scanning heads to repeatedly scan the single irradiation area along a first trajectory in the extending direction of the single irradiation area and part of both the single irradiation area and the composite irradiation area along a second trajectory in the extending direction, so that the entire welded regions are heated and fused to weld the light-transmitting resin member and the light-absorbing resin member. | 2011-12-08 |
20110298161 | METHOD AND DEVICE FOR FORMING CONTAINERS USING A VENTILATED BOXING INSERT - A forming method, in a mold provided with a wall forming a cavity, of a container from a blank, which includes a boxing operation of pushing back the material of the blank by an insert movably mounted with respect to the wall of the mold between a retracted position in which the insert is retracted into the wall, and a deployed position in which the insert protrudes with respect to the wall, in order to form on the container, by pushing back, a hollow reserve projecting toward the interior of the container. Additionally, a local pressurization operation is performed, after formation of the hollow reserve, of injecting a pressurized fluid between the insert and the hollow reserve. | 2011-12-08 |
20110298162 | METHOD AND DEVICE FOR FORMING CONTAINERS WITH COUNTER-PRESSURE - A forming method, in a mold fitted with a wall forming a cavity, of a container from an intermediate container including at least one lateral protrusion projecting toward the exterior of the container. The method includes a boxing operation of pushing the lateral protrusion by an insert movably mounted with respect to the mold between a retracted position in which the insert is retracted into a recess formed in the wall and a deployed position in which the insert protrudes with respect to the wall, in order to form, by overturning, a hollow reserve projecting toward the interior of the container. Also included is an operation to pressurize the intermediate container, including, prior to the boxing operation, injecting a fluid under pressure into the intermediate container; and a local pressurization operation, prior to the boxing operation, of injecting a fluid under pressure into the volume defined in said recess between the lateral protrusion and the insert. | 2011-12-08 |
20110298163 | METHOD AND DEVICE FOR FORMING CONTAINERS WITH LOCALIZED COOLING - A forming method, in a mold fitted with a wall forming a cavity, of a container from an intermediate container including at least one lateral protrusion projecting toward the exterior of the container. The method includes a boxing operation of pushing back the lateral protrusion in order to form, by turning it around an articulation zone, a hollow reserve projecting toward the interior of the container and a local cooling operation, after turning the protrusion over, of sweeping a circulation fluid over the articulation zone. | 2011-12-08 |
20110298164 | SMALL-DIAMETER SPARK PLUG WITH RESISTIVE SEAL - A spark plug ( | 2011-12-08 |
20110298165 | Addition of (A) Blocking Agent(s) in a Ceramic Membrane for Blocking Crystalline Growth of Grains During Atmospheric Sintering - A composite material (M) comprising: at least 75% by volume of a mixed electronic conductor compound oxygen anions O<2->(C1) selected from doped ceramic compounds which, at the temperature of use, are present in the form of a crystalline network having ion oxide lattice vacancies and, more particularly, in the form of a cubic phase, a fluorite phase, a perovskite phase, of the aurivillius variety, a Brown-Millerite phase or a pyrochlore phase; and 0.01%-25% by volume of a compound (C2) which is different from compound (C1), selected from oxide-type ceramic materials, non-oxide type ceramic materials, metals, metal alloys or mixtures of said different types of material; and 0%-2.5% by volume of a compound (C3) produced from at least one chemical reaction represented by the equation: xFC1+yFC2----->zFC3, wherein FC1, FC2 and FC3 represent the raw formulae of compounds (C1), (C2) and (C3) and x, y and z represent rational numbers above or equal to 0. The invention also relates to a method for the preparation and use thereof as mixed conductor material for a membrane catalytic reactor used to synthesize synthetic gas by catalytic oxidation of methane or natural gas and/or as mixed conductor material for a ceramic membrane. | 2011-12-08 |
20110298166 | CABONACEOUS REFRACTORY AND METHOD OF PRODUCTION OF SAME AND ALSO BLAST FURNACE BOTTOM OR SIDE WALLS - The present invention provides a carbonaceous refractory, and a method of production of the same, which prevents a drop in the molten pig iron corrosion resistance, molten pig iron penetration resistance, and other properties of carbonaceous refractories required for blast furnace bottom refractories and, further, raises the mechanical strength of the refractories so as to suppress cracking due to thermal stress, that is, a carbonaceous refractory characterized by comprising a carbonaceous material comprised of one or more of calcined anthracite, calcined coke, natural graphite, or artificial graphite in 60 to 85 mass %, a refractory metal oxide in 5 to 15 mass %, metal silicon in 4 to 15 mass %, and carbon black in 2 to 10 mass % and by being obtained by adding an organic binder to refractory materials made a total 100 mass %, kneading the materials, then molding them and firing them in a nonoxidizing atmosphere. | 2011-12-08 |
20110298167 | Control stick adapted for use in a fly-by-wire flight control system, and linkage for use therein - This invention provides an improvement in a control stick (e.g., joystick, side-stick, etc.) ( | 2011-12-08 |
20110298168 | SUSPENSION STRUT WITH ADJUSTABLE SPRING SUPPORT SYSTEM - In a suspension strut, the spring support system has a transmission system with a gearbox case and a drive gear that is mounted to rotate in the gearbox case. The adjustment nut, with which the prestressing of the spring can be set, is designed as a gear that works together with the drive gear, by which a rotation of the drive gear produces a screwing motion of the adjustment nut on the thread of the cylinder. | 2011-12-08 |
20110298169 | ENDOSCOPE CHANNEL SEPARATOR - A decontamination system including a test fixture configured to engage an endoscope in order to retain the test fixture thereto, wherein the endoscope can comprise a valve chamber and a valve removable from the valve chamber such that the test fixture can be inserted therein. The test fixture can comprise, first, a frame having a first gripping portion and a valve member analogue extending from the frame, and, second, a housing having a second gripping portion movable relative to the frame between a locked position and an unlocked position, wherein the second gripping portion is configured to be moved toward the first gripping portion to position the housing in its unlocked position. The second gripping portion can be configured to be moved away from the first gripping portion to position the housing in its locked position such that the housing can engage a locking feature on the endoscope. | 2011-12-08 |
20110298170 | CUTTING BOARD EXCELLENT IN A DRAINAGE FUNCTION - A cutting board, including retaining holes in a side surface thereof, each retaining hole including a screw hole at an end side of the retaining hole and a first fitting portion at an opening side of the retaining hole; projecting rods inserted into the retaining holes each include a cylindrical second fitting portion and a threaded portion to be screwed onto the screw hole with ends of the second fitting portion projecting from the side surface of the cutting board; a remaining portion of each first fitting portion is fit into the fitting portion of each retaining hole; each projecting rod is pivoted in a forward and reverse direction to allow the threaded portion thereof to move in a left and right direction within the screw hole; the length of each of the projecting portions projecting from the side surface of the cutting board is adjusted to fasten each projecting rod. | 2011-12-08 |
20110298171 | Paper feeder and image forming apparatus - In a paper feeder, a signal switching unit switches a paper present signal output from a paper detector to a paper absent signal indicative of absence of a paper in the second paper cassette if a first paper cassette is pulled out from a specific position. | 2011-12-08 |
20110298172 | DOCUMENT CONVEYOR - A document transporter is provided which has a conveyor | 2011-12-08 |
20110298173 | PAPER TRAY OF PRINTER - A paper tray of printer is provided, which includes a paper tray body, a slide shaft, a first pick arm, a second pick arm and a paper width guide. The first pick arm is fixed on the slide shaft, and the second pick arm is slidely disposed on the slide shaft. The paper width guide is disposed on the paper tray body and is connected to the second pick arm through a linkage device to drive the second pick arm, so that a position of the second pick arm varies along with a position of the paper width guide. Accordingly, an interval between the first pick arm and the second pick arm can be varied along with a size of a paper, so as to avoid paper skew when the paper is fed. | 2011-12-08 |
20110298174 | PAPER TRAY OF PRINTER - A paper tray of printer is provided, which includes a paper tray body, a slide shaft, a first pick arm, a second pick arm and a paper width guide. The first pick arm is fixed on the slide shaft, and the second pick arm is slidely disposed on the slide shaft. The paper width guide is disposed on the paper tray body and is connected to the second pick arm through a linkage device to drive the second pick arm, so that a position of the second pick arm varies along with a position of the paper width guide. Accordingly, an interval between the first pick arm and the second pick arm can be varied along with a size of a paper, so as to avoid paper skew when the paper is fed. | 2011-12-08 |
20110298175 | PAPER FEEDING DEVICE - According to one embodiment, a paper feeding apparatus arranged along the left-right direction on one side of an image forming apparatus and configured to feed stacked sheets one by one in order from a top sheet to the image forming apparatus from a paper feeding side adjacent to the image forming apparatus includes: a base plate; a tray on which plural sheets are stacked; a front-side guide member; a rear-side guide member; a paper-feeding-side guide member; an opened section formed by opening one side opposite to the paper-feeding-side guide member; and an auxiliary front guide member configured to regulate a position on the front end side of the sheets. The auxiliary front guide member has a sheet guiding section configured to come into contact with a corner on the front side of the sheets placed deviating from a proper placing state and guide the corner to the auxiliary guide section. | 2011-12-08 |
20110298176 | TRANSFER DEVICE FOR FLAT SUBSTRATE IN A PACKAGING PRODUCTION MACHINE - A transfer device for one or more flat substrates ( | 2011-12-08 |
20110298177 | Exit Shaft Dampening Device to Improve Print Quality - The present invention includes a damping device for a media feed mechanism for a peripheral device having a media feedpath having a feed shaft and a downstream exit shaft. In one form a damping hub is mounted on said exit shaft, a resilient biasing member extending between the damping hub and the feed shaft to create a damping force on the damping hub. In another embodiment damping is provided by a brake structure engaging said damping hub. In yet another embodiment, a brake structure is pivotably mounted. | 2011-12-08 |
20110298178 | MULTIPLE LABYRINTH GAME - A description is made herein with regard to a game composed of one to up to eight peripheral triangular-shaped playing surfaces referred to as the “small labyrinths”. The peripheral playing surfaces are attached to a central module here referred to as a central hub or the “large labyrinth”. This game that can be played by one person or by teams of players requires the use of an appropriately sized spherical entities that traverse channels engraved into or associated with the small labyrinths and the large labyrinth. The objective of the game is for each player to rapidly direct 4 different spherical projectiles towards a depression in the large labyrinth. The first player to attain this objective is the winner. To initiate play, the spherical entity is placed into the start point of the small labyrinth by each player. The sphere is then directed along a channel towards a maze that terminates in a depression located in the large labyrinth. | 2011-12-08 |