49th week of 2013 patent applcation highlights part 24 |
Patent application number | Title | Published |
20130320972 | MAGNETIC FIELD SENSING DEVICE - The present invention relates to a magnetic field sensing device ( | 2013-12-05 |
20130320973 | METHOD OF ATTENUATION CORRECTION OF POSITRON EMISSION TOMOGRAPHY DATA AND COMBINED POSITRON EMISSION TOMOGRAPHY AND MAGNETIC RESONANCE TOMOGRAPHY SYSTEM - Various embodiments relate to a method of attenuation correction of Positron Emission Tomography (PET) data based on Magnetic Resonance Tomography (MRT) data. A method of at least one embodiment further includes determining further data being indicative of an iterative cycle of a physiological observable of a patient and matching the PET data with the MRT data based on the further data. | 2013-12-05 |
20130320974 | EFFICIENT REDUNDANT HAAR MINIMIZATION FOR PARALLEL MRI RECONSTRUCTION - A method for parallel magnetic resonance imaging (MRI) reconstruction of digital images includes providing a set of acquired k-space MR image data v, a redundant Haar wavelet matrix W satisfying W | 2013-12-05 |
20130320975 | METHOD AND DEVICE FOR DETERMINING A CHANGE OVER TIME IN A BIOMARKER IN A REGION TO BE EXAMINED - A method for determining a change over time in a biomarker in a region to be examined of a patient is provided. The change is determined from magnetic resonance data using a magnetic resonance measuring system with sequences and protocols for measuring the biomarkers by functional resting state connectivity by rsfMRI, perfusion values, magnetic resonance spectra of voxels, or morphometry of organs. A control unit has programs which evaluates the biomarker and a data memory which stores the results of the evaluation and additional data. During a first examination, a quantity result of the biomarkers is determined and stored in the data memory. During a follow-up examination, at least one previous item of the result and additional data from the first examination stored in the data memory are used for determining a quantitative change in the biomarker. | 2013-12-05 |
20130320976 | METHOD AND MAGNETIC RESONANCE SYSTEM TO MEASURE A SODIUM CONTENT IN TISSUE BY MEANS OF A MAGNETIC RESONANCE TECHNIQUE - In a magnetic resonance method and apparatus to measure a sodium content in tissue in a first slice, a determination of a blood volume in blood vessels in the first slice is made, and an MR acquisition sequence to acquire MR data of a sodium-23 magnetization from the first slice is implemented. A signal proportion of the MR data that originates from the sodium-23 magnetization in blood vessels is calculated based on the determined blood volume in tissue. This signal proportion is subtracted from a total signal of the MR data to obtain a corrected signal that is proportional to the sodium content in tissue. The sodium content in tissue is calculated from the corrected signal. | 2013-12-05 |
20130320977 | METHOD AND APPARATUS TO DETERMINE A SUBJECT-SPECIFIC B1 DISTRIBUTION OF AN EXAMINATION SUBJECT IN A MEASUREMENT VOLUME OF A MAGNETIC RESONANCE APPARATUS - In a magnetic resonance method and apparatus to determine a subject-specific B1 distribution of an examination subject in a measurement volume in the magnetic resonance apparatus, a first measurement data set of the examination subject is acquired using a first pulse sequence, a second measurement data set of the examination subject is acquired using a second pulse sequence, and a third measurement data set of the examination subject is acquired using a third pulse sequence. A first phase is determined from the first measurement data set, a second phase from the second measurement data set and a third phase from the third measurement data set. A relevant phase shift is calculated from the first phase, the second phase and the third phase, and the B1 distribution are determined from the calculated relevant phase shift. | 2013-12-05 |
20130320978 | CARDIAC MRI CURVILINEAR TAGGING - A preparation sequencing system and methods are disclosed for generating curvilinear taglines of altered magnetization in an imaging plane of an NMR image. A preparation sequencing module is disclosed for generating a sinusoidal gradient signal simultaneously with a continuous a radio frequency (RF) signal, wherein the sinusoidal gradient signal is shaped to generate a rotating on-resonance excitation plane such that each point in the imaged target volume is on-resonance at least once in a period corresponding to one full rotation of the excitation plane. The on-resonance excitation plane is configured to simultaneously generate a plurality of curvilinear or circular taglines of altered magnetization in the imaging plane. | 2013-12-05 |
20130320979 | MAGNETIC RESONANCE SPECTROSCOPY WITH AUTOMATIC PHASE AND B0 CORRECTION USING INTERLEAVED WATER REFERENCE SCAN - A magnetic resonance (MR) sequence (14) is performed, including: applying a preparatory MR sub-sequence (S prep) providing water signal suppression; performing a magnetic resonance spectroscopy (MRS) sub-sequence (S MRS) after applying the preparatory MR sub-sequence to acquire H MRS data with water signal suppression; and performing an MR reference sub-sequence (S Ref) to acquire MR reference data. The MR reference sub-sequence is performed after the MRS sub-sequence. Phase and B0 correction of the H MRS data with water signal suppression are performed using the MR reference data to generate corrected MRS data. The excitation pulse (g) of the MR reference sub-sequence has a flip angle of less than or equal to o, and more preferably has a flip angle of less than or equal to 3 o. In some embodiments the MR sequence has a total repetition time (TR) of 2000 msec or less. | 2013-12-05 |
20130320980 | PULSE GAP CYCLING FOR IMPROVED SWIFT - A magnetic resonance image is produced by shifting a gap during acquisition of spin data for a specimen. The spin data is generated by a gapped excitation sequence. | 2013-12-05 |
20130320981 | ADAPTABLE SHEET OF COILS - An imaging system is presented. The imaging system includes a cradle, and a first sheet of coils disposed inside of the cradle such that a first end of the first sheet of coils protrudes out of the cradle and a second end of the first sheet of coils is coupled to a structure, wherein a requisite expanse of the first sheet of coils is flexibly pulled out from the cradle by pulling the first end. | 2013-12-05 |
20130320982 | ADAPTABLE SHEET OF COILS - An imaging system is presented. The imaging system includes a storage structure that stores a first sheet of coils inside a cradle, wherein the storage structure includes a plurality of first set of rotatable bodies and a plurality of second set of rotatable bodies, and a plurality of springs that are coupled to one or more of the plurality of second set of rotatable bodies, wherein the first sheet of coils is disposed around the plurality of first set of rotatable bodies, the plurality of second set of rotatable bodies and the plurality of springs, and wherein a first end of the first sheet of coils protrudes out of the cradle. | 2013-12-05 |
20130320983 | Method and Apparatus for Target-Guided Localizing of a Cable Fault - A method and an apparatus provide targeted guidance for a user to locate and trace-out the path of a buried electrical cable, and to locate a cable fault along the cable. A current pulse is applied to the cable, whereby a magnetic field is generated around the cable and an acoustic signal is emitted from the cable fault. The apparatus detects and measures magnetic field information to locate the cable. The apparatus measures a time delay between detecting the magnetic signal and detecting the acoustic signal. By comparing successive time delays at successive measuring positions, a relative proximity to the cable fault is determined. The cable location information and the cable fault distance information are combined to produce a direction indication for the user. Tracing the cable layout and determining the cable fault location can be carried out in a single procedure using a single apparatus. | 2013-12-05 |
20130320984 | TECHNIQUES FOR SURFACE EXPLORATION AND MONITORING - Techniques for surface exploration and monitoring are presented. In representative embodiments, a system is provided that cars perform multiple types of measurements of a surface. For example a single system of survey probes and one or more survey controllers can be used to offer both seismic and electrical measurements. A survey controller can be configured to automatically poll survey probes to obtain identifiers of the probes aid determine a relative order the probes. Survey probes can be configured to; (a) collect signals associated with a surface; (b) digitize the signals to form digital data; and (c) store the digital data for later transmission to the survey controller. Relative positions of survey probes can be automatically determined using a transmitting beacon or other techniques. Survey probes can automatically disconnect from a power conduit while measuring a surface property and operate using an internal source of power when disconnected, to reduce noise. The survey controller can be remotely accessible through a computer network for remote control of the survey probes. | 2013-12-05 |
20130320985 | APPARATUS AND METHOD FOR DIRECTIONAL RESISTIVITY MEASUREMENT WHILE DRILLING USING AN ANTENNA WITH A JOINT-COIL STRUCTURE - An apparatus for making directional resistivity measurements of a subterranean formation includes a resistivity tool with a longitudinal axis and an outer surface, a first antenna deployed below the outer surface and having an axial mode coil for processing an axial electromagnetic wave and a transverse mode coil for processing a transverse electromagnetic wave to form a joint-coil structure, a second antenna deployed below the outer surface and spaced at an axial distance from the first antenna, at least two sets of slots with different orientations formed on the outer surface. A corresponding method for making directional resistivity measurements includes rotating a resistivity tool in a borehole, utilizing a transmitter-receiver antenna group formed in the resistivity tool to process a superimposition of the axial and transverse electromagnetic waves, and computing a resistivity-related measurement from the superimposition of the axial and transverse electromagnetic waves received on the receiver antenna. | 2013-12-05 |
20130320986 | SWITCH FAILURE DIAGNOSIS DEVICE AND ELECTRIC STORAGE APPARATUS - A switch failure diagnosis device for using in a current path between an electric device and an electric storage device includes plural switches, a switch terminal voltage detector, and a controller. The switches are connected parallel to each other in the current path. The switch terminal voltage detector outputs a switch terminal voltage detection signal. The controller is configured to: select the switches at different time in sequence and input an open instruction signal to each switch at the time when the switch is selected; and determine, based on the switch terminal voltage detection signal output while the open instruction signal is given, that at least one of the switches has a failure if the detected voltage is in a failure determination range. | 2013-12-05 |
20130320987 | Method for measuring the reproducibility of N unitary ion exchange membrane/electrode assemblies using polluting agent delivery - A method for measuring the reproducibility of N unitary ion exchange membrane/electrode assemblies, where N is an integer strictly greater than 1, each assembly containing an ion exchange membrane located between an anode fed with a first stream and a cathode fed with a second stream and possessing cell voltage characteristics, comprises the following steps: delivering to each unitary assembly a stream containing at least one polluting species for a given time; measuring at least one electrochemical parameter of each assembly; and comparing said measurements so as to evaluate the reproducibility of said assemblies. | 2013-12-05 |
20130320988 | Method and Arrangement for Monitoring the Voltage on Electrical Storage Units, Battery and Motor Vehicle having such a Battery - The present disclosure relates to a method for monitoring the voltage on electrical storage units, to a battery and to a motor vehicle having such a battery that are configured to be used particularly for improved establishment of overvoltages and/or undervoltages on modules of the electrical storage unit. To this end, a method for monitoring the voltage on at least one electrical storage unit includes extracting an idle voltage U_OCV on the at least one electrical storage unit from a voltage U_measured that is measured on the at least one electrical storage unit. | 2013-12-05 |
20130320989 | BATTERY STATE ESTIMATION METHOD AND BATTERY CONTROL SYSTEM - A battery states estimation method includes the steps of: measuring an electric current value of a battery B at an electric current value detection section and a terminal voltage value of the battery B at voltage detection section at a time of charge/discharge of the battery; and calculating at least one of such states of the battery as a state of charge (SOC), a state of health (SOH) and a full charge capacity based on the electric current value and the terminal voltage value as measured. When a change in the measured electric current value per second is at a predetermined value or higher, at least one of the SOC, the SOH and the full charge capacity of the battery is calculated based on the electric current values and the terminal voltage values measured during a battery charge/discharge period other than the lapsed period. | 2013-12-05 |
20130320990 | DEVICE AND METHOD FOR EQUALIZING CURRENT DRAIN FROM A BATTERY STACK - Embodiments of the present invention may provide a battery monitor for a battery system that avoids current loops. A battery monitor may be provisioned as an integrated circuit and may include a pair of supply pins for reception of power to the integrated circuit, a third high impedance pin, and a voltage regulation circuit. When the circuits are deployed, the supply pins of several battery monitors may be connected to each other to form a stack. The high impedance inputs of each battery monitor may be coupled to low voltage terminals of an associated battery cell. A voltage reference circuit within the battery monitor may maintain the voltage at a low voltage supply of the monitors at a level that matches the voltage present on the high impedance input. Thus, the voltages on the monitors' low voltage supplies may be regulated. As a result, no current should flow through the high impedance pins of the battery monitor. All current flow should occur through a single loop that extends through the entire stack of battery monitors. | 2013-12-05 |
20130320991 | VOLTAGE MONITORING MODULE AND VOLTAGE MONITORING SYSTEM - A voltage monitoring module includes voltage control circuits each connected between two adjacent input terminals and causing a current to flow to generate a voltage drop when a voltage of a k-th input terminal counted from a high potential side is higher than a voltage of a (k−1)-th input terminal; and a disconnection detection circuit that detects a disconnection between battery cells and m input terminals. The disconnection detection circuit includes an activation circuit that controls a flow of m currents flowing between the m input terminals and a ground terminal; (m−1) first switches having one end connected to each of second to m-th input terminals, and a control terminal connected to each of first to (m−1)-th input terminals, and turning on when a voltage applied to the control terminal is smaller than a predetermined value; and a memory unit connected to another end of the (m−1) first switches. | 2013-12-05 |
20130320992 | Arrangement and Method for Determining the State of a Battery - A method for determining the state of a battery comprising at least two battery strings, wherein said battery strings are connected to a load and to a power supply unit, the method comprising: disconnecting (401) at least one first battery strings from said load; reducing (402) an output voltage of said power supply unit to said load below a first threshold value; discharging (403) at least one second battery string to said load; monitoring (404) the discharging of the at least one second battery string; determining (405) a capacity of said at least one second battery string based on at least in part the monitoring of discharging; and reconnecting (406) said at least one first battery strings to said power supply unit and to said load. | 2013-12-05 |
20130320993 | DEVICE PLUG DETECTION APPARATUS AND METHOD - A particular apparatus includes a receptacle having a first pin configured to contact a tip region of the device plug at a first location when the device plug is inserted into the receptacle. The first location may be located between a midpoint of the tip region and a tip of the device plug. The receptacle further includes a second pin configured to contact a second region of the device plug at a second location. The receptacle further includes a third pin configured to contact a third region of the device plug at a third location. The receptacle further includes a fourth pin configured to contact a fourth region of the device. | 2013-12-05 |
20130320994 | ELECTRODE TESTING APPARATUS - An apparatus to infer the resistivity of an electrode by stimulating the electrode with a capacitively coupled signal, and processing the resultant signal with circuitry that produces a signal having an amplitude that is a function of the resistivity of the electrode. | 2013-12-05 |
20130320995 | POWER AMPLIFICATION OF A MULTI-TONE TEST SIGNAL - Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices. | 2013-12-05 |
20130320996 | PROXIMITY SENSOR WITH HEALTH MONITORING - A proximity sensor includes a relatively simple health monitoring circuit. The proximity sensor includes a variable gain oscillator, a feedback circuit, and a proximity determination circuit. The variable gain oscillator has a gain that varies with the proximity of a target to a sensor coil, generates an oscillating electrical signal having a substantially constant amplitude magnitude, and generates an energy signal representative of the electrical energy needed to sustain oscillations. The feedback circuit supplies feedback to the oscillator, and the proximity determination circuit, based on the energy signal, supplies a proximity signal representative of target proximity to the sensor coil. The health monitor circuit also receives the oscillating electrical signal and supplies a health status signal representative of proximity sensor health. | 2013-12-05 |
20130320997 | SENSOR SYSTEM AND ANTENNA FOR USE IN A SENSOR SYSTEM - A sensor head configured for use in a radio frequency operated sensing device, the sensor head comprising a non-planar antenna. The sensor head may further include means for connecting the sensor head to a data conduit. The non-planar antenna may be configured to have a predetermined resonance frequency within the radio frequency spectrum. | 2013-12-05 |
20130320998 | IN-SITU VHF CURRENT SENSOR FOR A PLASMA REACTOR - An RF current probe is encapsulated in a conductive housing to permit its placement inside a plasma reactor chamber. An RF voltage probe is adapted to have a long coaxial cable to permit a measuring device to be connected remotely from the probe without distorting the voltage measurement. | 2013-12-05 |
20130320999 | MICROFLUIDIC RESISTANCE NETWORK AND MICROFLUIDIC DEVICE - A microfluidic resistance network ( | 2013-12-05 |
20130321000 | ROTATIONAL CLEARANCE MEASUREMENT SYSTEM AND METHOD OF OPERATION - A radial clearance measurement system is provided. The radial clearance measurement system comprises a radial clearance sensor that is relatively insensitive to axial movement of an object rotating relative to the radial clearance sensor. In one embodiment, the radial clearance sensor includes an electrode having a relatively constant overlap area over the range of axial movement of the object. | 2013-12-05 |
20130321001 | CAPACITIVE CHARGE MEASUREMENT - In a circuit for measuring a capacitive charge a drive module is configured for coupling with a sensor electrode of a capacitive input device. The drive module is configured to drive the sensor electrode with a plurality of positive and negative measurement cycles. A latched comparator comprises an input for capturing voltages from the sensor electrode. An output of the latched comparator provides output signals based upon the captured voltages from the sensor electrode. A first counter is set based on a first output signal produced by a first voltage captured by the input during a positive measurement cycle. A second counter is set based on a second output signal produced by a second voltage captured by the input during a negative measurement cycle. A determination module is configured to produce a demodulated output signal based on the first counter value and the second counter value. | 2013-12-05 |
20130321002 | SENSOR ASSEMBLIES - The present invention provides a sensor body ( | 2013-12-05 |
20130321003 | ELECTROSTATIC CAPACITANCE DETECTION DEVICE - An electrostatic capacitance detection device includes a substrate having a predetermined thickness, an electrode layer formed on a front surface of the substrate in a predetermined pattern including electrodes to be touched so as to detect an electrostatic capacitance and wirings drawn from the electrodes, and a shield layer formed on a rear surface of the substrate and into a shield pattern corresponding to the predetermined pattern of the electrode layer. The shield pattern of the shield layer is formed surrounding the electrodes without overlapping with the electrodes, surrounding the wirings, and between the wirings when viewed in the thickness direction of the substrate. | 2013-12-05 |
20130321004 | Touch-Sensing Electrode Structure and Touch-Sensitive Device - A touch-sensing electrode structure has a plurality of electrode units. Each of the electrode units includes at least one first electrode and at least one second electrode. The second electrode is formed in an area not overlapping the first electrode, and the first electrode has a first part and a second part. The second electrode is adjacent to the first part of the first electrode and spaced apart the first part of the first electrode by a first interval, the second part of the first electrode is adjacent to the second electrode and spaced apart the second electrode by a second interval, and a width of the second interval is not equal to a width of the first interval. | 2013-12-05 |
20130321005 | TRANSCAPACITIVE CHARGE MEASUREMENT - A circuit for measuring a change in capacitive coupling between a transmitter electrode and receiver electrode includes a transmitter module that couples with the transmitter electrode and drives it with a plurality of positive and negative measurement cycles. A latched comparator has an input and an output, where the input couples with the receiver electrode. Upon enablement, the latched comparator determines if receiver electrode voltages satisfy an input threshold of the latched comparator and provides an output signal from an output based on this determination. A first counter is adjusted based on a first output signal of the latched comparator output during a positive measurement cycle. A second counter is adjusted based on a second output signal of the latched comparator during a negative measurement cycle. Measurement of change in capacitive coupling between the transmitter electrode and receiver electrode is based on counter values of the first and second counters. | 2013-12-05 |
20130321006 | METHOD FOR MEASURING CAPACITANCE AND CAPACITIVE SENSOR UNIT - A method measures a capacitance. According to the method, a first detection measurement for the capacitance which is to be measured is detected by a first measurement method during a first measurement phase. In this case, a second measurement phase is started when the first detection measurement satisfies a transition criterion. A second detection measurement for the capacitance which is to be measured is detected during the second measurement phase by a second measurement method which differs from the first measurement method. The second measurement method has higher measurement accuracy than the first measurement method but also greater energy expenditure. | 2013-12-05 |
20130321007 | ABSORBENT ARTICLE COMPRISING A LIQUID DISCHARGE DETECTION SENSOR - An absorbent article for absorbing liquid discharge of a wearer when worn in the crotch region includes an absorbent core for doing the absorbing of the liquid discharge. A conductive layer is in electrical contact with the absorbent core. The article includes at least one set of first and second electrical contacts secured in intimate physical and electrical contact with the conductive layer such that when an electric potential is applied between the first and second electrical contacts, an electric current travels between them and through the conductive layer in such a way so as to follow a first relatively high impedance path along the conductive layer when the absorbent core is dry and a relatively low impedance path when the absorbent core is wet. This system allows a system verification check, even in the dry state, and the determination of the extent of the wet portion of the absorbent core. | 2013-12-05 |
20130321008 | HEAT SPREADER FLATNESS DETECTION - A heat spreader includes a plurality of sensors that indicate that the heat spreader is flat against a chip stack. One or more nodes within a sensor are electrically connected. The electrical resistance values of the connection may be compared to determine if the nodes within the sensors are relatively flat. Sensor flatness may be correlated to heat spreader flatness for determining whether the heat spreader is flat against the chip stack when the heat spreader is installed upon the chip stack. | 2013-12-05 |
20130321009 | GESTURE RECOGNITION SYSTEM - The invention relates to means for detecting and recognizing gestures, particularly different hand gestures. A gesture detection device ( | 2013-12-05 |
20130321010 | DETECTION OF DEFECTS IN TOUCH SENSORS - Defects in a touch sensor are detected by coupling the sensor lines to a common signal line. Each of the sensor lines is tested by disconnecting the sensor line from the common signal line, connecting it to a voltage (e.g., ground) and comparing the voltage on the common signal line to a reference voltage. Detected defects include a short circuit between any two transmit and/or receive lines and a short between any transmit or receive line to ground. | 2013-12-05 |
20130321011 | TEST DEVICE, TEST SYSTEM, METHOD AND CARRIER FOR TESTING ELECTRONIC COMPONENTS UNDER VARIABLE PRESSURE CONDITIONS - A test device, a test system, a method and a carrier for testing electronic components under variable pressure conditions comprise: a first chamber half and a second chamber half, a first gasket and a second gasket, a carrier segment adapted to carry a plurality of electronic components, and a circular carrier section surrounding the carrier segment. The circular carrier section comprises a first side and a second side. The first gasket is placed between the first chamber half and the first side of the circular carrier section to form an airtight seal and the second gasket is placed between the second chamber half and the second side of the circular carrier section to form an airtight seal. | 2013-12-05 |
20130321012 | Methods and Apparatus for Testing Small Form Factor Antenna Tuning Elements - A test system for testing a device under test (DUT) is provided. The test system may include a DUT receiving structure configured to receive the DUT during testing and a DUT retention structure that is configured to press the DUT against the DUT receiving structure so that DUT cannot inadvertently shift around during testing. The DUT retention structure may include a pressure sensor operable to detect an amount of pressure that is applied to the DUT. The DUT retention structure may be raised and lowered vertically using a manually-controlled or a computer-controlled positioner. The positioner may be adjusted using a coarse tuning knob and a fine tuning knob. The positioner may be calibrated such that the DUT retention structure applies a sufficient amount of pressure on the DUT during production testing. | 2013-12-05 |
20130321013 | PHOTOVOLTAIC DEVICE FOR MEASURING IRRADIANCE AND TEMPERATURE - A solar array system includes a plurality of power-generator modules, each power-generator module having an identical form factor and comprising a plurality of photovoltaic cells wired for power generation. The system also includes at least one sensor module having a substantially identical appearance and form factor as the power-generator modules and comprising a like plurality of photovoltaic cells. The operational state of the system is monitored by an array performance monitor, which measures signals sent from the various modules. At least one photovoltaic cell in the sensor module delivers a short-circuit current signal to the array performance monitor and at least one photovoltaic cell in the sensor module delivers an open-circuit voltage signal to the array performance monitor. These signals are used to calculate a theoretical power output of the array system, which is compared to the actual power output. | 2013-12-05 |
20130321014 | TESTING APPARATUS AND METHOD USING SAME - A testing apparatus for testing a number of different characteristics of a circuit board includes at least two probes, at least one measuring meter, and a storage device. After a circuit schematic diagram of the circuit board and a circuit wiring diagram of the circuit board have been compared, the location of each electric contact is determined. The probes necessary for testing particular characteristics are connected in turn to the measuring meter. The circuit board is moved to align the electric contacts with the probes, and bring the probes into electrical contact with the electric contacts for testing. | 2013-12-05 |
20130321015 | INSPECTION APPARATUS AND INSPECTION METHOD - An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin. | 2013-12-05 |
20130321016 | ELECTRICAL TEST PROBE - An electrical test probe according to an embodiment includes a probe main body portion having a connection end to a circuit of a probe base plate and made of a first metal material with resiliency, and a probe tip portion having a probe tip, made of a second metal material with higher hardness than that of the first metal material for the probe main body portion, and communicating with the probe main body portion, wherein the probe main body portion and the probe tip portion are provided with a current path made of an equal metal material extending from the probe tip to the connection end. | 2013-12-05 |
20130321017 | SENSOR AND TRANSPORTING DEVICE INCLUDING THE SAME - A sensor detects a workpiece ready for transportation by means of an outwardly hanging contact arm which, when the workpiece is dropped or placed on a carrying frame, is pushed back into a groove in the body of the sensor and in that location gives a contact signal to start the transport, avoiding damage to the hanging arm or to its mechanism otherwise caused by the continuing weight or impact of the dropped or placed workpiece. | 2013-12-05 |
20130321018 | MEMBRANE PROBING METHOD USING IMPROVED CONTACT - A substrate, preferably constructed of a ductile material and a tool having the desired shape of the resulting device for contacting contact pads on a test device is brought into contact with the substrate. The tool is preferably constructed of a material that is harder than the substrate so that a depression can be readily made therein. A dielectric (insulative) layer, that is preferably patterned, is supported by the substrate. A conductive material is located within the depressions and then preferably lapped to remove excess from the top surface of the dielectric layer and to provide a flat overall surface. A trace is patterned on the dielectric layer and the conductive material. A polyimide layer is then preferably patterned over the entire surface. The substrate is then removed by any suitable process. | 2013-12-05 |
20130321019 | PROBE CARD - It is an object of the present invention to provide a probe card capable of controlling generation of a scratch or an indentation in a connection pad and capable of controlling generation of heat in a connection pad and its vicinity having contacted a contact probe at low cost and in a simple way. A probe card includes a probe substrate, at least one contact probe electrically connected to a signal line provided to an insulating base of the probe substrate and fixed to the insulating base, and at least one engagement member installed on the contact probe at a position near a tip end portion of the contact probe. The engagement member has at least one engagement portion that makes abutting contact with another predetermined member during operation to restrain the operation of the contact probe. | 2013-12-05 |
20130321020 | Method for Detecting Liquid Crystal Display Panel and Detecting System - The present provide a technical solution by introducing a method of detecting a liquid crystal display panel, characterized in that the method includes a) providing an all-connection lit-up fixture having a plurality of probes. And b) performing a lit-up test by establishing an electrical coupling between the probes and a plurality of contacts on the liquid crystal display panel. By this arrangement. the liquid crystal display panel can be readily pin-pointed the defects after the shorting bar is cut off as the fixture provided can readily restore the lit-up test Accordingly, the capability of lit-up test is therefore enhanced. | 2013-12-05 |
20130321021 | STARTING OF PHOTOVOLTAIC SYSTEM - A method and arrangement of determining starting conditions of a solar converter in a photovoltaic system. The photovoltaic system includes a photovoltaic panel system having one or more photovoltaic panels. The method includes determining an open circuit voltage of the photovoltaic panel system, and determining beforehand limit values for the starting conditions, where the limit values include an open circuit voltage value and a temperature value, with which values the solar converter can be started. The method also includes determining beforehand the temperature dependency of the open circuit voltage of the panel system, determining a temperature of the panel system, and setting a criterion for starting the converter. The criterion includes determining, by using the determined temperature dependency and the determined limit values for the starting conditions, whether the determined temperature and the determined open circuit voltage enable the starting of the converter. | 2013-12-05 |
20130321022 | METHODS AND APPARATUS FOR TESTING INACCESSIBLE INTERFACE CIRCUITS IN A SEMICONDUCTOR DEVICE - A semiconductor IC device comprises a timing circuit to transfer a timing signal, the timing circuit being configured to receive a first test signal and to effect a delay in the timing signal in response to the first test signal, the first test signal including a first timing event. The semiconductor IC device further comprises an interface circuit configured to transfer the data signal in response to the timing signal, the interface circuit being further configured to receive a second test signal and to effect a delay in the data signal in response to the second test signal, the second test signal including a second timing event that is related to the first timing event according to a test criterion. | 2013-12-05 |
20130321023 | Test Device For Testing A Flat Module - A test device for testing a flat module includes a test station and a cover movable relative to the test station between a test position and a removal position. At least two holding devices are arranged and formed on the cover in such a way that, when the cover moves from its removal position into the test position, they releasably connect to the flat module arranged in the test station in such a way that, when the cover moves from its test position into the removal position, the flat module is held by the at least two holding devices. | 2013-12-05 |
20130321024 | PLUG-IN ELECTRIC VEHICLE SUPPLY EQUIPMENT HAVING A PROCESS AND DEVICE FOR CIRCUIT TESTING - A system for connecting an electric vehicle to a high voltage power source is disclosed. The system including an electric vehicle supply equipment (EVSE) having an electrical plug compatible with a high voltage power outlet, the plug connected to a power cord. The power cord is connected to a housing containing a number of electrical components configured to control the power flow to an electric vehicle to recharge the vehicle's batteries. The power cord extends from the housing and is connected to a standard electric vehicle connector compatible with battery electric vehicles (BEV) and plug-in hybrid electric vehicles (PHEV). The EVSE further includes safety measures, such as a relay that controls the flow of power to the vehicle connector, a ground fault interrupter, and a circuit tester to protect users from high voltage electric shocks. | 2013-12-05 |
20130321025 | PROGRAMMABLE LOGIC DEVICE - A PLD in which a configuration memory is formed using a nonvolatile memory with a small number of transistors and in which the area of a region where the configuration memory is disposed is reduced is provided. Further, a PLD that is easily capable of dynamic reconfiguration and has a short startup time is provided. A programmable logic device including a memory element, a selector, and an output portion is provided. The memory element includes a transistor in which a channel is formed in an oxide semiconductor film, and a storage capacitor and an inverter which are connected to one of a source and a drain of the transistor. The inverter is connected to the selector. The selector is connected to the output portion. | 2013-12-05 |
20130321026 | VOLTAGE COMPENSATED LEVEL-SHIFTER - Described herein is a voltage compensated level-shifter with nearly constant duty cycle and matching rise and fall slopes of the output of the level-shifter, no meta-stability, and nearly constant propagation delay across power supply levels. The voltage compensated level-shifter comprises a first inverter to receive an input signal for level shifting from a first power supply level to a second power supply level, and to generate a first inverted signal, the first inverter operating on the first power supply level; a second inverter to receive the input signal and to generate a second inverted signal, the second inverter operating on the second power supply level; and a NOR logical gate to receive the first and second inverted signals and to generate an output signal, the NOR logical gate operating on the second power supply level, wherein the output signal is level shifted to the second power supply level. | 2013-12-05 |
20130321027 | Circuit Arrangements and Methods of Operating the Same - In various embodiments, a circuit arrangement may be provided. The circuit arrangement may include a level shifting stage configured to be coupled to a first reference voltage, the level shifting stage having an output node. The circuit arrangement may further include a first input electrode in electrical connection with the level shifting stage. The circuit arrangement may also include a second input electrode in electrical connection with the level shifting stage. The circuit arrangement may further include a load having a first end and a second end, the first end coupled to the level shifting stage and the second end for coupling to a second reference voltage. In addition, the circuit arrangement may include a bypass circuit element connected in parallel to the load. The bypass circuit element may be configured to allow current to flow through upon application of an external voltage for bypassing the load. | 2013-12-05 |
20130321028 | NOR-OR Decoder - A decoder for decoding an address having a plurality of bits ranging from a first address bit a | 2013-12-05 |
20130321029 | INPUT DECISION CIRCUIT - An input decision circuit includes a comparator outputting either one of a high voltage or a low voltage on the basis of the result of a comparison between a reference voltage and an input voltage, a base voltage source acting as a base common to the reference voltage and the input voltage, a constant current source supplying a constant current to a constant current path from a DC power supply to the base voltage source, and a resistor inserted in the constant current path. A constant voltage is produced across the resistor for the reference voltage with the electric potential of the base voltage source acting as a base. This provides an input decision circuit in which a threshold voltage is hard to shift even when the driving voltage of the comparator or the electric potential of the ground acting as the base voltage source is varied. | 2013-12-05 |
20130321030 | MOVING AVERAGE FILTER BASED ON CHARGE SAMPLING AND MOVING AVERAGE FILTERING METHOD USING THE SAME - The present invention relates to a movement average filter based on charge sampling and a moving average filtering method using the same. The moving average filter includes a voltage-current converter and a first sampling unit. The voltage-current converter converts an input voltage signal into an input current signal and outputs the input current signal. The first sampling unit includes a first 1-unit sampler, an α-unit sampler, and a second 1-unit sampler connected in parallel between an output terminal of the voltage-current converter and a filtered signal output terminal, wherein each of the first 1-unit sampler, the α-unit sampler, and the second 1-unit sampler has a sampling capacitor bank for performing charge sampling. A ratio of sampling capacitances of sampling capacitor banks of the first 1-unit sampler, the α-unit sampler, and the second 1-unit sampler is 1:α:1, wherein a is adjusted to have a value between 1 and 2. | 2013-12-05 |
20130321031 | CMOS PROGRAMMABLE NON-LINEAR FUNCTION SYNTHESIZER - The CMOS programmable non-linear function synthesizer utilizes CMOS current-mode electronics to provide synthesis of arbitrary analog functions. The circuit approximates a seventh-order Taylor series expansion to synthesize an arbitrary nonlinear function. Each term of the Taylor series expansion is realized using a current-mode basic building block, and the output weighted currents of these basic building blocks are algebraically added in addition to a DC current, if needed. The CMOS current mode electronic circuit can be easily integrated, extended to include higher order terms of the Taylor series, and programmed to generate arbitrary nonlinear functions. | 2013-12-05 |
20130321032 | STAGE CIRCUITS AND SCAN DRIVER USING THE SAME - There are provided stage circuits and a scan driver using the same, which can supply scan signals using a simultaneous method or an interlace method. Each of the stage circuits includes a progressive driver and a simultaneous driver. The progressive driver outputs a scan signal to an output terminal, corresponding to a plurality of clock signals supplied simultaneously or progressively, and the coupling between the progressive driver and the output terminal is blocked when a third control signal is supplied. The simultaneous driver outputs a scan signal to the output terminal, corresponding to first and second control signals which do not overlap each other, and the coupling between the simultaneous driver and the output terminal is blocked when a fourth control signal, which does not overlap the third control signal, is supplied. | 2013-12-05 |
20130321033 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF OPERATING THE SAME - Provided is a semiconductor integrated circuit including an internal voltage generator for generating an internal voltage. A semiconductor integrated circuit includes a dividing unit, a comparing unit, a driving unit, and a voltage level controlling unit. The dividing unit divides an internal voltage in a predetermined division ratio to output a feedback voltage. The comparing unit compares a feedback voltage with a reference voltage. The driving unit drives an internal voltage terminal in response to an output signal of the comparing unit. The voltage level controlling unit controls a voltage level of the output signal of the comparing unit in response to a first control signal that is activated at a predetermined time before an operation time point of an internal circuit using an internal voltage. | 2013-12-05 |
20130321034 | POWER ELECTRONIC DEVICES - A semiconductor device or power electronic device is described. The device includes a pair of pole pieces, each having a profiled surface. A semiconductor body or wafer, preferably of wide bandgap electronic material, is located between the pole pieces and includes contact metallisation regions. The semiconductor body produces an electric field that emerges from an edge region. Passivation means includes a first or radially inner part in contact with the edge region of the semiconductor body and which diffuses the electric field as it emerges from the edge region and a second or radially outer part. The second part of the passivation is in contact with the first part and provides a substantially void-free interface with the profiled surface of each pole piece. The device may be immersed in a dielectric liquid. | 2013-12-05 |
20130321035 | Driver Circuit - Devices and methods are provided in which a driver is supplied via a first current path and a second current path which can comprise a switching element. | 2013-12-05 |
20130321036 | GATE DRIVING APPARATUS - A gate driving apparatus is disclosed. The gate driving apparatus includes a first gate driving chip and N second gate driving chips, wherein N is positive integer. The first gate driving chip has a first input pin and a first current output pin. The first gate driving chip receives a reference electrical signal by the first input pin, and generates a reference current according to the reference electrical signal. The first current output pin is used for outputting the reference current. Each of the second gate driving chips has a current input pin for receiving the reference current and a second current output pin for outputting the reference current. The first gate driving chip and the second gate driving chips generate at least a first output signal and at least N second output signals according to the reference current. | 2013-12-05 |
20130321037 | CONTROL APPARATUS FOR SEMICONDUCTOR SWITCHES OF AN INVERTER, AND METHOD FOR DRIVING AN INVERTER - A control apparatus for driving a semiconductor switch of an inverter. A drive circuit generates a driver signal on the basis of a switching signal generated by a control regulation system of the inverter. A driver circuit which is coupled between the drive circuit and a control input of the semiconductor switch is configured to receive the driver signal and to generate, on the basis of the driver signal, a control signal which drives the semiconductor switch. The control signal is fed into the control input of the semiconductor switch. A regulation circuit is coupled to the drive circuit and is configured to detect a voltage signal dependent on the voltage across the semiconductor switch, to generate a regulation signal which is dependent on the voltage signal and is intended to regulate the driver signal, and to feed the regulation signal into the drive circuit. | 2013-12-05 |
20130321038 | Drive way for FET - An apparatus and a method are provided to drive FET with voltage determined by current through the FET and parameters of FET to get maxim efficiency for any specific load current and variable load current; two versions of the invention are provided; one version of the invention is to provide an independent power supply with selected voltage value; the other version of the invention is to provide a controllable variable output voltage power supply to supply variable voltage to driver corresponding to variable load current. | 2013-12-05 |
20130321039 | DRIVE UNIT FOR MEASURING DEVICE AND DRIVE METHOD THEREFOR - A measuring device comprises a plurality of variable capacitors as sensor elements. The plurality of variable capacitors are provided with a drive circuit for each pair. The first electrodes of the two variable capacitors in each pair are electrically connected to each other. The drive circuit for each pair includes a bias supply for applying two AC bias voltages relatively 90° out of phase to the second electrodes respectively of the two variable capacitors to produce an output signal at the first electrodes connected to each other, a multiplier for multiplying the output signal by two AC signals relatively 90° out of phase to produce two multiplication signals, and an integrator for integrating the two multiplication signals for each cycle of the corresponding AC bias voltages to acquire two integration signals for the two variable capacitors. | 2013-12-05 |
20130321040 | METHOD AND SYSTEM FOR USING DEMAND RESPONSE TO PROVIDE FREQUENCY REGULATION - A frequency regulation system includes a sensor to detect a power grid signal and a frequency deviation identification module to determine a power grid frequency deviation from the power grid signal. A demand response module identifies an operating schedule for available demand response resources based on frequency deviation set points and ramp rates and a load control module controls the available demand response resources based on the operating schedule. | 2013-12-05 |
20130321041 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING TEMPERATURE THEREOF - A method for controlling a temperature of an electronic device which includes a semiconductor chip is provided. The temperature control method includes measuring a temperature of a measurement point using the electronic device, comparing the temperature of the measurement point with a target temperature varying according to a period of time when the semiconductor chip operates using the electronic device, and decreasing a clock frequency of the semiconductor chip using the electronic device when the temperature of the measurement point is higher than the target temperature. | 2013-12-05 |
20130321042 | DEVICES FOR SYNCHRONIZING A COMMUNICATION END DEVICE WITH A BASE STATION, METHODS FOR SYNCHRONIZING A COMMUNICATION END DEVICE WITH A BASE STATION, DEVICES FOR GENERATING A SECONDARY SYNCHRONIZATION SIGNAL, AND METHODS FOR GENERATING A SECONDARY SYNCHRONIZATION SIGNAL - In an aspect of this disclosure, a device for synchronizing a communication end device with a base station may be provided. The device may include: a primary synchronization determiner configured to determine a first synchronization parameter; and a secondary synchronization signal generator configured to simultaneously generate a plurality of bits of a secondary synchronization signal based on the first synchronization parameter. | 2013-12-05 |
20130321043 | PULSE SYNCHRONIZER CIRCUIT - A pulse synchronizer circuit converts an input data signal generated under a source-clock domain into an output data signal under a destination-clock domain, where the destination clock is independent of the source clock. The pulse synchronizer circuit successfully converts each data pulse in the input data signal into a corresponding data pulse in the output data signal when the source clock is faster than the destination clock, when the source clock is slower than the destination clock, when an input data pulse has a duration of one source-clock cycle, and when an input data pulse has a duration of multiple source-clock cycles. The pulse synchronizer circuit has source-domain circuitry and destination-domain circuitry. The source-domain circuitry detects input data pulses and determines whether they are single- or multi-cycle data pulses. The destination-domain circuitry generates output data pulses based on the processing of the source-domain circuitry. | 2013-12-05 |
20130321044 | SYSTEM FOR REDUCING NOISE IN A CHEMICAL SENSOR ARRAY - A system including a power supply and a clock circuitry to generate a plurality of clock signals. Each clock signal is synchronous with a primary clock signal. First, second, and third clock signals of the plurality of clock signals are asynchronous to each other. The system further includes a plurality of switches. Each switch of the plurality of switches is communicatively coupled to the power supply and the clock circuitry. A first switch of the plurality of switches receives the first clock signal, a second switch of the plurality of switches receives the second clock signal, and a third switch of the plurality of switches receives the third clock signal. | 2013-12-05 |
20130321045 | CHARGE PUMPS WITH IMPROVED LATCHUP CHARACTERISTICS - Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations. | 2013-12-05 |
20130321046 | POWER TRACKING CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME - A semiconductor device having a power tracking circuit configured for activating a power tracking signal for a period corresponding to a period during which an external voltage retains a level lower than a level of a low power mode reference voltage if the external voltage retains the level lower than the level of the low power mode reference voltage for at least a preselected time. | 2013-12-05 |
20130321047 | DISTORTION TOLERANT CLOCK AND DATA RECOVERY - A system can include a phase detector configured to generate a phase error signal indicating a phase error of an input signal compared to an output signal and a first filter coupled to the phase detector and configured to generate a first control signal derived from the phase error signal. The system can include a pattern error detector configured to generate a pattern error signal specifying a pattern error of the input signal compared to the output signal and a second filter coupled to the pattern error detector and configured to generate a second control signal derived from the pattern error signal. The system further can include a controlled oscillator coupled to the first filter and the second filter, wherein the controlled oscillator is configured to generate the output signal responsive to the first control signal, the second control signal, and a center frequency signal. | 2013-12-05 |
20130321048 | COMMON REFERENCE CRYSTAL SYSTEMS - One embodiment of communication system comprises a crystal oscillator configured to output a reference clock; cellular radio frequency (RF) and baseband phase locked loops configured to receive the reference clock within a cellular module and compensate for calculated frequency errors between a received cellular downlink signal and a cellular local oscillator signal during operation of the cellular module; global positioning system (GPS) frequency compensation circuitry configured to receive the reference clock within a GPS module and compensate for calculated frequency errors during operation of the GPS module; and a temperature sensing circuit which includes a plurality of sensing resistors and is configured to output a signal corresponding to a temperature of a reference crystal which is translated to a frequency deviation, wherein the (GPS) frequency compensation circuitry is configured to offset the frequency deviation and output a temperate compensated signal to meet GPS clock frequency requirements. | 2013-12-05 |
20130321049 | SMART CARD CLOCK GENERATOR CIRCUITS WTH AUTONOMOUS OPERATION CAPABILITY AND METHOD OF OPERATING THE SAME - An apparatus includes a reference clock signal generator circuit configured to generate a reference clock signal in response to a carrier signal and a clock selection signal generator circuit configured to generate a clock selection signal in response to the carrier signal. The apparatus further includes a multiplexer (MUX) circuit configured to selectively output the reference clock signal and a PLL output clock signal in response to the clock selection signal and a phase-locked loop (PLL) circuit configured to receive the selectively output signal between the reference clock signal and the PLL output clock signal at a reference input thereof and to generate the PLL output clock signal therefrom. An ISO 14443 type A smart card may include such apparatus. | 2013-12-05 |
20130321050 | DELAY-LOCKED LOOP - A delay-locked loop to control a delay amount of an external clock based on phase comparisons of a feedback clock acquired by delaying a DLL clock and the external clock and generate the DLL clock includes first and second delay units, a phase mixing unit and a slew rate control unit. The first delay unit increases the delay amount of the external clock through short and long delay elements, and generates a first delayed clock. The second delay unit increases the delay amount of the external clock through short and long delay elements, and generates a second delayed clock. The phase mixing unit mixes phases of the first and second delayed clocks. The slew rate control unit increases electrical load of the first and second delayed clocks when the delay amount of the external clock is controlled through the long delay elements of the first delay unit. | 2013-12-05 |
20130321051 | DIGITAL LOCKED LOOP FOR PRODUCING A CLOCK HAVING A SELECTED FREQUENCY RATIO RELATIVE TO A CLOCK PRODUCED BY A MEMS-BASED OSCILLATOR - A Micro Electrical Mechanical System (MEMS) oscillator supplies a MEMS clock signal to a digital locked loop that generates an output clock signal having a frequency that corresponds to a desired frequency ratio between the MEMS oscillator output signal and the digital locked loop output signal. The frequency ratio may be determined, at least in part, as a function of temperature. | 2013-12-05 |
20130321052 | METHODS AND APPARATUSES FOR SHIFTING DATA SIGNALS TO MATCH COMMAND SIGNAL DELAY - Methods and apparatuses for shifting data signals are disclosed herein. An apparatus may comprise a clock generation circuit, a delay path, and a driver. The clock generation circuit may be configured to receive an input clock signal and generate a plurality of clock signals based, at least in part, on the clock signal. A delay path may be coupled to the clock generation circuit and configured to receive the input clock signal and the plurality of clock signals. The delay path may be further configured to receive a data signal and delay the data signal based, at least in part, on the input clock signal and each of the plurality of clock signals. A driver may be coupled to the delay path and configured to receive the delayed data signal, and may further be configured to provide the delayed data signal to a bus. | 2013-12-05 |
20130321053 | METHOD AND DEVICE FOR SAMPLING AN INPUT SIGNAL - In accordance with various embodiments, a method for sampling an input signal may be provided, wherein the method may include providing a single frequency clock signal; selecting clock pulses from the single frequency clock signal in a random manner to generate a spread spectrum clock signal; and sampling the input signal using the spread spectrum clock signal. A corresponding device for sampling an input signal may be provided. | 2013-12-05 |
20130321054 | UNIFORM-FOOTPRINT PROGRAMMABLE-SKEW MULTI-STAGE DELAY CELL - Described embodiments provide a delay cell for a complementary metal oxide semiconductor integrated circuit. The delay cell includes a delay stage to provide an output signal having a programmable delay through the delay cell. The delay cell has a selectable delay value from a plurality of delay values and a selectable output skew value from a plurality of output skew values, where the cell size and terminal layout of the delay cell are relatively uniform for the plurality of delay values and the plurality of output skew values. The delay stage includes M parallel-coupled inverter stages of stacked PMOS transistors and stacked NMOS transistors. The stacked transistors have configurable source-drain connections between a drain and a source of each transistor, wherein the selectable delay value corresponds to a configuration of the configurable source-drain connections to adjust a delay value of each of the M inverter stages and an output skew value of the delay cell. | 2013-12-05 |
20130321055 | HIGH VOLTAGE CLAMP CIRCUIT - This document discloses, among other things, a voltage clamp circuit where an output voltage equals an input voltage for at least a portion of a first range of input voltages, and where the output voltage is less than the input voltage for at least a portion of a second range of input voltages. | 2013-12-05 |
20130321056 | BOOTSTRAP CIRCUIT - A bootstrap circuit includes an input terminal, an inverting input terminal, an output terminal, an inverting output terminal, a first sub-bootstrap circuit, a second sub-bootstrap circuit, and a charging path providing circuit. The first sub-bootstrap circuit includes a first bootstrap capacitor, a first charging path, a first discharging path, and a first high voltage providing path. The charging path providing circuit includes a third charging path. In response to a high voltage level inputted into the input terminal, the first charging path and the third charging path are turned on, the first bootstrap capacitor is charged to a capacitor voltage, and the first discharging path is turned on to discharge the output terminal. In response to a low voltage level inputted into the input terminal, a first superimposed voltage including the high voltage level and the capacitor voltage is provided to the output terminal. | 2013-12-05 |
20130321057 | INTEGRATED CIRCUIT COMPRISING AT LEAST ONE DIGITAL OUTPUT PORT HAVING AN ADJUSTABLE IMPEDANCE, AND CORRESPONDING ADJUSTMENT METHOD - An integrated circuit may include a digital output port including a buffer stage that includes subassemblies of MOSFET transistors. One subassembly may include two pull-up transistors having sources connected to a common high voltage, and having drains connected to a common node connected to the output terminal. Another subassembly may include pull-down transistors having sources connected to a common low voltage, and having drains connected to the common node. The pull-up and pull-down transistors are formed in a thin semiconductor layer of an FDSOI substrate. The substrate may include a thick semiconductor layer and an oxide layer separating the thin and thick semiconductor layers. Areas of the thick semiconductor layer facing the pull-up and pull-down transistors may be connected to a circuit configured to vary a threshold voltage of the pull-up and pull-down transistors. | 2013-12-05 |
20130321058 | INPUT INTERFACE FOR A TRANSMIT/RECEIVE STATION AND STATION COMPRISING SAME - The input interface for a transmit/receive radio station includes an input for receiving a signal either with a variable voltage over a pre-determined voltage range, or an open collector signal having a voltage (0V) corresponding to the low logic state; a first output for the variable voltage signal, and a second open collector output. The first and second outputs are connected to the same input and the input is connected to a reference potential through a first voltage divider bridge, the middle point of which is connected to the positive terminal of an open loop comparator, the output of which is connected to the second output. | 2013-12-05 |
20130321059 | Sampling Switch Circuit that uses Correlated Level Shifting - A sampling switch circuit uses correlated level shifting. The sampling switch circuit includes: a sampling switch having a first terminal, a control terminal, and an output terminal, wherein the first terminal is connected to an input voltage node; a boosting circuit connected to first and second supply voltage nodes and coupled to the control terminal of the sampling switch; and a correlated level shifting buffer circuit. The correlated level shifting buffer circuit includes: an amplifier having first and second inputs and an output, wherein the first input is connected to the input voltage node, and the output and second input are coupled to the boosting circuit; and a level shifting capacitor coupled to the second input and output of the amplifier, to the boosting circuit, and to a level shifting voltage node. | 2013-12-05 |
20130321060 | INPUT BUFFER CIRCUIT AND SEMICONDUCTOR DEVICE - A drain or a source of a transistor which receives an input signal at a gate is connected to a back gate of the transistor. A voltage changing circuit portion changes voltage applied to the drain or the source in accordance with a change in potential level of the input signal so that a potential difference between the gate and the drain or the source is lower than or equal to breakdown voltage of the transistor. | 2013-12-05 |
20130321061 | CAPACITANCE COMPENSATION CIRCUIT OF A RADIO FREQUENCY SWITCH - An RF switch includes a transistor and a compensation capacitor circuit. The compensation capacitor circuit includes a first compensation capacitor and a second compensation capacitor of the same capacitance. The compensation capacitor circuit is used to improve voltage distribution between a control node and a first node of the transistor and between the control node and a second node of the transistor. | 2013-12-05 |
20130321062 | METHOD FOR CONTROLLING TWO ELECTRICALLY SERIES-CONNECTED REVERSE CONDUCTIVE IGBTS OF A HALF BRIDGE - A method for controlling two electrically series-connected reverse-conductive (RC) IGBTs (RC-IBGT) of a half bridge is disclosed, wherein an operating DC voltage is applied across the series connection and one of the two series-connected reverse-conductive IGBTs operates in IGBT mode and another of the two series-connected reverse-conductive IGBTs operates in diode mode, and wherein each of the two reverse-conductive IGBTs has three switching states “+15V”, “0V”, “−15V”. The RC-IGBT T1 operated in diode mode does not go into the switching state (−15V) of highly charged carrier concentration, but instead into a state of medium charge carrier concentration associated with the switching state “0V”, and not into the switching state “−15V”, as is known from conventional methods. This reduces the reverse-recovery without adversely affecting the forward voltage. | 2013-12-05 |
20130321063 | MOS SWITCH - This document discusses, among other things, a switch circuit including a switch having a low-impedance state configured to couple a first node to a second node and a high-impedance state configured to isolate the first node from the second node. The switch circuit can include an arbiter circuit configured to receive a source voltage and an input signal, to provide, at an output, the higher voltage of the source voltage and the input signal, and to isolate the input signal form ground when the input signal has a lower voltage than the source voltage. | 2013-12-05 |
20130321064 | HIERARCHICAL SINGLE MOLECULE SWITCH BASED ON STIMULATED INTERNAL CLUSTER MOTION WITHIN A HOLLOW MOLECULAR CAGE - Systems and methods related to single molecule switching devices are disclosed. One example method can include the step of applying a tunneling current across a tunneling junction. The tunneling junction can include an endohedral fullerene that includes a fullerene cage and a trapped cluster or a trapped atom. Such a method can also include exciting one or more internal motions of the trapped cluster or the trapped atom based at least in part on the tunneling current, and changing the conductance of the endohedral fullerene based at least in part on the one or more excited internal motions. One or more electronic processes can be controlled based at least in part on the changed conductance of the endohedral fullerene. | 2013-12-05 |
20130321065 | PROXIMITY SWITCH ASSEMBLY HAVING NON-SWITCH CONTACT AND METHOD - A proximity switch assembly includes first and second proximity switches comprising first and second proximity sensors and a tactile feature disposed between the first and second proximity switches. The assembly also includes controlling circuitry detecting an object on the tactile feature based on sensed signals from the first and second proximity sensors and preventing activation of the first and second switches when an object is detected on the tactile feature. The assembly further includes a resting pad having a third sensor, wherein the control circuitry detects an object with the first sensor and an object on the resting pad and determines activation of the first and second proximity switches based on the detected objects. | 2013-12-05 |
20130321066 | ELECTRONICALLY PROGRAMMABLE FUSE SECURITY ENCRYPTION - A semiconductor structure including a device configured to receive an input data-word. The device including a logic structure configured to generate an encrypted data-word by encrypting the input data-word through an encrypting operation. The device further including an eFuse storage device configured to store the encrypted data-word as eFuse data by blowing fuses in accordance with the encrypted data-word. | 2013-12-05 |
20130321067 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first reference voltage generation unit configured to generate a first reference voltage having a negative property in correspondence to an increase of the temperature; a second reference voltage generation unit configured to generate a second reference voltage having a positive property in correspondence to an increase of the temperature; a voltage level detection unit configured to select any one of the first and second reference voltages according to a voltage selection signal, and detect a level of an internal voltage based on a level of the selected voltage; and an internal voltage generation unit configured to generate the internal voltage in response to an output signal of the voltage level detection unit. | 2013-12-05 |
20130321068 | CIRCUIT FOR GENERATION OF AN ELECTRIC CURRENT WITH A CONFIGURABLE VALUE - A current-generator circuit is for generation of an output current of a value that is configurable as a function of a configuration signal. The circuit may have a first reference resistor element traversed by an intermediate current, the value of which is a function of a reference current, for supplying a first reference voltage. The circuit may also include a resistive divider stage receiving the configuration signal and supplying a second reference voltage as a function of the first reference voltage and of the configuration signal. A second reference resistor element supplies, as a function of the second reference voltage (V | 2013-12-05 |
20130321069 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a clock signal input terminal to receive a clock signal; an inverted clock signal input terminal to receive an inverted clock signal having a phase obtained by reversing a phase of the clock signal; an output terminal for outputting an output voltage, the output voltage being generated by boosting the clock signal and the inverted clock signal; and a pump circuit including a plurality of rectifying circuits connected in series and located between the output terminal and a ground terminal and a plurality of capacitative elements respectively having first terminals respectively connected to anodes of the plurality of rectifying circuits, a second terminal of a last-stage capacitative element located on the output terminal side, the clock signal input terminal and the inverted clock signal input terminal being alternately connected to second terminals of the capacitative elements other than the last-stage capacitative element. | 2013-12-05 |
20130321070 | TRANSLATOR INCLUDING OVERSTRESS PROTECTION - This document discusses, among other things, a control circuit, such as a translator circuit, configured to reduce voltage stress of first and second transistors when a first voltage received by the first transistor exceeds a voltage rating of at least one of the first or second transistors. | 2013-12-05 |
20130321071 | SYSTEM AND METHOD FOR CONTROLLING BYPASS OF A VOLTAGE REGULATOR - A voltage regulator bypass circuit to control bypass of a voltage regulator of an integrated circuit device, the voltage regulator bypass circuit including a first voltage detector, a second voltage detector, and circuit. The first voltage detector to detect that a core circuitry voltage level is above a first threshold and to assert a first detect signal at an output in response to the detection. The second voltage detector to detect that an unregulated supply voltage is above a second threshold and to assert a second detect signal at an output in response to the detection. The circuit having a first input coupled to the output of the first voltage detector and a second input coupled to the output of the second voltage detector, the circuit to bypass the voltage regulator in response the output of the latch being cleared. | 2013-12-05 |