48th week of 2011 patent applcation highlights part 17 |
Patent application number | Title | Published |
20110291241 | SEMICONDUCTOR DEVICE - A semiconductor device that has a reduced size and exhibits a superior blocking voltage capability. A semiconductor device includes an edge termination structure between an active region and an isolation region, the edge termination structure being composed of an edge termination structure for a forward bias section and an edge termination structure for a reverse bias section. A plurality of field limiting rings (FLRs) and a plurality of field plates (FPs) are provided in the edge termination structure for the forward bias section and the edge termination structure for the reverse bias section. A first forward FP that is the nearest of the plurality of FPs to the edge termination structure for the reverse bias section is formed to extend towards the isolation region side. A first reverse FP that is the nearest of the plurality of FPs to the edge termination structure for the forward bias section is formed to extend towards the active region side. The first reverse FP stops the depletion layer expanding from the active region on application of a forward voltage. The first forward FP stops the depletion layer expanding from the isolation region on application of a reverse voltage. | 2011-12-01 |
20110291242 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor device in which an IGBT, a control circuit for the IGBT and so on are formed on an SOI substrate divided by trenches, the invention is directed to providing the IGBT with a higher breakdown voltage, an enhanced turn-off characteristic and so on. An N type epitaxial layer is formed on a dummy semiconductor substrate, a trench is formed in the N type epitaxial layer, an N type buffer layer and then a P type embedded collector layer are formed on the sidewall of the trench and the front surface of the N type epitaxial layer, and the bottom of the trench and the P+ type embedded collector layer are covered by an embedded insulation film. The embedded insulation film is covered by a polysilicon film, and a P type semiconductor substrate is attached to the polysilicon film with an insulation film being interposed therebetween. Then the dummy semiconductor substrate is removed, thereby forming an SOI substrate having the embedded insulation film, the P+ type embedded collector layer, the N type buffer layer, the N type drift layer and so on that are exposed being almost flush with each other on the bottom of the trench. An IGBT and so on are formed on this SOI substrate. | 2011-12-01 |
20110291243 | PLANARIZING ETCH HARDMASK TO INCREASE PATTERN DENSITY AND ASPECT RATIO - Methods for manufacturing a semiconductor device in a processing chamber are provided. In one embodiment, a method includes depositing over a substrate a first base material having a first set of interconnect features, filling an upper portion of the first set of interconnect features with an ashable material to an extent capable of protecting the first set of interconnect features from subsequent processes while being easily removable when desired, planarizing an upper surface of the first base material such that an upper surface of the ashable material filled in the first set of interconnect features is at the same level with the upper surface of the first base material, providing a substantial planar outer surface of the first base material, depositing a first film stack comprising a second base material on the substantial planar outer surface of the first base material, forming a second set of interconnect features in the second base material, wherein the second set of interconnect features are aligned with the first set of interconnect features, and removing the ashable material from the first base material, thereby extending a feature depth of the semiconductor device by connecting the second set of interconnect features to the first set of interconnect features. In another embodiment, a method includes providing a base material having a first film stack deposited thereon, wherein the base material is formed over the substrate and having a first set of interconnect features filled with an amorphous carbon material, the first film stack comprising a first amorphous carbon layer deposited on a surface of the base material, a first anti-reflective coating layer deposited on the first amorphous carbon layer, and a first photoresist layer deposited on the first anti-reflective coating layer, and patterning a portion of the first photoresist layer by shifting laterally a projection of a mask on the first photoresist layer relative to the substrate a desired distance, thereby introducing into the first photoresist layer a first feature pattern to be transferred to the underlying base material, wherein the first feature pattern is not aligned with the first set of interconnect features. | 2011-12-01 |
20110291244 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a wiring substrate having an insulating film formed on a surface thereof, a first semiconductor chip mounted on the wiring substrate, and a second semiconductor chip stacked and mounted on the first semiconductor chip so as to form an overhang portion. The insulating film is removed from an area of the wiring substrate that faces the overhang portion. | 2011-12-01 |
20110291245 | Semiconductor Device with Substrate-Side Exposed Device-Side Electrode and Method of Fabrication - A semiconductor device with substrate-side exposed device-side electrode (SEDE) is disclosed. The semiconductor device has semiconductor substrate (SCS) with device-side, substrate-side and semiconductor device region (SDR) at device-side. Device-side electrodes (DSE) are formed for device operation. A through substrate trench (TST) is extended through SCS, reaching a DSE turning it into an SEDE. The SEDE can be interconnected via conductive interconnector through TST. A substrate-side electrode (SSE) and a windowed substrate-side passivation (SSPV) atop SSE can be included. The SSPV defines an area of SSE for spreading solder material during device packaging. A device-side passivation (DSPV) beneath thus covering the device-side of SEDE can be included. A DSE can also include an extended support ledge, stacked below an SEDE, for structurally supporting it during post-wafer processing packaging. The projected footprint of extended support ledge onto the major SCS plane can essentially enclose the correspondingly projected footprint of SEDE. | 2011-12-01 |
20110291246 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE WITH STACK CHIP STRUCTURE - A semiconductor package includes a plurality of stacked semiconductor chips and a filling material. Each of the stacked semiconductor chips includes a semiconductor substrate having a first surface and a second surface, wherein a circuit pattern such as a bonding pad is formed on the first surface, and a first align pattern formed on the first surface of the semiconductor substrate, wherein the first align pattern is formed of a magnetic material. The filling material fills a gap between the semiconductor chips. | 2011-12-01 |
20110291247 | RELAXATION AND TRANSFER OF STRAINED MATERIAL LAYERS - The present invention relates to a method for the formation of an at least partially relaxed strained material layer, the method comprising the steps of providing a seed substrate; patterning the seed substrate; growing a strained material layer on the patterned seed substrate; transferring the strained material layer from the patterned seed substrate to an intermediate substrate; and at least partially relaxing the strained material layer by a heat treatment. | 2011-12-01 |
20110291248 | SHIELDING STRUCTURE FOR TRANSMISSION LINES - A shielding structure comprises first and second comb-like structures defined in a first metallization layer on an integrated circuit, each comb-like structure comprising a plurality of teeth, the teeth of each comb-like structure extending toward the other comb-like structure; a first plurality of electrically conducting vias extending upward from the first comb-like structure; a second plurality of electrically conducting vias extending upward from the second comb-like structure; first and second planar structures in a second metallization layer above the first metallization layer; a third plurality of electrically conducting vias extending downward from the first planar structure toward the first plurality of electrically conducting vias; and a fourth plurality of electrically conducting vias extending downward from the second planar structure toward the second plurality of electrically conducting vias. The first and second comb-like structures, the first and second planar structures and the first, second, third, and fourth electrically conducting vias all being at substantially the same potential, preferably ground. In one embodiment, one or more signal lines are located in the second metallization layer between the first and second planar structures; and in another embodiment they are located in a third metallization layer between the first and second metallization layers. | 2011-12-01 |
20110291249 | Semiconductor Device and Method of Forming Conductive Posts and Heat Sink Over Semiconductor Die Using Leadframe - A semiconductor device has a prefabricated multi-die leadframe with a base and integrated raised die paddle and a plurality of bodies extending from the base. A thermal interface layer is formed over a back surface of a semiconductor die or top surface of the raised die paddle. The semiconductor die is mounted over the raised die paddle between the bodies of the leadframe with the TIM disposed between the die and raised die paddle. An encapsulant is deposited over the leadframe and semiconductor die. Vias can be formed in the encapsulant. An interconnect structure is formed over the leadframe, semiconductor die, and encapsulant, including into the vias. The base is removed to separate the bodies from the raised die paddle. The raised die paddle provides heat dissipation for the semiconductor die. The bodies are electrically connected to the interconnect structure. The bodies operate as conductive posts for electrical interconnect. | 2011-12-01 |
20110291250 | SEMICONDUCTOR CHIP PACKAGE - A semiconductor chip package is provided. The semiconductor chip package includes a lead frame having a chip carrier. A semiconductor chip is mounted on the chip carrier, having a plurality of bonding pads thereon. A package substrate has a cavity therein to accommodate the chip carrier and the semiconductor chip, wherein at least one of the bonding pads of the semiconductor chip is electrically coupled to the package substrate. | 2011-12-01 |
20110291251 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a first lead adjacent and staggered to a second lead, the first lead having a first external connection portion with a first external conductive layer and a first internal connection portion, the first external connection portion oriented laterally outwards from the first internal connection portion, and the second lead having a second external connection portion with a second external conductive layer and a second internal connection portion; connecting an integrated circuit device with the first internal connection portion and with the second internal connection portion; forming an encapsulation over the integrated circuit device with the first lead and the second lead exposed; and forming a solder mask on the encapsulation, on the first lead, and on the second lead with the first external conductive layer and the second external conductive layer exposed from the solder mask. | 2011-12-01 |
20110291252 | METHOD AND SYSTEM FOR FORMING A THIN SEMICONDUCTOR DEVICE - A method and system for forming a thin semiconductor device are disclosed. In one embodiment, a lead frame is provided over a carrier. At least one semiconductor chip is provided on the lead frame and the at least one semiconductor chip is enclosed with an encapsulating material. The thickness of the at least one semiconductor chip and the encapsulating material are reduced. At least one through connection is formed in the encapsulating material and at least one electrical contact element is formed over the at least one semiconductor chip and the at least one through connection. | 2011-12-01 |
20110291253 | LEAD FRAME, ELECTRONIC COMPONENT INCLUDING THE LEAD FRAME, AND MANUFACTURING METHOD THEREOF - A lead frame of the present invention includes: a die pad on which a device is mounted; a first connection terminal which is provided around the die pad, and the lower surface of which serves as an external terminal; a second connection terminal which is provided around the die pad and electrically independent of the die pad, and the upper surface of which serves as an external terminal; a bent part provided between the first and the second connection terminals and connecting the first and the second connection terminals; and an outer frame. The bent part is bending-processed in a direction perpendicular to a face of the die pad. Within the outer frame, electronic component regions are formed adjoining each other and each including a die pad, and the first and the second connection terminals. The adjoining electronic components are connected through the first or the second connection terminal. | 2011-12-01 |
20110291254 | SEMICONDUCTOR DEVICE PACKAGE FEATURING ENCAPSULATED LEADFRAME WITH PROJECTING BUMPS OR BALLS - Embodiments of the present invention relate to semiconductor device packages featuring encapsulated leadframes in electrical communication with at least one die through electrically conducting bumps or balls and electrically conducting ribbons. Embodiments of the present invention may permit multiple die and/or multiple passive devices to occupy space in the package previously consumed by the diepad. The result is a flexible packaging process allowing the combination of die and technologies required for complete sub-systems in a conventional small JEDEC specified footprint. | 2011-12-01 |
20110291255 | CARRIER FOR CHIP PACKAGES - A carrier for holding a plurality of chip packages and a carrier assembly are provided, wherein the chip package has a central area without solder balls and a peripheral area with solder balls formed thereon. The carrier includes a tray component and a plurality of supports disposed on the tray component, wherein each support holds the central area of a respective chip package. The carrier assembly is formed by stacking a plurality of the carriers through a plurality of peripheral projections disposed at a periphery of each tray component, wherein each peripheral projection has a pin formed thereon and a hole formed thereunder. | 2011-12-01 |
20110291256 | Method for Fabricating a Semiconductor Chip Package and Semiconductor Chip Package - A semiconductor chip includes a contact pad on a main surface of the chip. An electrically conductive layer is applied onto the contact pad. The main surface of the semiconductor chip is covered with an insulating layer. An electrically conductive contact area is formed within the insulating layer such that the contact area and the insulating layer include coplanar exposed surfaces and the contact area is electrically connected with the electrically conductive layer and includes an extension which is greater than the extension of the electrically conductive layer along a direction parallel to the main surface of the semiconductor chip. | 2011-12-01 |
20110291257 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit over a package carrier; pressing an encapsulation onto the package carrier and with the integrated circuit therein; mounting a conductive frame, having a vertical pillar integral with a horizontal cover, through the encapsulation, over the integrated circuit, and the vertical pillar on the package carrier and the horizontal cover on the encapsulation; and forming a contact from the horizontal cover. | 2011-12-01 |
20110291258 | HEAT RADIATION COMPONENT AND SEMICONDUCTOR PACKAGE INCLUDING SAME - A heat radiation component configured to be provided through a thermal interface material on a semiconductor device mounted on a board includes a first layer to be positioned on a first side and a second layer stacked on the first layer to be positioned on a second side farther from the semiconductor device than the first side. The coefficient of thermal expansion of the second layer is lower than the coefficient of thermal expansion of the first layer. | 2011-12-01 |
20110291259 | Reliable metal bumps on top of I/O pads after removal of test probe marks - In accordance with the objectives of the invention a new method is provided for the creation of metal bumps over surfaces of I/O pads. Contact pads are provided over the surface of a layer of dielectric. The aluminum of the I/O pads, which have been used as I/O pads during wafer level semiconductor device testing, is completely or partially removed over a surface area that is smaller than the surface area of the contact pad using methods of metal dry etching or wet etching. The contact pad can be accessed either by interconnect metal created in a plane of the contact pad or by via that are provided through the layer of dielectric over which the contact pad has been deposited. The process can be further extended by the deposition, patterning and etching of a layer of polyimide over the layer of passivation that serves to protect the contact pad. | 2011-12-01 |
20110291260 | SEMICONDUCTOR ENCAPSULATION ADHESIVE COMPOSITION, SEMICONDUCTOR ENCAPSULATION FILM-LIKE ADHESIVE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A semiconductor encapsulation adhesive composition comprising (a) an epoxy resin, (b) a curing agent and (c) an antioxidant. | 2011-12-01 |
20110291261 | THREE DIMENSIONAL STACKED PACKAGE STRUCTURE - An apparatus, system, and method are disclosed for connecting integrated circuit devices. A plurality of primary electrically conductive contacts and a plurality of primary electrically conductive pillars are electrically coupled to a primary integrated circuit device. The plurality of primary electrically conductive contacts form a pattern corresponding to secondary electrically conductive contacts disposed on one or more secondary integrated circuit devices. The plurality of primary electrically conductive pillars extends away from the primary integrated circuit device. The plurality of primary electrically conductive pillars forms a pattern that corresponds to substrate electrically conductive contacts that are disposed on a substrate. The plurality of primary electrically conductive pillars and associated connecting material provide a standoff height between the primary integrated circuit device and the substrate that is greater than or equal to a height of the one or more secondary integrated circuit devices. | 2011-12-01 |
20110291262 | Strength of Micro-Bump Joints - A device includes a work piece including a metal bump; and a dielectric layer having a portion directly over the metal bump. The metal bump and a surface of the portion of the dielectric layer form an interface. A metal finish is formed over and contacting the metal bump. The metal finish extends from over the dielectric layer to below the interface. | 2011-12-01 |
20110291263 | IC HAVING DIELECTRIC POLYMERIC COATED PROTRUDING FEATURES HAVING WET ETCHED EXPOSED TIPS - A method of fabricating IC die includes providing a substrate having a topside semiconductor surface including active circuitry and a bottomside surface. The IC die includes at least one protruding feature coupled to the active circuitry that protrudes from the bottomside surface or the topside semiconductor surface. The topside semiconductor surface and/or bottomside surface and the protruding feature are coated with a dielectric polymer. A portion of the dielectric polymer is removed from the protruding feature using a solvent to expose a tip portion of the protruding feature for electrical connection thereto. With a solvent that does not corrode or oxidize the exposed protruding feature tips, the need for a conventional subsequent chemical exposure to remove corrosion or oxidation is avoided. | 2011-12-01 |
20110291264 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POSTS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor wafer having a chip pad; attaching a wafer frame to the semiconductor wafer, the wafer frame having a horizontal cover integral to a protruding connector with the protruding connector on the chip pad; forming an underfill around the protruding connector and between the horizontal cover and the semiconductor wafer; removing the horizontal cover exposing the underfill and the protruding connector; and singulating an integrated circuit package from the semiconductor wafer. | 2011-12-01 |
20110291265 | SEMICONDUCTOR INTEGRATED CIRCUIT HAVING A MULTI-CHIP STRUCTURE - A semiconductor integrated circuit having a multi-chip structure includes a number of stacked semiconductor chips. Each of the semiconductor chips includes a first through electrode formed through the semiconductor chip, a first bump pad formed over the semiconductor chip at a region where the first bump pad is separated from the first through electrode, a first internal circuit formed inside the semiconductor chip, coupled to the first through electrode through a first metal path, and coupled to the first bump pad through a second metal path; and a redistribution layer (RDL) formed over a backside of the semiconductor chip. | 2011-12-01 |
20110291266 | SEMICONDUCTOR INTEGRATED CIRCUIT HAVING A MULTI-CHIP STRUCTURE - A semiconductor integrated circuit having a multi-chip structure includes a plurality of stacked semiconductor chips. At least one of the semiconductor chips includes first and second metal layers separately formed inside the semiconductor chip, a first internal circuit coupled in series between the first and second metal layers inside the semiconductor chip, a first metal path vertically formed over the second metal layer to a first side of the semiconductor chip, and a first through silicon via formed through the semiconductor chip from a second side of the semiconductor chip to the first metal layer. | 2011-12-01 |
20110291267 | Semiconductor wafer structure and multi-chip stack structure - A semiconductor wafer structure comprises a first surface and a second surface opposite to the first surface, a plurality of chip areas formed on the first surface, a plurality of through-silicon holes formed in each of the plurality of chip areas connecting the first surface and the second surface, and a through-silicon-via (TSV) electrode structure formed in each through-silicon hole. Each through-silicon-via electrode structure comprises a dielectric layer formed on the inner wall of the through-silicon hole, a barrier layer formed on the inner wall of the dielectric layer and defining a vacancy therein, a filling metal layer filled into the vacancy, a first end of the filling metal layer being lower than the first surface forming a recess, and a soft metal cap connecting to and overlaying the first end of the filling metal layer, wherein a portion of the soft metal cap is formed in the recess and the soft metal cap protrudes out of the first surface. Hence, the reliability of multi-chip stack package structure can be enhanced with the application of these soft metal caps. | 2011-12-01 |
20110291268 | Semiconductor wafer structure and multi-chip stack structure - A semiconductor wafer structure comprises a first surface and a second surface opposite to the first surface, a plurality of chip areas formed on the first surface, a plurality of through-silicon holes formed in each of the plurality of chip areas connecting the first surface and the second surface, and a through-silicon-via (TSV) electrode structure formed in each through-silicon hole. Each through-silicon-via electrode structure comprises a dielectric layer formed on the inner wall of the through-silicon hole, a barrier layer formed on the inner wall of the dielectric layer and defining a vacancy therein, a filling metal layer filled into the vacancy, a first end of the filling metal layer being lower than the first surface forming a recess, and a soft metal cap connecting to and overlaying the first end of the filling metal layer, wherein a portion of the soft metal cap is formed in the recess and the soft metal cap protrudes out of the first surface. Hence, the reliability of multi-chip stack package structure can be enhanced with the application of these soft metal caps. | 2011-12-01 |
20110291269 | Semiconductor Device Comprising a Stacked Die Configuration Including an Integrated Peltier Element - In a stacked semiconductor device, a Peltier element may be incorporated as a distributed element so as to provide active heat transfer from a high power device into a low power device, thereby achieving superior temperature control in stacked device configurations. For example, a CPU and a dynamic RAM device may be provided as a stacked configuration, wherein waste heat of the CPU may be efficiently distributed into the low power memory device. | 2011-12-01 |
20110291270 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND MOUNTING STRUCTURE THEREOF - A semiconductor device with improved quality and reliability is provided. In a UBM formed over an electrode pad located over a semiconductor substrate, the edge (end) of an Au film as an upper layer is located inside or in the same position as the edge (end) of a TiW film as a lower layer, which can suppress the formation of a suspended part in the Au film. This arrangement can prevent the occurrence of electrical short circuit between the adjacent pads due to the suspended part and the adhesion of the suspended part as foreign matter to the semiconductor substrate, thus improving the quality and reliability of the semiconductor device (semiconductor chip). | 2011-12-01 |
20110291271 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE - A semiconductor chip such as an MMIC is provided. The semiconductor chip has: a Si semiconductor as a substrate; and a low-loss transmission line, and can be easily connected to a circuit board on which the semiconductor chip is to be mounted and can ensure a stable GND potential. The semiconductor chip is a flip-chip semiconductor chip, and includes: a Si substrate; an integrated circuit manufactured on a main surface of the substrate; a dielectric film formed above the integrated circuit; and a conductor film for grounding formed on an upper surface of the dielectric film. The integrated circuit includes a wiring layer including a signal line which transmits signals for the integrated circuit. The signal line, the dielectric film, and the conductor film constitute a microstrip line. | 2011-12-01 |
20110291272 | CHIP STRUCTURE - A chip structure includes a semiconductor substrate, an interconnecting metallization structure, a passivation layer, a circuit layer and a bump. The interconnecting metallization structure is over the semiconductor substrate. The passivation layer is over the interconnecting metallization structure. The circuit layer is over the passivation layer. The bump is on the circuit layer, and the bump is unsuited for being processed using a reflow process. | 2011-12-01 |
20110291273 | CHIP BUMP STRUCTURE AND METHOD FOR FORMING THE SAME - A chip bump structure is formed on a substrate. The substrate includes at least one contact pad and a dielectric layer. The dielectric layer has at least one opening. The at least one opening exposes the at least one contact pad. The chip bump structure includes at least one elastic bump, at least one first metal layer, at least one second metal layer, and at least one solder ball. The at least one elastic bump covers a central portion of the at least one contact pad. The at least one first metal layer covers the at least one elastic bump. The at least one first metal layer has a portion of the at least one contact pad. The portion of the at least one contact pad is not overlaid by the at least one elastic bump. The at least one second metal layer is formed on a portion of the at least one first metal layer. The portion of the at least one first metal layer is located on the top of the at least one elastic bump. The at least one solder ball is formed on the at least one second metal layer. The at least one solder ball is also on the top of the at least one elastic bump. | 2011-12-01 |
20110291274 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is disclosed. One embodiment provides a carrier. Semiconductor chips are placed over the carrier. The semiconductor chips include contact elements. A polymer material is applied over the semiconductor chips and the carrier. The polymer material is removed until the contact elements are exposed. The carrier is removed from the semiconductor chips. | 2011-12-01 |
20110291275 | METHOD OF ASSEMBLING CHIPS - A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material. | 2011-12-01 |
20110291276 | MAGNETICALLY SINTERED CONDUCTIVE VIA - The present disclosure relates to the field of fabricating microelectronic packages, wherein microelectronic components of the microelectronic packages may have sintered conductive vias comprising sintered metal and magnetic particles. | 2011-12-01 |
20110291277 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DEVICE - A semiconductor device includes a wiring, a stack of first, second, and third films, and a contact plug. The stack of first, second, and third films is located over the wiring. The first, second, and third films are stacked in this order. The stack has an opening. The first film is made of the same material as the third film. The contact plug is in the opening. The contact plug is in contact with the wiring. | 2011-12-01 |
20110291278 | SEMICONDUCTOR DEVICES WITH LOW RESISTANCE BACK-SIDE COUPLING - Electronic elements with very low resistance back-side coupling are provided by forming one or more narrow trenches or pipes, preferably dielectric lined, in front sides of substrates, filling the trenches or pipes with a conductor having a coefficient of expansion not too different from that of the substrate but of higher conductivity, forming an epitaxial SC layer over the front side of the substrate in Ohmic contact with the conductor the trenches or pipes, forming various semiconductor (SC) devices in the epi-layer, back grinding the substrate to expose bottoms of the conductor filled trenches or pipes, and providing a back-side conductor contacting the conductor in the trenches or pipes. For silicon SCs, tungsten is a suitable conductor for filling the trenches or pipes to minimize substrate stress. Series ON-resistance of the elements due to the substrate resistance is substantially reduced. | 2011-12-01 |
20110291279 | SEMICONDUCTOR ARTICLE HAVING A THROUGH SILICON VIA AND GUARD RING - Disclosed is a semiconductor article which includes a semiconductor base portion, a back end of the line (BEOL) wiring portion on the semiconductor base portion, a through silicon via and a guard ring. The semiconductor base portion is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having metallic wiring and insulating material. The BEOL wiring portion does not include a semiconductor material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor base portion. The guard ring surrounds the through silicon via in the BEOL wiring portion. | 2011-12-01 |
20110291280 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film. | 2011-12-01 |
20110291281 | PARTIAL AIR GAP FORMATION FOR PROVIDING INTERCONNECT ISOLATION IN INTEGRATED CIRCUITS - Partial air gap formation for providing interconnect isolation in integrated circuits is described. One embodiment is an integrated circuit (“IC”) structure includes a substrate having two adjacent interconnect features formed thereon; caps formed over and aligned with each of the interconnect features; sidewalls formed on opposing sides of each of the interconnect features and a gap formed between the interconnect features; and a dielectric material layer disposed over the substrate to cover the caps and the gap. | 2011-12-01 |
20110291282 | JUNCTION BODY, SEMICONDUCTOR MODULE, AND MANUFACTURING METHOD FOR JUNCTION BODY - A junction body has a first member and a second member each of which is provided with a joining surface whose main component is copper. A solder member containing, in a tin-base solder material, a three-dimensional web structure whose main component is copper is provided between the first member and the second member. A copper-tin alloy whose average thickness is 2 μm or more but 20 μm or less is provided between the joining surfaces and the three-dimensional web structure. | 2011-12-01 |
20110291283 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EMBEDDED DIE SUPERSTRUCTURE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system includes: providing a through-silicon-via die having conductive vias therethrough; forming a first redistribution layer on a bottom of the through-silicon-via die coupled to the conductive vias; forming a second redistribution layer on the top of the through-silicon-via die coupled to the conductive vias; fabricating an embedded die superstructure on the second redistribution layer including: mounting an integrated circuit die to the second redistribution layer, forming a core material layer on the second redistribution layer to be coplanar with the integrated circuit die, forming a first build-up layer, having contact links coupled to the integrated circuit die, on the core material layer, and coupling component interconnect pads to the contact links; and forming system interconnects on the first redistribution layer for coupling the through-silicon-via die, the integrated circuit die, the component interconnect pads, or a combination thereof. | 2011-12-01 |
20110291284 | INTERCONNECT STRUCTURE WITH AN OXYGEN-DOPED SiC ANTIREFLECTIVE COATING AND METHOD OF FABRICATION - An interconnect structure is provided that includes at least one patterned and cured photo-patternable low k material located on a surface of a patterned and cured oxygen-doped SiC antireflective coating (ARC). A conductively filled region is located within the at least one patterned and cured photo-patternable low k material and the patterned and cured oxygen-doped SiC ARC. The oxygen-doped SiC ARC, which is a thin layer (i.e., less than 400 angstroms), does not produce standing waves that may degrade the diffusion barrier and the electrically conductive feature that are embedded within the patterned and cured photo-patternable low k dielectric material and, as such, structural integrity is maintained. Furthermore, since a thin oxygen-doped SiC ARC is employed, the plasma etch process time used to open the material stack of the ARC/dielectric cap can be reduced, thus reducing potential plasma damage to the patterned and cured photo-patternable low k material. Also, the oxygen-doped SiC ARC can withstand current BEOL processing conditions. | 2011-12-01 |
20110291285 | Semiconductor Device Comprising a Die Seal with Graded Pattern Density - A die seal of a semiconductor device may be provided with a varying pattern density such that a gradient between the die region and the die seal may be reduced. Consequently, for a given width of the die seal, a required mechanical stability may be achieved, while at the same time differences in topography between the die region and the die seal may be reduced, thereby contributing to superior process conditions for sophisticated lithography processes. | 2011-12-01 |
20110291286 | ELECTRONIC DEVICE AND METHOD FOR CONNECTING A DIE TO A CONNECTION TERMINAL - An electronic device including a die-pad area, a die fixed to the die-pad area, a connection terminal, and a ribbon of conductive material. The ribbon is electrically connected to the die and to the connection terminal, and has a prevalent dimension along a first axis, a width, measured along a second axis, which is transverse to the first axis, and a thickness, which is negligible with respect to the width; the ribbon moreover has a cross section that defines a concave geometrical shape. | 2011-12-01 |
20110291287 | THROUGH-SILICON VIAS WITH LOW PARASITIC CAPACITANCE - A device has a silicon substrate with a via extending from a first surface of the silicon substrate having a conductor portion. A first dielectric portion surrounds the conductor portion. A second dielectric portion is disposed between a first silicon portion and the silicon substrate. | 2011-12-01 |
20110291288 | PACKAGE SYSTEMS HAVING INTERPOSERS - A package system includes an integrated circuit disposed over an interposer. The interposer includes a first interconnect structure. A first substrate is disposed over the first interconnect structure. The first substrate includes at least one first through silicon via (TSV) structure therein. A molding compound material is disposed over the first interconnect structure and around the first substrate. The integrated circuit is electrically coupled with the at least one first TSV structure. | 2011-12-01 |
20110291289 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes first power supply through-chip vias formed through the semiconductor chip to be in a line in a first direction of the semiconductor chip, second power supply through-chip vias formed through the semiconductor chip to be in, first power lines arranged in a second direction, wherein each of the plurality of first power lines is coupled to each of the first power supply through-chip vias, and second power lines arranged in the second direction, wherein each of the plurality of second power lines is coupled to each of the second power supply through-chip vias. | 2011-12-01 |
20110291290 | SEMICONDUCTOR DEVICE - A semiconductor device includes a through-silicon-via arranged to couple a plurality of stacked semiconductor chips, an interconnection line coupled to the through-silicon-via at one side and arranged to couple the through-silicon-via to the semiconductor chip, an internal interconnection line disposed at the other side of the interconnection line and intersected with the interconnection line, and at least one first contact disposed to couple the internal interconnection line to the interconnection line. A region of the interconnection line in which the internal interconnection line is disposed is equally divided, and an area between the divided regions is removed. | 2011-12-01 |
20110291291 | Silicon Chip Having Penetrative Connection Holes - Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus, fabrication is made easy and cost is reduced. | 2011-12-01 |
20110291292 | Selective Shrinkage of Contact Elements in a Semiconductor Device - In sophisticated semiconductor devices, the contact elements connecting to active semiconductor regions having formed thereabove closely spaced gate electrode structures may be provided on the basis of a liner material so as to reduce the lateral width of the contact opening, while, on the other hand, non-critical contact elements may be formed on the basis of non-reduced lateral dimensions. To this end, at least a first portion of the critical contact element is formed and provided with a liner material prior to forming the non-critical contact element. | 2011-12-01 |
20110291293 | METHOD FOR MANUFACTURING AN ELECTRONIC MODULE AND AN ELECTRONIC MODULE - This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component ( | 2011-12-01 |
20110291294 | Multi-Chip Package - A multi-chip package may include a first semiconductor package, a second semiconductor package and an interposer chip. The second semiconductor package may be arranged over the first semiconductor package. The interposer chip may be interposed between the first semiconductor package and the second semiconductor package. The interposer chip may have a receiving groove configured to receive the first semiconductor package. Thus, electrical connection reliability between the first semiconductor package and the second semiconductor package may be improved under a condition that the connecting terminals may have small sizes. | 2011-12-01 |
20110291295 | SEMICONDUCTOR DEVICE - A semiconductor device comprises a substrate, pluralities of first and second external electrodes formed in two end portions of one surface of the substrate, a first semiconductor chip mounted on the other surface of the substrate, the first semiconductor chip having an electrode pad row formed in one end portion of one surface of the first semiconductor chip and electrically connected to the first external electrodes, the first semiconductor chip being disposed so that the one end portion of the first semiconductor chip is positioned on an end portion on which the first external electrodes of the substrate are formed, and a second semiconductor chip mounted on the first semiconductor chip, the second semiconductor chip having an electrode pad row formed in one end portion of one surface of the second semiconductor chip and electrically connected to the second external electrode, the second semiconductor chip being disposed so that the one end portion of the second semiconductor chip is positioned on an end portion on which the second external electrodes of the substrate are formed. | 2011-12-01 |
20110291296 | PACKAGE STACKING THROUGH ROTATION - A packaged microelectronic element includes a package element that further includes a dielectric element having a bottom face and a top face, first and second bond windows extending between the top and bottom faces, a plurality of chip contacts disposed at the top face adjacent to the first and second bond windows, and first and second sets of package contacts exposed at diagonally opposite corner regions of the top face, wherein the first and second sets conductively connected to the chip contacts. There is also a microelectronic element adjacent to the bottom face of the dielectric element, as well as bond wires extending through the first and second bond windows to conductively connect the microelectronic element to the chip contacts. | 2011-12-01 |
20110291297 | MICROELECTRONIC PACKAGES HAVING CAVITIES FOR RECEIVING MICROELECTRONIC ELEMENTS - Packaged microelectronic elements are provided which include a dielectric element, a cavity, a plurality of chip contacts and a plurality of package contacts, and microelectronic elements having a plurality of bond pads connected to the chip contacts. | 2011-12-01 |
20110291298 | Chip Package Including Multiple Sections for Reducing Chip Package Interaction - Thermally induced stress in a semiconductor die, i.e., in a complex metallization system thereof, may be reduced by “dividing” a package substrate into two or more substrate sections, which may have formed therebetween an appropriate stress buffer region, for instance a region of superior resiliency. In this case, the total deformation of the package substrate may be reduced, thereby also reducing the thermally induced stress forces in the complex metallization system of the semiconductor die. Hence, for a given size and complexity of a metallization system, an increased production yield and superior reliability may be achieved. | 2011-12-01 |
20110291299 | Stress Reduction in Chip Packaging by a Stress Compensation Region Formed Around the Chip - A stress compensation region that may be appropriately positioned on a package substrate may compensate for or at least significantly reduce the thermally induced mechanical stress in a sensitive metallization system of a semiconductor die, in particular during the critical reflow process. For example, a stressor ring may be formed so as to laterally surround the chip receiving portion of the package substrate, wherein the stressor ring may efficiently compensate for the thermally induced deformation in the chip receiving portion. | 2011-12-01 |
20110291300 | DICING SHEET-ATTACHED FILM FOR FORMING SEMICONDUCTOR PROTECTION FILM, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE USING THE SAME, AND SEMICONDUCTOR DEVICE - The present invention includes a dicing sheet-attached film for forming a semiconductor protection film ( | 2011-12-01 |
20110291301 | Method for Producing Semiconductor Components, and Corresponding Semiconductor Component - A method for producing semiconductor components and a component obtainable by such a method is disclosed. The method comprises the following steps: fixing a conductive film on a carrier; adhesively bonding semiconductor chips onto the conductive film using an adhesive layer, wherein active surfaces of the semiconductor chips, the active surfaces having connection contacts, are situated on that side of the chips which faces the film; overmolding the chips adhesively bonded onto the conductive film with a molding compound; and releasing the conductive film with the overmolded chips from the carrier. In this case, the adhesive layer is structured in such a way that at least connection contacts of the semiconductor chips are free of the adhesive layer and are kept free of the molding compound. | 2011-12-01 |
20110291302 | METHOD AND APPARATUS FOR MANUFACTURING AN ELECTRONIC ASSEMBLY, ELECTRONIC ASSEMBLY MANUFACTURED WITH THE METHOD OR IN THE APPARATUS - A method of producing an electronic module with at least one electronic component and one carrier. A structure is provided on the carrier so that the electronic component can take a desired target position relative to the structure. The structure is coated with a liquid meniscus suitable for receiving the electronic component. Multiple electronic components are provided at a delivery point for the electronic components. The carrier, with the structure, is moved nearby and opposite to the delivery point, where the delivery point delivers one of the electronic components without contact, while the structure on the carrier is moving near the delivery point, so that after a phase of free movement the electronic component at least partly touches the material, and the carrier, with the structure, is moved to a downstream processing point, while the electronic component aligns itself to the structure on the liquid meniscus. | 2011-12-01 |
20110291303 | Semiconductor Device, Substrate for Producing Semiconductor Device and Method of Producing Them - A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces. | 2011-12-01 |
20110291304 | METHOD OF MAKING MICROELECTRONIC PACKAGE USING INTEGRATED HEAT SPREADER STIFFENER PANEL AND MICROELECTRONIC PACKAGE FORMED ACCORDING TO THE METHOD - A method of making a microelectronic package, and a microelectronic package made according to the method. The method includes: bonding and thermally coupling a plurality of IC dies to an IHS panel to yield a die-carrying IHS panel; mounting the die-carrying IHS panel onto a substrate panel including a plurality of package substrates to yield a combination including the die-carrying IHS panel mounted to the substrate panel; and singulating the combination to yield a plurality of microelectronic packages, each of the packages including: an IHS component of the IHS panel, one of the plurality IC dies bonded and thermally coupled to said IHS component, and one of the plurality of package substrates, said IHS component and said one of the plurality of IC dies being mounted to said one of the plurality of package substrates to form said each of the packages. | 2011-12-01 |
20110291305 | HUMIDIFIER - Disclosed herein is a humidifier. The humidifier includes a rear casing, a front casing placed in front of the rear casing and having an opening formed on its front side, a fan housing having an air intake unit formed on its front side, wherein an air blower unit is formed on one side of a circumference part of the fan housing, a humidification filter placed in front of the air intake unit, and a water tank placed on a side of the humidification filter. The fan housing has a partition wall projected therefrom between the humidification filter and the water tank, and the partition wall partitions a front side of the fan housing into a space through which air passes and a space where the water tank is placed. | 2011-12-01 |
20110291306 | Retrofit Roll-Over Valve for Carburetor Float Bowl Vent Tube - A roll-over valve attaches over an existing carburetor float bowl vent tube and closes when a car is involved in a crash to prevent or reduce fuel from escaping from a tilted or inverted carburetor and starting a fire. Carburetors are used in many special interest cars and race cars. The carburetors include float bowls containing fuel and the float bowls are vented to outside air by the carburetor vent tubes. The carburetor vent tubes are generally vertical tubes reaching upward from the carburetor into an air cleaner or the volume above the carburetor. The roll-over valve includes a compression fitting or other connector and is easily fitted to the carburetor. | 2011-12-01 |
20110291307 | Mixing device for mixing water and water vapor in a diversion station - A diversion station is provided. The diversion station makes it possible to particularly effectively cool diverted water vapor by mixing it with water. The diversion station includes a mixing device, which comprises a so-called static mixer that is substantially made of a wire mesh. The wire mesh is produced by at least one wire that is substantially interlaced into loops. In the intended installation situation, the mixer is installed upstream of a water injection with regard to a flow direction specified by the water vapor such that the mixture of water and water vapor flows through the loops. | 2011-12-01 |
20110291308 | Misting Array Assembly of an Abatement System - Various methods and apparatus are disclosed that relate to one or more aspects of an abatement system that removes heat and/or one or more byproducts of combustion from a gas flow. In various aspects a misting array assembly is provided that includes at least one nozzle tubing having at least one nozzle coupled thereto. | 2011-12-01 |
20110291309 | Removable Misting Array Assembly for an Abatement System - Various methods and apparatus are disclosed that relate to one or more aspects of an abatement system that removes heat and/or one or more byproducts of combustion from a gas flow. In various aspects a misting array assembly is provided that includes at least one nozzle tubing having at least one nozzle coupled thereto. | 2011-12-01 |
20110291310 | METHOD FOR CONSTRUCTING A MONOLITHIC REFRACTORY CONCRETE FURNACE FOR THE MANUFACTURE OF GLASS - A method for the monolithic furnaces construction with refractory concrete for the manufacture of glass through the formation of temporary structures for the filling and molded of refractory concrete. | 2011-12-01 |
20110291311 | PROCESS FOR EXTENDING THE CYCLIC SERVICE LIFE OF THERMAL BARRIER COATINGS, IN PARTICULAR ON GAS TURBINE COMPONENTS - A process for extending the cyclic service life of thermal barrier coatings made of yttrium-stabilized zirconium oxide (YSZ) or the like which have been applied to a substrate with an oxidizing bond coat in between includes increasing or long-term stabilizing the strain tolerance of the thermal barrier coating. | 2011-12-01 |
20110291312 | EXTRUSION DIE - In an extrusion die in which a mandrel ring is outwardly arranged around a spindle, the present invention aims to enhance the fixing stability of the mandrel ring and enables easy maintenance. The extrusion die includes a mandrel ( | 2011-12-01 |
20110291313 | Methods For Forming Ceramic Honeycomb Articles - Processes for manufacturing porous ceramic honeycomb articles are disclosed. The processes include mixing a batch of inorganic components with processing aids to form a plasticized batch. The batch of inorganic components include talc having d | 2011-12-01 |
20110291314 | CAST FORMED FILTER AND METHOD OF MAKING THE SAME - A cast formed filter and a method for making the filter is provided. The method includes disposing a liquid filter media in a cavity of a molding tool, the molding tool having a plurality of features configured so that the filter media is formed about the plurality of features to form a plurality of inlet openings and a plurality of outlet openings in the filter media; applying at least one of pressure and heat to the filter media disposed in the molding tool to cure the liquid filter media and obtain a cast formed filter media defined by the cavity of the molding tool; and removing the cast formed filter media from the molding tool, wherein the cast formed filter media maintains a configuration having a three-dimensional periphery and the plurality of inlet openings extend from an inlet end of the cast filter media into the cast formed filter media so a first portion of the cast formed filter media is disposed between each of the plurality of inlet openings and an outlet end, and the plurality of outlet openings extend from the outlet end into the cast formed cast filter media so a second portion of the cast formed filter media is disposed between each of the plurality of outlet openings and the inlet end. | 2011-12-01 |
20110291315 | METHODS FOR ARRANGING NANOSCOPIC ELEMENTS WITHIN NETWORKS, FABRICS, AND FILMS - A method for arranging nanotube elements within nanotube fabric layers and films is disclosed. A directional force is applied over a nanotube fabric layer to render the fabric layer into an ordered network of nanotube elements. That is, a network of nanotube elements drawn together along their sidewalls and substantially oriented in a uniform direction. In some embodiments this directional force is applied by rolling a cylindrical element over the fabric layer. In other embodiments this directional force is applied by passing a rubbing material over the surface of a nanotube fabric layer. In other embodiments this directional force is applied by running a polishing material over the nanotube fabric layer for a predetermined time. Exemplary rolling, rubbing, and polishing apparatuses are also disclosed. | 2011-12-01 |
20110291316 | METHOD FOR MANUFACTURING WOOD FIBER INSULATING BOARDS - The invention relates to a method for manufacturing wood fiber insulating boards, wherein wood fibers are mixed with thermoplastic plastic fibers as binders and a fiber mat is produced therefrom, wherein multi-component fibers composed of at least one first and one second plastic component having different melting points are used as plastic fibers, wherein the fiber mat is heated in such a way that the second component of the plastic fiber softens and wherein the fiber mat is cooled down to produce the insulating board, characterized in that a steam/air mixture having a specified dew point flows through the fiber mat to heat the fiber mat and that multi-component plastic fibers are used as binders, the first component of which has a melting point above the dew point and the second component of which has a melting point below the dew point. | 2011-12-01 |
20110291317 | METHOD OF MAKING STRONG, STIFF CORE MATERIALS THAT FACILITATE THE MANUFACTURE, DISTRIBUTION AND RECYCLING OF COMPOSITE PARTS OBTAINED THEREFROM - Moldable, curable, reinforcing particle-filled compositions and methods for making the compositions are provided. The moldable compositions are characterized by high loadings of reinforcing filler particles in a thermosetting matrix and, as such, can be strong, yet lightweight. The moldable compositions can be formed into shaped cores and cured to provide a variety of articles. Optionally, a layer of reinforcing material can be applied over the shaped cores to finish and strengthen the final article. | 2011-12-01 |
20110291318 | METHOD AND DEVICE FOR EXTRUSION OF HOLLOW PELLETS - Described herein are extrusion processes to produce hollow pellets. Also disclosed are pelletizer devices that can be used to produce the hollow pellets. The processes and devices make use of an extrusion die having a die orifice and an insert that is placed in the die orifice to produce the hollow pellets. | 2011-12-01 |
20110291319 | Methods of Extruding a Honeycomb Body - Methods of extruding a honeycomb body with an extruder comprise the step of feeding batch material to the extruder, wherein the batch material comprises a ceramic or ceramic-forming material. The methods further include the step of rotating at least one mixing screw to cause the batch material to travel along a flow path defined by a barrel of the extruder. The methods further include the step of indexing a carriage to remove a first device from the flow path and introduce a second device into the flow path of the batch material. In one example, the pressure of the batch material changes less than about 25% as a result of indexing the carriage. In addition or alternatively, further methods include the step of reducing a decrease in temperature of the batch material resulting from the step of indexing. In further examples, the method includes the step of pre-filling a second honeycomb extrusion die held by the carriage with a plugging material. | 2011-12-01 |
20110291320 | DEVICE FOR TAKING IMPRESSION OF AN EAR - Device for taking an impression of a subject's ear minimizes risk of damage on the eardrum when the impression is made. The device comprises a nozzle having a first essentially tubular part that has a centre axis and a side wall. The first tubular part has also a first end intended to be inserted into a subject's ear, a first opening for the outlet of impression material, and a second end connected to a supply member for impression material to the tubular part. | 2011-12-01 |
20110291321 | ANATOMICALLY AND FUNCTIONALLY ACCURATE SOFT TISSUE PHANTOMS AND METHOD FOR GENERATING SAME - A method, system and apparatus for manufacturing anatomically and functionally accurate soft tissue phantoms with multimodality characteristics for imaging studies is disclosed. The organ/tissue phantom is constructed by filling a container containing an organ having inner vasculature therein with a molten elastomeric material; inserting a plurality of rods with bumps thereupon through the container and the organ; allowing the molten elastomeric material to harden and cure; removing the organ; replacing the organ with a plurality of elastomeric segments; and removing an elastomeric segment and replacing the void created thereupon with molten PVA to create a PVA segment; allowing the molten PVA segment to harden and cure; and repeating the creation of PVA segments until all the elastomeric segments have been removed, such that each successive molten PVA segment adheres to and fuses with the previous hardened PVA segment so as to form an approximately complete organ phantom cast. The organ/tissue phantom is completed by inserting the approximately complete organ phantom cast inserting upside-down into a fixture made from the bottom-most elastomeric segment, which contains molten PVA; and allowing the molten PVA to harden and cure. | 2011-12-01 |
20110291322 | METHOD OF REDUCING ACETALDEHYDE IN POLYESTERS, AND POLYESTERS THEREFROM - Acetaldehyde production in a polyester may be reduced by using a formulation which comprises an acetaldehyde scavenger and a phosphorous additive. The two materials appear to act synergistically in reducing acetaldehyde production. Preferred formulations comprise anthranilamide and phosphorous acid and are used in combination with aluminium or titanium catalysed PET resins. | 2011-12-01 |
20110291323 | METHOD AND APPARATUS FOR POSITIONING A CONDUIT GUIDE IN A MOLDABLE MATERIAL PRIOR TO POURING THE MATERIAL INTO A FORM - A positioner to secure a conduit guide in a cement pouring form for forming a concrete structural member. The positioner includes a body having a surface portion configured and positioned to support a corresponding surface portion of the conduit guide in the form. A first ferromagnetic member is associated with the body. The body selectably secures the conduit guide in the form without requiring a fastener. | 2011-12-01 |
20110291324 | MULTI-LAYER GOLF BALL HAVING INNER COVERS WITH NON-PLANAR PARTING LINES - The invention comprises a golf ball. The golf ball is formed with a core, at least one intermediate layer, and a cover. The intermediate layer has a non-planar parting line. The molds used to form the intermediate layer have non-planar mating surfaces. The non-planar mating surfaces of the molds mesh, and when the intermediate layer is formed therein, the intermediate layer has a non-planar parting line thereon. If compression molding is used, hemispherical layer blanks may be pre-formed in the shape of the mold halves. To form the intermediate layer, the two blanks are compression molded together. If injection molding is used, a core is placed inside a mold chamber and layer material is injected into the mold chamber to form the intermediate layer about the core. If reaction injection molding is used, two or more reactive precursors are mixed and injected into the mold cavity, and they react to form the intermediate layer. Optional outer layers and a cover are molded on the intermediate layer to form a finished ball. | 2011-12-01 |
20110291325 | PROCESS FOR THE REALIZATION OF A STIFFENER MADE OF COMPOSITE MATERIAL WITH AN OMEGA SECTION - A process for the production of a stiffener made of composite material that includes a central part with wings on both sides such that when the wings are resting against an element to be reinforced, the central part is separated from the element to be reinforced, with the process including producing a flat strip ( | 2011-12-01 |
20110291326 | SHAPING SLURRY AND SHAPING METHOD - A shaping slurry that forms a shaped product with a granule includes: a water-based solvent; a hydrophobic granule that forms the shaped product; and an amphiphatic solid polymer that forms the shaped product, and is dissolved in the water-based solvent. | 2011-12-01 |
20110291327 | CORE ASSEMBLY FOR AN INJECTION MOULDING-MACHINE - A core assembly for an injection moulding-machine. The assembly includes a movable mould half and a stationary mould half clamped onto each their platen of an injection moulding-machine . It also includes an actuator for advancing and retracting during operation at least one core into and from a mould cavity in a mould. The actuator is connected to a core-carrier for carrying the at least one core. The core-carrier is slidingly mounted to and partly projecting from a guidance connected to one of the mould halves. A first hole is formed in the closed mould for slidingly receiving the projecting part of the core-carrier. The core assembly allows products to be continuously moulded with an extremely high degree of accuracy, and it is simple, inexpensive and easy to mount and maintain while also allowing for positioning of cores at various angles relative to the mould. | 2011-12-01 |
20110291328 | INJECTION MOLDING FLOW CONTROL APPARATUS AND METHOD - Apparatus for controlling the rate of flow of fluid material through an injection molding flow channel leading to a gate of a mold cavity, the apparatus comprising:
| 2011-12-01 |
20110291329 | Method and apparatus for processing and/or inspecting pellet-shaped articles - A system for marking pellet shaped articles includes a conveyer to convey the pellet-shaped articles along a transport path, and a laser to generate at least one beam to print or etch information on one or more of the pellet-shaped articles. The information includes at least one of alphabetical characters, numeric characters, and/or logos. The information comprises at least one engraving, e.g., two engravings or holes, apertures, etc., that are adjacent one another and at least partially overlapping. The system includes a controller to control x and y or x, y and z coordinates of the beam of the laser relative to the transport path to align the beam with the one or more of the pellet-shaped articles. | 2011-12-01 |
20110291330 | REPLICATION METHOD AND ARTICLES OF THE METHOD - A lamination or replication method for making an article having a structured solid layer, including:
| 2011-12-01 |
20110291331 | Manufacturing Apparatus and Method - An apparatus for manufacturing a three-dimensional object by layerwise consolidation of powder comprises a lowerable build platform for supporting the object during manufacture and a sealable chamber for controlling the atmosphere around the object. The apparatus also has gas transport devices, such as pumps and valves. Substantially all of the gas transport devices are maintained within a controlled atmosphere. | 2011-12-01 |
20110291332 | Method and device for the temperature control of preforms - A method for the at least two-stage temperature control of preforms ( | 2011-12-01 |
20110291333 | Method and device for introducing dust into a metal melt of a pyrometallurgical installation - A device for introducing dust into a molten bath of a pyrometallurgical installation is provided. An electrodeless plasma torch includes an essentially tubular housing, wherein the housing allows a passage of a carrier gas containing dust particles, and wherein the housing is coaxially surrounded by an inductive load coil which forms a heating zone. | 2011-12-01 |
20110291334 | System And Method For Damping Vibration In A Drill String - A system for damping vibration in a drill string can include a valve assembly having a supply of a fluid, a first member, and a second member capable of moving in relation to first member in response to vibration of the drill bit. The first and second members define a first and a second chamber for holding the fluid. Fluid can flow between the first and second chambers in response to the movement of the second member in relation to the first member. The valve assembly can also include a coil or a valve for varying a resistance of the fluid to flow between the first and second chambers. | 2011-12-01 |
20110291335 | HYDRAULICALLY DAMPED MOUNTING DEVICE - A hydraulically damped mounting device has first and second anchor parts connected by a first deformable wall, and a working chamber for hydraulic fluid partially bounded by the first deformable wall. The working chamber is connected to a composition chamber for the hydraulic fluid by a first passageway, the composition chamber being partially bounded by a second deformable wall. There is also an auxiliary chamber partially bounded by a third deformable wall connected to the working chamber by a second passageway. The mounting device then has a vacuum chamber connectable to a vacuum source for varying the pressure in the vacuum chamber. | 2011-12-01 |
20110291336 | AXIALLY DAMPING HYDRAULIC MOUNT - Axially damping hydraulic mount is provided, relating to elastomer mounts for engine mounts for damping the vibrations transmitted from internal combustion engine to the body and for acoustic decoupling. The hydraulic mount includes a frustoconical elastomer support spring, between mount core and upper part of outer jacket, with a working chamber and a compensating chamber for fluid damping medium. Chambers are separated from one another by a separator extending transversely to the mount axis and includes a coupling diaphragm, wherein the working chamber is enclosed by support spring and separating element. Compensating chamber is enclosed by separating element and elastomer bellows. A duct on the separating element is enclosed by a duct part. To counteract excessive increase in dynamic spring rate when frequencies of axially acting vibrations are present, the duct part is occupied by an additional mass. Then the duct part is rigidly connected to a mass element. | 2011-12-01 |
20110291337 | Bump Stop and Associated Macpherson Strut - The bump stop device, particularly for a motor vehicle, comprises a bearing | 2011-12-01 |
20110291338 | PRELOADED DUAL-SPRING ASSEMBLY - The present invention relates to dual-spring assembly that may be employed in cooperation with a damper unit to form a shock absorber. The spring rate of at least one of the springs is adjustable with a preload mechanism, which in turn is movable relative to the damper unit. Further, the dual-spring assembly includes two compression springs arranged in series and each having selected, but different spring rates. The first spring primarily absorbs the energy of applied loads that are below a first amplitude or threshold of applied load. Once the applied loads exceed the first amplitude of applied load, the dual-spring assembly operates with an effective spring rate to absorb the energy of applied loads that exceed the first amplitude of applied load. After a second spring of the dual-spring assembly achieves a desired amount of deflection, the first spring continues to absorb energy from the applied loads. | 2011-12-01 |
20110291339 | POSITIONING DEVICE FOR WORKPIECES - A positioning device includes a base, a platform, a support fixed on the base, a rotatable member, and a positioning member. The rotatable member is fixed to the platform and is rotatably connected to the support. The positioning member is fixed to the platform. The positioning member is operable to cooperate with the support to lock the platform in a desired position. | 2011-12-01 |
20110291340 | METHOD AND APPARATUS FOR CLAMPING RECTANGULAR PARALLELEPIPEDIC WORK - A rectangular parallelepipedic (cuboidal) work is fixed by clamping the opposing two edges between clamp jaws attached to a pair of clamps. With the work fixed, at least one surface of the work is machined. Then, the position of the work is changed by rotating the clamps and the work all together around the rotating axis, and the other surface is machined. The foregoing step is repeated to machine all the six surfaces of the work, during which the work is kept fixed by clamping. | 2011-12-01 |