48th week of 2014 patent applcation highlights part 66 |
Patent application number | Title | Published |
20140351537 | MAPPING A SOURCE WORKLOAD PATTERN FOR A SOURCE STORAGE SYSTEM TO A TARGET WORKLOAD PATTERN FOR A TARGET STORAGE SYSTEM - Provided are a method, system, and computer program product for mapping a source workload pattern for a source storage system to a target workload pattern for a target storage system. A source workload pattern is received from the source storage system having workload access characteristics of source logical addresses at the source storage system. The source workload pattern at the source logical addresses is mapped to a target workload pattern for target logical addresses at the target storage system. The target workload pattern for the target workload addresses is provided to the target storage system to use to determine storage locations in the target storage system to store received replicated data from the source logical addresses at the target logical addresses. | 2014-11-27 |
20140351538 | STORAGE APPARATUS AND STORAGE APPARATUS MIGRATION METHOD - A source remote copy configuration in a source storage system is migrated to a destination storage system as a destination remote copy configuration. The destination primary storage apparatus of the destination storage system defines a virtual volume mapped to the primary volume provided by the source primary storage apparatus which is a storage area of the virtual volume; takes over a first identifier of the primary volume to the virtual volume; transfers, when the virtual volume receives an access request, the access request to the source primary storage apparatus to write data in the primary volume; and takes over the first identifier from the virtual volume to another primary volume provided by the destination primary storage apparatus, after completion of copy of data from primary volume of the source primary storage apparatus into primary volume of the destination primary storage apparatus and secondary volume of the destination secondary storage apparatus. | 2014-11-27 |
20140351539 | SYSTEM AND METHOD FOR RETAINING DEDUPLICATION IN A STORAGE OBJECT AFTER A CLONE SPLIT OPERATION - Described herein is a system and method for retaining deduplication of data blocks of a resulting storage object (e.g., a flexible volume) from a split operation of a clone of a base storage object. The clone may comprise data blocks that are shared with at least one data block of the base storage object and at least one data block that is not shared with at least one data block of the base storage object. The data blocks of the clone that are shared with the base storage object may be indicated to receive a write allocation that may comprise assigning a new pointer to a indicated data block. Each data block may comprise a plurality of pointers comprising a virtual address pointer and a physical address pointer. As such, data blocks of the clone comprising the same virtual address pointer may be assigned a single physical address pointer. Thus, a new physical address pointer is assigned or allocated once to a given virtual address pointer of data blocks of a clone. | 2014-11-27 |
20140351540 | COMPUTER SYSTEM AND STORAGE CONTROL METHOD OF THE SAME - A computer system dynamically assigns the storage capacity from pool volumes to the access target in the higher-level system, and can immediately respond to the change of the status of the pool having the pool volumes. The control device provides a plurality of first pools, provides a second pool, allocates a storage area from one of the first pools to a logical area of the logical volume to store data to the logical area, and stores the data in the allocated storage area, adds at least one of the one or more pool volumes in the second pool to the first pool, according to the status of the first pool, and adds at least one pool volume provided by storage areas of at least one storage device to the second pool, according to the status of the second pool. | 2014-11-27 |
20140351541 | Bundling File Permissions For Sharing Files - When files or other objects are to be shared, a storage system creates a bundle object that identifies the objects to be shared, and the permissions associated with objects in that bundle object. Each object is marked as being associated with a bundle object. When the object is accessed, the storage system determines if the object is associated with a bundle object. The bundle object in turn is accessed to determine the permissions to be associated with that object for the entity accessing the object. Files and other objects can be shared without copying or moving them. Any collection of files or other objects, however selected or identified, can be shared through this mechanism. Using this mechanism, a user can select several files, and then share those files in one operation without copying or moving those files or creating a new folder for those files. | 2014-11-27 |
20140351542 | POWER SAVING METHOD AND APPARATUS FOR FIRST IN FIRST OUT (FIFO) MEMORIES - In various embodiments, apparatuses and methods are disclosed to keep a memory clock gated when the data for a current memory address is the same as the data in the immediate previous memory address. For a write function, new data will only be written into the current memory address if it is different from the data in the immediate previous memory address. Similarly, for a read function, the data will only be read out of the current memory address if it is different from the data in the immediate previous memory address. Each row in the memory may have one associated status bit outside the memory. Data may only be written to or read from the current memory address when the status bit is set. Clock gating the memory ports may reduce the overall power consumption of the memory. | 2014-11-27 |
20140351543 | Method for Restricting Access to Data Stored on a Memory Card and a Memory Card - There is provided a method for restricting access to data stored on a memory card, whereby the restriction of access relates to what is able to be carried out to the data stored on the memory card during wireless communications with the memory card. Furthermore, there is also provided a memory card which is able to restrict access to data stored on it during wireless communications with it. | 2014-11-27 |
20140351544 | DEVICE SIDE HOST INTEGRITY VALIDATION - Described is a technology by which a transient storage device or secure execution environment-based (e.g., including an embedded processor) device validates a host computer system. The device compares hashes of host system data against valid hashes maintained in protected storage of the device. The host data may be a file, data block, and/or memory contents. The device takes action when the host system data does not match the information in protected storage, such as to log information about the mismatch and/or provide an indication of validation failure, e.g., via an LED and/or display screen output. Further, the comparison may be part of a boot process validation, and the action may prevent the boot process from continuing, or replace an invalid file. Alternatively, the validation may take place at anytime. | 2014-11-27 |
20140351545 | STORAGE MANAGEMENT METHOD AND STORAGE SYSTEM IN VIRTUAL VOLUME HAVING DATA ARRANGED ASTRIDE STORAGE DEVICE - An administrator instructs creation of a volume to a virtual storage device and registration of a host port for providing access permission to the volume. The virtual storage device searches a candidate of a physical storage device capable of reaching the host port and a candidate of the target port based on the access permission information, and creates a distributed volume astride the candidate physical storage device. The distributed volume is composed of a plurality of partial volumes, and the partial volumes inherit the functions of the storage device and the access permission information set for the distributed volume. The virtual storage device distributes an access permission to the physical storage device, constitutes the access permission information of the host port and the volume with respect to the candidate target port, and registers the access permission information of the host port and the target port to the SAN switch. | 2014-11-27 |
20140351546 | METHOD AND APPARATUS FOR MAPPING A PHYSICAL MEMORY HAVING A PLURALITY OF MEMORY REGIONS - A method and apparatus are described for mapping a physical memory having different memory regions. A plurality of virtual non-uniform memory access (NUMA) nodes may be defined in system memory to represent memory segments of various performance characteristics. Memory segments of a high-bandwidth memory (HBM) system memory may be allocated to a first memory region of the physical memory having memory segments represented by a first one of the NUMA nodes. The physical memory may include a second memory region having memory segments represented by a second one of the NUMA nodes. Memory segments of system memory may be allocated to the second memory region. The physical memory may further include a third memory region having memory segments represented by a third one of the NUMA nodes. Memory segments of an interleaved uniform memory access (UMA) graphics memory may be allocated to the third memory region. | 2014-11-27 |
20140351547 | LINKED LIST FOR LOCK-FREE MEMORY ALLOCATION - Embodiments relate to a linked list for memory allocation. An aspect includes maintaining a linked list of address ranges in a computer memory that are available for allocation. Another aspect includes receiving a request for allocation of a first address range, the request comprising a size of the first address range. Another aspect includes traversing the linked list to determine an available address range having a size that is greater than or equal to the size of the first address range. Another aspect includes determining whether there is interference in the linked list. Another aspect includes, based on determining that there is no interference in the linked list, removing determined address range from the linked list. Another aspect includes, based on determining that there is interference in the linked list, restarting the traversing of the linked list. | 2014-11-27 |
20140351548 | Pool Spares for Data Storage Virtualization Subsystem - A data storage virtualization subsystem (SVS) for providing storage to a host entity is disclosed. The SVS comprises a storage virtualization controller for connecting to the host entity, at least one physical storage device (PSD) pool, and at least one PSD is designated to be a pool spare PSD to the at least one PSD pool. The at least one PSD pool comprises at least one PSD to store user data or associated redundant information and is given a pool ID for identifying the PSD pool. | 2014-11-27 |
20140351549 | OFF-HEAP DIRECT-MEMORY DATA STORES, METHODS OF CREATING AND/OR MANAGING OFF-HEAP DIRECT-MEMORY DATA STORES, AND/OR SYSTEMS INCLUDING OFF-HEAP DIRECT-MEMORY DATA STORE - Certain example embodiments relate to a highly-concurrent, predictable, fast, self-managed, in-process space for storing data that is hidden away from the garbage collector and its related pauses. More particularly, certain example embodiments relate to improved memory management techniques for computer systems that leverage an off-heap direct-memory data store that is massively scalable and highly efficient. The off-heap store may be provided in connection with a Java-based environment, and garbage collection may be completely or nearly completely avoided for the off-heap store. The off-heap store may be integrated into a tiered storage solution in certain example embodiments. | 2014-11-27 |
20140351550 | MEMORY MANAGEMENT APPARATUS AND METHOD FOR THREADS OF DATA DISTRIBUTION SERVICE MIDDLEWARE - Disclosed herein are a memory management apparatus and method for threads of Data Distribution Service middleware. The apparatus includes a memory area management unit, one or more thread heaps, and a queue. The memory area management unit partitions a memory chunk allocated for the DDS middleware by a Cyber-Physical System on a memory page basis, manages the partitioned memory pages, and allocates the partitioned memory pages to the threads of the DDS middleware that have requested memory. The thread heaps are provided with the memory pages allocated to threads of the DDS middleware by the memory area management unit, and manage the provided memory pages. The queue receives memory used pages returned by the thread heaps. The thread heaps are provided with the memory pages for the threads by the queue if a memory page is not present in the memory area management unit when the threads request memory. | 2014-11-27 |
20140351551 | MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS - Various embodiments are disclosed of a multiprocessor system with processing elements optimized for high performance and low power dissipation and an associated method of programming the processing elements. Each processing element may comprise a fetch unit and a plurality of address generator units and a plurality of pipelined datapaths. The fetch unit may be configured to receive a multi-part instruction, wherein the multi-part instruction includes a plurality of fields. A first address generator unit may be configured to perform an arithmetic operation dependent upon a first field of the plurality of fields. A second address generator unit may be configured to generate at least one address of a plurality of addresses, wherein each address is dependent upon a respective field of the plurality of fields. A parallel assembly language may be used to control the plurality of address generator units and the plurality of pipelined datapaths. | 2014-11-27 |
20140351552 | WORKING SET SWAPPING USING A SEQUENTIALLY ORDERED SWAP FILE - Techniques described enable efficient swapping of memory pages to and from a working set of pages for a process through the use of large writes and reads of pages to and from sequentially ordered locations in secondary storage. When writing pages from a working set of a process into secondary storage, the pages may be written into reserved, contiguous locations in a dedicated swap file according to a virtual address order or other order. Such writing into sequentially ordered locations enables reading in of clusters of pages in large, sequential blocks of memory, providing for more efficient read operations to return pages to physical memory. | 2014-11-27 |
20140351553 | LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIBUTES - Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed. | 2014-11-27 |
20140351554 | LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIBUTES - Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed. | 2014-11-27 |
20140351555 | DIGITAL SIGNAL PROCESSOR AND METHOD FOR ADDRESSING A MEMORY IN A DIGITAL SIGNAL PROCESSOR - In a digital signal processor comprising at least one vector execution unit and at least a first memory unit a third unit is arranged to provide addressing data in the form of an address vector to be used for addressing the first memory unit said third unit being connectable to the first memory unit through the on-chip network, in such a way that data provided from the third unit can be used to control the reading from and/or the writing to the first memory unit. This enables fast reading from and writing to a memory unit of data in any desired order. | 2014-11-27 |
20140351556 | METHODS FOR OPERATING AND CONFIGURING A RECONFIGURABLE PROCESSOR - The invention provides a method of compiling computer program instructions for implementation on a reconfigurable processor comprising a plurality of operational cells, each operational cell being connectable to and disconnectable from one or more of the other operational cells via a programmable interconnect, the method comprising: a routing step in which one or more signal processing paths are determined for performing one or more signal processing operations defined by the computer program instructions, each signal processing path comprising two or more of the operational cells connected via the programmable interconnect, the said signal processing paths being capable of implementation on the said operational cells and the said interconnect of the reconfigurable processor to perform the said one or more signal processing operations; and a post-routing step performed subsequent to the routing step in which an extended signal processing path is determined by extending one of the said signal processing paths determined in the routing step such that a critical path of the extended signal processing path is longer than a longest critical path of the signal processing paths determined in the routing step. | 2014-11-27 |
20140351557 | PROCESSING SYSTEM WITH INTERSPERSED PROCESSORS AND COMMUNICATION ELEMENTS HAVING IMPROVED COMMUNICATION ROUTING - A processing system includes processors and dynamically configurable communication elements (DCCs) coupled together in an interspersed arrangement. A source device may transfer a data item through an intermediate subset of the DCCs to a destination device. The source and destination devices may each correspond to different processors, DCCs, or input/output devices, or mixed combinations of these. In response to detecting a stall after the source device begins transfer of the data item to the destination device and prior to receipt of all of the data item at the destination device, a stalling device is operable to propagate stalling information through one or more of the intermediate subset towards the source device. In response to receiving the stalling information, at least one of the intermediate subset is operable to buffer all or part of the data item. | 2014-11-27 |
20140351558 | Low Power Management of Multiple Sensor Integrated Chip Architecture - A method, device, system, or article of manufacture is provided for low-power management of multiple sensor chip architecture. In one embodiment, a method comprises, at a computing device that includes a first processor, a second processor and a third processor, receiving, by the first processor operating at a first clock rate, first sensor data from a first sensor operating at a first data rate; determining, by the first processor, a movement of the computing device using the first sensor data; in response to determining the movement of the computing device, performing, by the first processor, a first motion state algorithm to determine whether a modality of the computing device is a first motion state; and, in response to determining that the modality of the computing device is not the first motion state, changing, by the first processor, at least one of the first processor to operate at a second clock rate sufficient to perform a second motion state algorithm and changing the first sensor to operate at a second data rate sufficient to perform the second motion state algorithm, wherein the second motion state algorithm is used to determine whether the modality of the computing device is a second motion state. | 2014-11-27 |
20140351559 | Low Power Management of Multiple Sensor Chip Architecture - A method, device, system, or article of manufacture is provided for low-power management of multiple sensor chip architecture. In one embodiment, a method comprises, at a computing device that includes a first processor, a second processor and a third processor, receiving, at the first processor, first sensor data from a first sensor; determining, at the first processor, a motion state of the computing device using the first sensor data; in response to determining that the motion state corresponds to a predetermined motion state, activating the second processor; receiving, at the second processor, second sensor data from a second sensor; determining, by the second processor, that the motion state corresponds to the predetermined motion state using the second sensor data; and, in response to determining that the motion state corresponds to the predetermined motion state using the second sensor data, sending the motion state to the third processor. | 2014-11-27 |
20140351560 | Low Power Management of Multiple Sensor Integrated Chip Architecture - A method, device, system, or article of manufacture is provided for low-power management of multiple sensor chip architecture. In one embodiment, a method comprises, at a computing device that includes a first processor, a second processor and a third processor, performing, by the second processor, a first scan at a first scan rate for first location data using a sensor; receiving, at the second processor, from the sensor, the first location data; determining, by the second processor, a first location using the first location data; receiving, by the second processor, a modality of the computing device; in response to determining the first location, determining, by the second processor, that the modality corresponds to a predetermined state; and in response to determining that the modality corresponds to the predetermined state, performing, by the second processor, a second scan at a second scan rate for second location data using the sensor. | 2014-11-27 |
20140351561 | MICROPROCESSOR THAT FUSES IF-THEN INSTRUCTIONS - A microprocessor includes an instruction translation unit that extracts condition information from the IT instruction and fuses the IT instruction with the first IT block instruction. For each instruction of the IT block, the instruction translation unit: determines a respective condition for the IT block instruction using the condition information extracted from the IT instruction and translates the IT block instruction into a microinstruction. The microinstruction includes the respective condition. Execution units conditionally execute the microinstruction based on the respective condition. For each IT block instruction, the instruction translation unit determines a respective state value using the extracted condition information. The state value comprises the lower eight bits of the IT instruction having the lower five bits left-shifted by N-1 bits, where N indicates a position of the IT block instruction in the IT block. | 2014-11-27 |
20140351562 | TECHNIQUES FOR SCHEDULING OPERATIONS AT AN INSTRUCTION PIPELINE - A dispatch stage of a processor core dispatches designated operations (e.g. load/store operations) to a temporary queue when the resources to execute the designated operations are not available. Once the resources become available to execute an operation at the temporary queue, the operation is transferred to a scheduler queue where it can be picked for execution. By dispatching the designated operations to the temporary queue, other operations behind the designated operations in a program order are made available for dispatch to the scheduler queue, thereby improving instruction throughput at the processor core. | 2014-11-27 |
20140351563 | ADVANCED PROCESSOR ARCHITECTURE - The present invention relates to a processor core having an execution unit comprising an arrangement of Arithmetic-Logic-Units, wherein the operation mode of the execution unit is switchable between an asynchronous operation of the Arithmetic-Logic-Units and interconnection between the Arithmetic-Logic-Units such that a signal. from the register file crosses the execution unit and is receipt by the register file in one clock cycle; and wherein a pipelined operation mode of at least one of the Arithmetic-Logic-Units and the interconnection between the Arithmetic-Logic-Units such that a signal requires from the register file through the execution unit back to the register file more than one clock cycles. | 2014-11-27 |
20140351564 | SIMPLIFICATION OF LARGE NETWORKS AND GRAPHS - Embodiments relate to simplifying large and complex networks and graphs using global connectivity information based on calculated node centralities. An aspect includes calculating node centralities of a graph until a designated number of central nodes are detected. A percentage of the central nodes are then selected as pivot nodes. The neighboring nodes to each of the pivot nodes are then collapsed until the graph shrinks to a predefined threshold of total nodes. Responsive to the number of total nodes reaching the predefined threshold, the simplified graph is outputted. | 2014-11-27 |
20140351565 | SYSTEM AND APPARATUS FOR GROUP FLOATING-POINT INFLATE AND DEFLATE OPERATIONS - Systems and apparatuses are presented relating a programmable processor comprising an execution unit that is operable to decode and execute instructions received from an instruction path and partition data stored in registers in the register file into multiple data elements, the execution unit capable of executing group data handling operations that re-arrange data elements in different ways in response to data handling instructions, the execution unit further capable of executing a plurality of different group floating-point and group integer arithmetic operations that each arithmetically operates on the multiple data elements stored in registers in the register file to produce a catenated result that is returned to a register in the register file, wherein the catenated result comprises a plurality of individual results. | 2014-11-27 |
20140351566 | MOVING AVERAGE PROCESSING IN PROCESSOR AND PROCESSOR - A processor, which executes m number of arithmetic operations in parallel, executes a partial sum instruction which takes an i-th to (i+m−1)-th elements of an input data series as input elements, so as to obtain first vector data, executes the partial sum instruction which takes a (i+x)-th to (i+x+m−1)-th elements of the input data series as the input elements, so as to obtain second vector data, and performs operations to subtract the p-th element of the first vector data and add the p-th element of the second vector data from and to a sum of the i-th to (i+x−1)-th elements of the input data series in parallel for each of the 0-th to (m−1)-th elements, so as to calculate sums of elements for m sections different from each other in parallel, and moving average processing to calculate a moving average from the sums of elements of the sections. | 2014-11-27 |
20140351567 | UNIQUE PACKED DATA ELEMENT IDENTIFICATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS - A method of an aspect includes receiving a unique packed data element identification instruction. The unique packed data element identification instruction indicates a source packed data having a plurality of packed data elements and indicates a destination storage location. A unique packed data element identification result is stored in the destination storage location in response to the unique packed data element identification instruction. The unique packed data element identification result indicates which of the plurality of the packed data elements are unique in the source packed data. Other methods, apparatus, systems, and instructions are disclosed. | 2014-11-27 |
20140351568 | OPPORTUNISTIC MULTI-THREAD METHOD AND PROCESSOR - Disclosed are an opportunistic multi-thread method and processor, the method comprising the following steps: if a zeroth thread, a first thread, a second thread and a third thread all have instructions ready to be executed, then a zeroth clock period, a first clock period, a second clock period and a third clock period are respectively allocated to the zeroth thread, the first thread, the second thread and the third thread; if one of the threads cannot issue an instruction within a specified clock period because the instruction is not ready, and the previous thread still has an instruction ready to be executed after issuing certain instructions in the previous specified clock period, then the previous thread will take the specified clock period. The processor comprises an instruction cache, an instruction decoder, an instruction pipeline controller and an arithmetic logic unit; the opportunistic multi-thread processor adds for each stage of production line a prediction circuit for an effective thread instruction and a set of two-dimensional thread identity registers. | 2014-11-27 |
20140351569 | SOFTWARE UPDATING PROCESS FOR AN EMBEDDED DEVICE - The invention relates to a method for updating software in an embedded device ( | 2014-11-27 |
20140351570 | PROGRAMMING INTERFACE AND METHOD - A programming interface and method of operating a programming interface use a system clock input, an asynchronous reset input, and an interface control input. The method selectively controls multiplexed coupling of a source register to a destination register and the destination register to a buffer register. The multiplexed coupling of the destination register to the buffer register reduces the possibility of the buffer register being corrupted when an asynchronous reset signal is applied to the programming interface. Problems associated with meta-stable asynchronous crossing paths in asynchronous reset programming systems are therefore alleviated. | 2014-11-27 |
20140351571 | OUT OF BAND MANAGEMENT OF BASIC INPUT/OUTPUT SYSTEM SECURE BOOT VARIABLES - A method is provided in one example embodiment and includes storing secure boot variables in a baseboard management controller; and sending the secure boot variables to a basic input/output system (BIOS) during a power on self-test, where the BIOS utilizes the secure boot variables during runtime to authenticate drivers and an operating system loader execution. In particular embodiments, the secure boot variables may be included in a white list, a black list, or a key list and, further, stored in erasable programmable read only memory. | 2014-11-27 |
20140351572 | Automatically Configurable Intelligent Electronic Device - Disclosed herein are intelligent electronic devices configured for monitoring an electric power delivery system and for determining a plurality of configuration settings based on measurements from the electric power delivery system. An IED may identify a configuration event, obtain a plurality of electrical parameters associated with the configuration event, determine a plurality of configuration parameters from the electrical parameters, determine a plurality of configuration settings based on the configuration parameters, and apply the settings to the IED. The IED may also be configured to initiate the configuration event by opening a single pole of a multi-phase power line. | 2014-11-27 |
20140351573 | SELECTIVELY PERFORMING MAN IN THE MIDDLE DECRYPTION - Methods, systems, and apparatus, including computer programs encoded on computer storage media, for selectively performing man in the middle decryption. One of the methods includes receiving a first request to access a first resource hosted by a server outside the network, determining whether requests from the client device to access the first resource outside the network should be redirected to a second resource hosted by a proxy within the network, providing a redirect response to the client device, the redirect response including the second universal resource identifier, establishing a first encrypted connected between the client device and the proxy hosting the second resource, and a second encrypted connection between the proxy hosting the second domain and the server hosting the first resource, and decrypting and inspecting the encrypted communication traffic passing between the client device and the server hosting the first resource. | 2014-11-27 |
20140351574 | Systems and Methods for Application Identification - Systems and methods for application identification in accordance with embodiments of the invention are disclosed. In one embodiment, a user device includes a processor and memory configured to store an application, a session manager, an application identifier, and at least one shared library, and the processor is configured by the session manager to communicate the application identifier and the application identifier data to an authentication server and permit the execution of the application in response to authentication of the application by the authentication server. | 2014-11-27 |
20140351575 | Apparatuses and a Method for Protecting a Bootstrap Message in a Network - The embodiments of the present invention relate to apparatuses in the form of a first network unit and a device, and also relates to a method for enabling protection of a bootstrap message in a device management network system. The method comprises: receiving at the first network unit, a request to bootstrap the device; transmit a request for a bootstrap key, to a second network unit; receiving a message comprising the bootstrap key and further comprises trigger information and transmitting the trigger information to the device to trigger generation of the bootstrap key internally in the device. Thereafter a protected bootstrap message can be transmitted to the device from the first network unit, and when the device verifies and/or decrypts the bootstrap message, device management (DM) sessions can start between the device and the first network unit. | 2014-11-27 |
20140351576 | SERVER ALGORITHMS TO IMPROVE SPACE BASED AUTHENTICATION - A system and methods for location authentication are presented. An estimated server signal is estimated based on a generated known code signal, and a client received satellite signal is received from a client device. The client received satellite signal is compared to the estimated server signal to provide a comparison result. | 2014-11-27 |
20140351577 | DUAL LAYER TRANSPORT SECURITY CONFIGURATION - A system includes a first computer processor that receives a data transmission from a second computer processor. The data transmission includes a client certificate authentication and a user-based authentication. If the incoming information cannot be authenticated by the client certificate in a first layer of the system landscape, then there is no further data transmission to a second layer. If the first layer can authenticate the client certificate authentication, the system landscape transmits the data transmission to the second layer. If the second layer cannot authenticate the user-based authentication, the system prevents the data transmission from being processed at the second layer. If the second layer can authenticate the user-based authentication, the system processes the data transmission at the second layer. | 2014-11-27 |
20140351578 | DETERMINATION OF APPARATUS CONFIGURATION AND PROGRAMMING DATA - A method including determining a public identifier for identifying a configuration of an apparatus, determining a common configuration certificate comprising a common configuration certificate identifier for verifying programming data, and determining a hardware certificate comprising the public identifier and the common configuration certificate identifier for associating a permitted combination of the apparatus configuration and the programming data. Furthermore, the method includes generating a dedicated package of the hardware certificates corresponding to the apparatus configurations allowed to be provided, encrypting the dedicated package of the hardware certificates using a public key, and storing the encrypted dedicated package of the hardware certificates with an identifier to a passive memory of the apparatus. | 2014-11-27 |
20140351579 | HARDWARE AUTHENTICATION IN A DISPERSED STORAGE NETWORK - A method for authenticating a node of a dispersed storage network (DSN). In various embodiments, a dispersed storage (DS) management unit receives a device list originating from a hardware certificate authority (HCA). The HCA also provides a hardware certificate to the node. Upon receiving the hardware certificate from the node, the DS management unit determines if the certificate is valid by comparing it to information contained in the device list (such as a device ID or a serial number associated with the node). If the certificate is valid, the DS management unit sends a challenge message to the node and analyzes the resulting challenge message response to determine if it is valid. If the response is valid, the DS management unit provides a signed certificate to the node for use in authenticating the node to perform dispersed storage operations within the DSN. | 2014-11-27 |
20140351580 | URL-BASED CERTIFICATE IN A PKI - A method of requesting and issuing a certificate from certification authority for use by an initiating correspondent with a registration authority is provided. The initiating correspondent makes a request for a certificate to the registration authority, and the registration authority sends the request to a certificate authority, which issues the certificate to the registration authority. The certificate is stored at a location in a directory and this location is associated with a pointer such as uniform resource locator (URL) that is derived from information contained in the certificate request. The initiating correspondent computes the location using the same information and forwards it to other corespondents. The other correspondents can then locate the certificate to authenticate the public key of the initiating correspondent. | 2014-11-27 |
20140351581 | Revocation of Public Key Infrastructure Signatures - In one implementation, a public key infrastructure utilizes a two stage revocation process for a set of data. One stage authenticates or revokes the set of data based on the status of the digital signature and another stage authenticates or revokes the set of data based on the status of an individual signature by the digital certificate. For example, a digital certificate based is assigned a certificate number. A serial number is assigned for a signature for the set of data as signed by the digital certificate. A data transmission, data packet, or install package includes the set of data, the certificate number and the serial number. Therefore, individual instances of the signature may be revoked according to serial number. | 2014-11-27 |
20140351582 | DATA PROTECTION SYSTEM AND METHOD - An authentication system to authorize access to data to be protected, including a token having a memory that stores: an array containing alphanumeric information and random data; and a seal scheme vector containing information to enable access to each of the information items in their respective positions in the array. The authentication system is configured to: subject access to the token to the insertion of a password; decrypt the seal scheme vector; acquire the arrangement information and the size information of each random data from the seal scheme vector; check correspondence between the acquired arrangement information and the effective arrangement of the information in the array, and between the acquired size information and the effective size of the random data; authorize or deny access to the data to be protected on the basis of a result of the previous check. | 2014-11-27 |
20140351583 | METHOD OF IMPLEMENTING A RIGHT OVER A CONTENT - Disclosed are methods and systems of implementing a right over a content or contents. Various implementations may include means and operations for receiving, for example in an execution environment and from a secure element, a first key for implementing a right over an encrypted content; decrypting said content in said execution environment with the help of the first key; and implementing the right over the content in said execution environment. Various implementations may also include means and operations for receiving a second key in, for example, said execution environment, from the secure element; and encrypting said content in sad execution environment with the help of the second key. | 2014-11-27 |
20140351584 | METHOD AND SYSTEM FOR PROTECTED TRANSMISSION OF FILES - To protect a software to be transferred to programmable electronic devices, a management system for programmable electronic devices is provided, comprising: a plurality of electronic devices ( | 2014-11-27 |
20140351585 | INFORMATION STORAGE DEVICE, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND PROGRAM - There is provided a device and a method for preventing using of illegitimate content or manufacturing of the illegitimate media that uses illegitimate media. In a system that has an information storage device, a license management apparatus that generates a media key set (MKS) that is stored in the information storage device, and a content provision apparatus, at the time of manufacturing of the information storage device, the license management apparatus compares an MKS version that is set in the MKS that is stored in the information storage device, and an allowance minimum MKS version that is recorded in a controller of the information storage device, and thus records key information stored in the MKS, in a storage unit under the condition that it is confirmed that the MKS version is equal to or greater in value than the allowance minimum MKS version. | 2014-11-27 |
20140351586 | CRYPTOGRAPHIC METHOD AND SYSTEM - In the field of security for electronic data and/or communications, a method of providing data security and/or privacy in a distributed and/or decentralised network environment. Private collaboration and/or information sharing between users, agents and/or applications is enabled, as well as the sharing of key(s) and/or content between a first user and/or agent and a second user and/or agent. The sharing may be of encrypted information via information sharing services. | 2014-11-27 |
20140351587 | PROTECTING CRYPTOGRAPHIC SECRETS USING FILE SYSTEM ATTRIBUTES - Techniques are disclosed for protecting cryptographic secrets stored locally in a device, such as a mobile phone. A client device creates or downloads a shared secret to be used in a server transaction. To protect this shared secret locally, the client device encrypts the shared secret using a key generated a file system attributes value, along with other sources of entropy. The file system attributes value may correspond to the inode of a file in a UNIX-based file system. Thereafter, when the shared secret is required for logical computation, the client device reconstructs the key using the file system attributes value and the other previous sources of entropy. The client device may use the key to decrypt the information and use the shared secret for its required purpose, e.g., in generating a one-time password for a login session. | 2014-11-27 |
20140351588 | METHOD AND SYSTEM FOR PRODUCT AUTHENTICATION - During manufacturing a unique encrypted authentication code is created for each product based upon device specific information relating to that product. The unique encrypted authentication code together with the device specific information is stored in a database, and a representation of the unique encrypted authentication code is stored on the product. To determine whether a product in question is authentic, the readable representation of the unique encrypted authentication code is read and sent to a server along with a request for product authentication. The server provides an indication of authenticity of the product in question based upon the unique encrypted authentication code received and the device specific information associated with that unique encrypted authentication code in the database. | 2014-11-27 |
20140351589 | PERFORMING CLIENT AUTHENTICATION USING ONETIME VALUES RECOVERED FROM BARCODE GRAPHICS - Techniques are disclosed for authenticating users accessing computing applications, e.g., applications hosted in a cloud environment accessed using a variety of computing systems. As disclosed, an authentication process is performed using a certificate and private key installed on a mobile device and a nonce generated on the server. To authenticate a user, a server generates a nonce, encrypts the nonce with a public key associated with the user, and encodes the encrypted nonce in a barcode graphic (e.g., a QR code). The resulting barcode graphic is displayed to the user, and a mobile device scans the barcode graphic to recover the encrypted nonce. The encrypted nonce is decrypted using a private key stored on the mobile device. The clear text nonce is then displayed on the screen of the mobile device and used as a one-time password (OTP) for authentication. | 2014-11-27 |
20140351590 | NETWORK DEVICE, IPSEC SYSTEM AND METHOD FOR ESTABLISHING IPSEC TUNNEL USING THE SAME - A network device is provided. The network device is connected to a number of slave network devices. Each slave network device communicates with the network device by using an Internet protocol (IP) address. The network device includes an Internet protocol security (IPsec) module and a network address translation (NAT) module. The IPsec module establishes an IPsec tunnel to a network gateway in the Internet and retrieves an IPsec IP address corresponding to the IPsec tunnel. The NAT module converts the IP addresses of the slave network devices to the IPsec IP address, such that the slave network devices use the IPsec IP address to communicate with the network gateway through the IPsec tunnel. | 2014-11-27 |
20140351591 | INFORMATION SETTING METHOD AND WIRELESS COMMUNICATION SYSTEM - An information setting method for a setting device includes the following processes. A first certificate and identification information are obtained from a wireless device to be caused to join a wireless network managed by a management device. The first certificate certifies that the wireless device is a formal wireless device and includes a first public key. The identification information is information that identifies the wireless device. A second certificate is obtained from the management device. The second certificate certifies that the management device is a formal management device and includes a second public key. Apparatus information required for the wireless device to join the wireless network is encoded using the first public key and is output to the wireless device. Management information including the apparatus information and the identification information associated with the apparatus information is encoded using the second public key and is output to the management device. | 2014-11-27 |
20140351592 | Machine-To-Machine Network Assisted Bootstrapping - The service layer may leverage the access network infrastructure so that applications on a device may bootstrap with a machine-to-machine server without requiring provisioning beyond what is already required by the access network. | 2014-11-27 |
20140351593 | PROCESS FOR ENCRYPTED LOGIN TO A SECURE COMPUTER NETWORK, FOR THE CREATION OF A SESSION OF ENCRYPTED COMMUNICATIONS BETWEEN COMPUTERS AND A DEVICE INCLUDING A MOBILE PHONE LOGGED INTO A NETWORK, FOR THE PERSISTENCE OF ENCRYPTED COMMUNICATIONS BETWEEN COMMUNICATION DEVICES, AND FOR THE TERMINATION OF COMMUNICATIONS - A method for users of devices including mobile phones and computers to engage in encrypted communications with other devices using asymmetrical key exchange technology, involving the user of a device first creating a password and then at a later time re-entering that password on the device, with the result that when the password is re-entered the device is able to decrypt a set of software components that are required for a fresh session of encrypted communications. | 2014-11-27 |
20140351594 | Token-Based Authentication Using Middle Tier - An intermediary system facilitates a connection request from a client to a server. The intermediary system may participate in either or both of a token creation phase and a server connection phase. If participating in the token creation phase, the intermediary system generates a token that may later be used by the client during a server connection phase. The token includes a session identifier and is returned to the client. If participating in the server connection phase, the intermediary receives the token, which is sent from the client in conjunction with a connection request, extracts the session identifier from the token, and compares against the session identifier for the session in which the token was created. If the session identifiers match, then the intermediary connects to the server to complete the connection request for the client. | 2014-11-27 |
20140351595 | Key Management in a Communication Network - A method and apparatus for key management in a communication network. A Key Management Server (KMS) receives from a first device a request for a token associated with a user identity, the user identity being associated with a second device. The KMS then sends the requested token and a user key associated with the user to the first device. The KMS subsequently receives the token from the second device. A second device key is generated using the user key and a modifying parameter associated with the second device. The modifying parameter is available to the first device for generating the second device key. The second device key is then sent from the KMS to the second device. The second device key can be used by the second device to authenticate itself to the first device, or for the first device to secure communications to the second device. | 2014-11-27 |
20140351596 | METHOD, SYSTEM AND APPARATUS FOR AUTHENTICATING USER IDENTITY - The present invention relates to a method and system for authenticating user identity with a user terminal, authentication front-end computer system, and authentication server. In a first scheme, the user terminal transmits an authentication instruction comprising an authentication message to the authentication front-end computer system. Then, the authentication front-end computer system transmits an authentication request comprising the authentication message to a specific authentication server. In a second scheme, the user terminal transmits an authentication request comprising an authentication message to a specific authentication server. In any schemes, after receiving the authentication request, the authentication server authenticates a user's identity according to the authentication message. Preferably, the authentication server transmits an authentication result to the authentication front-end computer system. When a user pays a certain amount of money to an operator, the authentication server transfers the specific amount from a specific user payment account to a specific operator account after successful authentication. | 2014-11-27 |
20140351597 | AUTHENTICATION DEVICE, SYSTEM AND METHOD - An authentication device includes: a memory; and a processor coupled to the memory and configured to: when a registration request including authentication information to be used during authentication is received from a terminal device, generate registration information using the authentication information and key information and store the registration information in the memory, and when an authentication request including input information to be handled as the target of the authentication is received from the terminal device, generate a result of the authentication based on the input information, the registration information, and the key information, and transmit the result of the authentication to the terminal device. | 2014-11-27 |
20140351598 | SYSTEMS AND METHODS FOR BROADCAST WLAN MESSAGES WITH MESSAGE AUTHENTICATION - Systems, methods, and devices for broadcast wireless local area network messages with message authentication are contained herein. The method includes determining a digital signature for a broadcast packet to be transmitted to a plurality of devices on a wireless local area network, the digital signature encrypted using asymmetric cryptography to enable each of the plurality of devices to verify an identity of a device transmitting the broadcast packet. The method further includes transmitting the broadcast packet on the network, the broadcast packet including the digital signature. | 2014-11-27 |
20140351599 | SYSTEM AND METHOD FOR UPDATING MESSAGE TRUST STATUS - Systems and methods for processing encoded messages within a wireless communications system are disclosed. A server within the wireless communications system performs signature verification of an encoded message and provides, together with the message, an indication to the mobile device that the message has been verified. In addition, the server provides supplemental information, such as, for example, a hash of the certificate or certificate chain used to verify the message, to the device, to enable the device to perform additional checks on the certificate, such as, for example, validity checks, trust checks, strength checks, or the like. | 2014-11-27 |
20140351600 | METHOD AND APPARATUS FOR AUTHENTICATING STATIC TRANSCEIVER DATA AND METHOD OF OPERATING AN AIS TRANSCEIVER - A method and apparatus which ensures that static data entered into a communications device or apparatus is accurate, or at least consistent with data provided to an authentication service. In some embodiments of the invention, the authentication service may maintain a database of static data associated with each communications apparatus and/or verify the validity of at least a portion of the static data | 2014-11-27 |
20140351601 | PRODUCT AUTHENTICATION USING END-TO-END CRYPTOGRAPHIC SCHEME - A system is provided for inside-to-outside or outside-to-inside cryptographic coding that facilitates product authentication along a distribution channel. An association of authenticated, secured codes is generated between inner items (e.g., pharmaceutical doses such as pills, capsules, tablets) and outer items (e.g., packaging containing inner items). For instance, an inner code associated with a first item is used to generate (at least partially) an outer code associated with a second item that contains one or more first items. This process may be repeated multiple times with codes for outer items being a function of codes for inner items. The sequence of items may be authenticated by the dependent relationship between their codes. | 2014-11-27 |
20140351602 | APPARATUS AND METHOD FOR CONTROLLING TRANSPARENT TUNNEL MODE OPERATION IN COMMUNICATION SYSTEM SUPPORTING WIRELESS DOCKING PROTOCOL - A method for controlling a transparent tunnel mode operation in a Wireless Dockee (WD) in a communication system supporting a wireless docking protocol is provided. The method includes performing a group join process and a provisioning process for security keys with a Wireless Docking Center (WDC); accessing services of a Wireless Docking Environment (WDN); selecting an operating mode between the WD and the WDC as a transparent tunnel mode; performing a process of getting information related to a peripheral with the WDC; requesting the WDC to enable a monitor mode and a promiscuous mode; and transmitting/receiving a data packet using the information related to the peripheral with the peripheral if a Miracast connection and a docking session are established between the WD and the peripheral. | 2014-11-27 |
20140351603 | ENCRYPTION PROCESS PROTECTED AGAINST SIDE CHANNEL ATTACKS - The invention relates to a symmetric encryption process executed by a microcircuit to transform a message into an encrypted message from a secret key, the process including a first round, intermediary rounds, and a last round. According to the invention, the process includes several executions of the first round and of the last round, and a number of executions of at least one intermediary round, the number of executions being less than the number of executions of the first and last rounds. The invention is particularly applicable to DES, Triple DES, and AES processes. | 2014-11-27 |
20140351604 | ELECTRONIC DEVICE AND ENCRYPTION CONTROL METHOD - According to at least one embodiment, an electronic device includes a storage comprising a plurality of sectors and a processor configured to encrypt data in the plurality of sectors of the storage. The processor is configured to cause to be stored in a storage area address information indicating a defective sector from which data cannot be read, when the defective sector is detected during encryption. | 2014-11-27 |
20140351605 | SYSTEM AND METHOD FOR WIPING ENCRYPTED DATA ON A DEVICE HAVING FILE-LEVEL CONTENT PROTECTION - Disclosed herein are systems, methods, and non-transitory computer-readable storage media for erasing user data stored in a file system. The method includes destroying all key bags containing encryption keys on a device having a file system encrypted on a per file and per class basis, erasing and rebuilding at least part of the file system associated with user data, and creating a new default key bag containing encryption keys. Also disclosed herein is a method of erasing user data stored in a remote file system encrypted on a per file and per class basis. The method includes transmitting obliteration instructions to a remote device, which cause the remote device to destroy all key bags containing encryption keys on the remote device, erase and rebuild at least part of the file system associated with user data, and create on the remote device a new default key bag containing encryption keys. | 2014-11-27 |
20140351606 | POLICY DRIVEN CLOUD STORAGE MANAGEMENT AND CLOUD STORAGE POLICY ROUTER - Techniques are disclosed for a policy driven cloud storage management broker and a cloud storage policy router, along with methods for registering tenant applications with the cloud storage management broker and for sending (and retrieving) files to/from a cloud storage service. A tenant application may be configured to generate a user interface that allows a user to specify metadata to associate with a file along with a link to a cloud storage service to which the file is uploaded. The tenant application may collect and store the metadata attributes (along with a reference to the file stored in the cloud) in an enterprise database, while the file itself may be transmitted to the cloud storage service directly. The cloud storage policy router may learn the capabilities of different cloud storage providers using an advertisement routing protocol. | 2014-11-27 |
20140351607 | REMOVABLE, ACTIVE, PERSONAL STORAGE DEVICE, SYSTEM AND METHOD - A storage device is configured to communicate with a host device over a Bluetooth connection. The storage device includes a flash memory, a processor, and a Bluetooth controller. The memory stores at least one permission for determining access to the memory. The processor manages access to the memory, independently of the host device, based on a comparison of a request at the removable storage device to access the memory to at least one permission. The comparison is independent, requiring no management by an operating system of the host device, such that if the at least one permission includes a particular access type that matches the access requested in the request, the processor provides access to the memory. | 2014-11-27 |
20140351608 | POWER MANAGEMENT IN A DISCRETE MEMORY PORTION - Systems and methods of operating a computing system may involve receiving, at a control interface, an instruction to alter a power state at a memory device, and directing, by the control interface, a controller to control a power supply to a memory device channel to alter the power state in the memory device. | 2014-11-27 |
20140351609 | MEMORY WITH VARIABLE OPERATION VOLTAGE AND THE ADJUSTING METHOD THEREOF - A memory with variable operation voltage is disclosed. The disclosed DRAM comprises a core memory module, a register, and a first voltage adjustment module. The core memory module operates with a first control voltage. The register is used for storing a plurality of control signals and selecting one among the control signals as a voltage control signal according to an input signal. The first voltage adjustment module is respectively electrically connected to the register, the core memory module, and an external voltage, so as to provide the first control voltage according to the voltage control signal and the external voltage. | 2014-11-27 |
20140351610 | COMPUTING SYSTEM WITH POWER REQUIREMENT EVALUATION - A computing system is provided and includes recording media relative to which input/output (I/O) operations are executable, and a processor, disposed in signal communication with the recording media, which is configured to execute the I/O operations and to evaluate power requirements associated with executions of the I/O operations relative to each individual recording medium. The processor includes a computer-readable medium having a set of instructions stored thereon, which, when executed, cause the processor to schedule the executions of the I/O operations relative to each individual recording medium or to refuse the executions of the I/O operations in accordance with the evaluated power requirements. | 2014-11-27 |
20140351611 | COMMUNICATION CONNECTOR ENABLING COMMUNICATION STATUS THEREOF TO BE DETERMINED INDEPENDENTLY AND COMMUNICATION APPARATUS COMPRISING THE SAME - Disclosed is a communication connector enabling the communication status thereof to be determined independently which makes it possible to determine the communication status of the communication connector by the communication connector itself independently without the involvement of a processor for controlling the communication connector through wired data communication and a communication apparatus comprising the communication connector. | 2014-11-27 |
20140351612 | INFORMATION PROCESSING METHOD AND ELECTRONIC DEVICE - The present invention discloses an information processing method and an electronic device. The method is applied in an electronic device including a first heating element and a first cooling apparatus, and comprises steps of: detecting and obtaining, at a first instant, first posture information indicating that the electronic device is in a first posture; and detecting and obtaining first actual power of the first heating element; determining first cooling efficiency corresponding to the first posture information, based on a correspondence between the posture information and cooling efficiency of the first cooling apparatus; deciding whether the first actual power is larger than first standard power of the first heating element corresponding to the first cooling efficiency, so as to obtain a decision result; adjusting power of the first heating element from the first actual power to the first standard power, when the decision result indicates that the first actual power is larger than the first standard power. | 2014-11-27 |
20140351613 | VIRTUAL MACHINE POWER CONSUMPTION MEASUREMENT AND MANAGEMENT - Embodiments of the virtual machine power metering system and method measure the power consumption of individual virtual machines. Power meter measurements for a physical host server are converted into individual virtual machine power meters that measure the power consumption of each individual virtual machine residing on the host server. The virtual machine power consumption is computed by generating a power model using the total power consumption of the host server and resource utilization for a virtual machine. Optimal power model coefficients are computed using the power model. The energy used by the virtual machine is computed using one of two embodiments. Embodiments of the system and method also can be used to obtain the power consumption for a specific activity (such as a service, request, or search query). In addition, the virtual machine power metering can be used for virtual machine power capping to allow power oversubscription in virtualized environments. | 2014-11-27 |
20140351614 | DATA STORAGE SYSTEM WITH POWER MANAGEMENT AND METHOD OF OPERATION THEREOF - A method of operation of a data storage system includes: providing a standby power source; detecting activity on a communication channel with an upstream re-driver powered with the standby power source; generating a signal-detect output from the upstream re-driver based on the activity; determining a link status with a power control unit based on the signal-detect output, the power control unit powered with the standby power source; and generating a power output from a power supply unit based on the link status, the power supply unit controlled by the power control unit. | 2014-11-27 |
20140351615 | INTEGRATED CIRCUIT WAKE-UP CONTROL SYSTEM - An integrated circuit (IC) that operates in high and low power modes includes high and low power regulators, first and second sets of circuits, a switch connecting the high power regulator and the second set of circuits, and a wake-up control system. The wake-up control system includes a state machine that enables the high power regulator when the IC is in the high power mode, and enables the low power regulator when the IC is in the low power mode. The switch is closed when the high power regulator reaches a first threshold voltage. The state machine operates on a low frequency clock signal when the IC is in the low power mode and during wake-up, and on a high frequency clock signal in the high power mode after the switch is closed. | 2014-11-27 |
20140351616 | VOLTAGE-CONTROLLABLE POWER-MODE-AWARE CLOCK TREE, AND SYNTHESIS METHOD AND OPERATION METHOD THEREOF - A voltage-controllable power-mode-aware (PMA) clock tree in an integrated circuit (IC) and a synthesis method and an operation method thereof are provided. The PMA clock tree includes at least two sub clock trees, at least two PMA buffers and a power mode control circuit. The at least two PMA buffers respectively delay a system clock and provide the delayed system clock to the sub clock trees as delayed clocks. The power mode control circuit respectively provides at least two first power information to at least two function modules to respectively determine the power modes of the function modules. The power mode control circuit respectively provides at least two second power information to the at least two PMA buffers to respectively determine the delay time of the PMA buffers. | 2014-11-27 |
20140351617 | Method and Electronic Device for Bringing a Primary Processor Out of Sleep Mode - A method performed by an adjunct processor of a device for bringing a primary processor of the device out of a sleep mode includes monitoring a touchscreen of the device for a first continuous gesture. The method also includes sending, by the adjunct processor to the primary processor upon detecting the first continuous gesture, an initial awake command signal to awaken the primary processor from the sleep mode to initiate a primary processor awake sequence. Further, the method includes monitoring the touchscreen for completion of a second continuous gesture to initiate the sending, by the adjunct processor to the primary processor, of a primary awake command signal to indicate to the primary processor to complete the primary processor awake sequence. | 2014-11-27 |
20140351618 | Method and Electronic Device for Bringing a Primary Processor Out of Sleep Mode - A method is performed by an adjunct processor of a device for bringing a primary processor of the device out of a sleep mode. The method includes: monitoring for a set of inputs that indicates a likelihood of the primary processor being provided a primary awake command signal to awaken the primary processor from a sleep mode. The method further includes sending, by the adjunct processor to the primary processor upon receiving the set of inputs, an initial awake command signal to awaken the primary processor from the sleep mode. | 2014-11-27 |
20140351619 | SUSPENSION AND/OR THROTTLING OF PROCESSES FOR CONNECTED STANDBY - One or more techniques and/or systems are provided for assigning power management classifications to a process, transitioning a computing environment into a connected standby state based upon power management classifications assigned to processes, and transitioning the computing environment from the connected standby state to an execution state. That is, power management classifications, such as exempt, throttle, and/or suspend, may be assigned to processes based upon various factors, such as whether a process provides desired functionality and/or whether the process provides functionality relied upon for basic operation of the computing environment. In this way, the computing environment may be transitioned into a low power connected standby state that may continue executing desired functionality, while reducing power consumption by suspending and/or throttling other functionality. Because some functionality may still execute, the computing environment may transition into the execution state in a responsive manner to quickly provide a user with up-to-date information. | 2014-11-27 |
20140351620 | POWER SUPPLY DETECTING SYSTEM AND DETECTING METHOD - A detecting system of a power supply includes a logic unit and a baseboard management controller. The logic unit is configured to receive a health state of a power supply. The baseboard management controller is electrically connected to the logic unit. The BMC is configured to detect the power input state of the power supply. After detecting the power input state of the power supply, the BMC is configured to transmit a signal to the logic unit, and the logic unit is configured to receive the health state of the power supply and send a feedback of the health state to the BMC after receiving the signal. | 2014-11-27 |
20140351621 | METHODS AND APPARATUSES FOR DYNAMIC POWER CONTROL - Exemplary embodiments of methods and apparatuses to manage a power of a system that leverage intermediate power margins are described. One or more subsystems of the system are operated at one or more performance points. A power consumed by the one or more subsystems at each of the one or more performance points is measured. An operational power of the one or more subsystems at the one or more performance points is determined. The one or more subsystems are operated at well-known conditions at the one or more performance points. The operational power may be adjusted based on data associated with the one or more subsystems. The operational power is provided to a power lookup table. The power is distributed among the one or more subsystems based on the operational power. | 2014-11-27 |
20140351622 | SYSTEMS AND METHODS FOR PROVIDING DEVICE-TO-DEVICE HANDSHAKING THROUGH A POWER SUPPLY SIGNAL - Handshaking circuits are provided in a communications cable and in a device operable to be mated with the communications cable. Before a device can utilize the power supply signal of such a communications channel, the two handshaking circuits must sufficiently identify one another over a power supply signal with a decreased voltage. The decreased voltage allows for a cable plug to be provided with a safe, protected power that cannot cause harm to a human. The decreased voltage also reduces the chance that a device can receive a primary power supply signal from the cable before the device sufficiently identifies itself. Accordingly, a laptop may be connected to a portable music player, but the voltage of the power supply signal provided by the laptop to the cable may be decreased on-cable until the handshaking circuit of the portable music player sufficiently performs a handshaking operation with a on-cable handshaking circuit. | 2014-11-27 |
20140351623 | System and Method for Virtualized Shared Use Environment with Dynamic IP Address Injection - Virtualized Shared Use Environment—database driven selector of specific a) company software, b) equipment location, and c) peripherals available. The selected elements together create a Virtualized Hypercart (VH) which carries all the variable elements necessary to select the appropriate running virtual machine. Derived from the above information, the system control software (SCS) selects from a table of available virtual machines that match the requirements of company software, equipment location, peripherals available and from the company software selection, the IP addressing schemes required and available for use by the virtual machine. Dynamic IP Address Injection—based on the VH, the IP addressing scheme is injected into the virtual machine that contains the appropriate company software for the type of location that made the request with the peripherals available for use by the virtual machine. | 2014-11-27 |
20140351624 | DATA MODIFICATION IN A DISPERSED STORAGE NETWORK - A method for modifying data stored in a dispersed storage network (DSN). In various embodiments, a data object is received for storage in DSN memory. A dispersed storage processing unit determines a number of data segments for the data object and divides the data object into a plurality of data blocks. The data blocks are allocated to the data segments in a column-row orientation (for example, columns may be populated with successive data blocks of the data object). The data segments are encoded to produce a plurality of sets of encoded data slices. Additional data received for the data object is divided into additional data blocks that are allocated to data segments to create one or more new columns, which are encoded to produce a plurality of encoded data slice addendums. The encoded data slice addendums are then appended to existing encoded data slices corresponding to the data object. | 2014-11-27 |
20140351625 | CACHING REBUILT ENCODED DATA SLICES IN A DISPERSED STORAGE NETWORK - A method begins with a processing module of a computing device of a dispersed storage network (DSN) executing a rebuild function to produce a rebuilt encoded data slice for storage in a targeted storage unit of the DSN. When the targeted storage unit is currently unavailable, the method continues with the processing module storing the rebuilt encoded data slice in local memory of the computing device, recording storage of the rebuilt encoded data slice in the local memory, and recording that the targeted storage unit is currently unavailable. When the targeted storage unit is currently available, the method continues with the processing module sending the rebuilt encoded data slice to the targeted storage unit and recording storage of the rebuilt encoded data slice by the targeted storage unit. | 2014-11-27 |
20140351626 | MINIMIZING DELAY PERIODS WHEN ACCESSING MIRRORED DISKS - Methods, apparatus and computer program products implement embodiments of the present invention that include arranging a first storage device and a second storage device to store data in a mirrored configuration. Upon a host processor receiving, in response to a first request conveyed to read the data from the first storage device, a message indicating that the first storage device is in an error recovery mode, the host processor can convey a second request to read the data from the second storage device. Upon receiving the data from the second storage device, the host processor can cancel the first request. Storage devices implementing embodiments of the present invention include hard disk drives and solid state disk drives. | 2014-11-27 |
20140351627 | STORAGE DEVICE WITH ERROR RECOVERY INDICATION - Methods, apparatus and computer program products implement embodiments of the present invention that enable a controller of a storage device having storage media to perform one or more error recovery operations on the storage media, and to convey, while performing the one or more error recovery operations, a message indicating a status of the one or more error recovery operations to a host processor in communication with the storage device. Storage devices implementing embodiments of the present invention include hard disk drives and solid state disk drives. | 2014-11-27 |
20140351628 | INFORMATION PROCESSING DEVICE, CONTROL CIRCUIT, COMPUTER-READABLE RECORDING MEDIUM FOR CONTROL PROGRAM, AND CONTROL METHOD - An information processing device includes: a storage device that has a plurality of storage areas; a detection unit that carries out error detection from read data out of the storage area belonging to the storage device; a readout unit that, in a case that the detection unit detects an error, identifies an area where error occurrence is estimated including a storage area in which the data where the error is detected is written and carries out readout of data individually from each storage area in the identified area; and a movement unit that, in a case of detecting an error from the data read out by the readout unit, moves the data to another storage area. | 2014-11-27 |
20140351629 | MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING - A memory module is disclosed that includes a substrate, a memory device that outputs read data, and a buffer. The buffer has a primary interface for transferring the read data to a memory controller and a secondary interface coupled to the memory device to receive the read data. The buffer includes error logic to identify an error in the received read data and to identify a storage cell location in the memory device associated with the error. Repair logic maps a replacement storage element as a substitute storage element for the storage cell location associated with the error. | 2014-11-27 |
20140351630 | APPARATUSES, SYSTEMS, DEVICES, AND METHODS OF REPLACING AT LEAST PARTIALLY NON-FUNCTIONAL PORTIONS OF MEMORY - Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory. | 2014-11-27 |
20140351631 | STORING RAID DATA AS ENCODED DATA SLICES IN A DISPERSED STORAGE NETWORK - A method begins by a processing module receiving data for storage and interpreting the data to identify the data as redundant array of independent disks (RAID) data. The method continues with the processing module interpreting the RAID data to identify at least one of RAID block data and RAID parity data. When the RAID data includes RAID block data and RAID parity data the method continues with the processing module encoding the RAID block data in accordance with error coding dispersal storage function parameters to produce at least one set of encoded data slices and outputting the at least one set of encoded data slices to a dispersed storage network memory. | 2014-11-27 |
20140351632 | STORING DATA IN MULTIPLE FORMATS INCLUDING A DISPERSED STORAGE FORMAT - A method begins by a processing module of a dispersed storage network (DSN) receiving data in a redundant array of independent disks (RAID) format and converting from the RAID format to an original format of the data. The method continues with the processing module dispersed storage error encoding a data segment of the data in the original format to produce a set of encoded data slices, where a set of encoded data slices includes a decode threshold sub-set of encoded data slices and an error correcting sub-set of encoded data slices. The method continues with the processing module converting the decode threshold sub-set of encoded data slices into a RAID formatted data segment, storing the RAID formatted data segment in RAID memory, and storing at least the error correcting sub-set of encoded data slices in DSN memory. | 2014-11-27 |
20140351633 | STORING RAID DATA AS ENCODED DATA SLICES IN A DISPERSED STORAGE NETWORK - A method begins by a processing module receiving data for storage and interpreting the data to identify the data as redundant array of independent disks (RAID) data. The method continues with the processing module interpreting the RAID data to identify at least one of RAID block data and RAID parity data. When the RAID data includes RAID block data and RAID parity data the method continues with the processing module encoding the RAID block data in accordance with error coding dispersal storage function parameters to produce at least one set of encoded data slices and outputting the at least one set of encoded data slices to a dispersed storage network memory. | 2014-11-27 |
20140351634 | Transparent Parity-Based Recovery System and Method for Storage Devices - A transparent parity-based data recovery system and method is presented. Particularly, the system and method includes a data recovery management controller disposed in a communicative relation with a plurality of data storage devices and at least one parity storage device, wherein each of the plurality of data storage devices are independent of one another and wherein each include a complete and independent file system. The said data recovery management controller is transparent or otherwise unknown to the host system and configured to intercept or otherwise process read and/or write operations associated with a target data storage device. Parity data for said target data storage device is computed and stored. | 2014-11-27 |
20140351635 | Method and Apparatus for Dynamically Objectifying Cloud Deployment State for Backup and Restore - Method and Apparatus for rapid scalable unified infrastructure system management platform are disclosed by discovery of compute nodes, network components across data centers, both public and private for a user; assessment of type, capability, VLAN, security, virtualization configuration of the discovered unified infrastructure nodes and components; configuration of nodes and components covering add, delete, modify, scale; and rapid roll out of nodes and components across data centers both public and private. | 2014-11-27 |
20140351636 | METHOD, DEVICE, AND SYSTEM FOR DATA RECONSTRUCTION - A method for data reconstruction includes: obtaining a data migration list, where the data migration list indicates a partition with data to be migrated on a storage node with data to be migrated; generating a data migration task according to the data migration list and routing table information, where the routing table information indicates correspondence between a storage node in a cluster and a partition; and concurrently executing data migration tasks of a storage node in the cluster to reconstruct data. In addition, a device for data reconstruction and a storage system are further provided accordingly. | 2014-11-27 |