48th week of 2014 patent applcation highlights part 45 |
Patent application number | Title | Published |
20140349430 | DEPOSITION APPARATUS, METHOD THEREOF AND METHOD FOR FORMING QUANTUM-DOT LAYER USING THE SAME - A deposition apparatus includes a first nozzle configured to spray a first deposition material toward a substrate and a second nozzle configured to spray a second deposition material, a first deposition source configured to supply the first deposition material to the first nozzle and a second deposition source configured to supply the second deposition material to the second nozzle. The deposition apparatus further includes a barrier member disposed between the first nozzle and the second nozzle and is configured to block the first deposition material evaporated through the first nozzle from being mixed with the second deposition material evaporated through the second nozzle and a vacuum chamber configured to surround the first and second nozzles, the first and second deposition sources and the barrier member. | 2014-11-27 |
20140349431 | PROCESS AND MATERIALS FOR MAKING CONTAINED LAYERS AND DEVICES MADE WITH SAME - There is provided a process for forming a contained second layer over a first layer, including the steps:
| 2014-11-27 |
20140349432 | METHOD FOR MANUFACTURING ORGANIC ELECTROLUMINESCENT ELEMENT - Forming an upper electrode included in an organic electroluminescent element includes: forming a first film made of a material for the upper electrode on an organic functional layer by magnetron sputtering under a first condition; and forming a second film made of the material for the upper electrode on the first film by magnetron sputtering under a second condition different from the first condition, the second film having a lower film stress than the first film. | 2014-11-27 |
20140349433 | DEVICE AND METHOD FOR DEPOSITING ORGANIC MATERIAL - A device for depositing an organic material includes a substrate; a mask having an opening portion and a shield portion; a fixing member for fixing the substrate and the mask to each other; a deposition source comprising a plurality of nozzles arranged in a first direction and configured to spray the organic material; and a plurality of shield plates near the plurality of nozzles on the deposition source. An angle θ between the substrate and a line extended from a distal end of one of the nozzles to a center of a distal end of a corresponding one of the shield plates is greater than or equal to a taper angle Φ of the shield portion of the mask. | 2014-11-27 |
20140349434 | INTERNAL ELECTRICAL CONTACT FOR ENCLOSED MEMS DEVICES - A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate. | 2014-11-27 |
20140349435 | THERMOELECTRIC SEMICONDUCTOR - A thermoelectric semiconductor includes a matrix element that forms a matrix, and a dopant element having an atomic radius that is at least 1.09 times as large as the atomic radius of the matrix element. | 2014-11-27 |
20140349436 | METHOD FOR MAKING A SPACER IN A PHOTOVOLTAIC SUBSTRATE - A micron gap thermo-photo-voltaic device including a photovoltaic substrate, a heat source substrate, and a plurality of spacers separating the photovoltaic substrate from the heat source substrate by a submicron gap. Each spacer includes an elongated thin-walled structure disposed in a well formed in the heat source substrate and having a top surface less than a micron above the heat source substrate. Also disclosed are methods of making the spacers. | 2014-11-27 |
20140349437 | IMAGE SENSORS AND METHODS OF MANUFACTURING THE SAME - In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer transistor is arranged along a surface profile of the substrate having the recess and configured to transfer electric charges generated from the plurality of photodiodes to the floating diffusion area. The transfer transistor includes a gate insulation pattern on a sidewall and a bottom of the recess and on a surface of the substrate around the recess, and a gate conductive pattern including polysilicon doped with impurities and positioned on the gate insulation pattern along the surface profile of the substrate having the recess, wherein a cavity is in an upper surface of the gate conductive pattern. | 2014-11-27 |
20140349438 | DIAPHRAGM SHEET, AND METHOD FOR MANUFACTURING SOLAR CELL MODULE USING DIAPHRAGM SHEET - The performances and durability of a diaphragm sheet of a solar cell laminator are enhanced, and a favorable lamination work is stably performed over a long period of time. In addition, by stably performing sufficient and uniform lamination over a long period of time, a high-quality module is stably manufactured over a long period of time. A solar cell module is manufactured by using a diaphragm sheet formed of a composition containing an ethylene-propylene-diene rubber (EPDM), which is low in creep deformation and high in durability against an organic peroxide and a silane coupling agent. | 2014-11-27 |
20140349439 | ELECTRONIC DEVICE, METHOD OF MANUFACTURING THE SAME, AND CAMERA - A method of manufacturing an electronic device includes forming a structure including a member, and a first film arranged on at least a surface of the member, the member including an insulating film, a passivation film arranged on the insulating film and having an upper surface, and a trench positioned from the passivation film to the insulating film; forming a second film to cover the first film; and patterning the second film by a photolithography process using a photomask. In the forming the second film, an alignment mark including a concave portion corresponding to the trench is formed in a region above the trench in the second film. In the patterning the second film, the photomask is aligned with the structure by using the alignment mark. | 2014-11-27 |
20140349440 | PLANARIZATION METHOD - A method of planarizing a member is provided. The method includes forming the member and polishing a top face of the member. The forming the member includes forming a resist layer which varies in thickness and performing an etch-back process. The etch-back process removes the resist layer and adjusts amounts to be removed by the polishing from respective locations of the member. | 2014-11-27 |
20140349441 | SOLAR CELL WITH METAL GRID FABRICATED BY ELECTROPLATING - One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The metal grid includes at least one of: Cu and Ni. | 2014-11-27 |
20140349442 | THIN FILM TYPE SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell including a front electrode formed on a substrate; a semiconductor layer formed on the front electrode; a transparent conductive layer formed on the semiconductor layer; a rear electrode formed over the transparent conductive layer; and a buffer layer, formed between the transparent conductive layer and the rear electrode, for reducing an electric resistance of the rear electrode and enhancing an adhesive strength between the transparent conductive layer and the rear electrode. | 2014-11-27 |
20140349443 | STACKED OXIDE MATERIAL, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE - One embodiment is a method for manufacturing a stacked oxide material, including the steps of forming an oxide component over a base component; forming a first oxide crystal component which grows from a surface toward an inside of the oxide component by heat treatment, and leaving an amorphous component just above a surface of the base component; and stacking a second oxide crystal component over the first oxide crystal component. In particular, the first oxide crystal component and the second oxide crystal component have common c-axes. Same-axis (axial) growth in the case of homo-crystal growth or hetero-crystal growth is caused. | 2014-11-27 |
20140349444 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure. | 2014-11-27 |
20140349445 | DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode. | 2014-11-27 |
20140349446 | METHODS AND MATERIALS USEFUL FOR CHIP STACKING, CHIP AND WAFER BONDING - Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues. | 2014-11-27 |
20140349447 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - To stably remove a resin body formed in a supply route of a resin in a sealing step. A leadframe has, in a sub-runner portion thereof, a sub-through-hole. The sub-through-hole has, along a first direction along which the sub-runner portion extends, a first portion located on the side of a main-runner portion and a second portion located on the side of a gate portion relative to the first portion. In a plan view, an opening width of the sub-through-hole in the first direction is greater than that of the sub-through-hole in a second direction perpendicular to the first direction. In a plan view, an opening width of the sub-through-hole in the second direction gradually decreases from the first portion to an end portion of the second portion on the side of the gate portion. | 2014-11-27 |
20140349448 | SILICON-BASED ELECTRONICS WITH DISABLING FEATURE - Silicon-based circuitry is dissolved or otherwise disabled in a controlled manner by reactive materials provided beneath the insulating layer on which the circuitry is formed. Heat and/or light induced acid generating materials are provided for corroding one or more circuitry components. Additionally and/or alternatively, gas-producing materials are deposited in compartments beneath the insulating layer. The gas-producing materials cause pressure to rise within the compartments, damaging the chip. Chemical reactions within the chip may be facilitated by heating elements and/or light generating elements embedded within the chip and actuated by triggering circuits. | 2014-11-27 |
20140349449 | ELEMENTAL SEMICONDUCTOR MATERIAL CONTACT FOR HIGH ELECTRON MOBILITY TRANSISTOR - Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and the drain trench. Metallization is performed on physically exposed surfaces of the elemental semiconductor material portions in the source trench and the drain trench by depositing a metal and inducing interaction with the metal and the at least one elemental semiconductor material. A metal semiconductor alloy of the metal and the at least one elemental semiconductor material can be performed at a temperature lower than 600° C. to provide a high electron mobility transistor with a well-defined device profile and reliable metallization contacts. | 2014-11-27 |
20140349450 | TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE - Techniques for providing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus including a first region and a second region. The apparatus may also include a body region disposed between the first region and the second region and capacitively coupled to a plurality of word lines, wherein each of the plurality of word lines is capacitively coupled to different portions of the body region. | 2014-11-27 |
20140349451 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE HAVING GATE STRUCTURES CONNECTED BY A METAL GATE CONDUCTOR - A complementary metal oxide semiconductor (CMOS) device including a substrate including a first active region and a second active region, wherein each of the first active region and second active region of the substrate are separated by from one another by an isolation region. A n-type semiconductor device is present on the first active region of the substrate, in which the n-type semiconductor device includes a first portion of a gate structure. A p-type semiconductor device is present on the second active region of the substrate, in which the p-type semiconductor device includes a second portion of the gate structure. A connecting gate portion provides electrical connectivity between the first portion of the gate structure and the second portion of the gate structure. Electrical contact to the connecting gate portion is over the isolation region, and is not over the first active region and/or the second active region. | 2014-11-27 |
20140349452 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES - A method for manufacturing a semiconductor device is provided. A first stack structure and a second stack structure are formed to respectively cover a portion of a first fin structure and a second fin structure. Subsequently, a spacer is respectively formed on the sidewalls of the fin structures through an atomic layer deposition process and the composition of the spacers includes silicon carbon nitride. Afterwards, a interlayer dielectric is formed and etched so as to expose the hard mask layers. A mask layer is formed to cover the second stack structure and a portion of the dielectric layer. Later, the hard mask layer in the first stack structure is removed under the coverage of the mask layer. Then, a dummy layer in the first stack structure is replaced with a conductive layer. | 2014-11-27 |
20140349453 | METHODS OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES USING DIRECT STRAPPING LINE CONNECTIONS - Memory devices include a plurality of elongate gate stacks extending in parallel on a substrate and at least one insulation region disposed in a trench between adjacent ones of the gate stacks. The at least one insulation region has linear first portions having a first width and widened second portions having a second width greater than the first width. A common source region is disposed in the substrate underlying the at least one insulation region. The devices further include respective conductive plugs passing through respective ones of the widened second portions of the at least one insulation region and electrically connected to the common source region and at least one strapping line disposed on the conductive plugs between the adjacent ones of the gate stacks and in direct contact with the conductive plugs. | 2014-11-27 |
20140349454 | METHODS OF FORMING CHARGE STORAGE STRUCTURES INCLUDING ETCHING DIFFUSED REGIONS TO FORM RECESSES - Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed. | 2014-11-27 |
20140349455 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor memory device, a plurality of control gates is stacked in a first region and a second region of a substrate. A plurality of interlayer insulating layers is stacked in a portion of the second region of the substrate. Each interlayer insulating layer is formed at the same level as a corresponding one of the control gates. A plurality of sub-control gates is stacked in the first and second regions region of the substrate and interposed between the control gates and the interlayer insulating layers. A common node penetrates the interlayer insulating layers and the sub-control gates. | 2014-11-27 |
20140349456 | TRENCH POWER MOSFET STRUCTURE FABRICATION METHOD - A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an isolating structure in the isolating trench. Wherein, the junction profiles of the two doped regions are made by on implantation method for moderate the electric field distribution and decreasing the conduction loss. | 2014-11-27 |
20140349457 | FLOATING BODY MEMORY CELL APPARATUS AND METHODS - Some embodiments include apparatus and methods having a base; a memory cell including a body, a source, and a drain; and an insulation material electrically isolating the body, the source, and the drain from the base, where the body is configured to store information. The base and the body include bulk semiconductor material. Additional apparatus and methods are described. | 2014-11-27 |
20140349458 | Source and Drain Dislocation Fabrication in FinFETs - A device includes a semiconductor fin over a substrate, a gate dielectric on sidewalls of the semiconductor fin, and a gate electrode over the gate dielectric. A source/drain region is on a side of the gate electrode. A dislocation plane is in the source/drain region. | 2014-11-27 |
20140349459 | Integrated Circuit Having Raised Source Drains Devices with Reduced Silicide Contact Resistance and Methods to Fabricate Same - A structure has at least one field effect transistor having a gate stack disposed between raised source drain structures that are adjacent to the gate stack. The gate stack and raised source drain structures are disposed on a surface of a semiconductor material. The structure further includes a layer of field dielectric overlying the gate stack and raised source drain structures and first contact metal and second contact metal extending through the layer of field dielectric. The first contact metal terminates in a first trench formed through a top surface of a first raised source drain structure, and the second contact metal terminates in a second trench formed through a top surface of a second raised source drain structure. Each trench has silicide formed on sidewalls and a bottom surface of at least a portion of the trench. Methods to fabricate the structure are also disclosed. | 2014-11-27 |
20140349460 | Method for producing a silicon-germanium film with variable germanium content - The substrate is provided with a first semiconducting area partially covered by a first masking pattern to define a protected surface and an open surface. A continuous layer of silicon-germanium is deposited in non-selective manner on the first semiconducting area and on the first gate pattern. The continuous silicon-germanium layer forms an interface with the first semiconducting area. A diffusion/condensation annealing is performed to make the germanium atoms diffuse from the silicon-germanium layer to the open surface of the first semiconducting area. The masking pattern is a gate stack of the transistor or is used to define the shape of the gate stack in an electrically insulating layer so as to form a self-aligned gate stack with the source and drain areas. | 2014-11-27 |
20140349461 | METHOD FOR USING METAL BILAYER - A method for using a metal bilayer is disclosed. First, a bottom electrode is provided. Second, a dielectric layer which is disposed on and is in direct contact with the lower electrode is provided. Then, a metal bilayer which serves as a top electrode in a capacitor is provided. The metal bilayer is disposed on and is in direct contact with the dielectric layer. The metal bilayer consists of a noble metal in direct contact with the dielectric layer and a metal nitride in direct contact with the noble metal. | 2014-11-27 |
20140349462 | METHOD FOR PRODUCING THIN SEMICONDUCTOR COMPONENTS - A semiconductor substrate ( | 2014-11-27 |
20140349463 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a method for improving anti-radiation performance of SOI structure comprising following steps: implementing particle implantations of high-energy neutrons, protons and γ-rays to an SOI structure, and then performing annealing process. The present invention aims to improving anti-radiation performance of SOI devices by means of introducing displacement damage into a buried oxide layer through implantation of high-energy particles. | 2014-11-27 |
20140349464 | METHOD FOR FORMING DUAL STI STRUCTURE - A method for forming dual shallow trench isolation (STI) structure, which includes a first etching process for forming a deep STI structure in a logic region using a hard mask layer as a mask and a second etching process for forming a shallow STI structure in a pixel region using a photoresist as a mask. Independence between these two etching processes can avoid the prior art problems of double slope profile of the sidewalls of the deep STI structure and a thickness inconsistency of the hard mask layer between on the pixel region and on the logic region. | 2014-11-27 |
20140349465 | JOINING DEVICE, JOINING SYSTEM AND JOINING METHOD - A joining device for joining substrates with an intermolecular force includes a first holding unit configured to hold a first substrate on a lower surface thereof, a second holding unit installed below the first holding unit and configured to hold a second substrate on an upper surface thereof, and a temperature adjustment mechanism configured to adjust a temperature of the first substrate before the first substrate is held in the first holding unit and a temperature of the second substrate before the second substrate is held in the second holding unit to a predetermined temperature. | 2014-11-27 |
20140349466 | Wafer Supporting Structure and Method for Forming the Same - A method for forming a wafer supporting structure comprises growing a single crystal using a floating zone crystal growth process, forming a silicon ingot having an oxygen concentration equal to or less than 1 parts-per-million-atomic (ppma), slicing a wafer from the silicon ingot, cutting portions of the wafer to form a supporting structure through a mechanical lathe and applying a high temperature anneal process to the supporting structure. | 2014-11-27 |
20140349467 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface. | 2014-11-27 |
20140349468 | TRENCH FILLING METHOD AND PROCESSING APPARATUS - The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed. | 2014-11-27 |
20140349469 | PROCESSING FOR ELECTROMECHANICAL SYSTEMS AND EQUIPMENT FOR SAME - This disclosure provides systems, methods and apparatus for processing multiple substrates in a processing tool. An apparatus for processing substrates can include a process chamber, a common reactant source, and a common exhaust pump. The process chamber can be configured to process multiple substrates. The process chamber can include a plurality of stacked individual subchambers. Each subchamber can be configured to process one substrate. The common reactant source can be configured to provide reactant to each of the subchambers in parallel. The common exhaust pump can be connected to each of the subchambers. | 2014-11-27 |
20140349470 | SCHOTTKY DIODE AND METHOD FOR FABRICATING THE SAME - A Schottky diode includes a deep well formed in a substrate, an isolation layer formed in the substrate, a first conductive type guard ring formed in the deep well along an outer sidewall of the isolation layer and located at a left side of the isolation layer, a second conductive type well formed in the deep well along the outer sidewall of the isolation layer and located at a right side of the isolation layer, an anode electrode formed over the substrate and coupled to the deep well and the guard ring, and a cathode electrode formed over the substrate and coupled to the well. A part of the guard ring overlaps the isolation layer. | 2014-11-27 |
20140349471 | PROFILE PRE-SHAPING FOR REPLACEMENT POLY GATE INTERLAYER DIELECTRIC - Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed. | 2014-11-27 |
20140349472 | FLASH MEMORY - A MONOS Charge-Trapping flash (CTF), with record thinnest 3.6 nm ENT trapping layer, has a large 3.1 V 10-year extrapolated retention window at 125° C. and excellent 10 | 2014-11-27 |
20140349473 | Dummy Gate Electrode of Semiconductor Device - The disclosure relates to a dummy gate electrode of a semiconductor device. An embodiment comprises a substrate comprising a first surface; an insulation region covering a portion of the first surface, wherein the top of the insulation region defines a second surface; and a dummy gate electrode over the second surface, wherein the dummy gate electrode comprises a bottom and a base broader than the bottom, wherein a ratio of a width of the bottom to a width of the base is from about 0.5 to about 0.9. | 2014-11-27 |
20140349474 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device according to an embodiment of the present invention includes fuse patterns spaced apart from each other by a predetermined distance over a first interlayer insulation film; a second interlayer insulation film disposed between the fuse patterns over the first interlayer insulation film; and a capping film pattern formed over the fuse patterns and the second interlayer insulation films, the capping film pattern including a slot exposing the second interlayer insulation film. | 2014-11-27 |
20140349475 | MOISTURE BARRIER FOR A WIRE BOND - An electronic device comprising a bond pad on a substrate and a wire bonded to the bond pad. The device further comprises an intermetallic compound interface located between the bond pad and the wire and a silicon nitride or silicon carbonyl layer covering the intermetallic compound interface | 2014-11-27 |
20140349476 | MANUFACTURING METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE - The present invention provides a manufacturing method of a semiconductor device, at least containing the following steps: first, a substrate is provided, wherein a first dielectric layer is formed on the substrate, at least one metal gate is formed in the first dielectric layer and at least one source drain region (S/D region) is disposed on two sides of the metal gate, at least one first trench is then formed in the first dielectric layer, exposing parts of the S/D region. The manufacturing method for forming the first trench further includes performing a first photolithography process through a first photomask and performing a second photolithography process through a second photomask, and at least one second trench is formed in the first dielectric layer, exposing parts of the metal gate, and finally, a conductive layer is filled in each first trench and each second trench. | 2014-11-27 |
20140349477 | METHODS AND APPARATUSES FOR VOID-FREE TUNGSTEN FILL IN THREE-DIMENSIONAL SEMICONDUCTOR FEATURES - Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially fills a plurality of interior regions of the 3-D structure, etching vertically and horizontally after depositing the first layer, and depositing a second layer of the tungsten-containing material within the 3-D structure after the vertical and horizontal etching such that the second layer fills at least a portion of the interior regions left unfilled by the first layer. Also disclosed herein are apparatuses for filling a 3-D structure of a semiconductor substrate with a tungsten-containing material having a controller with instructions for etching vertically and horizontally. | 2014-11-27 |
20140349478 | METHOD INCLUDING AN ETCHING OF A PORTION OF AN INTERLAYER DIELECTRIC IN A SEMICONDUCTOR STRUCTURE, A DEGAS PROCESS AND A PRECLEAN PROCESS - A method includes providing a semiconductor structure. The semiconductor structure includes a substrate having a frontside and a backside, an electrically conductive feature including copper provided at the frontside of the substrate and a low-k interlayer dielectric provided over the electrically conductive feature. A portion of the interlayer dielectric is etched. In the etch process, a surface of the electrically conductive feature is exposed. A degas process is performed, wherein the semiconductor structure is exposed to a first gas, and wherein the semiconductor structure is heated from the backside and from the frontside. A preclean process may be performed. The preclean process may include a first phase wherein the semiconductor structure is exposed to a substantially non-ionized second gas and a second phase wherein the semiconductor structure is exposed to a plasma created from the second gas. | 2014-11-27 |
20140349479 | METHOD INCLUDING A REMOVAL OF A HARDMASK FROM A SEMICONDUCTOR STRUCTURE AND RINSING THE SEMICONDUCTOR STRUCTURE WITH AN ALKALINE RINSE SOLUTION - A method includes providing a semiconductor structure. The semiconductor structure includes an electrically conductive feature including a first metal, a dielectric material provided over the electrically conductive feature and a hardmask. The hardmask includes a hardmask material and is provided over the dielectric material. An opening is provided in the interlayer dielectric and the hardmask. A portion of the electrically conductive feature is exposed at a bottom of the opening. The hardmask is removed. The removal of the hardmask includes exposing the semiconductor structure to an etching solution including hydrogen peroxide and a corrosion inhibitor. After the removal of the hardmask, the semiconductor structure is rinsed. Rinsing the semiconductor structure includes exposing the semiconductor structure to an alkaline rinse solution. | 2014-11-27 |
20140349480 | COBALT SELECTIVITY IMPROVEMENT IN SELECTIVE COBALT PROCESS SEQUENCE - Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer. | 2014-11-27 |
20140349481 | Air-Gap Formation in Interconnect Structures - A structure includes a substrate, and a first metal line and a second metal line over the substrate, with a space therebetween. A first air gap is on a sidewall of the first metal line and in the space, wherein an edge of the first metal line is exposed to the first air gap. A second air gap is on a sidewall of the second metal line and in the space, wherein an edge of the second metal line is exposed to the second air gap. A dielectric material is disposed in the space and between the first and the second air gaps. | 2014-11-27 |
20140349482 | METHOD OF FORMING FIN-SHAPED STRUCTURE - A method of forming fin-shaped structures includes the following steps. A plurality of spacers is formed on a substrate. The substrate is etched by using the spacers as hard masks to form a plurality of fin-shaped structures in the substrate. A cutting process is then performed to remove parts of the fin-shaped structures and the spacers formed on the removed parts. | 2014-11-27 |
20140349483 | CMP COMPOSITIONS SELECTIVE FOR OXIDE OVER POLYSILICON AND NITRIDE WITH HIGH REMOVAL RATE AND LOW DEFECTIVITY - The invention provides a chemical-mechanical polishing composition containing a ceria abrasive and a polymer of formula I: | 2014-11-27 |
20140349484 | POLISHING COMPOSITION - A polishing composition of the present invention is to be used for polishing an object including a metal portion or an interlayer insulation film. The polishing composition contains silica on which an organic acid, such as a sulfonic acid and a carboxylic acid, is immobilized and an oxidizing agent. | 2014-11-27 |
20140349485 | METHOD FOR MANUFACTURING SILICON SUBSTRATE HAVING TEXTURED STRUCTURE - The present invention provides a method for manufacturing a silicon substrate having texture structure, by which, in comparison with conventional methods, it is possible to reduce manufacturing step and form easily regular texture structure on silicon substrate surface. The method of the present invention comprises the steps of: (A) forming a pattern on the silicon substrate using a resin-comprising composition; (B) irradiating an etching gas to the silicon substrate surface other than the pattern portion; and (C) processing the silicon substrate irradiated with the etching gas with an alkaline etching fluid to form concave structure under the pattern portion. Furthermore, the present invention provides a resin-comprising composition usable in the method, in particular, a composition comprising photo-curable resin. | 2014-11-27 |
20140349486 | Methods of Utilizing Block Copolymer to Form Patterns - Some embodiments include methods of forming patterns utilizing copolymer. A main body of copolymer may be formed across a substrate, and self-assembly of the copolymer may be induced to form a pattern of structures across the substrate. A uniform thickness throughout the main body of the copolymer may be maintained during the inducement of the self-assembly. In some embodiments, the uniform thickness may be maintained through utilization of a wall surrounding the main body of copolymer to impede dispersal of the copolymer from the main body. In some embodiments, the uniform thickness may be maintained through utilization of a volume of copolymer in fluid communication with the main body of copolymer. | 2014-11-27 |
20140349487 | Methods of Etching Trenches into Silicon of a Semiconductor Substrate, Methods of Forming Trench Isolation in Silicon of a Semiconductor Substrate, and Methods of Forming a Plurality of Diodes - A method of etching trenches into silicon of a semiconductor substrate includes forming a mask over silicon of a semiconductor substrate, with the mask comprising trenches formed there-through. Plasma etching is conducted to form trenches into the silicon of the semiconductor substrate using the mask. In one embodiment, the plasma etching includes forming an etching plasma using precursor gases which include SF | 2014-11-27 |
20140349488 | Etching Gas - Disclosed is an etching gas provided containing CHF | 2014-11-27 |
20140349489 | METHOD AND APPARATUS FOR LIQUID TREATMENT OF WAFER-SHAPED ARTICLES - An apparatus for treating a wafer-shaped article, comprises a spin chuck for holding a wafer-shaped article in a predetermined orientation, a liquid dispenser for dispensing a treatment liquid onto a downwardly facing surface of a wafer-shaped article when positioned on the spin chuck, and a gas dispenser for dispensing a gas within a gap defined between the downwardly-facing surface of the wafer-shaped article and an upper surface of the spin chuck. | 2014-11-27 |
20140349490 | CONFORMAL AMORPHOUS CARBON FOR SPACER AND SPACER PROTECTION APPLICATIONS - A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, depositing conformally a predetermined thickness of a nitrogen-doped amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the nitrogen-doped amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the nitrogen-doped amorphous carbon layer, and removing the patterned features from the substrate. | 2014-11-27 |
20140349491 | METHODS AND APPARATUS FOR SELECTIVE OXIDATION OF A SUBSTRATE - Methods for improving selective oxidation of polysilicon against silicon nitride in a process chamber are provided herein. In some embodiments, a method of selectively oxidizing a substrate disposed within a process chamber includes exposing a substrate having an exposed polysilicon layer and an exposed silicon nitride layer to a hydrogen-containing gas; heating the substrate to a process temperature of at least about 850 degrees Celsius; adding an oxygen containing gas to the process chamber while maintaining the substrate at the process temperature to create a mixture of the hydrogen-containing gas and the oxygen-containing gas; and exposing the substrate to the mixture while at the process temperature to selectively form an oxide layer atop the polysilicon layer substantially without forming an oxide layer atop the silicon nitride layer. | 2014-11-27 |
20140349492 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SUBSTRATE PROCESSING APPARATUS AND RECORDING MEDIUM - A semiconductor device manufacturing method includes forming a thin film containing silicon, oxygen, carbon and a specified Group III or Group V element on a substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding and a first catalytic gas to the substrate; supplying an oxidizing gas and a second catalytic gas to the substrate; and supplying a modifying gas containing the specified Group III or Group V element to the substrate. | 2014-11-27 |
20140349493 | METHODS AND APPARATUSES FOR ENERGETIC NEUTRAL FLUX GENERATION FOR PROCESSING A SUBSTRATE - Apparatuses and methods for processing substrates are disclosed. A processing apparatus includes a chamber for generating a plasma therein, an electrode associated with the chamber, and a signal generator coupled to the electrode. The signal generator applies a DC pulse to the electrode with sufficient amplitude and sufficient duty cycle of an on-time and an off-time to cause events within the chamber. A plasma is generated from a gas in the chamber responsive to the amplitude of the DC pulse. Energetic ions are generated by accelerating ions of the plasma toward a substrate in the chamber in response to the amplitude of the DC pulse during the on-time. Some of the energetic ions are neutralized to energetic neutrals in response to the DC pulse during the off-time. Some of the energetic neutrals impact the substrate with sufficient energy to cause a chemical reaction on the substrate. | 2014-11-27 |
20140349494 | ELECTRONIC DEVICE - The body of an electronic device defines a receiving space for the insertion of a memory card, and the connecting pins inside the receiving space are at two different heights. The lower first conductive pins and the more upstanding second conductive pins each include a fixing piece and a resilient piece. An angle between the fixing piece and the resilient piece of each pin is greater for the more upstanding second conductive pins than it is for the first conductive pins. A memory card is received between a pivoting cover and the first and second conductive pins and the conductive pins of the memory card firstly deform the second conductive pins and only then deform the first conductive pins, to press all the resilient pieces into electrical contact with their fixing pieces. | 2014-11-27 |
20140349495 | CONNECTOR - A connector includes: a casing; a pair of signal terminals that have respective tip end portions, the pair of signal terminals projecting from the casing, the tip end portions being perpendicularly bent; a ground terminal arranged such that the ground terminal and the pair of signal terminals are arranged in a row, the ground terminal projecting at a position adjacent to the pair of signal terminals; and a shield disposed between the casing and the tip end portions of the pair of signal terminals. | 2014-11-27 |
20140349496 | HIGH SPEED PLUG CONNECTOR HAVING IMPROVED HIGH FREQUENCY PERFORMANCE - A plug connector ( | 2014-11-27 |
20140349497 | CONNECTORS FOR SMART WINDOWS - This disclosure provides connectors for smart windows. A smart window may incorporate an optically switchable pane. In one aspect, a window unit includes an insulated glass unit including an optically switchable pane. A wire assembly may be attached to the edge of the insulated glass unit and may include wires in electrical communication with electrodes of the optically switchable pane. A floating connector may be attached to a distal end of the wire assembly. The floating connector may include a flange and a nose, with two holes in the flange for affixing the floating connector to a first frame. The nose may include a terminal face that present two exposed contacts of opposite polarity. Pre-wired spacers improve fabrication efficiency and seal integrity of insulated glass units. Electrical connection systems include those embedded in the secondary seal of the insulated glass unit. | 2014-11-27 |
20140349498 | ELECTRONIC DEVICE AND CONNECTOR MODULE - An electronic device includes a casing and a connector module. The casing has a notch. The connector module includes a connector main body, a cover, a first position-limiting portion, a second position-limiting portion and an elastic component. The connector main body is disposed on the casing and corresponding to the notch. The cover is pivoted with the casing. The cover is adapted to rotate to a first position to cover the notch or rotate to a second position to expose the notch. The first position-limiting portion has at least one position-limiting hole. The first position-limiting portion and the second position-limiting portion have a gap therebetween. The elastic component is disposed in the gap and partially inserted into the position-limiting-hole. The cover presses the elastic component on the casing and is adapted to restore from the second position to the first position by elastic force of the elastic component. | 2014-11-27 |
20140349499 | LEVER-TYPE CONNECTOR - A slide lever of a lever-type connector is a long plate-like member, inserted into a lever accommodation space of a main body side connector with a free longitudinal end thereof in the lead and arranged to be movable back and forth along an extending direction of the lever accommodation space. This slide lever includes a cam groove engageable with a cam pin projecting on a mating side connector. The cam groove includes an open end at an end surface of the slide lever extending in an inserting direction of the slide lever. A first path is connected to the open end portion and extends toward the free end with distance from the end surface. A second path extends away from the free end part with distance from the end surface and is connected to a deepest portion of the cam groove. | 2014-11-27 |
20140349500 | GELATINOUS DIELECTRIC MATERIAL FOR HIGH VOLTAGE CONNECTOR - A connector device includes a device body and a pin assembly. The connector device includes a bushing portion with a conductive bus having a first bore, a conductive housing with a second bore that is axially aligned with the first bore, an internal chamber separating the first bore and the second bore, and a gelatinous silicone material enclosed within the internal chamber. The pin assembly includes a non-conductive tip and a conductive pin secured to the non-conductive tip. The pin assembly is configured to move axially, within the first and second bores, between a closed position that provides an electrical connection between the conductive bus and the conductive housing and an open position that provides no electrical connection between the conductive bus and the conductive housing. The gelatinous silicone material inhibits voltage arcing across a surface of the non-conductive tip when the pin assembly is in the open position. | 2014-11-27 |
20140349501 | TERMINAL-ATTACHED WIRE AND TERMINAL - A terminal ( | 2014-11-27 |
20140349502 | DEVICE FOR SUPPLYING ELECTRICAL ENERGY TO A LOAD, AND SYSTEM THEREFOR - A device for supplying electrical energy to a load. A supporting element made of electrically insulating material is provided, which has at least one electrical strip conductor formed from an electrically conductive layer. At least one electrically conductive contact face per strip conductor is provided on the source side, via which the strip conductor is contactable with the voltage source. A flat plug that includes the load-side ends of the strip conductors is provided on the supporting element and effects the electrical connection to the load. A system for electrification of an electrical load on a furniture item is provided. At least one device, a support and at least one vertical profile are provided. The device is mounted on the support and the strip conductors of the support are electrified by inserting the support into the profile. For that purpose, the profile has at least one vertically arranged conductor rail. | 2014-11-27 |
20140349503 | ASSISTING APPARATUS FOR UNPLUGGING RJ-45 CONNECTOR - An assisting apparatus is provided to unplug a Registered Jack-45 (RJ-45) connector from a connector of an electronic device. The assisting apparatus includes an operation member. The operation member includes a pivot portion pivotably connected to a sidewall of the electronic device, a handle extending from the pivot portion, and an urging plate extending from the pivot portion and located above a latch of the RJ-45 connector engaging with the connector of the electronic device. The handle is operable to rotate the operation member to allow the urging plate to push the latch down, to make the latch disengage from the connector of the electronic device. | 2014-11-27 |
20140349504 | LEVER-TYPE CONNECTOR - A lever-type connector has an outer housing ( | 2014-11-27 |
20140349505 | CONNECTOR FOR TUBULAR ELEMENTS - Electric connector, including first and second connector parts ( | 2014-11-27 |
20140349506 | CLIP AND LATCH SUBSTITUTION DEVICE FOR MODULAR PLUGS - A clip and latch device including: a mount including a securing base defining a plane, a rear end and a front end, a clip base mounted at the rear end of the securing base, a clip having a normally downward angle from the clip base towards the front end of the securing base, and a latch which terminates at the clip and normally extending so that the latch reaches to at least the plane of the securing base. The clip and latch device can be used for modular male plug, for example a male RJ plug, which may be with or without a broken tab or latch. | 2014-11-27 |
20140349507 | ELECTRICAL CONNECTOR ASSEMBLY HAVING FOOLPROOF STRUCTURE - An electrical connector assembly includes a first connector and a second connector mating with the first connector in a mating direction. The first connector includes a mating portion defining two long walls opposite to each other and two short walls disposed oppositely, the long and short walls are connected to each other together to form a mating cavity. The second connector includes a mating tongue extending forwardly and a second shielding shell defining a mating frame surrounding the mating tongue. Wherein one of the long walls defines a pair of fool-proof portions extending outwardly from both sides thereof, the mating frame defines a pair of fool-proof slots and engaging with the fool-proof portions so as to prevent the first connector from mismating the second connector. | 2014-11-27 |
20140349508 | CABLE CONNECTOR HAVING A SLIDER FOR COMPRESSION - A coaxial cable connector is attachable to a coaxial cable. The connector, in one embodiment, includes a connector body, a coupler and a slider. The slider is configured to cause compression of the connector body. | 2014-11-27 |
20140349509 | CONNECTOR ASSEMBLY HAVING AN IMPROVED LATCH MEMBER - A cable connector assembly includes a connector and a cable. The connector includes: a housing including a mating portion and a body portion, a latch mechanism mounted on the housing, and a metal casing enclosing the housing. The body portion includes a receiving slot at a front end thereof and a post projecting upwardly. The latch mechanism includes a latch member received in the receiving slot and a pulling member coupled to the latch member. The latch member includes a locking portion extending beyond the body portion and above the mating portion, a holding portion held on the body portion, and a connecting portion. The connecting portion of the latch member includes a first opening mating with the post. The first opening extends from a middle line of the mating portion sidewardly to both sides of the mating portion. | 2014-11-27 |
20140349510 | JOINT CONNECTOR AND JOINT TERMINAL - A joint connector includes a housing that includes terminal chambers. At least two neighboring joint terminals are housed in terminal chambers neighboring among the terminal chambers, respectively. Each of the neighboring joint terminals includes a wire-crimping portion, a terminal body housed in a terminal chamber among the plurality of terminal chambers, and a pair of first and second contact portions, respectively. The first contact portion of one of the neighboring joint terminals is electrically contacted with the second contact portion of another of the neighboring joint terminals. A pair of spring tabs is formed on both sidewalls of the terminal body and contacts with opposed inner surfaces of the terminal chamber, respectively, by an elastic restoration behavior. According to the joint connector, an increase of a contact resistance to be generated by vibrations and temperature variations can be sufficiently restricted. | 2014-11-27 |
20140349511 | PLUG CONNECTION HAVING A GUIDE ELEMENT OPTIMIZED FOR PREVENTING SHAVINGS - A plug connector set-up for a control unit includes: a pin support having a pin; and a guide element having a lead-through for positioning the pin at a circuit board of the control unit. The lead-through has an entrance opening on the side facing the pin support and an outlet opening on the side facing away from the pin support. A diameter of the entrance opening is greater than a diameter of the outlet opening. The pin includes a centering region having a diameter which is less than the diameter of the entrance opening and greater than the diameter of the outlet opening. | 2014-11-27 |
20140349512 | SOCKET FOR CARD - A socket coupled to an electronic device is provided. The socket includes a socket housing having a card containing space, a first tension rib, protruding in a direction of the card containing space in the socket housing, for supporting a first card contained in the card containing space, and a second tension rib, protruding in the direction of the card containing space in the socket housing, for supporting a second card having a size different from that of the first card contained in the card containing space. Accordingly, the electronic device may effectively utilize a space and may be slimmed down. | 2014-11-27 |
20140349513 | Wire Mount Electrical Connector - An electrical connector includes an insulative connector housing including a longitudinal body portion and first and second pairs of opposing end portions. The body portion has a plurality of contact openings extending therein in an insertion direction for supporting a plurality of electrical contact terminals. The first and second pairs of opposing end portions extend from opposing ends of the body portion in the insertion direction. At least one end portion in each pair of opposing end portions includes a ridge extending in the insertion direction for guiding a cover latch along a side surface of the ridge and guiding a strain relief latch along an opposing side surface of the ridge. The ridge has an inclined top surface for resiliently deflecting a cover latch and an inclined side surface for resiliently deflecting a strain relief latch. The ridge has an end portion for latching onto a cover latch and a strain relief latch. | 2014-11-27 |
20140349514 | ELECTRICAL CONNECTOR WITH HEAT-DISSIPATION FEAUTER THEREOF - An electrical connector includes an insulator base having a rear retaining portion and a front tongue portion, a first terminal module with a plurality of first terminals thereof, a second terminal module with a plurality of second terminals thereof and interlocked with the first terminal module, and a shielding shell retained to the insulator base. A heat dissipation metal plate is embedded in the insulator base, and the heat dissipation metal plate provides a contact ear extending out of the insulator base and contacting with the shielding shell for heat dissipating. | 2014-11-27 |
20140349515 | CONNECTION ELEMENT - A connection assembly is described. The connection assembly has a substrate having at least two electrically conductive structures, a housing, which is connected to the substrate on the bottom by an adhesive fastening, the housing has a plug receptacle having at least two plug contacts, the plug contacts are connected to at least two contact pads via electrical conductors, and the contact pads connected in an electrically conducting fashion to the electrically conductive structures, the angle between the plug-in direction into the plug receptacle and the bottom of the housing lying between 15° to 90°. | 2014-11-27 |
20140349516 | INTERLOCK MECHANISM OF MOTOR, AND MOTOR - An interlock mechanism of a motor, includes a terminal box configured to store a terminal used to connect a power supply cable to the motor; a lid configured to close the terminal box; a fixing member configured to fix the lid to the terminal box; a first connector attached to the lid; a second connector capable of being coupled with the first connector and configured to cover the fixing member in a state that the second connector is coupled with the first connector. | 2014-11-27 |
20140349517 | Radially Uniform Spring-Biased Intra-Pole Plug Connector and Transformer Outside the Trunk Configuration for Electric Artificial Tree - A radially uniform spring-biased intra-pole plug connector and transformer outside the trunk configuration for an electric artificial tree is described. The radially uniform plug comprises a springed-tip and a prong, and allows the tree trunk segments to be connected at any point along their 360 degree circumference. The plug connector resembles the structure of a car cigarette lighter. A mold is used to sandwich the plug within the trunk. A plug portion of the plug connector is housed in one trunk segment, and a receptacle portion is housed in a different trunk segment, such that when the trunk segments are assembled, the plug is connected, illuminating the tree. The plug allows the electrical wiring to be hidden and housed within the trunk, providing safety, convenience to the user and giving the tree a cleaner appearance. The transformer outside the trunk configuration makes the trunk safer, more lightweight and less bulky. | 2014-11-27 |
20140349518 | ELECTRICAL CONNECTOR HAVING IMPROVED SHIELDING MEANS - An electrical connector includes a housing unit and a contact unit received therein. The housing unit includes a shielding member and an insulating member retained on the shielding member. The shielding member defines opposite upper end and lower end while the insulating member includes a first portion and a second portion seated on the upper and lower ends respectively and defines a cavity therebetween. The contact unit includes a plurality of contacts, a metal plate defining a plurality of through holes and an insulating body retaining the contacts and the metal plate. The metal plate divides the cavity into a first cavity and a second cavity, the contact runs through the through hole of the metal plate and comprises a first arm above the metal plate received in the first cavity and a second arm under the metal plate received in the second cavity. | 2014-11-27 |
20140349519 | ELECTRICAL CONNECTOR HAVING IMPROVED SHIELDING - An electrical connector includes: a shielding shell; an insulative housing received in the shielding shell, the insulative housing having two rows of mating ports in a vertical direction and a receiving slot between the two rows of mating ports; a contact module mounted in the insulative housing, the contact modules comprising an inner circuit board and a plurality of mating contacts mounted on an upper surface and a lower surface of the inner circuit board, the inner circuit board comprising a conductive area at a front end thereof; and a conductive foam received in the receiving slot and compressed between the conductive area of the inner circuit board and the shielding shell. | 2014-11-27 |
20140349520 | FERRITE CORE BUILT-IN CONNECTOR - A connector includes ferrite cores ( | 2014-11-27 |
20140349521 | JOINT TERMINAL AND JOINT CONNECTOR - A joint terminal is to be used in a connector housing in a plurality. The joint terminal includes a wire-crimping portion, a terminal body to be housed in a terminal chamber of the connector housing (the terminal body includes a bottom wall and a pair of sidewalls perpendicularly extended from both side ends of the bottom wall, respectively) and a pair of first and second contact portions laterally extended outward from the pair of sidewalls of the terminal body, respectively. In the joint terminal, a pair of front walls is perpendicularly extended from front ends of the sidewalls toward each other so that end edges of the front walls face to each other. The sidewalls | 2014-11-27 |
20140349522 | FOUR-POLE PLUG FOR CONNECTION TO PCB - Disclosed herein is a four-pole plug for connection to a PCB. The four-pole plug includes a plug body unit ( | 2014-11-27 |
20140349523 | CABLE CONNECTOR ASSEMBLY WITH IMPROVED SHELL - A cable connector assembly includes a connector and a cable. The connector includes a shell having a front shell and a back shell assembled to each other, an insulative housing, and a number of contacts. The front shell includes a mating portion and a bending portion backwardly extending from the mating portion. The insulative housing includes a body portion and a stepped portion extending backwardly from the body portion. The contact includes a tail portion exposed on the stepped portion. The cable includes a number of conductive wires connected with the tail portions of the contacts. The bending portion is mated with the back shell. The bending portion is aligned with the cable to form an angle with respect to the mating portion | 2014-11-27 |
20140349524 | JOINT CONNECTOR - A joint connector includes a housing that includes terminal chambers. At least two neighboring joint terminals are housed in terminal chambers neighboring among the terminal chambers, respectively. Each of the neighboring joint terminals includes a wire-crimping portion, a terminal body housed in a terminal chamber among the plurality of terminal chambers, and a pair of first and second contact portions, respectively. The first contact portion of one of the neighboring joint terminals is electrically contacted with the second contact portion of another of the neighboring joint terminals. The connector housing is provided with pairs of elastically deformable tabs, each of the pairs including two opposed deformable tabs and provided in each of the plurality of the terminal chambers. The opposed deformable tabs contact with sidewalls of the terminal body of the each of the neighboring joint terminals, respectively, by an elastic restoration behavior of the opposed deformable tabs. | 2014-11-27 |
20140349525 | METHODS AND APPARATUS FOR TERMINATING WIRE WOUND ELECTRONIC DEVICES - An exemplary connector insert assembly, and methods of manufacture and use thereof. In one embodiment, the connector insert assembly comprises an insert body assembly consisting of two insert body elements made from a high-temperature polymer. The insert body assembly includes an electronic component receiving cavity that is configured to receive any number of electronic components, including without limitation, chip chokes and wire wound electronic components. The insert body assembly includes a wire termination feature that includes termination slots that position the wire ends of the wire wound electronic components adjacent to a substrate to which the wire ends are ultimately to be secured. The wire ends are then secured to the substrate using, for example, a mass termination technique. The aforementioned connector insert assembly can then be inserted into a single or multi-port connector assembly. Methods of manufacturing the aforementioned single or multi-port connector assemblies are also disclosed. | 2014-11-27 |
20140349526 | Connector - Provided is a connector in which a decrease in contact pressure due to the shape degradation of the pressing portions does not occur even if the operation of rotating the pressing member is repeated. Since the connector main body has, at the rear end, supporting portions that rotatably support the pressing portion, the pressing portion rotates while butting the rear ends of the movable pieces and the supporting portions so that the rear ends of the movable pieces are pushed up by the pressing portion, the butting of the pressing portion and the supporting portions is contact between synthetic-resin components, this eliminates the pressing portion being cut off due to contact with the supporting portions even if the rotation of the pressing member is repeated, and hence the shape degradation of the pressing portion can be prevented. | 2014-11-27 |
20140349527 | TERMINAL CONNECTING-AND-FIXING STRUCTURE - A terminal connecting-and-fixing structure capable of ensuring the connection between the terminal and the bus bar even in the case of loose of the bolt and suppressing increase in the contact resistance, thereby preventing poorness of the conduction, is provided. A terminal connecting-and-fixing structure comprises a bus bar | 2014-11-27 |
20140349528 | CONDUCTING WIRE TERMINAL SEAT - A conducting wire terminal seat comprises a main body which includes a first body and a second body. The first and second bodies respectively have a chamber for allowing an entry of high and low current (or voltage) conducting wires which is then electrically connected to metal units in respective chambers. A height (or length) of the first body is larger than a height (or length) of the second body, so that a distance from the first body to an operating area is smaller than a distance from the second body to the operating area. Therefore, the operator operates the loading and unloading operation of the high and low current conducting wires under a safer circumstance. | 2014-11-27 |
20140349529 | POWER CONNECTOR HAVING OPPOSING CONTACT SPRINGS - Power connector including a pair of discrete contact springs configured to electrically engage a conductive component. Each of the contact springs includes a contact body having opposite inner and outer side surfaces and a contact edge that extends between the inner and outer side surfaces. The contact body is shaped to form a spring base and a mating portion. The spring bases of the contact springs are joined by a locking feature. The locking feature includes a localized portion of at least one of the spring bases. The localized portion frictionally engages the other spring base to interlock the spring bases. Each of the mating portions extends from the corresponding spring base. The mating portions are separated by a receiving space and are configured to engage the conductive component when the conductive component is inserted into the receiving space. | 2014-11-27 |