48th week of 2008 patent applcation highlights part 15 |
Patent application number | Title | Published |
20080290473 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device, in which a substrate is disposed in a chamber and a fluorine-containing silicon oxide film is formed on the substrate using a plasma CVD process. The fluorine-containing silicon oxide film is formed such that the release of fluorine from this silicon oxide layer is suppressed. According to this semiconductor device manufacturing method, a stable semiconductor device can be provided such that the device includes a fluorine-containing silicon oxide film (FSG film) at which the release of fluorine is suppressed, and thus peeling does not occur. | 2008-11-27 |
20080290474 | Multi-Layer Circuit Substrate and Method Having Improved Transmission Line Integrity and Increased Routing Density - A multi-layer circuit substrate and method having improved transmission line integrity and increased routing density uses a selectively applied transmission line reference plane metal layer to achieve signal path shielding and isolation, while avoiding drops in impedance due to capacitance between large diameter vias and the transmission line reference plane metal layer. The transmission line reference plane defines voids above (or below) the signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. For voltage-plane bearing PTHs, no voids are introduced, so that signal path conductors can be routed above or adjacent to the voltage-plane bearing PTHs, with the transmission line reference plane preventing shunt capacitance between the signal path conductors and the PTHs. | 2008-11-27 |
20080290475 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit which is connected to a substrate by solder bumps wherein, when at least one solder bump is connected to a signal line of the semiconductor integrated circuit and the semiconductor integrated circuit is mounted on the substrate, the semiconductor integrated circuit is bonded to the substrate by the solder bump, and the interconnection to the substrate is made by dummy bumps forming wires at the substrate side. | 2008-11-27 |
20080290476 | METHOD FOR MAKING SEMICONDUCTOR CHIPS HAVING COATED PORTIONS - A method for making semiconductor chips having coated portions can include mounting the chips in lead frames, stacking the lead frames in an orientation in which a portion of one lead frame masks a portion of a chip mounted on another lead frame but leaves another portion of the chip mounted on the other lead frame exposed to receive a coating, and depositing a coating on the stacked lead frames using, for example, an evaporative coating machine. In this manner, the coating is deposited on exposed portions of chips, such as its edges, and is not deposited on masked portions of chips, such as bond pads. | 2008-11-27 |
20080290477 | Semiconductor Device - A semiconductor device having a plurality of semiconductor chips mounted on a lead frame ( | 2008-11-27 |
20080290478 | LEAD-FRAME ARRAY PACKAGE STRUCTURE AND METHOD - The present invention provides a lead-frame array package structure. The package structure includes a lead-frame, which composed of a plurality of shorter leads and a plurality of longer leads. The first surface and a second surface are composed of the shorter leads and the longer leads. The chip is fixedly connected to the first surface of the lead-frame. The metal pads are positioned on the one side of the active layer of the chip. The metal pads are electrically connected to the leads of the lead-frame via the metal leads. The chip, the metal leads, the first surface and the second surface of the lead-frame is encapsulated by encapsulated material to expose the portion of the metal of the leads. The conductive elements are electrically connected to exposed leads so as to an array arrangement is formed on the second surface of the lead-frame. | 2008-11-27 |
20080290479 | Wafer level device package with sealing line having electroconductive pattern and method of packaging the same - Provided are wafer level package with a sealing line that seals a device and includes electroconductive patterns as an electrical connection structure for the device, and a method of packaging the same. In the wafer level package, a device substrate includes a device region, where a device is mounted, on the top surface. A sealing line includes a plurality of non-electroconductive patterns and a plurality of electroconductive patterns, and seals the device region. A cap substrate includes a plurality of vias respectively connected to the electroconductive patterns and is attached to the device substrate by the sealing line. Therefore, a simplified wafer level package structure that accomplishes electric connection through electroconductive patterns of a sealing line can be formed without providing an electrode pad for electric connection with a device. | 2008-11-27 |
20080290480 | MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME - A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls ( | 2008-11-27 |
20080290481 | Semiconductor Device Package Leadframe - The invention provides semiconductor device packages, leadframes, and methods for their manufacture, with improved characteristics for the formation of metallurgical joints. In a disclosed preferred embodiment of a semiconductor device leadframe according to the invention, a generally rectangular sheet metal body has a semiconductor device mounting site for receiving a semiconductor device. Leadfingers extend from the proximity of the device mounting site the outer edges of the leadframe. An anchor pad is included at each corner of the leadframe body, each anchor pad having a patterned surface. According disclosed aspects of the invention, the patterned surfaces of the anchor pads may include indented, embossed, or cut-out portions. According to other aspects of the invention, patterned anchor pad surfaces are plated with a low-melting point alloy and remain exposed at the corners of an encapsulated package. | 2008-11-27 |
20080290482 | METHOD OF PACKAGING INTEGRATED CIRCUITS - A method of packaging integrated circuit dice into exposed die packages is described. The method includes depositing a metallic layer onto the back surface of an integrated circuit wafer such that it covers the back surface. The method additionally includes applying a protective layer over the metallic layer such that the protective layer covers the metallic layer. The method further includes singulating the wafer to produce individual dice. Each die may then be electrically connected to a lead frame. The die and portions of the lead frame may then be encapsulated with a molding compound. The protective layer inhibits the molding compound from contacting the metallic layer on the back surface of the die. The protective layer is then removed from the metallic layer. As a result, an individual IC package is produced that includes a die having a metallic layer exposed on the back surface of the die. | 2008-11-27 |
20080290483 | SEMICONDUCTOR DEVICE, LEADFRAME AND STRUCTURE FOR MOUNTING SEMICONDUCTOR DEVICE - A structure of a semiconductor device is provided, where intervals can be narrowed between leads arranged around a semiconductor element to increase the number of leads, and electrical interference is prevented or reduced between the leads to cause no crosstalk between the leads. The semiconductor device of the present invention includes a semiconductor element and a plurality of leads arranged around the semiconductor element. The plurality of leads include a plurality of first leads and a plurality of second leads. The plurality of first leads are connected to electrode terminals of the semiconductor element through connection members. The plurality of second leads are arranged between the first leads and are not connected to the electrode terminals of the semiconductor element. | 2008-11-27 |
20080290484 | Leadframe Strip and Mold Apparatus for an Electronic Component and Method of Encapsulating an Electronic Component - A leadframe strip comprises a plurality of units arranged in a line. Each unit provides two component positions, each having a chip support substrate. The chip support substrates of the two component positions are mechanically linked by at least one support bar. The two component positions of a unit are molded at essentially the same time to produce a plastic housing for a package in each component position. The central portion of the first support bars remains outside of the plastic housing of the two packages. | 2008-11-27 |
20080290485 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RELIEF - An integrated circuit package system including: providing a die pad with a top, sides, and a bottom, the bottom having a relief with a flat surface and defining a wall and a center pad; mounting a barrier under the bottom of the die pad; mounting an integrated circuit die on the top of the die pad; encapsulating the integrated circuit die and the top and sides of the die pad with the wall preventing encapsulation from flowing along the barrier to reach the center pad; and mounting an external interconnect on the center pad. | 2008-11-27 |
20080290486 | LEADFRAME PACKAGE - A leadframe package includes a die pad with four unitary, outwardly extending slender bars; a plurality of leads arranged along periphery of the die pad; a separate pad segment separated from the die pad and isolated from the plurality of leads; a semiconductor die mounted on an upper side of the die pad, wherein the semiconductor die contains first bond pads wire-bonded to respective the plurality of leads and a second bond pad wire-bonded to the separate pad segment; and a molding compound encapsulating the semiconductor die, the upper side of the die pad, the first suspended pad segment and inner portions of the plurality of leads. | 2008-11-27 |
20080290487 | LEAD FRAME FOR SEMICONDUCTOR DEVICE - A lead frame for a semiconductor device includes at least one row of contact terminals and a die pad for receiving an integrated circuit die. An isolation material is located between the contact terminals and the die pad. The isolation material electrically isolates adjacent lead fingers from each other and from the die pad. The isolation material also holds the lead fingers in place during a wire bonding operation and thus the bottom of the lead frame does not have to be taped during the assembly process, which saves taping and detaping steps from being performed. The isolation material also prevents resin bleed problems that sometimes occur when using tape. If a sawing step is performed, the saw need only cut through the isolation material instead of a metal, and thus saw blade life is improved. | 2008-11-27 |
20080290488 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - Detachably mountable memory card featuring a memory chip(s) and a control chip includes a substrate of an insulating material, conductive layers provided on a first main surface of the substrate, a plurality of external electrode terminals exposed to the opposing, second main surface of the substrate, and conductive portions electrically connecting the conductive layers with corresponding ones of the external electrode terminals. The memory chip(s) and the control chip are electrically connected with ones of the conductive layers. The memory card also includes an encapsulating insulating layer covering the first main surface of the substrate, the fixedly disposed memory and control chips thereon, and the conductive layers, the encapsulating insulating layer having an exposed flat surface representing one main plane surface of the finished memory card, and the second main surface of the substrate representing another main plane surface of the memory card with the exposed external electrode terminals. | 2008-11-27 |
20080290489 | Package structure and electronic device using the same - A package structure and an electronic device using the same are provided. The package structure includes a chip module and a cover. The chip module covered by the cover is used for receiving a first signal. The chip module includes a substrate, a heat sink and a first chip. The substrate has a first surface, a second surface and an opening. The first surface is opposite to the second surface. The opening penetrates the first surface and the second surface. The heat sink is disposed on the first surface of the substrate and covers the opening. The first chip is disposed on the heat sink and is positioned inside the opening. A bottom surface of the first chip flatly contacts the heat sink. The cover has a window element. The first signal passes through the window element to contact with the chip module. | 2008-11-27 |
20080290490 | Semiconductor device and method for manufacturing the same - A semiconductor device includes: a first substrate made of semiconductor and having first regions, which are insulated from each other and disposed in the first substrate; and a second substrate having electric conductivity and having second regions and insulation trenches. Each insulation trench penetrates the second substrate so that the second regions are insulated from each other. The first substrate provides a base substrate, and the second substrate provides a cap substrate. The second substrate is bonded to the first substrate so that a sealed space is provided between a predetermined surface region of the first substrate and the second substrate. The second regions include an extraction conductive region, which is coupled with a corresponding first region. | 2008-11-27 |
20080290491 | Semiconductor package and stacked layer type semiconductor package - In a stacked layer type semiconductor package constructed by stacking a plurality of packages with each other, the plurality of packages include a semiconductor package including: a semiconductor chip; a substrate in which a concave portion has been formed, the semiconductor chip being mounted in the concave portion; and a wiring line structure constructed in such a manner that the wiring line structure can be externally connected to the semiconductor chip at least just above and just under the semiconductor chip. | 2008-11-27 |
20080290492 | SEMICONDUCTOR PACKAGES WITH ENHANCED JOINT RELIABILITY AND METHODS OF FABRICATING THE SAME - Provided is a semiconductor package with enhanced joint reliability and methods of fabricating the same. The method includes: forming package units including a semiconductor chip interposed between a bottom layer and a top layer; and sequentially stacking the package units on a substrate. The bottom layer and the top layer are formed of a material having a lower modulus than the semiconductor chip. The semiconductor package includes: at least one package unit disposed on a substrate, the package unit including a semiconductor chip having a pad, a bottom layer and a top layer substantially surrounding the semiconductor chip, and a redistribution structure overlying the top layer. The redistribution structure is electrically connected to the pad. | 2008-11-27 |
20080290493 | STACKED CHIP SEMICONDUCTOR DEVICE - A stacked chip semiconductor device whose size is substantially reduced by high density packaging of two or more semiconductor chips. In the semiconductor device, four semiconductor chips are stacked over a printed wiring board. The bottom semiconductor chip has an interface circuit which includes a buffer and an electrostatic discharge protection circuit. All signals that these semiconductor chips receive and send are inputted or outputted through the interface circuit of the bottom semiconductor chip. Since the other semiconductor chips require no interface circuit, the semiconductor device is compact. | 2008-11-27 |
20080290494 | Backside release and/or encapsulation of microelectromechanical structures and method of manufacturing same - There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or resonator. The fabricating or manufacturing microelectromechanical systems of the present invention, and the systems manufactured thereby, employ backside substrate release and/or seal or encapsulation techniques. | 2008-11-27 |
20080290495 | Low noise semiconductor device - As a power feed route in a semiconductor chip, a power feed route which reduces antiresonance impedance in the frequency range of tens of MHz is to be realized thereby to suppress power noise in a semiconductor device. By inserting structures which raise the resistance in the medium frequency band into parts where the resistance is intrinsically high, such as power wiring in a semiconductor package and capacitor interconnecting electrode parts, the antiresonance impedance in the medium frequency band can be effectively reduced while keeping the impedance low at the low frequency. | 2008-11-27 |
20080290496 | WAFER LEVEL SYSTEM IN PACKAGE AND FABRICATION METHOD THEREOF - There is provided a system-in-package (SiP), which includes a substrate obtained by cutting a wafer for each unit system; one or more first electronic devices mounted on the substrate by a heat radiation plate; a plurality of interlayer dielectrics sequentially formed on the substrate; and one or more second electronic devices buried between or in the interlayer dielectrics on the substrate. A heat sink may be additionally attached to the bottom surface of the substrate. In this case, a thermal conduction path including heat pipes connecting the heat radiation plate on the substrate and the heat sink is formed. In the SiP, various types of devices are buried at a wafer level, so that a more integrated semiconductor device is implemented corresponding to demand for a fine pitch. Further, the heat radiation of a device required in high-speed operation and high heat generation is maximized due to the multi-stepped heat radiation structure, and thus the operation of the device is more stabilized. | 2008-11-27 |
20080290497 | Mounting Board, Mounted Body, and Electronic Equipment Using the Same - The mounting board has a capacitor-forming sheet made from a valve metal, first and second board-forming structures, first and second electrodes, an extractor electrode, and a conductive polymer. The capacitor-forming sheet has an inner layer and a rough oxide film on at least one face of the inner layer. The first board-forming structure is provided on a face of the capacitor-forming sheet, and the second board-forming structure is provided on another face thereof on a side opposite to the first one. The first and second electrodes are isolated to each other and provided on a surface of at least one of the first and second board-forming structures. The extractor electrode and conductive polymer are provided inside at least one of the first and second board-forming structures. The extractor electrode electrically-connects the first electrode with the inner layer. The conductive polymer electrically-connects the second electrode with the rough oxide film. | 2008-11-27 |
20080290498 | Semiconductor Device - A semiconductor device is disclosed that includes a circuit board, a semiconductor element, a heat sink, and a stress relaxation member. The circuit board includes an insulated substrate, a metal circuit joined to one side of the insulated substrate, and a metal plate joined to the other side of the insulated substrate. The semiconductor element is joined to the metal circuit. The heat sink radiates heat generated in the semiconductor element. The stress relaxation member thermally joins the heat sink to the metal plate. The stress relaxation member is formed of a material having a high thermal conductivity. The stress relaxation member includes recesses, which curve inward from the peripheral portion of the stress relaxation member, to form stress relaxation spaces at the peripheral portion of the stress relaxation member. | 2008-11-27 |
20080290499 | Semiconductor device - A semiconductor device is disclosed that includes a ceramic substrate having first and second surfaces, a semiconductor element, a radiator, and an interposed portion located between the second surface and the radiator. The interposed portion has coupling regions that couple the second surface to the radiator, and non-coupling regions that do not couple the second surface to the radiator. Each non-coupling region is formed as an elongated groove. In the group of the non-coupling regions, the width of the outermost non-coupling region in the interposed portion is greater than the width of the innermost non-coupling region in the interposed portion. Regarding an adjacent pair of the non-coupling regions in the width direction, the width of the outer non-coupling region is greater than or equal to the width of the inner non-coupling region. | 2008-11-27 |
20080290500 | Semiconductor device - A semiconductor device has a ceramic substrate having a first surface and a second surface, a metal layer that is coupled to the second surface, a heat sink that is coupled to the metal layer and a stress relaxation member. The stress relaxation member is arranged between the metal layer and the heat sink and has a first surface that is coupled to the metal layer and a second surface that is coupled to the heat sink. A plurality of stress relaxation spaces are provided over the entire surface of at least one of the first and second surfaces of the stress relaxation member. The stress relaxation spaces that are arranged at the outermost portions of the stress relaxation member are deeper than the other stress relaxation spaces. | 2008-11-27 |
20080290501 | SEMICONDUCTOR PACKAGE - There is provided a semiconductor package including: a substrate having a plurality of electrode pads on a surface thereof; a semiconductor chip mounted on the substrate, the semiconductor chip electrically connecting with the plurality of electrode pads; and a stiffener arranged on the substrate so as to surround the semiconductor chip. The stiffener includes: an insulating material layer; and a rigid plate mounted substantially parallel to a surface of the substrate in the insulating material layer, the rigid plate having formed therein a plurality of through holes, at least a part of the through holes being filled with the insulating material. | 2008-11-27 |
20080290502 | INTEGRATED CIRCUIT PACKAGE WITH SOLDERED LID FOR IMPROVED THERMAL PERFORMANCE - An integrated circuit die includes a circuit surface and a back surface opposite the circuit surface. An underbump metallurgy is formed on a back surface. A layer of solder is formed on the underbump metallurgy. | 2008-11-27 |
20080290503 | Compliant thermal contactor - One embodiment of the present invention is a compliant thermal contactor that includes a resilient metal film having a plurality of first thermally conductive, compliant posts disposed in an array on a top side thereof and a plurality of second thermally conductive, compliant posts disposed in an array on a bottom side thereof. | 2008-11-27 |
20080290504 | Compliant thermal contactor - One embodiment of the present invention is a compliant thermal contactor that includes a resilient metal film having a plurality of first thermally conductive, compliant posts disposed in an array on a top side thereof and a plurality of second thermally conductive, compliant posts disposed in an array on a bottom side thereof. | 2008-11-27 |
20080290505 | MOLD DESIGN AND SEMICONDUCTOR PACKAGE - A chip package includes a carrier having a first and a second major surface. The first major surface includes an active region surrounded by an inactive region. The chip package includes contact pads in the active region for mating with chip contacts of a chip. A support structure is disposed on the inactive region of the first major surface. The support structure forms a dam that surrounds the active region. When a chip or chip stack is mounted in the active region, spacing exists between the dam and the chip or chip stack. The spacing creates convention paths for heat dissipation. | 2008-11-27 |
20080290506 | Semiconductor module and inverter device - A semiconductor module includes a base plate; a plurality of substrates placed on one surface of the base plate, with each substrate of the plurality of substrates including a switching element, a diode element, and a connection terminal area; and a parallel flow forming device that forms parallel coolant flow paths that are provided so as to be in contact with the other surface of the base plate. | 2008-11-27 |
20080290507 | CHIP EMBEDDED PRINTED CIRCUIT BOARD AND FABRICATING METHOD THEREOF - The chip embedded printed circuit board and a fabricating method thereof are disclosed, wherein a circuit pattern is formed by depositing a metal layer on a support layer, a semiconductor chip is packaged on a support layer to wrap the semiconductor chip and the circuit pattern on the support layer and to form an isolation layer, a via hole filled with conductive material is formed through the isolation layer for interlayer electrical connection, part of the support layer is selectively removed to form a plated heat sink, such that a packaging process can be performed in a very planar state and the plated heat sink can be integrated with a printed circuit board. | 2008-11-27 |
20080290508 | SEMICONDUCTOR DEVICE, SUBSTRATE, EQUIPMENT BOARD, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR CHIP FOR COMMUNICATION - A semiconductor device includes a first substrate having a first surface for mounting an electronic component and a second surface substantially parallel to the first surface. The first substrate includes a first region for mounting the electronic component, a second region including a plurality of first communication units for transmitting and receiving signals to and from a second substrate, input-output circuits disposed on the first region or the second region, the input-out circuits corresponding to the first communication units, and a control circuit for controlling input to and output from the input-output circuits disposed on the first region or the second region of the first substrate. Each of the input-output circuits includes an output circuit for outputting a signal to a second communication unit of the second substrate corresponding to the first communication unit and an input unit for receiving a signal sent from the corresponding second communication unit. | 2008-11-27 |
20080290509 | Chip Scale Package and Method of Assembling the Same - A method of producing a chip scale package is disclosed. The method includes dicing a wafer into a plurality of chip arrays, each array including two or more integrated circuit chips. The method further includes mounting each array on a substrate and dicing each array, attached to the substrate, into individual chip scale packages, each individual chip scale package including only one integrated circuit chip. | 2008-11-27 |
20080290510 | APPARATUS FOR CRACK PREVENTION IN INTEGRATED CIRCUIT PACKAGES - A microelectronic package having integrated circuits is provided. The microelectronic package includes multiple dielectric laminate layers, copper circuitry between the dielectric laminate layers where the copper circuitry includes circuit traces, and ball grid arrays/land grid arrays operatively connected to the copper circuitry such that conduction occurs. Further, proximate to the connection of the copper circuitry and the ball grid arrays/land grid arrays, a protective copper tongue is below an extension of the circuit traces, such that the protective copper tongue prevents the circuit traces from being affected by cracking propagated in the dielectric laminate layers or the ball grid arrays/land grid arrays. | 2008-11-27 |
20080290511 | Chip Assembly and Method of Manufacturing Thereof - An assembly of a first chip ( | 2008-11-27 |
20080290512 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - For a suppressed breakage after a flip chip connection of a semiconductor device using a low-permittivity insulation film and a lead-free solder together, with an enhanced production yield, bump electrodes ( | 2008-11-27 |
20080290513 | SEMICONDUCTOR PACKAGE HAVING MOLDED BALLS AND METHOD OF MANUFACTURING THE SAME - Provided are a semiconductor package having molded balls on a bottom surface of a PCB and a method of manufacturing the semiconductor package. The semiconductor package includes: a semiconductor chip mounting member comprising circuit patterns on a first surface, an insulating layer defining openings exposing at least portions of the circuit patterns, and external contact terminals arranged on the portions of circuit patterns exposed by the openings; a semiconductor chip formed on a second surface of the semiconductor chip mounting member and electrically connected to the semiconductor chip mounting member; a first sealing portion coating the second surface of the semiconductor chip mounting member and the semiconductor chip; and a second sealing portion arranged on the insulating layer and the external contact terminals such that at least portions of the external contact terminals are exposed. | 2008-11-27 |
20080290514 | Semiconductor device package and method of fabricating the same - In a semiconductor device, a package including the semiconductor device and a method of forming the same, the semiconductor device package includes a semiconductor device, a wiring board, and an underfill material layer. The semiconductor device includes a semiconductor chip, a metal layer, and solder balls for bump contacts. The semiconductor chip includes an active surface having bonding pads and a rear surface opposite the active surface and having concave portions corresponding to the bonding pads. The metal layer fills the concave portions and covers the rear surface. The solder balls for bump contacts are provided on the bonding pads. The wiring board includes an upper surface to which the semiconductor device is mounted and a lower surface opposite the upper surface. The underfill material layer fills a space between the active surface of the semiconductor device and the upper surface of the wiring board. The semiconductor device and the wiring board are electrically connected to each other by the solder balls for bump contacts of the semiconductor device and bonding electrodes included in the upper surface of the wiring board. | 2008-11-27 |
20080290515 | PROPERTIES OF METALLIC COPPER DIFFUSION BARRIERS THROUGH SILICON SURFACE TREATMENTS - In accordance with the invention, there are diffusion barriers, integrated circuits, and semiconductor devices and methods of fabricating them. The method of fabricating a diffusion barrier can include providing a dielectric layer, forming a first silicon enriched layer over the dielectric layer by exposing the dielectric layer to a silicon-containing ambient, and forming a barrier layer over the first silicon enriched layer. | 2008-11-27 |
20080290516 | SEMICONDUCTOR DEVICE WITH BONDING PAD SUPPORT STRUCTURE - A semiconductor device having bonding pads on a semiconductor substrate includes: an upper copper layer that is formed on the lower surface of the bonding pads with a barrier metal interposed and that has a copper area ratio that is greater than layers in which circuit interconnects are formed; and a lower copper layer that is electrically insulated from the upper copper layer and that is formed closer to the semiconductor substrate than the upper copper layer. | 2008-11-27 |
20080290517 | Semiconductor device - A semiconductor device of the present invention includes an insulating film made of a low dielectric constant material having a smaller specific dielectric constant than SiO | 2008-11-27 |
20080290518 | DIELECTRIC INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME - Dielectric interconnect structures and methods for forming the same are provided. Specifically, the present invention provides a dielectric interconnect structure having a noble metal layer (e.g., Ru, Ir, Rh, Pt, RuTa, and alloys of Ru, Ir, Rh, Pt, and RuTa) that is formed directly on a modified dielectric surface. In a typical embodiment, the modified dielectric surface is created by treating an exposed dielectric layer of the interconnect structure with a gaseous ion plasma (e.g., Ar, He, Ne, Xe, N | 2008-11-27 |
20080290519 | DUAL LINER CAPPING LAYER INTERCONNECT STRUCTURE - A high tensile stress capping layer on Cu interconnects in order to reduce Cu transport and atomic voiding at the Cu/dielectric interface. The high tensile dielectric film is formed by depositing multiple layers of a thin dielectric material, each layer being under approximately 50 angstroms in thickness. Each dielectric layer is plasma treated prior to depositing each succeeding dielectric layer such that the dielectric cap has an internal tensile stress. | 2008-11-27 |
20080290520 | Reliable metal bumps on top of I/O pads after removal of test probe marks - A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of polymer over a passivation layer. | 2008-11-27 |
20080290521 | FILM-FORMING COMPOSITION, INSULATING FILM WITH LOW DIELECTRIC CONSTANT, FORMATION METHOD THEREOF, AND SEMICONDUCTOR DEVICE - In the invention, a silica sol prepared by hydrolyzing and condensing a silane compound represented by the following formula: Si(OR | 2008-11-27 |
20080290522 | CARBON CONTAINING SILICON OXIDE FILM HAVING HIGH ASHING TOLERANCE AND ADHESION - A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. | 2008-11-27 |
20080290523 | Semiconductor device including barrier metal and coating film and method for manufacturing same - A semiconductor device includes an interconnection layer provided on a substrate, a first insulating film provided on the substrate, and on the interconnection layer so as to coat the interconnection layer, the first insulating film includes a silicon oxide film, a second insulating film provided on the first insulating film, the second insulating film includes either a silicon oxynitride film or a silicon nitride film, and an insulative coating film provided on the second insulating film. | 2008-11-27 |
20080290524 | THROUGH VIA IN ULTRA HIGH RESISTIVITY WAFER AND RELATED METHODS - A through via in an ultra high resistivity wafer and related methods are disclosed. A method for forming a through via comprises: providing a semiconductor wafer including a first silicon layer, a buried dielectric layer, and a substrate; forming a device on the first silicon; and forming a via from a side of the substrate opposite to the buried dielectric layer and through the substrate. | 2008-11-27 |
20080290525 | SILICON-ON-INSULATOR STRUCTURES FOR THROUGH VIA IN SILICON CARRIERS - A silicon-on-insulator (SOI) structure is provided for forming through vias in a silicon wafer carrier structure without backside lithography. The SOI structure includes the silicon wafer carrier structure bonded to a silicon substrate structure with a layer of buried oxide and a layer of nitride lo separating these silicon structures. Vias are formed in the silicon carrier structure and through the oxide layer to the nitride layer and the walls of the via are passivated. The vias are filled with a filler material of either polysilicon or a conductive material. The substrate structure is then etched back to the nitride layer and the nitride layer is etched back to the filler material. Where the filler material is polysilicon, the polysilicon is etched away forming an open via to the top surface of the carrier wafer structure. The via is then backfilled with conductive material. | 2008-11-27 |
20080290526 | Test patterns for detecting misalignment of through-wafer vias - A semiconductor chip including a test pattern is provided. The semiconductor chip includes a semiconductor substrate; a through-wafer via in the semiconductor substrate; and a plurality of conductive patterns over the semiconductor substrate and adjacent to each other. The bottom surfaces of the plurality of conductive patterns and a top surface of the through-wafer via are substantially coplanar. The through-wafer via is at least adjacent to the plurality of conductive patterns. The semiconductor chip further includes a plurality of bonding pads on a surface of the semiconductor chip, each being connected to one of the plurality of conductive patterns. | 2008-11-27 |
20080290527 | METHODS FOR FORMING ARRAYS OF SMALL, CLOSELY SPACED FEATURES - Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. | 2008-11-27 |
20080290528 | SEMICONDUCTOR PACKAGE SUBSTRATE HAVING ELECTRICAL CONNECTING PADS - A semiconductor package substrate having electrical connecting pads includes: a substrate body having a plurality of electrical connecting pads formed on surface thereof, and a plurality of protruding lumps or concave areas of any geometric shape respectively formed on surfaces of the electrical connecting pads for increasing contact surfaces of the electrical connecting pads, thereby preventing detaching of conductive elements from surfaces of the electrical connecting pads caused by poor bonding force. | 2008-11-27 |
20080290529 | SEMICONDUCTOR DEVICE AND PROCESS FOR FABRICATION THEREOF - A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250 ° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices. | 2008-11-27 |
20080290530 | SEMICONDUCTOR DEVICE HAVING PHOTO ALIGNING KEY AND METHOD FOR MANUFACTURING THE SAME - Embodiments consistent with the present invention provide a semiconductor device having a photo aligning key and a method for manufacturing the same. The semiconductor device includes a pattern photo aligning key formed on a scribe line of a semiconductor substrate, and a plurality of dummy pattern keys formed around the pattern photo aligning key, the dummy pattern keys having a width smaller than that of the pattern photo aligning key. | 2008-11-27 |
20080290531 | GASEOUS FUEL MIXING DEVICE - A gaseous fuel mixing device includes a body having an air/fuel passageway and a gaseous fuel passageway in fluid communication with the air/fuel passageway, a throttle valve pivotably coupled to the body and positioned in the air/fuel passageway, and an intake unit coupled to the body. The intake unit includes an inlet configured to be fluidly connected with a source of gaseous fuel, a first jet fluidly communicating the inlet and the gaseous fuel passageway, a second jet selectively fluidly communicating the inlet and the gaseous fuel passageway, and a selector valve operable to control a flow of gaseous fuel through the second jet. | 2008-11-27 |
20080290532 | Fluid Inlet Device, Use, and Method or Retrofitting - A fluid inlet device ( | 2008-11-27 |
20080290533 | Demand activated steam dispersion system - A steam dispersion system is disclosed. The steam dispersion system includes a header, a divider dividing the header into at least two interior chambers that are generally not in fluid communication with each other, and at least two steam dispersion tubes, each steam dispersion tube communicating with only one interior chamber. Each interior chamber includes a separate steam flow valve for independently controlling the amount of steam flow to each chamber based on the difference between a measured humidity value and a predetermined desired humidity value. | 2008-11-27 |
20080290534 | OPHTHALMIC LENS MOLD SURFACE ENERGY DIFFERENTIAL - This invention discloses improved mold parts fashioned from a thermoplastic resin compounded with an additive to reduce the surface energy of the mold part. The mold parts can be used in manufacturing processes, such as, for example: continuous, in-line or batched processes of ophthalmic lens molds. | 2008-11-27 |
20080290535 | REDUCTION OF EXCESS POLYMERIC FLASH RING - The present invention includes methods and apparatus for forming a biomedical device, such as an ophthalmic lens, in a area defined by a first mold part and a second mold part wherein during the formation of the biomedical device a HEMA is formed and the HEMA ring and a greater adhesive force is generated on the HEMA ring by the second mold part than the first mold part. | 2008-11-27 |
20080290536 | TEMPERATURE CYCLING FACILITATED RELEASE OF OPHTHALMIC LENSES - This invention discloses methods and apparatus for facilitating release of an ophthalmic lens from a mold part used to form the lens. According to the present invention, the ophthalmic lens and a mold part used to form the ophthalmic lens are exposed first to an environment of reduced thermal energy and then exposed to an environment of increased thermal energy. | 2008-11-27 |
20080290537 | Device And Method For The Preparation Of Recyclable Thermoplastic Plastic Material - An apparatus for the preparation of thermoplastic plastics material to be recycled has two treatment stages ( | 2008-11-27 |
20080290538 | EXTRUDER RAMP-UP CONTROL SYSTEM AND METHOD - An extrusion system is provided including an extruder, a screen changer, an operator interface, and a controller. The system further includes a pressure sensor for detecting an extrusion flow pressure between the extruder and the screen changer. A method of ramping up an extruder is also provided including the steps of detecting a pressure upstream from an extrusion screen filter; comparing the upstream pressure to a user-defined threshold pressure; and increasing an extrusion output if the upstream pressure exceeds the threshold pressure. | 2008-11-27 |
20080290539 | Method for Manufacturing a Tyre - A method of manufacturing tyres by disposing an uncured elastomeric material on a substantially rigid toroidal support so as to form a green tyre. The green tyre and the toroidal support are then disposed within a vulcanization mold in which a molding cavity is defined, so as to mold and cure the green tyre. The molding cavity includes at least a portion in which molding and curing are carried out at a constant volume. The disposition of the elastomeric material onto the rigid toroidal support is carried out by controlling the volume distribution of the elastomeric material onto the toroidal support, so as to fit a predetermined curve of excess material volume, i.e., a curve showing a difference between the volume distribution of the material forming the green tyre and the available volume in the portion of the molding cavity adapted for molding and curing the green tyre at constant volume, versus a predetermined, e.g. radial, direction. | 2008-11-27 |
20080290540 | System and method for centering a clay plug on a potter's wheel - A system and method for centering a clay plug on a potter's wheel before rotation of the potter's wheel includes a rotatable adapter having a central axis aligned with the central axis of the potter's wheel, a rotatable bat whose central axis is aligned with central axis of the rotatable adapter, and a clay plug having a central axis aligned with the central axis of the rotatable bat. | 2008-11-27 |
20080290541 | Intelligent Manifold and Injection Molding Machine - An injection molding system includes a hot runner comprising a memory device configured to contain at least one process control parameter. The memory device may transmit a signal representative of the process control parameter to a machine controller associated with the injection molding system. The machine controller may generate control signal to operate the injection molding machine based on, at least in part, the signal from the memory device. | 2008-11-27 |
20080290542 | Hot Runner Having Temperature Sensor for Controlling Nozzle Heater - A hot runner includes a manifold having a manifold channel and a plurality of nozzle coupled to the manifold. The manifold channel includes a plurality of branches and a manifold heater. Each of the plurality of nozzles includes a nozzle channel and a nozzle heater, the nozzle channel for receiving molding material from a branch of the manifold channel and delivering molding material to a mold cavity. At least one temperature sensor is located near the interface of the manifold and at least one of the nozzles. The temperature sensor is connected to a controller and the controller is connected to at least one of the nozzle heaters. The controller controls power to the nozzle heater according to a temperature measured by the temperature sensor. | 2008-11-27 |
20080290543 | Method for Injection Expansion Molding of Thermoplastic Resin - An injection-foaming method for a thermoplastic resin comprising using an injection unit | 2008-11-27 |
20080290544 | Manufacture of Cement-Based Paving Articles - A method for the production of a clay or cementitious construction unit, such as a paving block or slab, having a textured face surface, comprising contacting the intended face surface of an incompletely hardened, free-standing, self-supporting clay or cementitious construction unit ( | 2008-11-27 |
20080290545 | Method for accommodating the use of chemicals that contain low amounts of VOC in an existing device where chemicals that contained high levels of VOC had previously been used and resultant product - This method to allow the use of low VOC (volatile organic compounds) solvents in blanket cleaning operations and the resultant product that is produced by this method involves the retrofitting of currently existing seals on printing press so that operators can use low VOC solvents in place of high VOC solvents. High VOC solvents are harmful to the atmosphere and humans alike. As VOC are lighter than the surrounding air, humans are subjected to inhalation of these harmful vapors which cause respiratory and other health ailments. The VOC continue to rise, mixing with nitrogen oxides, until they reach the troposphere forming thick layers of ozone or smog. The current movement of municipalities to limit the use of high VOC solvents have lead printers and others to use low VOC solvents which are inherently less evaporative than high VOC solvents. This lack of evaporation causes problems with having to handle greater volumes of waste to handle and dispose properly. Catch pans and basins designed to work in high VOC applications are insufficiently engineered to handle this increased waste and seals that are sized to fit the catch pans and basins are designed to be permeable to allow for the evaporation of the VOC. This method creates an impermeable seal with similar sizing to retrofit the existing seal allowing the user to simply change the seal versus changing the entire catch pan. | 2008-11-27 |
20080290546 | Method of making a charge barrier capacitor electrode - Flow-through capacitors are provided with one or more charge barrier layers. Ions trapped in the pore volume of flow-through capacitors cause inefficiencies as these ions are expelled during the charge cycle into the purification path. A charge barrier layer holds these pore volume ions to one side of a desired flow stream, thereby increasing the efficiency with which the flow-through capacitor purifies or concentrates ions. | 2008-11-27 |
20080290547 | Methods of forming muffler preforms - Methods of forming compressed preform products formed from continuous fibers substantially evenly coated with a thermoplastic sizing composition are provided. Applying a thermoplastic sizing composition to continuous fibers during the formation of the fibers enables a preform to be formed without applying any additional sizing or binder compositions at later stages of the manufacturing of the preform. The thermoplastic sizing composition includes a thermoplastic material, and, optionally a silane coupling agent. The thermoplastic material in the thermoplastic sizing composition includes chemicals and/or compounds that are thermoplastic or possess thermoplastic properties. One or more preforms may be randomly inserted to a muffler cavity. Upon the application of heat, the preforms decompress and fill the cavity with fibrous material. Due to the ability to decompress the compressed preform product, the preform product can have a shape that is independent of the shape of the muffler cavity. | 2008-11-27 |
20080290548 | Pellet mill die and pelletizing process - An improved pellet mill is shown which has an annular die of the kind having a multiplicity of radial bores through which raw material is extruded to form pellets. The annular body of the die has an inner circumferential surface which defines a compression side of the die, and an outer circumferential surface which defines a discharge side of the die. The compression side and discharge side of the body are separated by a thickness therebetween with the radial bores extending through the thickness from the compression side to the discharge side thereof. Each die hole begins as a countersink region on the compression side of the die body. The countersink region leads to a compression hole which communicates with the discharge side of the die body. Each of the compression holes has an internal diameter and a length. The ratio of the internal diameter to length of each compression hole is at least about 16:1. | 2008-11-27 |
20080290549 | Process for the preparation of polymer yarns from ultra high Molecular weight homopolymers or copolymers, polymer yarns,molded polymer parts, and the use of polymer yarns - A process for the preparation of polymer yarns from ultra high molecular weight homopolymers or copolymers, wherein the process includes the following steps:
| 2008-11-27 |
20080290550 | Process for the preparation of polymer yarns from ultra high molecular weight homopolymers or copolymers, polymer yarns, molded polymer parts, and the use of polymer yarns - A process for the preparation of polymer yarns from ultra high molecular weight homopolymers or copolymers, wherein the process includes the following steps: | 2008-11-27 |
20080290551 | Spinning Pack for Dry-Wet Spinning, Diverting Guide for Fiber Bundle, and Apparatus and Method for Producing Fiber Bundle - A spinning pack for dry-wet spinning is provided with a spinneret having not less than 6,000 spinning holes and having an aspect ratio Ra of not less than 2.5 for a spinning hole array of the spinning holes. In a device and method for producing a fiber bundle, a drawing angle of single fibers formed by the single fibers and a spinneret surface of a spinneret is in a range from 87° to 92°, the single fibers being fibers discharged from the outermost spinning holes located in the long side direction of the spinneret and running to a fiber bundle diverting guide provided in a coagulation bath. Further, a drawing angle of single fibers formed by the single fibers and the spinneret surface of the spinneret is in a range from 83° to 87°, the single fibers being fibers discharged from the outermost spinning holes located in the short side direction of the spinneret and running to the fiber bundle diverting guide provided in the coagulation bath. | 2008-11-27 |
20080290552 | MICROPOROUS POLYOLEFIN FILM - A microporous polyolefin film which comprises 5 to 95 wt. % polyethylene (A) having a viscosity-average molecular weight (Mv) of 2,000,000 or higher, a first-melting-peak signal height as determined by DSC (differential scanning calorimetry) of 3.0 mW/mg or higher, a specific surface area of 0.7 m | 2008-11-27 |
20080290553 | Process For The Manufacture Of Nonwoven Surfaces - The invention relates to a novel method for the production of non-woven surfaces, in particular, a method for the production of non-woven surfaces by the process of direct spinning of molten filaments arranged in the form of a mat. Said method makes use of a composition of thermoplastic polymers with an electrical conductivity sufficient to either avoid the build-up of electrostatic charges, or to permit the removal thereof during the spinning process. | 2008-11-27 |
20080290554 | Oriented Polymer Fibers and Methods for Fabricating Thereof - Devices for fabricating oriented polymer fibers, and methods for fabricating thereof by electropulling, are provided. | 2008-11-27 |
20080290555 | Method for manufacturing rear set pan for vehicle using long glass fiber reinforced thermoplastic - The present invention provides a method for manufacturing a plastic rear seat pan for a vehicle by integrally injection molding long-glass-fiber reinforced thermoplastic polypropylene (PP-LFT), which is a high-strength plastic material, to achieve reduction in vehicle weight and production costs. The method includes providing a composite material comprising a polypropylene sheet reinforced with 30% long glass fiber; and integrally injection molding the composite material in a desired shape to obtain an integrally formed plastic rear seat pan. | 2008-11-27 |
20080290556 | Protective materials and methods for producing protective materials - The present disclosure is directed to protective materials and methods for producing protective materials. The protective materials include a plurality of foam elements having a molded surface and a cut surface. The molded surfaces of the foam elements are attached to a fabric sheet such that the cut surfaces each define planes that are spaced from the fabric sheet when the fabric sheet is substantially planar. The protective materials are produced by using a mold to form the plurality of foam elements on one side of a foam sheet, attaching a fabric sheet to the top of the foam elements, and cutting the foam elements from the foam sheet. | 2008-11-27 |
20080290557 | Mold with compensating base - The bottom mold portion for a transfer molding system is covered with a deformable material. During mold clamping, the deformable material contacts the bottom surface of the packaging substrate on which the integrated circuit die is mounted. Deformation of this relatively soft covering on the bottom mold portion accommodates thickness variations in the packaging substrate, as well as non-planarity of the adhesive layer between the integrated circuit die and packaging substrate in exposed active area integrated circuits. | 2008-11-27 |
20080290558 | Method for Compression Molding Plastic Articles - Apparatus for compression molding plastic articles includes a plurality of molds mounted for travel around a first axis. Each mold includes an upper mold section and a lower mold section, with at least one of the upper and lower mold sections being moveable in a non-circular first endless path, and being moveable with respect to the other mold section to form a mold cavity. A mold charge delivery system delivers individual mold charges to the mold cavities and includes at least one delivery mechanism that travels in a second endless path around a second axis spaced from the first axis, wherein the second endless path overlies a portion of the first endless path. | 2008-11-27 |
20080290559 | Lithography for fabricating adherent microstructure - A lithography method includes the steps of preparing a substrate and a mold, wherein the mold having a plurality of nanometer-scale features each having a predetermined depth; disposing a liquid imprint layer on the substrate; pressing the mold on the substrate to enable the imprint layer to become a base material between the mold and the substrate and to enter the nanometer-scale features for a predetermined depth, wherein a plurality of nano-convexities are formed on the base material and the air in each of the features is compressed; solidifying the imprint layer to convert it from liquid into solid; and releasing the mold by pulling the mold upward away from the substrate, wherein counterforce is generated by the compressed air in the features to facilitate disengagement of the nano-convexities from the features successfully and finally the base material and the nano convexities jointly become the adherent microstructure. | 2008-11-27 |
20080290560 | GRAVITY INJECTION OF MOLDING MATERIAL FOR COMPRESSION MOLDING AND RELATED METHODS - A molding apparatus includes a bottom platen, a bottom mold portion carried by the bottom platen, and a top platen overlying the bottom platen and the bottom mold portion. The top platen includes slots extending therethrough for receiving a molding material. The molding material is to be gravity deposited into the bottom mold portion. A top mold portion is carried by the top platen and is moveable between a molding material loading position and an article forming position. An actuator is coupled to the top mold portion for moving the top mold portion between the molding material loading position and the article forming position. The molding material loading position corresponds to when the top mold portion is non-overlying the bottom mold portion so that the molding material can be gravity deposited therein. The article forming position corresponds to when the top mold portion is overlying the bottom mold portion for molding an article. | 2008-11-27 |
20080290561 | APPARATUS AND METHODS FOR MODULAR PREFORM MOLD SYSTEM - Apparatus and methods for a preform mold system include multiple preform core side modules having preform mold cores, a core side clamp plate connectable to a moving platen of an injection mold machine and operable to receive the preform core modules, multiple preform cavity side modules having preform mold cavities, each of the preform cavity side modules operable to matingly engage a respective core side module to form multiple preform molds having a respective preform design, and multiple ejector housing assemblies for connecting the core side modules to an ejector platen of the mold machine, each of the ejector housing assemblies corresponding to a respective core side module. The preform mold system may also include a manifold and valve gate assembly connectable to a stationary platen of an injection mold machine and operable to receive the cavity side modules and place the mold cavities in fluid communication with an injector of the mold machine to control the injection of fluidized plastic in a uniform flow into the preform molds, simultaneously. | 2008-11-27 |
20080290562 | METHOD FOR PRODUCING PATTERNED PVC - The instant invention discloses and claims a method for producing PVC exhibiting a background color and colored accent veins comprising the steps of selecting and mixing colors for a duration sufficient to produce a heterogeneous mixture of colors. The method may be used to produce faux wood, faux marble or other treatments where a mixed color scheme is desirable. | 2008-11-27 |
20080290563 | High Resolution Cold Processing Of Ceramics - A method, material and apparatus for cold processing of ceramics wherein the ceramic contains a binder material which decomposes or otherwise produces large amounts of a gas upon heating so as to remove ablated material from the ceramic. The method, material and apparatus therefore provide self-cleaning ablation which allows for machining of ceramics at scales unachievable in the prior art. | 2008-11-27 |
20080290564 | PROCESS FOR THE PRODUCTION OF A CONTAINER OF THERMOPLASTIC MATERIAL BY EXTRUSION BLOW MOLDING AND A CONNECTION ELEMENT FOR USE IN SUCH A PROCESS - The invention concerns a process for the production of a container of thermoplastic material by extrusion blow molding, in which during shaping of the container within a multi-part tool the container is provided with at least one connection element ( | 2008-11-27 |
20080290565 | Gas delivery substrate - A gas delivery substrate and method of manufacture is disclosed. A thermoplastic extrusion compound is created comprising a ceramic material and a thermoplastic resin, a green body is formed by thermoplastic extrusion of the compound, and the green body is sintered to form the gas delivery substrate. Such gas delivery substrates may be thin walled, highly porous and have secondary operations such as crimping and machining done prior to sintering. | 2008-11-27 |
20080290566 | METHOD AND DEVICE FOR PRODUCING PIG IRON AND/OR PIG IRON INTERMEDIATE PRODUCTS - Apparatus and process for producing metal products, in which a metal-containing charge material is melted in a melting unit, and a working gas, in particular an at least partially reducing working gas, is additionally produced in the melting unit. The working gas produced is extracted and if appropriate after cleaning, is used as a carrier gas, at least in part for—preferably pneumatic—transport of an at least partially reduced metal-containing material in the form of fine particles. | 2008-11-27 |
20080290567 | Rotary Charging Device for a Shaft Furnace Equipped with a Cooling System - A rotary charging device for a shaft furnace, in particular a blast furnace, is disclosed. The charging device is equipped with a cooling system. The rotary charging device includes a rotatable support for rotary distribution means as well as a stationary housing for the rotatable support. The cooling system includes a rotary cooling circuit fixed in rotation with the rotatable support as well as a stationary cooling circuit on the stationary housing. A heat transfer device is provided which includes a stationary heat transfer element configured to be cooled by a cooling fluid flowing through the stationary cooling circuit and which includes a rotary heat transfer element configured to be heated by a separate cooling fluid circulated in the rotary cooling circuit. These heat transfer elements are arranged in facing relationship and have there between a heat transfer region for achieving heat transfer by convection and/or radiation through the heat transfer region without mixing of the separate cooling fluids of the rotary and stationary cooling circuits. | 2008-11-27 |
20080290568 | REINFORCED REFRACTORY CRUCIBLES FOR MELTING TITANIUM ALLOYS - Reinforced crucibles for melting titanium alloys having a facecoat including at least one facecoat layer, a backing including at least one backing layer, and at least one reinforcing element applied to at least a portion of one or more of the facecoat layer, the backing layer, or a combination thereof where the reinforcing element includes at least one composition selected from ceramic compositions, metallic compositions, and combinations thereof. | 2008-11-27 |
20080290569 | CRUCIBLES FOR MELTING TITANIUM ALLOYS - Crucibles for melting titanium alloys having a facecoat including at least one facecoat layer containing an oxide selected from scandium oxide, yttrium oxide, hafnium oxide, a lanthanide series oxide, and combinations thereof, and a backing including at least one backing layer where the crucible has a backing to facecoat thickness ratio of from about 6.5:1 to about 20:1. | 2008-11-27 |
20080290570 | Drop Base Ring Clamping Contour For Air Tubular Bellow Pneumatic Springs - In a sleeve rolling-lobe flexible member air spring ( | 2008-11-27 |
20080290571 | Air Spring - An air spring has three air spring spaces ( | 2008-11-27 |
20080290572 | Variable-Flexibility Spring Support - A support element for a motor vehicle suspension spring, including a main part and a substantially rigid or semi-rigid insert. The suspension spring bears directly on the substantially rigid or semi-rigid insert. | 2008-11-27 |