47th week of 2011 patent applcation highlights part 15 |
Patent application number | Title | Published |
20110284832 | COMPOUND FOR ORGANIC OPTOELECTRONIC DEVICE, ORGANIC LIGHT EMITTING DIODE INCLUDING THE SAME AND DISPLAY INCLUDING THE ORGANIC LIGHT EMITTING DIODE - A compound for an organic photoelectric device, the compound being represented by the following Chemical Formula 1: | 2011-11-24 |
20110284833 | Electroluminescent Device - An electroluminescent element which comprises host materials and guest materials in a part of an electroluminescent layer, and which is superior in device characteristics such as luminous efficiency and luminous characteristics to those of the conventional electroluminescent element is provided. According to the present invention, device characteristics (luminous efficiency, luminous characteristics, or the like) of an electroluminescent element is improved by using host materials and guest materials which have a common skeleton (represented by the following general formula 1) for an electroluminescent layer interposed between a pair of electrodes in the electroluminescent element. | 2011-11-24 |
20110284834 | Light-Emitting Element and Light-Emitting Device - To provide a light-emitting element, a light-emitting device, and an electronic device each formed using the organometallic complex represented by General Formula (G1) as a guest material and a low molecule compound as a host material. | 2011-11-24 |
20110284835 | Quinoxaline Derivative, and Light-Emitting Element, Light-Emitting Device, and Electronic Device Using the Same - The present invention provides a quinoxaline derivative represented by a general formula (G1). In the formula, α | 2011-11-24 |
20110284836 | OXIDE SEMICONDUCTOR THIN-FILM TRANSISTOR - A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a gate insulation layer and an oxide semiconductor pattern. The source and drain electrodes include a first metal element with a first oxide formation free energy. The oxide semiconductor pattern has a first surface making contact with the gate insulation layer and a second surface making contact with the source and drain electrodes to be positioned at an opposite side of the first surface. The oxide semiconductor pattern includes an added element having a second oxide formation free energy having an absolute value greater than or equal to an absolute value of the first oxide formation free energy, wherein an amount of the added element included in a portion near the first surface is zero or smaller than an amount of the added element included in a portion near the second surface. | 2011-11-24 |
20110284837 | SEMICONDUCTOR DEVICE - In a transistor, a drain electrode to which a high electric field is applied is formed over a flat surface, and an end portion of a gate electrode on the drain electrode side in a channel width direction and an end portion of the gate electrode in a channel length direction are covered with an oxide semiconductor with a gate insulating layer between the gate electrode and the oxide semiconductor layer, so that withstand voltage of the transistor is improved. Further, a semiconductor device for high power application, in which the transistor is used, can be provided. | 2011-11-24 |
20110284838 | MEMORY DEVICE AND SEMICONDUCTOR DEVICE - One object is to propose a memory device in which a period in which data is held can be ensured and memory capacity per unit area can be increased. The memory device includes a memory element, a transistor including an oxide semiconductor in an active layer for control of accumulating, holding, and discharging charge in the memory element, and a capacitor connected to the memory element. At least one of a pair of electrodes of the capacitor has a light-blocking property. Further, the memory device includes a light-blocking conductive film or a light-blocking insulating film. The active layer is positioned between the electrode having a light-blocking property and the light-blocking conductive film or the light-blocking insulating film. | 2011-11-24 |
20110284839 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. An oxide semiconductor film serving as a channel formation region of a transistor is formed by a sputtering method at a temperature higher than 200° C., so that the number of water molecules eliminated from the oxide semiconductor film can be 0.5/nm | 2011-11-24 |
20110284840 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 2011-11-24 |
20110284841 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device according to one embodiment of this invention includes: a semiconductor chip; a plurality of external connection pads and a plurality of first test pads, both of which are formed in a central region of a top surface of the semiconductor chip; a plurality of external connection electrodes each formed on a corresponding one of the external connection pads, the external connection electrodes being for connecting the external connection pads and an outside of the semiconductor device. | 2011-11-24 |
20110284842 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LAMINATE BASE - An integrated circuit package system with laminate base includes: a base package including: a laminate substrate strip, an integrated circuit on the laminate substrate strip, a molded cover over the integrated circuit and the laminate substrate strip, and a strip test of the base package; a bare die on the base package; the bare die electrically connected to the laminate substrate strip; and the bare die and the base package encapsulated. | 2011-11-24 |
20110284843 | Probe Pad On A Corner Stress Relief Region In A Semiconductor Chip - A semiconductor chip includes a corner stress relief (CSR) region. An enhanced structure connects sides of a seal ring structure to surround the CSR region. A device under test (DUT) structure is disposed on the CSR region. A set of probe pad structures is disposed on the CSR region. Two of the set of probe pad structures are electrically connect to the DUT structure. | 2011-11-24 |
20110284844 | SEMICONDUCTOR DEVICE - An object of the present invention is to manufacture a semiconductor device where fluctuation in electrical characteristics is small and reliability is high in a transistor in which an oxide semiconductor is used. An insulating layer from which oxygen is released by heating is used as a base insulating layer of an oxide semiconductor layer which forms a channel. Oxygen is released from the base insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the base insulating layer and the oxide semiconductor layer can be reduced. Thus, a semiconductor device where fluctuation in electrical characteristics is small and reliability is high can be manufactured. | 2011-11-24 |
20110284845 | SEMICONDUCTOR DEVICE - An insulating layer containing a silicon peroxide radical is used as an insulating layer in contact with an oxide semiconductor layer for forming a channel. Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured. | 2011-11-24 |
20110284846 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured. | 2011-11-24 |
20110284847 | SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device with a transistor in which an oxide semiconductor is used. An insulating layer on a back channel side of the oxide semiconductor layer has capacitance of lower than or equal to 1.5×10 | 2011-11-24 |
20110284848 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Disclosed is a semiconductor device including an oxide semiconductor film. A first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 15 nm is formed over a gate insulating layer. First heat treatment is performed so that crystal growth from a surface of the first oxide semiconductor film to the inside thereof is caused, whereby a first crystal layer is formed. A second oxide semiconductor film with a thickness greater than that of the first oxide semiconductor film is formed over the first crystal layer. Second heat treatment is performed so that crystal growth from the first crystal layer to a surface of the second oxide semiconductor film is caused, whereby a second crystal layer is formed. Further, oxygen doping treatment is performed on the second crystal layer. | 2011-11-24 |
20110284849 | Crosslinked Hybrid Gate Dielectric Materials and Electronic Devices Incorporating Same - Disclosed are thin film transistor devices incorporating a crosslinked inorganic-organic hybrid blend material as the gate dielectric. The blend material, obtained by thermally curing a mixture of an inorganic oxide precursor sol and an organosilane crosslinker at relatively low temperatures, can afford a high gate capacitance, a low leakage current density, and a smooth surface, and can be used to enable satisfactory transistor device performance at low operating voltages. | 2011-11-24 |
20110284850 | AMORPHOUS-SILICON THIN FILM TRANSISTOR AND SHIFT REGISTER HAVING THE SAME - An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode. | 2011-11-24 |
20110284851 | SYSTEM FOR DISPLAYING IMAGES - A system for displaying images includes a multi-gate thin film transistor (TFT) device including an active layer, first and second gate structures, and first and second light-shielding layers. The active layer is disposed on a substrate in a pixel region. The first and second gate structures are disposed on the active layer. The first and second light-shielding layers are disposed between the substrate and the active layer. The active layer includes first and second source/drain regions and first and second channel regions. The first light-shielding layer corresponds to a first lightly doped region and laterally extends under at least a portion of the first channel region. The second light-shielding layer corresponds to the second lightly doped region and laterally extends under at least a portion of the second channel region. | 2011-11-24 |
20110284852 | THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME - A thin-film transistor includes a semiconductor pattern, a first gate electrode, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern is formed on a substrate. A first conductive layer has a pattern that includes the first gate electrode which is electrically insulated from the semiconductor pattern. A second conductive layer has a pattern that includes a source electrode electrically connected to the semiconductor pattern, a drain electrode spaced apart from the source electrode, and a second gate electrode electrically connected to the first gate electrode. The second gate electrode is electrically insulated from the semiconductor pattern, the source electrode and the drain electrode. | 2011-11-24 |
20110284853 | DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME - A display substrate, a display device having the same and a method of manufacturing the display substrate are provided. The display substrate includes a base substrate having a pixels-populated area (PA) and a surrounding area (SA) outside the PA, a first contact pad portion formed in the surrounding area, a second contact pad portion formed in the surrounding area formed to be spaced apart from the first contact pad portion with a spacing region provided therebetween, an insulating layer formed in the spacing region between the first and second contact pad portions and having a thickness smaller than or equal to a thickness of each of the first and second contact pad portions, and a first conductive film formed on the first and second pad portions. | 2011-11-24 |
20110284854 | SEMICONDUCTOR DEVICE - In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which forms a channel region with a gate insulating layer interposed therebetween, when a large amount of hydrogen is contained in the insulating layer, hydrogen is diffused into the oxide semiconductor layer because the insulating layer is in contact with the oxide semiconductor layer; thus, electric characteristics of the transistor are degraded. An object is to provide a semiconductor device having favorable electric characteristics. An insulating layer in which the concentration of hydrogen is less than 6×10 | 2011-11-24 |
20110284855 | RESIN COMPOSITION AND DISPLAY DEVICE USING THE SAME - The resin composition of the present invention is a resin composition characterized by including (a) a polyimide, a polybenzoxazole, a polyimide precursor or a polybenzoxazole precursor, (b) 1,5-dihydroxynaphthalene, 1,6-dihydroxynaphthalene, 1,7-dihydroxynaphthalene, or 2,3-dihydroxynaphthalene, and (c) a thermal cross-linking agent having a specific structure. By the use of the resin composition of the present invention, it is possible to reduce the transmittance in the visible region of a cured film while maintaining the transmittance of a resin film before curing. | 2011-11-24 |
20110284856 | SEMICONDUCTOR DEVICE - An object is to reduce off-current of a thin film transistor. Another object is to improve electric characteristics of a thin film transistor. Further, it is still another object to improve image quality of a display device using the thin film transistor. An aspect of the present invention is a thin film transistor including a semiconductor film formed over a gate electrode and in an inner region of the gate electrode which does not reach an end portion of the gate electrode, with a gate insulating film interposed therebetween, a film covering at least a side surface of the semiconductor film, and a pair of wirings over the film covering the side surface of the semiconductor film; in which an impurity element serving as a donor is added to the semiconductor film. | 2011-11-24 |
20110284857 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the rmetal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode. | 2011-11-24 |
20110284858 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device having a semiconductor element (a thin film transistor, a thin film diode, a photoelectric conversion element of silicon PIN junction, or a silicon resistor element) which is light-weight, flexible (bendable), and thin as a whole is provided as well as a method of manufacturing the semiconductor device. In the present invention, the element is not formed on a plastic film. Instead, a flat board such as a substrate is used as a form, the space between the substrate (third substrate ( | 2011-11-24 |
20110284859 | Growth of group III nitride- based structures and integration with conventional CMOS processing tools - A method includes forming a non-continuous epitaxial layer over a semiconductor substrate. The substrate includes multiple mesas separated by trenches. The epitaxial layer includes crystalline Group III nitride portions over at least the mesas of the substrate. The method also includes depositing a dielectric material in the trenches. The method could also include forming spacers on sidewalls of the mesas and trenches or forming a mask over the substrate that is open at tops of the mesas. The epitaxial layer could also include Group III nitride portions at bottoms of the trenches. The method could further include forming gate structures, source and drain contacts, conductive interconnects, and conductive plugs over at least one crystalline Group III nitride portion, where at least some interconnects and plugs are at least partially over the trenches. The gate structures, source and drain contacts, interconnects, and plugs could be formed using standard silicon processing tools. | 2011-11-24 |
20110284860 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A method for producing a semiconductor device includes a step of forming a first insulation film, a step of forming a separation layer in a base layer, a step of forming a light-blocking film on the surface of the first insulation film, a step of forming a second insulation film such that the light-blocking film is covered, a step of affixing the base layer provided with the light-blocking film to a substrate, a step of separating and removing along the separation layer a portion of the base layer affixed to the substrate, and a step of forming a semiconductor layer such that at least a portion thereof overlaps with the light-blocking film. | 2011-11-24 |
20110284861 | LOW-TEMPERATURE POLYSILICON THIN FILM AND METHOD OF MANUFACTURING THE SAME, TRANSISTOR, AND DISPLAY APPARATUS - A method for manufacturing a low-temperature polysilicon thin film comprises the steps of providing a substrate and forming a buffer layer on the substrate; forming a first amorphous silicon thin film on the buffer layer; forming catalyst particles on the first amorphous silicon thin film; forming a second amorphous silicon thin film to cover the first amorphous silicon thin film and the catalyst particles; and performing a crystallization of the first and second amorphous silicon thin films by using the catalyst particles so as to form the low-temperature polysilicon thin film. | 2011-11-24 |
20110284862 | III-nitride switching device with an emulated diode - Some exemplary embodiments of a III-nitride switching device with an emulated diode have been disclosed. One exemplary embodiment comprises a GaN switching device fabricated on a substrate comprising a high threshold GaN transistor coupled across a low threshold GaN transistor, wherein a gate and a source of the low threshold GaN transistor are shorted with an interconnect metal to function as a parallel diode in a reverse mode. The high threshold GaN transistor is configured to provide noise immunity for the GaN switching device when in a forward mode. The high threshold GaN transistor and the low threshold GaN transistor are typically fabricated on the same substrate, and with significantly different thresholds. As a result, the superior switching characteristics of III-nitride devices may be leveraged while retaining the functionality and the monolithic structure of the inherent body diode in traditional silicon FETs. | 2011-11-24 |
20110284863 | III-V SEMICONDUCTOR STRUCTURES AND METHODS FOR FORMING THE SAME - Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation. | 2011-11-24 |
20110284864 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING DEVICE - A light emitting device includes a support member, a light emitting structure on the support member, the light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the second conductive type semiconductor layer and the first conductive type semiconductor layer, a first nitride semiconductor layer disposed on the second conductive type semiconductor layer, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and including an uneven structure, and a first electrode pad disposed on the light emitting structure wherein the second nitride semiconductor layer has an opening, the first electrode pad is in contact with the first nitride semiconductor layer through the opening, and the first nitride semiconductor layer has a work function smaller than that of the second nitride semiconductor layer. | 2011-11-24 |
20110284865 | HETEROJUNCTION FIELD EFFECT TRANSISTOR, METHOD FOR PRODUCING HETEROJUNCTION FIELD EFFECT TRANSISTOR, AND ELECTRONIC DEVICE - A heterojunction filed effect transistor with a low access resistance, a low on resistance, and the like, a method for producing a heterojunction filed effect transistor and an electron device are provided. In the heterojunction field effect transistor, an electron transit layer | 2011-11-24 |
20110284866 | LIGHT-EMITTING DIODE (LED) STRUCTURE HAVING A WAVELENGTH-CONVERTING LAYER AND METHOD OF PRODUCING - A light emitting diode (LED) device having a substantially conformal wavelength-converting layer for producing uniform white light and a method of making said LED at both the wafer and individual die levels are provided. The LED device includes a metal substrate, a p-type semiconductor coupled to the metal substrate, an active region coupled to the p-type semiconductor, an n-type semiconductor coupled to the active region, and a wavelength converting layer coupled to the n-type semiconductor. | 2011-11-24 |
20110284867 | LIGHT-EMITTING DIODE WITH INCREASED LIGHT EXTRACTION - Methods are disclosed for forming a vertical semiconductor light-emitting diode (VLED) device having an active layer between an n-doped layer and a p-doped layer; and securing a plurality of balls on a surface of the n-doped layer of the VLED device. | 2011-11-24 |
20110284868 | High Voltage III-Nitride Transistor - A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority charge carrier conductivity type, formed over the second silicon body. The second silicon body has a conductivity type opposite the majority charge carrier conductivity type. In one embodiment, the high voltage durability III-nitride semiconductor device is a high electron mobility transistor (HEMT) comprising a support substrate including a <100> silicon layer, an insulator layer over the <100> silicon layer, and a P type conductivity <111> silicon layer over the insulator layer. The high voltage durability HEMT also comprises a III-nitride semiconductor body formed over the P type conductivity <111> silicon layer, the III-nitride semiconductor body forming a heterojunction of the HEMT. | 2011-11-24 |
20110284869 | High Voltage Durability III-Nitride HEMT - A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority charge carrier conductivity type, formed over the second silicon body. The second silicon body has a conductivity type opposite the majority charge carrier conductivity type. In one embodiment, the high voltage durability III-nitride semiconductor device is a high electron mobility transistor (HEMT) comprising a support substrate including a <100> silicon layer, an insulator layer over the <100> silicon layer, and a P type conductivity <111> silicon layer over the insulator layer. The high voltage durability HEMT also comprises a III-nitride semiconductor body formed over the P type conductivity <111> silicon layer, the III-nitride semiconductor body forming a heterojunction of the HEMT. | 2011-11-24 |
20110284870 | METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE WITH A BURIED GROUND PLANE - A method for making a semiconducting structure, including: a) forming, on a surface of a final semiconductor substrate, a semiconducting layer, doped with elements from columns III and V of the Periodic Table so as to form a ground plane, b) forming a dielectric layer, c) then assembling, by direct adhesion of the source substrate, on the final substrate, the layer forming the ground plane between the final substrate and the source substrate, the dielectric layer being between the source substrate and the ground plane, d) then thinning the source substrate, leaving, on the surface of the semiconductor structure, a film made from a semiconducting material. | 2011-11-24 |
20110284871 | SILICON CARBIDE SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A silicon carbide substrate includes a base layer made of silicon carbide, an SiC layer made of single crystal silicon carbide, arranged on the base layer, and having a concentration of inevitable impurities lower than the concentration of inevitable impurities in the base layer, and a cover layer made of silicon carbide, formed on a main surface of the base layer at a side opposite to the SiC layer, and having a concentration of inevitable impurities lower than the concentration of inevitable impurities in the base layer. | 2011-11-24 |
20110284872 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide, and a SiC substrate made of single-crystal silicon carbide; fabricating a stacked substrate by placing the SiC substrate on and in contact with a main surface of the base substrate; connecting the base substrate and the SiC substrate by heating the stacked substrate to allow the base substrate to have a temperature higher than that of the SiC substrate; and forming an epitaxial growth layer on an opposite main surface, to the SiC substrate, of the base substrate connected to the SiC substrate. | 2011-11-24 |
20110284873 | SILICON CARBIDE SUBSTRATE - A silicon carbide substrate has a substrate region and a support portion. The substrate region has a first single crystal substrate. The support portion is joined to a first backside surface of the first single crystal. The dislocation density of the first single crystal substrate is lower than the dislocation density of the support portion. At least one of the substrate region and the support portion has voids. | 2011-11-24 |
20110284874 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode. | 2011-11-24 |
20110284875 | HIGH EFFICIENCY GROUP III NITRIDE LED WITH LENTICULAR SURFACE - A high efficiency Group III nitride light emitting diode is disclosed. The diode includes a substrate selected from the group consisting of semiconducting and conducting materials, a Group III nitride-based light emitting region on or above the substrate, and, a lenticular surface containing silicon carbide on or above the light emitting region, and extending to said light emitting region. | 2011-11-24 |
20110284876 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy and carbide formation free energy respectively take negative values. The ohmic metal layer is composed of, for example, a metal material such as molybdenum, titanium, chromium, manganese, zirconium, tantalum, or tungsten. | 2011-11-24 |
20110284877 | POWER-TYPE LED - The invention discloses a power-type LED comprising a support frame, a group of LED chips mounted on the frame, and an exterior wrapping layer made of a fluorescent substance; Said support frame consists of a left support and an opposite right support placed at a distance from each other; The upper parts of the left and right supports are semi-cylinders, semi-cones, or semi-rings having multi-direction chip-fixing surfaces; A group of LED chips is respectively fixed onto the chip-fixing surfaces of the left support and the right support. All LED chips are serial-connected or parallel-connected with conducting wires. One of the supports is used as the positive pole and the other is used as the negative pole; The middle segment of the left and right supports is wrapped with an insulating layer which combines the left and right supports into an integrated support frame and insulates them from each other; The outer side of the upper part of the two-support frame is covered with a fluorescent layer which can enclose LED chips. The device can be made into a semiconductor light source and provides good heat-dissipating effect. | 2011-11-24 |
20110284878 | LIGHT EMITTING DIODE MODULE, AND LIGHT EMITTING DIODE LAMP - A light emitting diode (LED) lamp including a socket, an LED module disposed on the socket, and a lamp housing assembled to the socket is provided. LED module includes a supporting member and a plurality of LED packages, wherein each LED package includes a chip carrier, a reflective member, an LED chip, a lens, and a phosphor layer. Reflective member mounted on the chip carrier has a recess for exposing parts of the chip carrier. LED chip disposed in the recess. Lens encapsulating the LED chip has a light-emitting surface, a first reflection surface bonded with the reflective member and a second reflection surface, wherein the LED chip faces the light-emitting surface of the lens. | 2011-11-24 |
20110284879 | LIGHT EMITTING DIODE PACKAGE AND LIGHT EMITTING DIODE MODULE - A light emitting diode (LED) package comprising a carrier, an LED chip, a lens, and a phosphor layer is provided. The LED chip disposed on the carrier. The lens encapsulating the LED chip has a plurality of fins surrounding the LED chip and a conical indentation. The fins extending backward the LED chip radially. Each of the fins has at least one light-emitting surface and at least one reflection surface adjoining the light-emitting surface. A bottom surface of the conical indentation is served as an total reflection surface. The phosphor layer is disposed on the light-emitting surfaces of the lens. An LED package and an LED module are also provided. | 2011-11-24 |
20110284880 | LIGHT EMITTING DEVICE ARRAY, METHOD FOR FABRICATING LIGHT EMITTING DEVICE ARRAY AND LIGHT EMITTING DEVICE - A light emitting device array includes a first supporting member, at least two bonding layers disposed on the first supporting member, a second supporting member disposed on each of the at lest two bonding layers, a light emitting structure disposed on the second supporting member, the light emitting structure comprising a first conductivity type semiconductor layer, a second conductivity type semiconductor layer and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a first electrode disposed on the light emitting structure. | 2011-11-24 |
20110284881 | DISPLAY APPARATUS - At least one of the pixels has a first region and a second region that are the same in color but different in viewing angle characteristic, and includes a switching circuit configured to independently turn on or off each of the organic EL elements provided in the respective first and second regions. | 2011-11-24 |
20110284882 | LIGHT EMITTING DEVICE PACKAGE - A light emitting device package is provided comprising a substrate, a first light emitting device, a body including a first lead frame on which the first light emitting device is disposed and a second lead frame separated from the first lead frame and an ESD device which contacts the first and second lead frames, and at least a part to which is exposed the outside of the body. | 2011-11-24 |
20110284883 | SEMICONDUCTOR LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, LUMINAIRE, DISPLAY UNIT, TRAFFIC SIGNAL LAMP UNIT, AND TRAFFIC INFORMATION DISPLAY UNIT - Provided is a light-emitting element in which two LED structures are dividedly formed on a rectangular substrate. The LED structures are each a semiconductor layer made by laminating an n-type semiconductor layer (a LED structure), an active layer (not shown), and a p-type semiconductor layer, and are respectively provided near both ends of a diagonal line of the upper surface of the substrate. On the upper surface of the substrate, two bonding electrodes each having a circular surface are also respectively formed near both ends of the other diagonal line, and two resistance elements each formed of the n-type semiconductor layer are respectively provided near two opposite sides of the substrate. | 2011-11-24 |
20110284884 | LIGHT EMITTING DIODE CHIP FOR HIGH VOLTAGE OPERATION AND LIGHT EMITTING DIODE PACKAGE INCLUDING THE SAME - A light emitting diode (LED) chip for high voltage operation and an LED package including the same arc disclosed. The LED chip includes a substrate, a first array formed on the substrate and including n light emitting cells connected in series, and a second array formed on the substrate and including m (m≦n) light emitting cells connected in series. During operation of the LED chip, the first array and the second array are operated by being connected in reverse parallel to each other. Further, when a driving voltage of the first array is delined as Vd1 and a driving voltage of the second array is defined as Vd2, a difference between Vd1 and Vd2×(n/m) is not more than 2V. | 2011-11-24 |
20110284885 | LIGHT EMITTIG DEVICE PACKAGE AND IMAGE DISPLAY APPARATUS INCLUDING THE SAME - Disclosed herein is a light emitting device package including first lead frame and second lead frame mounted on a package body, a light emitting device electrically connected to the first lead frame and second lead frame, to emit light of a first wavelength range, and an encapsulant surrounding the light emitting device, the encapsulant comprising phosphors to be excited by the light of the first wavelength range, thereby emitting light of a second wavelength range, and a resin having a refractive index of 1.1 to 1.3. | 2011-11-24 |
20110284886 | LIGHT EMITTING MODULE - A light emitting module is revealed. The light emitting module includes a main substrate disposed with LED lights. The main substrate is connected correspondingly to a connector that is electrically connected with a light holder. A plurality light emitting sets is disposed circularly under the main substrate. Thereby the LED lights on the main substrate project light upward while the light emitting sets provide light under the main substrate and therearound. Thus the light emitting module provides shadow-free illumination. While being used together with a light shade, figures on the light shade are projected and enlarged so as to enhance visual aesthetics. | 2011-11-24 |
20110284887 | LIGHT EMITTING CHIP PACKAGE AND METHOD FOR FORMING THE SAME - According to an embodiment of the invention, a light emitting chip package is provided, which includes a carrier substrate having a first surface and an opposite second surface, a cavity extending from the first surface toward the second surface, at least a electrical conductive via and at least a thermal conductive via, located outside of the cavity and penetrating through the first surface and the second surface of the carrier substrate, a light emitting element having contact electrodes and disposed in the cavity, wherein the contact electrode are electrically connected to the electrical conductive via and are electrically insulated from the thermal conductive via. | 2011-11-24 |
20110284888 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - An outer lead connected to an inner lead penetrating a molded resin section, and another outer lead connected to another inner lead penetrating the molded resin section are provided on an outer wall surface of the molded resin section. The outer lead has a surface area greater than that of the another outer lead. | 2011-11-24 |
20110284889 | ORGANIC EL PANEL AND METHOD FOR MANUFACTURING THE SAME - An organic EL panel forming light-emitting elements on a substrate includes lower electrode lines stripe-formed on the substrate, upper electrode lines stripe-formed so as to cross the lower electrode lines, an organic EL element laminating an organic layer including a light-emitting layer between the lower electrode lines and the upper electrode lines in the crossing part of the lower electrode lines and the upper electrode lines, extracting terminals electrically connected to the respective upper electrode lines and formed outside the light-emitting element forming area, a common organic layer formed so as to cover at least the overall side edges of the lower electrode lines within the light-emitting element forming area, and a cathode separator stripe-formed on the common organic layer within the light-emitting element forming area so as to insulate-segment the upper electrode lines with the end part extending to the extracting terminals. | 2011-11-24 |
20110284890 | LIGHT EMITTING DEVICE GROWN ON A RELAXED LAYER - In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed. | 2011-11-24 |
20110284891 | P-CONTACT LAYER FOR A Ill-P SEMICONDUCTOR LIGHT EMITTING DEVICE - A device includes a semiconductor structure with at least one III-P light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure further includes a GaAs | 2011-11-24 |
20110284892 | LIGHT EMITTING DIODE APPARATUS AND METHOD FOR ENHANCING LUMINOUS EFFICIENCY THEREOF - A light emitting diode apparatus with enhanced luminous efficiency is disclosed in the present invention. The light emitting diode apparatus includes a light emitting diode chip for providing a first light beam; a substrate, having a cross-section of a trapezoid, for supporting the light emitting diode chip, which is transparent to the first light beam; and an encapsulating body, containing a phosphor and encapsulating the light emitting diode chip and the substrate, for fixing the light emitting diode chip and the substrate and providing a second light beam when the phosphor is excited by the first light beam. Due to the shape of the substrate, contact area of the substrate with the phosphor is enlarged. Luminous efficiency is enhanced as well. | 2011-11-24 |
20110284893 | Optoelectronic Semiconductor Chip - A description is given of an optoelectronic semiconductor chip ( | 2011-11-24 |
20110284894 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING DEVICE SYSTEM - A light emitting device includes a substrate, a light emitting structure including a first conductive semiconductor layer having an exposed region, an active layer, and a second conductive semiconductor layer on the substrate, a first electrode on the exposed region of the first conductive semiconductor layer, and a second electrode on the second conductive semiconductor layer, wherein a side of the light emitting structure includes a first sloped side sloped from a reference plane, the first sloped side includes a concave-convex pattern having a concave-convex structure in which a first direction length is greater than a second direction length, the reference plane is a plane perpendicular to a direction in which the substrate faces the light emitting structure, and the first direction is a sloped direction of the first sloped side and the second direction is a lateral direction of the first sloped side. | 2011-11-24 |
20110284895 | LIGHT-EMITTING SEMICONDUCTOR DEVICE - The present invention provides a light-emitting semiconductor device, which comprises a substrate having a surface formed with a plane and a plurality of protrusions out of the plane. The plane is on a crystalline orientation. The protrusion is provided with an outer surface consisting of a plurality of sidewall surfaces. The sidewall surfaces are substantially not on the crystalline orientation. The protrusion is formed with an outline edge extended from the bottom to the top of the protrusion from a side view. The outline edge comprises at least one turning point. A first conductive type semiconductor layer is above the surface of the substrate, an active layer is above the first conductive type semiconductor layer, and a second conductive type semiconductor layer is above the active layer. | 2011-11-24 |
20110284896 | LIGHT-EMITTING DEVICE AND LIGHTING SYSTEM - Disclosed is a light-emitting device including a support member, a reflective layer on the support member, a light-transmitting electrode layer on the reflective layer, a light-emitting structure on the light-transmitting electrode layer, the light-emitting structure being provided with a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, and a luminescence layer interposed between the reflective layer and the light-transmitting electrode layer. Accordingly, the luminescence layer is formed in the chip formation process to minimize non-uniform application of a phosphor composed of an epoxy resin and simplify fabrication of the light-emitting device. | 2011-11-24 |
20110284897 | SEMICONDUCTOR LIGHT EMITTING DEVICE - The device includes a first ceramic layer; a second ceramic layer on the first ceramic layer and having a light emitting element mounting area; a reflective layer so formed on a surface of the second ceramic layer that the reflective layer covers at least the mounting area; a protective layer which covers the reflective layer; a semiconductor light emitting element mounted on the protective layer positioned above the element mounting area; and at least one heat dissipation via passing through the first ceramic layer. The heat dissipation via is disposed in a position that does not overlap with the element mounting area in a direction in which the ceramic layers are stacked. | 2011-11-24 |
20110284898 | ELECTRO-OPTIC DEVICE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS - An electro-optic device includes a light-emitting element disposed above a substrate, an optically transparent sealing film covering the light-emitting element, and a color filter disposed on the sealing film so as to adjoin the sealing film. The sealing film includes a thin portion overlapping at least part of the light-emitting element, and a thick portion surrounding the thin portion. The thin portion and the thick portion form a recess in the sealing film. The color filter fills the recess. | 2011-11-24 |
20110284899 | Organic Light Emitting Device Lighting Panel - A first device that may include one or more organic light emitting devices. At least 65 percent of the photons emitted by the organic light emitting devices are emitted from an organic phosphorescent emitting material. An outcoupling enhancer is optically coupled to each organic light emitting device. In one embodiment, the light panel is not attached to a heat management structure. In one embodiment, the light panel is capable of exhibiting less than a 10 degree C. rise in junction temperature when operated at a luminous emittance of 9,000 lm/m | 2011-11-24 |
20110284900 | LIGHT EMITTING DIODE PACKAGE - Exemplary embodiments of the present invention provide light emitting diode (LED) packages which include a housing configured to surround uplift portions formed on lead frames electrically connected to an LED chip. The LED package includes an LED chip, a first lead frame and a second lead frame electrically connected to the LED chip, the first lead frame and the second lead frame respectively including a first uplift portion and a second uplift portion on regions thereof facing each other, and a housing supporting the first lead frame and the second lead frame, a first side of the housing exposed to the outside. The first lead frame and the second lead frame each include a first side parallel to the first side of the housing and a second side opposite to the first side. | 2011-11-24 |
20110284901 | LIGHT EMITTING DEVICE, METHOD OF FABRICATING THE SAME AND LIGHT EMITTING DEVICE PACKAGE - Disclosed herein is a light emitting device including a first nitride semiconductor and a second nitride semiconductor, each of which includes a first conductivity-type semiconductor layer, an active layer and a second conductivity-type semiconductor layer, and a connection layer formed between the second conductivity-type semiconductor layer of the second nitride semiconductor and the first conductivity-type semiconductor layer of the first nitride semiconductor, wherein the first nitride semiconductor and the second nitride semiconductor are connected by the connection layer, and the light emitting device further comprises electrodes formed on at least a part of the second conductivity-type semiconductor layer of the first nitride semiconductor, at least a part of the first conductivity-type semiconductor layer of the second nitride semiconductor, and at least a part of the second conductivity-type semiconductor layer of the second nitride semiconductor. The light emitting device may be driven and emit light using AC power. | 2011-11-24 |
20110284902 | LIGHT EMISSION MODULE, LIGHT EMISSION MODULE MANUFACTURING METHOD, AND LAMP UNIT - In a light emission module ( | 2011-11-24 |
20110284903 | Semiconductor Light Emitting Device Packages and Methods - A submount for a light emitting device package includes a substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed. | 2011-11-24 |
20110284904 | THIN-LIGHT EMITTING DIODE LAMP, AND METHOD OF MANUFACTURING THE SAME - A thin-type light emitting diode lamp includes a blue light emitting diode chip ( | 2011-11-24 |
20110284905 | NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride-based semiconductor light-emitting device | 2011-11-24 |
20110284906 | VERTICAL LIGHT EMITTING DIODE DEVICE STRUCTURE AND METHOD OF FABRICATING THE SAME - A method of fabricating a compound semiconductor vertical LED is provided. A first growth substrate capable of supporting compound semiconductor epitaxial growth thereon is provided. One or more epitaxial layers of compound semiconductor material such as GaN or InGaN is formed on the first growth substrate to create a portion of a vertical light emitting diode. Plural trenches are formed in the compound semiconductor material. Passivating material is deposited in one or more trenches. A hard material is at least partially deposited in the trenches and optionally on portions of the compound semiconductor material. The hard material has a hardness greater than the hardness of the compound semiconductor. A metal layer is deposited over the compound semiconductor material followed by metal planarization. A new host substrate is bonded to the metal layer and the first growth substrate is removed. Dicing is used to form individual LED devices. | 2011-11-24 |
20110284907 | TRANSLUCENT SUBSTRATE, PROCESS FOR PRODUCING THE SAME, ORGANIC LED ELEMENT AND PROCESS FOR PRODUCING THE SAME - The present invention provides an organic LED element in which the extraction efficiency is improved up to 80% of emitted light. Further, the invention relates to an electrode-attached translucent substrate having a translucent substrate, a scattering layer formed over the glass substrate and containing a base material having a first refractive index for at least one wavelength of wavelengths of emitted light of an organic LED element and a plurality of scattering materials positioned in the base material and having a second refractive index different from that of the base material, and a translucent electrode formed over the scattering layer and having a third refractive index equal to or lower than the first refractive index, in which distribution of the scattering materials in the scattering layer decreases from the inside of the scattering layer toward the translucent electrode. | 2011-11-24 |
20110284908 | SEMICONDUCTOR LIGHT EMITTING DEVICE, SEMICONDUCTOR LIGHT EMITTING APPARATUS, AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first electrode, a second electrode, a third electrode, and a fourth electrode. The stacked structural body includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode forms an ohmic contact with the second semiconductor layer. The second electrode is translucent to light emitted from the light emitting layer. The third electrode penetrates through the second electrode and is electrically connected to the second electrode to form Shottky contact with the second semiconductor layer. The third electrode is disposed between the fourth electrode and the second semiconductor layer. A shape of the fourth electrode as viewed along a stacking direction of the first semiconductor layer, the light emitting layer, and the second semiconductor layer is same as a shape of the third electrode as viewed along the stacking direction. | 2011-11-24 |
20110284909 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, a film covering a side face of the first metal pillar and a side face of the second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The film has a solder wettability poorer than a solder wettability of the first metal pillar and a solder wettability of the second metal pillar. The resin layer covers at least part of the film. | 2011-11-24 |
20110284910 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a second insulating layer. The first electrode is provided on the second major surface of the semiconductor layer. The second electrode is provided on a side face of a portion of the semiconductor layer between the light emitting layer and the first major surface. The second interconnect layer is provided in the second opening and on the first insulating layer on the side opposite to the second major surface to connect to the second electrode provided on the side face. The second interconnect layer is provided on the side face of the portion of the semiconductor layer with interposing the second electrode. | 2011-11-24 |
20110284911 | LIGHT EMITTING DIODE CHIP AND MANUFACTURING METHOD THEREOF - A light emitting diode (LED) chip includes a substrate, a light emitting semiconductor device, a first electrode, and a second electrode. The light emitting semiconductor device has a recess and includes a first portion and a second portion. The first portion is disposed on the substrate and located between the second portion and the substrate. The recess penetrates the second portion and exposes an exposed region of the first portion. The transverse sectional area of the first portion and the transverse sectional area of the second portion increase along a direction away from the substrate. The first electrode is disposed on the exposed region of the first portion and electrically connected to the first portion. The second electrode is disposed on and electrically connected to the second portion. | 2011-11-24 |
20110284912 | ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREFOR - An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 10 | 2011-11-24 |
20110284913 | Light-Emitting Device and Lighting Device - To provide a light-emitting device from which uniform light emission can be obtained by providing an auxiliary wiring; a light-emitting device in which a short circuit between electrodes or between an electrode and an auxiliary wiring, which is attributed to a step caused by the auxiliary wiring, hardly occurs; and a light-emitting device which has high reliability by preventing a short circuit. In an EL light-emitting device including an auxiliary wiring, by covering a step caused by the auxiliary wiring is covered with an insulator, a short circuit between electrodes or between an electrode and the auxiliary wiring, which is attributed to the step caused by the auxiliary wiring, is prevented. Thus, the above objects are achieved. | 2011-11-24 |
20110284914 | METHOD FOR MANUFACTURING SUBSTRATE FOR LIGHT EMITTING ELEMENT PACKAGE, AND LIGHT EMITTING ELEMENT PACKAGE - A substrate for a light emitting element package provided with a thick metal section formed under a mounting position of a light emitting element, comprising:an insulating layer which is composed of a resin containing heat conductive fillers under the mounting position of said light emitting element and has a heat conductivity of 1.0 W/mK or more; and a metal layer disposed inside said insulating layer and having the thick metal section, wherein a heat conductive mask section is disposed at the top of said thick metal section. | 2011-11-24 |
20110284915 | Electronic device incorporating the white resin - The coating agent of the invention is a coating agent to be used between conductor members, comprising a thermosetting resin, a white pigment, a curing agent and a curing catalyst, the coating agent to be used between conductor members having a white pigment content of 10-85 vol % based on the total solid volume of the coating agent, and a whiteness of at least 75 when the cured product of the coating agent has been allowed to stand at 200° C. for 24 hours. | 2011-11-24 |
20110284916 | DEVICES INCLUDING, METHODS USING, AND COMPOSITIONS OF REFLOWABLE GETTERS - Methods for protecting circuit device materials, optoelectronic devices, and caps using a reflowable getter are described. The methods, devices and caps provide advantages because they enable modification of the shape and activity of the getter after sealing of the device. Some embodiments of the invention provide a solid composition comprising a reactive material and a phase changing material. The combination of the reactive material and phase changing material is placed in the cavity of an electronic device. After sealing the device by conventional means (epoxy seal for example), the device is subjected to thermal or electromagnetic energy so that the phase changing material becomes liquid, and consequently: exposes the reactive material to the atmosphere of the cavity, distributes the getter more equally within the cavity, and provides enhanced protection of sensitive parts of the device by flowing onto and covering these parts, with a thin layer of material. | 2011-11-24 |
20110284917 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING COMPOUND SEMICONDUCTOR DEVICE - A compound semiconductor device includes: an Au alloy electrode, an interlayer insulating film, a metal interconnection, and an oxide film. The Au alloy electrode is formed on a compound semiconductor. The interlayer insulating film is formed on the Au alloy electrode. The metal interconnection is connected to the Au alloy electrode via a contact hole formed in the interlayer insulating film. The oxide film is formed at an interface between the Au alloy electrode and the interlayer insulating film, dominating component of the oxide film is a constituent element of the compound semiconductor. | 2011-11-24 |
20110284918 | OPTOELECTRONIC SEMICONDUCTOR COMPONENT - An optoelectronic semiconductor component includes an active layer that emits radiation, the active layer surrounded by cladding layers, wherein the cladding layers and/or the active layer include(s) an indium-containing phosphide compound semiconductor material and the phosphide compound semiconductor material contains at least one of elements Bi or Sb as an additional element of main group V. | 2011-11-24 |
20110284919 | METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR LAYER, METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE, AND GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE, AND LAMP - A method for manufacturing a Group III nitride semiconductor layer according to the present invention includes a sputtering step of disposing a substrate and a target containing a Group III element in a chamber, introducing a gas for formation of a plasma in the chamber and forming a Group III nitride semiconductor layer added with Si as a dopant on the substrate by a reactive sputtering method, wherein a Si hydride is added in the gas for formation of a plasma. | 2011-11-24 |
20110284920 | LASER PUMPING OF THYRISTORS FOR FAST HIGH CURRENT RISE-TIMES - An optically triggered semiconductor switch includes an anode metallization layer; a cathode metallization layer; a semiconductor between the anode metallization layer and the cathode metallization layer and a photon source. The semiconductor includes at least four layers of alternating doping in the form P-N-P-N, in which an outer layer adjacent to the anode metallization layer forms an anode and an outer layer adjacent the cathode metallization layer forms a cathode and in which the anode metallization layer has a window pattern of optically transparent material exposing the anode layer to light. The photon source emits light having a wavelength, with the light from the photon source being configured to match the window pattern of the anode metallization layer. | 2011-11-24 |
20110284921 | HF-CONTROLLED BIDIRECTIONAL SWITCH - A bidirectional switch controllable by a voltage between its gate and rear electrode and including an N-type semiconductor substrate surrounded with a P-type well; on the front surface side, a P-type well in which is formed a first N-type region; on the rear surface side, a P-type layer in which is formed a second N-type region. The well is doped to less than 10 | 2011-11-24 |
20110284922 | DEVICES WITH ADJUSTABLE DUAL-POLARITY TRIGGER-AND HOLDING-VOTAGE/CURRENT FOR HIGH LEVEL OF ELECTROSTATIC DISCHARGE PROTECTION IN SUB-MICRON MIXED SIGNAL CMOS/BICMOS INTEGRATED - Symmetrical/asymmetrical bidirectional S-shaped I-V characteristics with trigger voltages ranging from 10 V to over 40 V and relatively high holding current are obtained for advanced sub-micron silicided CMOS (Complementary Metal Oxide Semiconductor)/BiCMOS (Bipolar CMOS) technologies by custom implementation of P | 2011-11-24 |
20110284923 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor device includes: a first semiconductor region; a second semiconductor region provided on a first major surface of the first semiconductor region; a first major electrode; a third semiconductor region provided in a part of a third major surface of the second semiconductor region; a fourth semiconductor region provided in a part of a fourth major surface of the third semiconductor region; a second major electrode; a control electrode; a fifth semiconductor region; and a sixth semiconductor. The fifth semiconductor region is provided passing through the fourth semiconductor region along a direction perpendicular to the fourth major surface of the third semiconductor region. The sixth semiconductor region is provided in contact with a bottom part of the fourth semiconductor region, and has a higher impurity concentration than the third semiconductor region. | 2011-11-24 |
20110284924 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR UNIT, AND POWER SEMICONDUCTOR DEVICE - A semiconductor device includes: an insulating substrate; a first electrode pattern and a second electrode pattern provided apart from each other on a major surface of the insulating substrate; a semiconductor element connected to the first electrode pattern; an electrode terminal connected to the second electrode pattern; and a connection wiring. The connection wiring electrically connects the first electrode pattern and the second electrode pattern with each other and has a thermal resistance larger than that of the first electrode pattern. | 2011-11-24 |
20110284925 | ELECTROSTATIC DISCHARGE (ESD) SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE - A structure includes first and second silicon controlled rectifiers (SCRs) formed in a substrate. The first and the second SCRs each include at least one component commonly shared between the first and the second SCRs. | 2011-11-24 |
20110284926 | AVALANCHE PHOTODIODE STRUCTURE - An avalanche photodiode structure, to a method of fabricating an avalanche photodiode structure, and to devices incorporating an avalanche photodiode structure. The avalanche photodiode structure comprises a Ge doped region having a first polarity; a GaAs doped region having a second polarity opposite to the first polarity; and an undoped region between the Ge doped region and the GaAs doped region forming a heterojunction; wherein the undoped region comprises Ge and Al | 2011-11-24 |
20110284927 | Avalanche Photodiode - A single carrier avalanche photodiode ( | 2011-11-24 |
20110284928 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer. | 2011-11-24 |
20110284929 | SOLID STATE IMAGING DEVICE - In each of pixels | 2011-11-24 |
20110284930 | ASYMMETRIC SILICON-ON-INSULATOR (SOI) JUNCTION FIELD EFFECT TRANSISTOR (JFET), A METHOD OF FORMING THE ASYMMETRICAL SOI JFET, AND A DESIGN STRUCTURE FOR THE ASYMMETRICAL SOI JFET - An asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method. The JFET includes a bottom gate on an insulator layer, a channel region on the bottom gate and, on the channel region, source/drain regions and a top gate between the source/drain regions. STIs isolate the source/drain regions from the top gate and a DTI laterally surrounds the JFET to isolate it from other devices. Non-annular well(s) are positioned adjacent to the channel region and bottom gate (e.g., a well having the same conductivity type as the top and bottom gates can be connected to the top gate and can extend down to the insulator layer, forming a gate contact on only a portion of the channel region, and/or another well having the same conductivity type as the channel and source/drain regions can extend from the source region to the insulator layer, forming a source-to-channel strap). | 2011-11-24 |
20110284931 | transistor device and manufacture method - A transistor device sequentially comprises a semiconductor substrate, a drain, a source, a gate metal seed layer and a gate Schottky contact. The gate metal seed layer comprises a gelatinous substance layer and multiple metal seed crystals. A manufacture method comprises steps of providing a semiconductor substrate; forming a drain and a source; forming a patterned photoresist layer with a photolithography to define a gate area on the semiconductor substrate; forming a gate metal seed layer on the semiconductor substrate with a sensitization process and an activation process; and forming a gate Schottky contact on the gate metal seed layer with an electroless plating approach. | 2011-11-24 |