47th week of 2013 patent applcation highlights part 64 |
Patent application number | Title | Published |
20130311738 | EFFICIENT LOCKING OF MEMORY PAGES - An apparatus is described that contains a processing core comprising a CPU core and at least one accelerator coupled to the CPU core. The CPU core comprises a pipeline having a translation look aside buffer. The CPU core comprising logic circuitry to set a lock bit in attribute data of an entry within the translation look-aside buffer entry to lock a page of memory reserved for the accelerator. | 2013-11-21 |
20130311739 | STORAGE APPARATUS, STORAGE SYSTEM, AND DATA MIGRATION METHOD - Provided are a storage apparatus, a storage system, and a data migration method with which, if data of a virtual disk which belongs to one pool area is migrated to another pool area, the migration time and processing load can be reduced by migrating the data while maintaining duplicate determination. | 2013-11-21 |
20130311740 | METHOD OF DATA MIGRATION AND INFORMATION STORAGE SYSTEM - An example of the invention is a method of data migration from a source volume including storage areas of a plurality of source storage tiers different in performance capability to a destination volume including storage areas of a plurality of destination storage tiers different in performance capability, data relocation being performed among the plurality of source storage tiers in accordance with accesses to the source volume during the data migration. The method includes: starting the data migration between volumes from the source volume to the destination volume; acquiring information on a data arrangement in the source volume determined based on an access history to the source volume during the data migration between volumes from the source volume to the destination volume; and determining a data arrangement in the destination volume during the data migration between volumes based on the data arrangement indicated by the acquired information. | 2013-11-21 |
20130311741 | GARBAGE COLLECTION WITH MEMORY QUICK RELEASE - Memory management includes identifying a region of virtual memory to be reclaimed, the region including an object that is currently located at an original virtual memory location, and the region being supported by at least a portion of a memory resource; relocating the object from the original virtual memory location to a target virtual memory location; releasing the portion of the memory resource so that the portion of memory resource can be reused; and after the portion of the memory resource is released, replacing a reference of the object that points to the original virtual memory location with a reference of the object that points to the target virtual memory location. | 2013-11-21 |
20130311742 | IMAGE MANAGEMENT METHOD, MOBILE TERMINAL AND COMPUTER STORAGE MEDIUM - An image management method is disclosed. The method includes: receiving images; caching the received images to a memory space; determining if free memory size is less than the threshold, if yes, releasing the memory space. According to the method, mobile terminal and computer storage medium, the free memory size is determined if less than the threshold in the process of obtaining images, if yes, the memory space is released. In this way, the memory could be saved so as to provide enough space for image processing, which reduces the incidence of errors and improves the efficiency during manipulating the image. | 2013-11-21 |
20130311743 | COMPUTER SYSTEM AND CONTROL METHOD THEREFOR - A physical storage area that is allocated to an unused area of a virtual volume is removed. A management unit sends a request to a server computer to make every piece of data stored in a first logical volume migrate to a second logical volume. The server reads all the data out of the first logical volume and writes the data in the second logical volume. A storage system that includes the first logical volume and the second logical volume allocates a physical storage area to an area of the second logical volume where the data is to be written, and writes the data in the allocated physical storage area. The storage system then deletes the first logical volume. | 2013-11-21 |
20130311744 | MEMORY CONTROLLER - A data storage temporarily stores an address conversion table associating the sector numbers with the physical addresses for each file. A conversion table memory allocator allocates a memory region for the address conversion table corresponding to a file when a request is made to open the file. A file system manager releases the allocated memory region at a given time. The file system manager stores sector numbers of one or multiple sectors constituting a file in each record of the address conversion table for which the memory region is allocated in sequence. Then, a memory control section searches the flash memory to acquire a physical address corresponding to a sector number in the each record of the address conversion table, and stores each acquired physical address in the corresponding record. | 2013-11-21 |
20130311745 | STORAGE OF SEQUENTIALLY SENSITIVE DATA - A contiguous digital media storage system and method is disclosed. In one embodiment, the contiguous digital media storage system comprises a storage server, mass storage device, allocator subsystem, and metadata subsystem. Other embodiments may include additional storage servers or mass storage devices as well as one or more client devices. The system and method may be used with third party file systems. Generally, sequentially sensitive information is identified and stored contiguously based on its position within a sequence which substantially increases throughput. This position may be determined from information provided by client devices, file characteristics, or other ways. The system and method may store uniform and variable sized files contiguously. | 2013-11-21 |
20130311746 | SHARED MEMORY ACCESS USING INDEPENDENT MEMORY MAPS - A method includes defining a first mapping, which translates between logical addresses and physical storage locations in a memory with a first mapping unit size, for accessing the memory by a first processing unit. A second mapping is defined, which translates between the logical addresses and the physical storage locations with a second mapping unit size that is different from the first mapping unit size, for accessing the memory by a second processing unit. Data is exchanged between the first and second processing units via the memory, while accessing the memory by the first processing unit using the first mapping and by the second processing unit using the second mapping. | 2013-11-21 |
20130311747 | Memory Mapping and Translation for Arbitrary Number of Memory Units - A method for address translation in a memory comprising a plurality of memory streaming units (MSUs), wherein n represents the number of MSUs and n is not a power of two, and wherein the memory further comprises a striped region, the method comprising determining an MSU from among the plurality of MSUs having a physical address (PA) in the striped region corresponding to a logical address (LA) comprising performing a modulo n operation on less than all the bits representing the LA; and transmitting the LA to the MSU. | 2013-11-21 |
20130311748 | System and Method for Storing Data in a Virtualized Memory System With Destructive Reads - A system and method for providing high-speed memory operations is disclosed. The technique uses virtualization of memory space to map a virtual address space to a larger physical address space wherein no memory bank conflicts will occur. The larger physical address space is used to prevent memory bank conflicts from occurring by moving the virtualized memory addresses of data being written to memory to a different location in physical memory that will eliminate a memory bank conflict. To improve memory performance destructive read operations are used when reading data but the data is written back into the physical memory in a later cycle. | 2013-11-21 |
20130311749 | METHOD FOR DISTRIBUTING DATA IN A TIERED STORAGE SYSTEM - A method for assigning data in a plurality of physical storage resources for an information handling system is disclosed. The plurality of physical storage resources includes a first tier and a second tier with a lower performance and cost relative to capacity than the first tier. A tier manager hosted on the information handling system and in electronic communication with the plurality of physical storage resources is configured to: determine a seek distance value, operation rate, operation size value, and elapsed time value for each page; and calculate a relative randomness value for each page using the seek distance value, operation rate, operation size value, and elapsed time value determined for each page. A classification module may assign a physical location for each page such that the relative randomness value for each page in the first tier is greater than the relative randomness value for each page in the second tier. | 2013-11-21 |
20130311750 | TRANSACTION LOG RECOVERY - The present disclosure includes methods for transaction log recovery in memory. One such method includes examining a number of entries saved in a transaction log to determine a write pattern, reading the memory based on the write pattern, updating the transaction log with information associated with data read from the memory based on the write pattern, and updating a logical address (LA) table using the transaction log. | 2013-11-21 |
20130311751 | SYSTEM AND DATA LOADING METHOD - A system includes plural processors; memory that stores a program currently under execution by the processors; and a pre-loader that pre-loads into a fragment area of the memory, a target program that is to be executed and is a program other than the program currently under execution by the processors. | 2013-11-21 |
20130311752 | INSTRUCTION-OPTIMIZING PROCESSOR WITH BRANCH-COUNT TABLE IN HARDWARE - A processing system comprising a microprocessor core and a translator. Within the microprocessor core is arranged a hardware decoder configured to selectively decode instructions for execution in the microprocessor core, and, a logic structure configured to track usage of the hardware decoder. The translator is operatively coupled to the logic structure and configured to selectively translate the instructions for execution in the microprocessor core, based on the usage of the hardware decoder as determined by the logic structure. | 2013-11-21 |
20130311753 | METHOD AND DEVICE (UNIVERSAL MULTIFUNCTION ACCELERATOR) FOR ACCELERATING COMPUTATIONS BY PARALLEL COMPUTATIONS OF MIDDLE STRATUM OPERATIONS - This invention constitutes a method and apparatus for enabling parallel computations of intermediate operations which are generic in many algorithms in given applications and also contain most of the computationally intensive operations. The method includes designing a set of intermediate level functions suitable for predefined application, obtaining instructions corresponding to intermediate level operations from a processor, computing the addresses of the operands and the results, performing computations involved in multiple intermediate level operations. In an exemplary embodiment the apparatus consists of a local data address generator that computes the addresses of a plurality of operands and results, a programmable computational unit that performs parallels computations of the intermediate level operations and a local memory interface that is interfaced to local memory organized in multiple blocks. The local data address generator and programmable computational unit are configurable to cover any field requiring large computations. | 2013-11-21 |
20130311754 | FUSING CONDITIONAL WRITE INSTRUCTIONS HAVING OPPOSITE CONDITIONS IN INSTRUCTION PROCESSING CIRCUITS, AND RELATED PROCESSOR SYSTEMS, METHODS, AND COMPUTER-READABLE MEDIA - Fusing conditional write instructions having opposite conditions in instruction processing circuits and related processor systems, methods, and computer-readable media are disclosed. In one embodiment, a first conditional write instruction writing a first value to a target register based on evaluating a first condition is detected by an instruction processing circuit. The circuit also detects a second conditional write instruction writing a second value to the target register based on evaluating a second condition that is a logical opposite of the first condition. Either the first condition or the second condition is selected as a fused instruction condition, and corresponding values are selected as if-true and if-false values. A fused instruction is generated for selectively writing the if-true value to the target register if the fused instruction condition evaluates to true, and selectively writing the if-false value to the target register if the fused instruction condition evaluates to false. | 2013-11-21 |
20130311755 | RUNNING STATE POWER SAVING VIA REDUCED INSTRUCTIONS PER CLOCK OPERATION - A microprocessor includes functional units and control registers writeable to cause the functional units to institute actions that reduce the instructions-per-clock rate of the microprocessor to reduce power consumption when the microprocessor is operating in its lowest performance running state. Examples of the actions include in-order vs. out-of-order execution, serial vs. parallel cache access and single vs. multiple instruction issue, retire, translation and/or formatting per clock cycle. The actions may be instituted only if additional conditions exist, such as residing in the lowest performance running state for a minimum time, not running in a higher performance state for more than a maximum time, a user did not disable the feature, the microprocessor supports multiple running states and the operating system supports multiple running states. | 2013-11-21 |
20130311756 | ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION WITHOUT READING CARRY FLAG - A method of one aspect may include receiving a rotate instruction. The rotate instruction may indicate a source operand and a rotate amount. A result may be stored in a destination operand indicated by the rotate instruction. The result may have the source operand rotated by the rotate amount. Execution of the rotate instruction may complete without reading a carry flag. | 2013-11-21 |
20130311757 | EXTRACT CPU TIME FACILITY - An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elapsed time and reports it to the user as a single unit of operation. | 2013-11-21 |
20130311758 | HARDWARE PROFILING MECHANISM TO ENABLE PAGE LEVEL AUTOMATIC BINARY TRANSLATION - A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation. | 2013-11-21 |
20130311759 | INSTRUCTION SEQUENCE BUFFER TO ENHANCE BRANCH PREDICTION EFFICIENCY - A method for outputting alternative instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor. A frequently miss-predicted branch instruction is identified, wherein the predicted outcome of the branch instruction is frequently wrong. An alternative instruction sequence for the branch instruction target is stored into a buffer. On a subsequent hit to the branch instruction where the predicted outcome of the branch instruction was wrong, the alternative instruction sequence is output from the buffer. | 2013-11-21 |
20130311760 | Multi Level Indirect Predictor using Confidence Counter and Program Counter Address Filter Scheme - The disclosure relates to predicting simple and polymorphic branch instructions. An embodiment of the disclosure detects that a program instruction is a branch instruction, determines whether a program counter for the branch instruction is stored in a program counter filter, and, if the program counter is stored in the program counter filter, prevents the program counter from being stored in a first level predictor. | 2013-11-21 |
20130311761 | Intelligently Loading Legacy Option ROMs In A Computing System - Intelligently loading legacy option ROMs in a computing system, including: generating, by a legacy option ROM manager, an inventory for the computing system, wherein the inventory for the computing system identifies one or more devices in the computing system; determining, by the legacy option ROM manager for each option ROM available for loading, whether a device supported by the option ROM is included in the inventory for the computing system; responsive to determining that the device supported by the option ROM is not included in the inventory for the computing system, preventing the option ROM from being loaded into an option ROM address space; and responsive to determining that the device supported by the option ROM is included in the inventory for the computing system, enabling the option ROM to be loaded into the option ROM address space. | 2013-11-21 |
20130311762 | PROVIDING USER ACCESS TO SPECIFIC PROGRAMS AND DOCUMENTS BEFORE THE BOOTING PROCESS IS COMPLETED - A method, system and computer program product for providing a user access to specific programs and documents before a booting process is completed. A quick start list is generated containing a list of programs and documents that are to be provided priority in initialization during the booting process. A post-quick start list is generated that includes programs that are to be started after the initialization of the programs and documents listed in the quick start list. The programs and documents listed in the quick start list are initialized as soon as feasibly possible in light of the requirements of the booting process. Upon initializing these programs and documents, such programs and documents may be displayed as icons on the user's computer screen. As a result, the user has access to such programs and documents more quickly without having to wait for the booting process to be completed. | 2013-11-21 |
20130311763 | CUSTOMIZING OPERATING SYSTEMS - An automation manager configured to manage a plurality of sessions of operating systems implemented in a hypervisor. The automation manager includes a processor and a non-transitory computer-readable storage medium storing computer-readable instructions when executed by the processor cause the automation manager to perform: generating a compact disk image containing customization data; instructing the hypervisor to mount the compact disk image to an operating system created from an operating system template; and instructing the hypervisor to start the operating system to which the compact disk image is mounted and execute a native boot time application to read the customization data from the compact disk image and store the customization data in a predetermined location of the operating system designated for a system preparation process, which customizes the operating system based on the customization data, before the system preparation process is executed. Ejecting the compact disk image when the customization is complete. | 2013-11-21 |
20130311764 | SYSTEM FOR PROTECTION AND AUTHENTICATION OF LOCATION SERVICES WITH DISTRIBUTED SECURITY - Generally, this disclosure provides methods and apparatus for the protection and authentication of location services based on a distributed security system. The method may include exchanging security keys between a secure location processor (SLP) and a location requesting entity, the location requesting entity external to the SLP; obtaining location determination measurements, the obtaining performed by the SLP; determining a location based on the location determination measurements, the determining performed by the SLP; encrypting the location based on the security keys, the encrypting performed by the SLP; and transmitting the encrypted location from the SLP to the location requesting entity. | 2013-11-21 |
20130311765 | INFORMATION PROCESSING APPARATUS, DATA GENERATION METHOD, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING SYSTEM - A differencing generator generates difference data between a first data set and a second data set. An encryption unit encrypts data. An electronic signature generator generates the electronic signature of data. A transmission data generator generates transmission data. The encryption unit encrypts the difference data generated by the differencing generator so as to generate encrypted difference data. The transmission data generator generates transmission data containing both the encrypted difference data generated by the encryption unit and the electronic signature of the second data set as generated by the electronic signature generator. | 2013-11-21 |
20130311766 | ESTABLISHING NETWORK SECURITY USING INTERNET PROTOCOL SECURITY POLICIES - Techniques for configuring network security include obtaining non-packet flow information, evaluating a policy rule based on the obtained information, and proposing a security arrangement based on the evaluation. The non-packet flow information can include, for example, authentication information obtained during an Internet Key Exchange protocol session or information obtained from a layered service provider. Therefore, policies such as Internet Protocol security (IPsec) policies can be defined and implemented so that they more accurately reflect the network's security requirements. | 2013-11-21 |
20130311767 | SYSTEM AND METHOD EMPLOYING AN AGILE NETWORK PROTOCOL FOR SECURE COMMUNICATIONS USING SECURE DOMAIN NAMES - A method and system are used to transparently create an encrypted communications channel between a client device and a target device. Audio video communications between the client device and the target device are allowed over the encrypted communications channel once the encrypted communications channel is created. The method comprises: (1) receiving from the client device a request for a network address associated with the target device; (2) determining whether the request is requesting access to a device that accepts an encrypted channel connection with the client device; and (3) depending on the determination made in step (2) providing provisioning information required to initiate the creation of the encrypted communications channel between the client device and the target device such that the encrypted communications channel supports secure audio/video communications transmitted between the two devices. | 2013-11-21 |
20130311768 | SECURE AUTHENTICATION OF A USER USING A MOBILE DEVICE - A computer-readable medium embodies a computer program for authenticating a user. The computer program comprises computer-readable program code for: generating a first message including an identifier for a session, sending the first message through an interface associated with the session, receiving a response message including the identifier for the session, a user identifier, and at least a portion encrypted using a private key associated with a mobile device associated with the user, and authenticating the user in response to identifying that the response message includes at least the portion encrypted using the private key associated with the mobile device. | 2013-11-21 |
20130311769 | PUBLIC KEY ENCRYPTION OF ACCESS CREDENTIALS AND CONTENT DATA CONTAINED IN A MESSAGE - A method of sending data securely from a client computing device to a server computing device, the client computing device being arranged to store a public encryption key associated with the server computing device and being associated with a user, the user being a registered user on the server computing device, the method comprising: generating a message at the client computing device, the message comprising log-in data relating to the registered user for logging into the server computing device and content data; encrypting the message using the public encryption key; outputting the encrypted message for transmission to the server computing device. | 2013-11-21 |
20130311770 | TRACING DEVICE AND METHOD - A tracing method performed by a traceability device for validating a process having a purity of steps. During at least one step of the process, there is a step of receiving a marking message sent by a marking device; and a step of determining a new fingerprint as a function of the marking message and of a preceding fingerprint, by using a hash function; and a step of sending a validation message including the most recently determined new fingerprint to a validation device. During at least one step of the process, there is a step of determining an object signature as a function of the marking message by using an asymmetric signature function and a private key of the traceability device associated with a public key of the traceability device, and a step of determining a new fingerprint as a function of the object signature. | 2013-11-21 |
20130311771 | SUBSCRIBER CERTIFICATE PROVISIONING - Provisioning a device with a certificate is contemplated. The certificate may be used to verify whether the device or a user of the device is authorized to access electronic content, services, and signaling. The certificate may be provisioned in relation to the device having successfully completed a two-factor authentication process so that an entity providing the certificate need not have to repeat the two-factor authentication process. | 2013-11-21 |
20130311772 | NON-PKI DIGITAL SIGNATURES AND INFORMATION NOTARY PUBLIC IN THE CLOUD - A digital signature is applied to digital documents/information. In certain instances, juridically strong digital signatures are achieved. Cloud computing technologies may be used to aid in the production of the cryptographically secure, authenticated digital signatures. Digital signatures may be produced with a digital notarization. The techniques of generating a digital signature may not require the use of traditional public key infrastructure (PKI). | 2013-11-21 |
20130311773 | SECURE CREDENTIAL STORE - A credential store provides for secure storage of credentials. A credential stored in the credential store is encrypted with the public key of a user owning the credential. A first user may provide a credential owned by the first user to a second user. The first user may add credentials owned by the first user to the credential store. An administrator may manage users of the credential store without having the ability to provide credentials to those users. | 2013-11-21 |
20130311774 | SYSTEM AND METHOD EMPLOYING AN AGILE NETWORK PROTOCOL FOR SECURE COMMUNICATIONS USING SECURE DOMAIN NAMES - A system and method connect a first network device and a second network device by initiating a secure communication link. The system includes one or more servers configured to: receive, from the first network device, a request to look up a network address of the second network device based on an identifier associated with the second network device; determine, in response to the request, whether the second network device is available for a secure communications service; and initiate a secure communication link between the first network device and the second network device based on a determination that the second network device is available for the secure communications service; wherein the secure communications service uses the secure communication link to communicate at least one of video data and audio data between the first network device and the second network device. | 2013-11-21 |
20130311775 | METHOD AND SYSTEM FOR UNIFIED MOBILE CONTENT PROTECTION - Media content is delivered to a variety of mobile devices in a protected manner based on client-server architecture with a symmetric (private-key) encryption scheme. A media preparation server (MPS) encrypts media content and publishes and stores it on a content delivery server (CDS), such as a server in a content distribution network (CDN). Client devices can freely obtain the media content from the CDS and can also freely distribute the media content further. They cannot, however, play the content without first obtaining a decryption key and license. Access to decryption keys is via a centralized rights manager, providing a desired level of DRM control. | 2013-11-21 |
20130311776 | METHODS AND APPARATUS TO MEASURE EXPOSURE TO STREAMING MEDIA - Methods and apparatus to measure exposure to streaming media are described. An example method includes identifying metadata from media. The media is converted into converted media having a streaming format. The converted media is encrypted using an encryption key. A manifest is created in association with the converted media, the manifest identifying a first location of the encrypted media and a second location of a decryption key. | 2013-11-21 |
20130311777 | SYMMETRIC KEY DISTRIBUTION FRAMEWORK FOR THE INTERNET - A method, device, and system are disclosed. In one embodiment the method includes receiving measured health information from a client on a key distribution server. Once the measured health information is received the server is capable of validating the measured health information to see if it is authentic. The server is also capable of sending a session key to the client when the measured health information is validated. When the client receives the session key, the client is capable of initiating an encrypted and authenticated connection with an application server in the domain using the session key. | 2013-11-21 |
20130311778 | SYSTEM AND METHOD FOR SECURE CLOUD SERVICE DELIVERY WITH PRIORITIZED SERVICES IN A NETWORK ENVIRONMENT - An example method includes receiving a request for a cloud capability set during an Internet Key Exchange negotiation associated with a virtual private network (VPN) tunnel between a subscriber and a cloud, wherein the cloud capability set comprises one or more cloud capabilities, mapping the request to one or more cryptographic modules that can support the cloud capability set, and offloading the VPN tunnel to the one or more cryptographic modules. The request can be an Internet Security Association and Key Management Protocol (ISAKMP) packet listing the one or more cloud capabilities in a private payload. The method may further include splitting the VPN tunnel between the cryptographic modules if no single cryptographic module can support substantially all the cloud capabilities in the cloud capability set. In some embodiments, the request is compared with a service catalog comprising authorized cloud capabilities. | 2013-11-21 |
20130311779 | ASSISTED CERTIFICATE ENROLLMENT - A certificate enrolment assistant module may be provided to inject a challenge password into a certificate signing request to be sent, to a Certificate Authority, from a computing device. The certificate enrolment assistant module, thereby, acts as a trusted proxy to assist the computing device in building a valid certificate signing request without the computing device having access to the challenge password. | 2013-11-21 |
20130311780 | METHODS AND APPARATUS TO MEASURE EXPOSURE TO STREAMING MEDIA - Methods and apparatus to measure exposure to streaming media are disclosed herein. An example method includes identifying metadata from media. The media is converted into converted media having a streaming format. The converted media is encrypted using an encryption key. A manifest is created in association with the converted media, the manifest identifying a first location of the encrypted media and a second location of a decryption key. | 2013-11-21 |
20130311781 | APPARATUS AND METHOD FOR CONTENT ENCRYPTION AND DECRYPTION BASED ON STORAGE DEVICE ID - An apparatus and method for encrypting content based on an identifier (ID) of a storage device and a decrypting apparatus and method corresponding thereto. The content recording device includes a storage device interface to receive a first primitive ID and a second primitive ID to identify first and second portions provided in a storage device from the storage device, and a processor to generate a media ID that is a unique ID of the storage device using the first primitive ID and the second primitive ID and to encrypt one or more contents using an encryption key generated using the media ID, wherein the storage device interface provides the content encrypted by the processor to the storage device. | 2013-11-21 |
20130311782 | Packet Validation Using Watermarks - Methods and systems are disclosed for providing secure transmissions across a network comprising a transmitting device and a receiving device. At the transmitting device, a stream of watermark bits is generated. Next, a plurality of watermarks is generated, each of the plurality of watermarks comprising an index number and a portion of the stream of watermark hits. The watermarks are inserted, into each header of a plurality of outgoing packets. At the receiving device, the plurality of outgoing packets are received and it is determined if a received packet is valid based on the watermark in the header of the received packet. The stream of watermark bits may be generated using a stream cipher such as RC4, a block cipher such as 3DES in CBC mode, or other equivalent pseudo-random stream generating techniques. | 2013-11-21 |
20130311783 | MOBILE RADIO DEVICE-OPERATED AUTHENTICATION SYSTEM USING ASYMMETRIC ENCRYPTION - An approach for signing messages and checking the authenticity of the sender at the receiver is disclosed. For this purpose, a mobile communication network is expanded by a signature function. The transmitted message packet comprises the message and a signature of the message encrypted with a secret key. The mobile radio communication number of the transmitting device is preferably used as the public key. The receiver can check the authenticity of the message by employing a decryption method. | 2013-11-21 |
20130311784 | SYSTEM AND METHOD FOR PREVENTING UNAUTHORIZED ACCESS TO INFORMATION - An authentication system protects a hardware cryptographic chip from being commanded to decrypt or sign data by someone other than the legitimate owner(s) of the certificate residing on the chip. Openness of present cryptographic hardware systems are limited by imposing a condition that the cryptographic chip will only perform critical cryptographic tasks if the task is accompanied by a signature which only the legitimate owner can provide. | 2013-11-21 |
20130311785 | SYSTEM AND METHOD FOR PROVIDING ENCRYPTION IN STORAGE OPERATIONS IN A STORAGE NETWORK, SUCH AS FOR USE BY APPLICATION SERVICE PROVIDERS THAT PROVIDE DATA STORAGE SERVICES - In accordance with embodiments of the invention, a method is provided for performing a storage operation in a pipeline storage system in which one or more data streams containing data to be stored are written into data chunks. The method includes generating an encryption key associated with a first archive file to be stored when encryption is requested for the storage operation, encrypting the archive data from the data stream using the encryption key to create an encrypted data chunk when a data stream containing the archive file is processed in the pipeline storage system, storing the encrypted data chunk on a storage medium, and storing the encryption key in a manner accessible during a restore operation of the encrypted data chunk. | 2013-11-21 |
20130311786 | Cryptographic Key Attack Mitigation - Cryptographic keys and, subsequently, the data they are intended to protect, are safeguarded from unwarranted attacks utilizing various systems and methodologies designed to minimize the time period in which meaningful versions of cryptographic keys exist in accessible memory, and therefore, are vulnerable. Cryptographic keys, and consequently the data they are intended to protect, can alternatively, or also, be protected from attackers utilizing systems and a methodology that employs a removable storage device for providing authentication factors used in the encryption and decryption processing. Cryptographic keys and protected data can alternatively, or also, be protected with a system and methodology that supports data separation on the storage device(s) of a computing device. Cryptographic keys and the data they are intended to protect can alternatively, or also, be protected employing a system and methodology of virtual compartmentalization that effectively segregates key management from protected data. | 2013-11-21 |
20130311787 | METHODS AND APPARATUS FOR EFFICIENT COMPUTATION OF ONE-WAY CHAINS IN CRYPTOGRAPHIC APPLICATIONS - Techniques are disclosed for efficient computation of consecutive values of one-way chains and other one-way graphs in cryptographic applications. The one-way chain or graph may be a chain of length s having positions i=1, 2, . . . s each having a corresponding value v | 2013-11-21 |
20130311788 | SYSTEM PROVIDING AN IMPROVED SKIMMING RESISTANCE FOR AN ELECTRONIC IDENTITY DOCUMENT - The invention relates to a secured identity document ( | 2013-11-21 |
20130311789 | BLOCK-LEVEL DATA STORAGE SECURITY SYSTEM - A secure storage appliance is disclosed, along with methods of storing and reading data in a secure storage network. The secure storage appliance is configured to present to a client a virtual disk, the virtual disk mapped to the plurality of physical storage devices. The secure storage appliance is capable of executing program instructions configured to generate a plurality of secondary blocks of data by performing splitting and encrypting operations on a block of data received from the client for storage on the virtual disk and reconstitute the block of data from at least a portion of the plurality of secondary blocks of data stored in shares on corresponding physical storage devices in response to a request from the client. | 2013-11-21 |
20130311790 | Secure Three-Dimensional Mask-Programmed Read-Only Memory - A secure three-dimensional mask-programmed read-only memory (3Dm-ROM | 2013-11-21 |
20130311791 | METHOD AND DEVICE FOR PROVIDING A CRYPTOGRAPHIC KEY FOR A FIELD DEVICE - A security device and a method provide a cryptographic key for a field device. The security device is connected to at least one tamper sensor which is associated with the field device and which, when a physical manipulation carried out on the field device is detected, a manipulation message is emitted. The cryptographic key is only provided to the field device by the security device if the security device does not receive a manipulation message from the tamper sensors associated with the field device. | 2013-11-21 |
20130311792 | VOLTAGE SCALING ARCHITECTURE ON SYSTEM-ON-CHIP PLATFORM - The subject matter of this application is embodied in an apparatus that includes a data processor, and at least one hardware monitor to measure circuit delays associated with the data processor and a power supply to provide power to the data processor. The apparatus also includes a voltage regulator to regulate a voltage level provided by the power supply, and a look-up table having target voltage values and target circuit delay values each corresponding to one or more conditions. The apparatus further includes a controller to control the voltage regulator. The controller at various time points controls the voltage regulator based on target voltage values obtained from the look-up table. In between the time points, the controller controls the voltage regulator based on differences between target circuit delay values and measured circuit delay values. | 2013-11-21 |
20130311793 | DATA SWITCH WITH POWER BUDGETING - A controller of a data switch determines a power budget based upon respective capacities of power supplies coupled thereto. Operating power is allocated to requesting network devices in accordance with the power budget. The power budget can be re-determined periodically, in response to changes in operating temperature, or in accord with other factors and the power allocation adjusted accordingly. Operating power provision to network devices can be managed so as to maintain a greatest allowable level of system operation while protecting power supplies against thermally-related or overload damage. | 2013-11-21 |
20130311794 | SYSTEM AND METHOD FOR DYNAMIC BATTERY CURRENT LOAD MANAGEMENT IN A PORTABLE COMPUTING DEVICE - Various embodiments of methods and systems for managing battery capacity in a portable computing device (“PCD”) are disclosed. One such method includes leveraging a request/grant algorithm that receives a request from an offline component to come online. If battery capacity is available to accommodate the offline component, the request is granted. If battery capacity is not available to accommodate the offline component, the request is authorized at a reduced power level or capacity is created by reducing power to online components. Another method polls a battery to monitor demand on its capacity by active components. Offline components likely to come online concurrently with the active components are identified and ranked based on power consumption. A target current margin is adjusted based on the highest power consumption associated with an identified block of offline components. | 2013-11-21 |
20130311795 | POWER SUPPLY MANAGEMENT SYSTEM AND METHOD FOR SERVER - A management system includes two motherboards assigned with different identities, a complex programmable logic device (CPLD), and a switch unit. Each motherboard includes a baseboard management controller (BMC) employed to receive a control signal from a client. The BMC outputs an operation signal corresponding to the control signal and an identity of the motherboard. The CPLD is configured to store the control signal and the identity as a record in a priority list, and determine whether the priority list is a void list. The CPLD outputs a switch signal according to the identity of the record obtained from the priority list in response to the priority list not being a void list. The switch unit is configured to receive the switch signal from the CPLD, and enable a power supply unit to power the corresponding motherboard. | 2013-11-21 |
20130311796 | INTELLIGENT POWER CONTROLLER - A method, apparatus, and system in which an interconnect for an integrated circuit communicates transactions between one or more initiator Intellectual Property (IP) cores and one or more target IP cores coupled to the interconnect, including a power manager having a hierarchy of two or more layers including a hardware logic portion to control a power consumption of two or more domains in the integrated circuit, where each layer of the power manager performs its own function; wherein the power manager has its own dedicated CPU or dedicated state machine to execute power management instructions; and wherein the power manager controls the power consumption of two or more domains without using a CPU IP core utilized by other IP cores on the integrated circuit to execute power management instructions. | 2013-11-21 |
20130311797 | METHOD AND SYSTEM FOR ADVANCE WAKEUP FROM LOW-POWER SLEEP STATES - A system and method for power management by providing advance notice of events. The method includes snooping a register of an operating system timer to determine a timer period associated with a scheduled event. A unit of a computer system is identified that is in a low power state. A wake up latency of the unit is determined that is based on the low power state. An advance period is determined based on the wake up latency. An advance notice of the operating system timer is triggered based on the timer period and the advance period to wake up the unit. | 2013-11-21 |
20130311798 | System and Method for Providing Wireless Power Feedback in a Wireless Power Delivery System - A wireless power delivery system includes a wireless power source and a control module. The wireless power source provides power to an information handling system. The control module is in communication with the wireless power source, and is configured to detect a presence signal from the information handling system, to set an output power level for the information handling system based on the presence signal, to receive a signal from the information handling system, and to adjust the output power level based on the signal. | 2013-11-21 |
20130311799 | WEIGHTED CONTROL IN A VOLTAGE SCALING SYSTEM - The subject matter of this application is embodied in an apparatus that includes a data processor, and two or more hardware monitors to measure parameters associated with the data processor. The apparatus also features a power supply to provide power to the data processor and the hardware monitors, and a controller to control the power supply to adjust an output voltage level of the power supply according to measurements from the hardware monitors. Different weight values are applied to the hardware monitors under different conditions, and the power supply output voltage level is controlled according to weighted measurements or values derived from the weighted measurements. | 2013-11-21 |
20130311800 | INFORMATION PROCESSING SYSTEM AND METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An information processing system includes an obtaining unit, a specifying unit, and an output unit. The obtaining unit obtains information indicating a state of the use of each of plural electrical apparatuses. The specifying unit specifies a power supply-and-receive relationship between the plural electrical apparatuses, on the basis of a change in power associated with the obtained information concerning each of the plural electrical apparatuses. The output unit outputs information indicating the power supply-and-receive relationship. | 2013-11-21 |
20130311801 | METHOD AND APPARATUS FOR CONTROLLING POWER CONSUMPTION - A method of controlling power consumption of a portable device includes monitoring whether the portable device has connected to a docking station; and selecting and executing one of a plurality of power consumption controlling algorithms according to a monitoring result. | 2013-11-21 |
20130311802 | MAINTAINING PROCESSOR CONTEXT BEFORE ENTERING POWER SAVING MODE - A CPU automatically preserves the CPU context in a computer memory that remains powered-up when the CPU is powered down in sleep mode. By means of the preserved CPU context, the CPU is able to instantly and transparently resume program execution at the instruction of the program that was asserted for execution when the CPU was powered down. The CPU is permitted to power down frequently, even during execution of a program, and results in reduced average overall power consumption. | 2013-11-21 |
20130311803 | ENERGY-SAVING DEVICE AND METHOD FOR PORTABLE TERMINAL - An energy-saving apparatus and method for a portable terminal are disclosed in the present document. The apparatus includes: an electricity meter module, configured to detect battery power consumption parameters under driving of a data acquisition module; the data acquisition module, configured to drive the detection of the electricity meter module, and output the collected battery power consumption parameters to a data analysis module; the data analysis module, configured to estimate power consumptions of all running devices at present in the terminal according to the input battery power consumption parameters, and output a power consumption optimization instruction to a power consumption optimization execution module; and the power consumption optimization execution module, configured to adopt corresponding power consumption optimization approaches according to the input power consumption optimization instruction. | 2013-11-21 |
20130311804 | MASTER SLAVE QPI PROTOCOL FOR COORDINATED IDLE POWER MANAGEMENT IN GLUELESS AND CLUSTERED SYSTEMS - Methods, apparatus, and systems for implementing coordinated idle power management in glueless and clustered systems. Components for facilitating coordination of package idle power state between sockets in a glueless system such as a server platform include a master entity in one socket (i.e., processor) and a slave entity in each socket participating in the power management coordination. Each slave collects idle status inputs from various sources and when the socket cores are sufficiently idle, it makes a request to the master to enter a deeper idle power state. The master coordinates global power management operations in response to the slave requests, including broadcasting a command with a target latency to all of the slaves to allow the processors to enter reduced power (i.e., idle) states in a coordinated manner. Communications between the entities is facilitated using messages transported over existing interconnects and corresponding protocols, enabling the benefits associated with the disclosed embodiments to be implemented using existing designs. | 2013-11-21 |
20130311805 | SYSTEM-WIDE TIME SYNCHRONIZATION ACROSS POWER MANAGEMENT INTERFACES AND SENSOR DATA - A power management control system for an information handling system is disclosed. The power management control system includes a power management interface bus interfacing a plurality of devices, where one or more of the devices is each associated with a time clock. The power management control system further includes a management agent interfacing the power management interface bus. The management agent is configured to: receive a system time; synchronize the one or more time clocks based, at least in part, on the system time; and maintain synchronization of the one or more time clocks, at least in part, via a set of telemetric primitives. | 2013-11-21 |
20130311806 | PARALLEL PROCESSING COMPUTER SYSTEMS WITH REDUCED POWER CONSUMPTION AND METHODS FOR PROVIDING THE SAME - A parallel processing computing system includes an ordered set of m memory banks and a processor core. The ordered set of m memory banks includes a first and a last memory bank, wherein m is an integer greater than 1. The processor core implements n virtual processors, a pipeline having p ordered stages, including a memory operation stage, and a virtual processor selector function. | 2013-11-21 |
20130311807 | DISPLAY APPARATUS AND POWER SAVING METHOD THEREOF - Disclosed are a display apparatus and a power saving method thereof. The power saving method of a display apparatus includes acquiring an image by photographing surroundings of the display apparatus, detecting a human body region contained in the image by analyzing the acquired image, and entering a power saving mode by determining there is no user viewing the display apparatus if the human body region is not detected in the image. | 2013-11-21 |
20130311808 | PLATFORM AND PROCESSOR POWER MANAGEMENT - The present invention relates to platform power management. | 2013-11-21 |
20130311809 | REDUCED POWER STATE NETWORK PROCESSING - Technologies for reduced power network processing include a main processor, a low-power co-processor, and a network interface controller. The network interface controller receives one or more network packets while the computing device is in a sleep state, filters the one or more network packets to identify network packets to be handled by the low-power co-processor without waking the main processor from the sleep state, and wakes the low-power co-processor, without waking the main processor, to handle at least one network packet of the identified network packets to be handled by the low-power co-processor. | 2013-11-21 |
20130311810 | BROWSING TERMINAL, CHARGING TERMINAL, AND COMMUNICATION SYSTEM AS WELL AS TRANSMITTING/RECEIVING SYSTEM USING THE SAME - To provide a browsing terminal and the like with high security, which can effectively prevent contents data stored in a terminal from being stolen unlawfully by a third party even if the terminal is accidentally lost. The browsing terminal includes: a receiving part for receiving contents data; a volatile memory for storing the received contents data; a display device with a memory function, which displays the contents data stored in the volatile memory; and a secondary battery for supplying power to the volatile memory and the display device. | 2013-11-21 |
20130311811 | Power Shifting in Multicore Platforms by Varying SMT Levels - Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted. | 2013-11-21 |
20130311812 | Power Shifting in Multicore Platforms by Varying SMT Levels - Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted. | 2013-11-21 |
20130311813 | METHOD AND APPARATUS FOR PERFORMING CLOCK EXTRACTION - A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals. | 2013-11-21 |
20130311814 | CONSTANT FREQUENCY ARCHITECTURAL TIMER IN A DYNAMIC CLOCK DOMAIN - Implementations of the present disclosure involve an apparatus and/or method for providing a constant frequency timer signal for a microprocessor that operates with varying core clock signals. The apparatus and/or method utilizes a code generator, such as a gray code generator, operating on a reference clock signal that allows the constant frequency timer signal to be either faster or slower than the core clock frequency. More particularly, the apparatus and/or method may compute a difference between previous gray code samples and add the calculated difference to a software visible reference clock signal such that constant frequency timer signal may be faster or slower than the core clock signal. Through the use of the apparatus and/or method, a core clock signal may be reduced as needed to provide operational power savings to the microprocessor and the computing system employing the techniques described herein, while maintaining synchronization between the executing programs of the computing system. | 2013-11-21 |
20130311815 | Providing Adaptive Frequency Control For A Processor - In one embodiment, the present invention includes a method for receiving utilization data from thread units of one or more processor cores, determining an operating frequency for a core clock signal based on the utilization data, a target utilization value, and an operating mode of the processor, and generating the core clock signal based on the determined operating frequency. Other embodiments are described and claimed. | 2013-11-21 |
20130311816 | CIRCUIT AND METHOD FOR CONTROLLABLY DELAYING AN INPUT SIGNAL, AND MICROSCOPE, AND METHOD FOR CONTROLLING A MICROSCOPE - A circuit for delaying an input signal includes first and second delay units. The input signal is switched to the first delay unit which is configured to delay the input signal by k cycles of a first clock signal so as to generate a value x | 2013-11-21 |
20130311817 | SCALABLE, COMMON REFERENCE-CLOCKING ARCHITECTURE USING A SEPARATE, SINGLE CLOCK SOURCE FOR BLADE AND RACK SERVERS - Scalable, common reference-clocking architecture and method for blade and rack servers. A common reference clock source is configured to provide synchronized clock input signals to a plurality of blades in a blade server or servers in a rack server. The reference clock signals are then used for clock operations related to serial interconnect links between blades and/or servers, such as QuickPath Interconnect (QPI) links or PCIe links. The serial interconnect links may be routed via electrical or optical cables between blades or servers. The common reference clock input and inter-blade or inter-server interconnect scheme is scalable, such that the plurality of blades or servers can be linked together in communication. Moreover, when QPI links are used, coherent memory transactions across blades or servers are provided, enabling fine grained parallelism to be used for parallel processing applications. | 2013-11-21 |
20130311818 | METHODS AND APPARATUSES FOR MASTER-SLAVE DETECTION - Apparatuses, master-slave detect circuits, memories, and methods are disclosed. One such method includes performing a master detect phase during which a memory unit in a memory group is determined to be a master memory unit, determining at each memory unit its location relative to other memory units, and determining at each memory unit its location in the memory group based on a total number of slave memory units and its location relative to other memory units. | 2013-11-21 |
20130311819 | CONTROLLER - This controller is used in a system in which initiators and targets are connected via distributed buses to control transmission timing of an access request received from the initiators. The controller stores intermittent information including information about an intermittent period in which interference between packets can be restricted and bus operating frequency information indicating a bus operating frequency at which real-time performance is guaranteed for each initiator and which has been generated based on system configuration information and flow configuration information indicating, on a flow basis, a specification required for each initiator to access the target. The controller includes a clock generator; communications circuitry; and transmission interval setting circuitry which sets a time to send transmission permission responsive to a transmission request based on the intermittent period, a time when the transmission request is detected, and a previous transmission time. | 2013-11-21 |
20130311820 | FORECASTING WORKLOAD TRANSACTION RESPONSE TIME - Reliability testing can include determining a transaction time for each of a plurality of transactions to a system under test during the reliability test, wherein the plurality of transactions are of a same type. Forecasts of transaction times can be calculated for the transaction type. The forecasts can be compared with a threshold time using a processor. A remedial action can be implemented responsive to at least one of the forecasts exceeding the threshold time. | 2013-11-21 |
20130311821 | VIRTUAL DEVICE SPARING - Systems and techniques for virtual device sharing. A failure of one of a plurality of memory devices corresponding to a first rank in a memory system is detected. The memory system has a plurality of ranks, each rank having a plurality of memory devices used to store a cache line. A portion of the cache line corresponding to the failed memory device is stored in a memory device in a second rank in the memory system and the remaining portion of the cache line in the first rank of the memory system. | 2013-11-21 |
20130311822 | SYSTEM AND METHOD FOR FAILURE PROTECTION IN A STORAGE ARRAY - In accordance with embodiments of the present disclosure, a system comprising may include a storage controller and a plurality of storage resources communicatively coupled to the storage controller. At least one storage resource of the storage resources may be capable of performing storage resource-level failure protection and configured to disable storage resource-level failure protection in response to a determination that the at least one storage resource is a member of a redundant storage array. | 2013-11-21 |
20130311823 | RESILIENCY TO MEMORY FAILURES IN COMPUTER SYSTEMS - A resiliency system detects and corrects memory errors reported by a memory system of a computing system using previously stored error correction information. When a program stores data into a memory location, the resiliency system executing on the computing system generates and stores error correction information. When the program then executes a load instruction to retrieve the data from the memory location, the load instruction completes normally if there is no memory error. If, however, there is a memory error, the computing system passes control to the resiliency system (e.g., via a trap) to handle the memory error. The resiliency system retrieves the error correction information for the memory location and re-creates the data of the memory location. The resiliency system stores the data as if the load instruction had completed normally and passes control to the next instruction of the program. | 2013-11-21 |
20130311824 | METHOD AND SYSTEM FOR CLUSTER RESOURCE MANAGEMENT IN A VIRTUALIZED COMPUTING ENVIRONMENT - Methods and systems for cluster resource management in virtualized computing environments are described. VM spares are used to reserve (or help discover or otherwise obtain) a set of computing resources for a VM. While VM spares may be used for a variety of scenarios, particular uses of VM spares include using spares to ensure resource availability for requests to power on VMs as well as for discovering, obtaining, and defragmenting the resources and VMs on a cluster, e.g., in response to requests to reserve resources for a VM or to respond to a notification of a failure for a given VM. | 2013-11-21 |
20130311825 | CALL RESTORATION IN RESPONSE TO APPLICATION FAILURE - A communication system, method, and components are described. Specifically, the method described herein provides the ability for an application sequence of a communication session to be reconstructed during the communication session and even though SIP standards dictate that the reconstruction of the application sequence should be denied and the session should be terminated. | 2013-11-21 |
20130311826 | TRANSPARENT CHECKPOINTING AND PROCESS MIGRATION IN A DISTRIBUTED SYSTEM - A distributed system for creating a checkpoint for a plurality of processes running on the distributed system. The distributed system includes a plurality of compute nodes with an operating system executing on each compute node. A checkpoint library resides at the user level on each of the compute nodes, and the checkpoint library is transparent to the operating system residing on the same compute node and to the other compute nodes. Each checkpoint library uses a windowed messaging logging protocol for checkpointing of the distributed system. Processes participating in a distributed computation on the distributed system may be migrated from one compute node to another compute node in the distributed system by re-mapping of hardware addresses using the checkpoint library. | 2013-11-21 |
20130311827 | METHOD and APPARATUS for automatic testing of automation software - A computer-implemented method and apparatus, the method comprising: receiving a test script indicating actions to be performed by automation software with regard to one or more elements of one or more processes; creating a simulation of the elements of the processes; activating the automation software; and testing activity of the automation software with regard to the simulation of the elements, thereby testing the automation software. | 2013-11-21 |
20130311828 | INFORMATION DISTRIBUTION APPARATUS, INFORMATION DISTRIBUTION SYSTEM AND INFORMATION DISTRIBUTION METHOD - According to one embodiment, an information distribution apparatus includes a receiver, an obtaining module, a determination module, and a transmitter. The receiver receives a request for an application from an electronic apparatus. The obtaining module obtains identification information from the request. The determination module determines whether the identification information is included in a list. The transmitter transmits the application, in which a test script configured to detect distortion of screen display of the application is not embedded, to the electronic apparatus, if the identification information is included in the list. | 2013-11-21 |
20130311829 | PERFORMANCE TESTING OF WEB COMPONENTS USING IDENTITY INFORMATION - Performance testing of web components using identity information includes providing a web component for testing having business logic code and an associated authorization layer code, locating, using a processor, branches in the authorization layer code and the business logic code which are dependent on identity information, and creating, using the processor, symbolic identities with claims or attributes having values corresponding to the branch options of the located branches. The method also includes propagating the symbolic identities downstream from the branch locations through the authorization layer code and the business logic code and analyzing, using the processor, the performance of each symbolic identity. | 2013-11-21 |
20130311830 | GENERATING TEST DATA - A method of generating test data is provided herein. The method includes generating a schema comprising a database table. The method also includes receiving a selection of the database table. Additionally, the method includes receiving one or more rule definitions for populating the database table. The method further includes generating a stored procedure for populating the database table based on the rule definitions and the schema. | 2013-11-21 |
20130311831 | VIRTUAL FAIL ADDRESS GENERATION SYSTEM, REDUNDANCY ANALYSIS SIMULATION SYSTEM, AND METHOD THEREOF - A fault distribution generation system is provided. The fault distribution generation system comprises: a fail address mapping module which receives a fail bit map representing failures included in a semiconductor device as a plurality of pixels having a plurality of different failure levels and fail addresses for the failures included in the semiconductor device, and maps the fail addresses to each pixel of the fail bit map; a fault pattern analyzing module which receives information on each pixel to which the fail addresses are mapped from the fail address mapping module, analyzes the received information, and classifies the failures included in each pixel into predetermined fault patterns; and a fault distribution estimating module which estimates an occurrence probability distribution of the fault patterns according to the failure levels based on results of the classification of the fault pattern analyzing module. | 2013-11-21 |
20130311832 | CROSS-LAYER TROUBLESHOOTING OF APPLICATION DELIVERY - Techniques for cross-layer troubleshooting of application delivery are disclosed. In some embodiments, cross-layer troubleshooting of application delivery includes collecting test results from a plurality of distributed agents for a plurality of application delivery layers; and generating a graphical visualization of an application delivery state based on the test results for the plurality of application delivery layers (e.g., different application delivery layers). | 2013-11-21 |
20130311833 | COMPUTING DEVICE AND METHOD FOR TESTING COMPONENTS OF THE COMPUTING DEVICE - A method of testing components of a computing device by obtaining a serial number of the computing device, and searching a database for test results of the computing device by using the serial number. The method determines whether the computing device has passed an electronic circuitry test when the electronic circuitry test result of the computing device has been found in the database, and tests components of the computing device when the computing device has passed the electronic circuitry test. A component test result of the computing device is saved in the database, and displayed on the display. | 2013-11-21 |
20130311834 | PREVENTING CASCADE FAILURES IN COMPUTER SYSTEMS - A computer hardware-implemented method, system, and/or computer program product prevents a cascading failure in a complex stream computer system causing an untrustworthy output from the complex stream computer system. Multiple upstream subcomponents in a complex stream computer system generate multiple outputs, which are used as inputs to a downstream subcomponent. An accuracy value is assigned to each of the multiple outputs from the upstream subcomponents, and weighting values are assigned to each of the inputs to the downstream subcomponent. The accuracy values and weighting values are utilized to dynamically adjust inputs to the downstream subcomponent until an output from the downstream subcomponent meets a predefined trustworthiness level. | 2013-11-21 |
20130311835 | FORECASTING WORKLOAD TRANSACTION RESPONSE TIME - Reliability testing can include determining a transaction time for each of a plurality of transactions to a system under test during the reliability test, wherein the plurality of transactions are of a same type. Forecasts of transaction times can be calculated for the transaction type. The forecasts can be compared with a threshold time using a processor. A remedial action can be implemented responsive to at least one of the forecasts exceeding the threshold time. | 2013-11-21 |
20130311836 | SYSTEM, METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR PROVIDING MOBILE DEVICE SUPPORT SERVICES - A method is provided for providing mobile device support services. The method may include monitoring a mobile device status. The method may additionally include performing device diagnostics based at least in part on captured deice status data to identify potential faults that may affect mobile device functionality. A corresponding system, apparatus, and computer program product are also provided. | 2013-11-21 |
20130311837 | PROGRAM-DISTURB MANAGEMENT FOR PHASE CHANGE MEMORY - Subject matter disclosed herein relates to a memory device, and more particularly to read or write performance of a phase change memory. | 2013-11-21 |