46th week of 2009 patent applcation highlights part 53 |
Patent application number | Title | Published |
20090282142 | BOOT CONTROLLING METHOD OF MANAGED COMPUTER - A managed server (srv- | 2009-11-12 |
20090282143 | TESTING OPERATION OF PROCESSORS SETUP TO OPERATE IN DIFFERENT MODES - Testing operation of processors setup to operate in different modes. In an embodiment, each tester system includes a processor setup to operate in a corresponding mode. A user sends a test request to a scheduler system indicating the mode of the processor sought to be tested, and the scheduler system forwards the test request to one of the tester systems with a processor setup to test the requested configuration. The scheduler system may maintain configuration information indicating which processors are setup to test which modes of interest, and also status information indicating which tester systems are presently available for testing. The configuration information and status information is used in determining a specific suitable tester system to which a test request is to be forwarded. | 2009-11-12 |
20090282144 | SYSTEM FOR TARGETING THIRD PARTY CONTENT TO USERS BASED ON SOCIAL NETWORKS - A method and system of providing Internet content to a user utilizing social networks is disclosed. The method comprises providing Internet usage data for a plurality of users, determining which users belong to the same social network, and providing at least one of the users access to Internet usage data for those other users who are in the same social network. | 2009-11-12 |
20090282145 | NETWORK DEVICE, METHOD FOR SPECIFYING INSTALLATION POSITION OF NETWORK DEVICE, AND NOTIFICATION DEVICE - A network device, method for specifying installation position of network device, and notification device are provided. The network device includes: a loop detecting unit configured to detect a loop caused by the network device; and a location notifying unit configured to allow the network device itself to indicate a location of the network device in response to a detection of the loop. | 2009-11-12 |
20090282146 | EQUIPMENT MANAGEMENT DEVICE, EQUIPMENT MANAGEMENT SYSTEM, EQUIPMENT MANAGEMENT METHOD, AND RECORDING MEDIUM - An equipment management device manages one or more pieces of equipment which are connected to the equipment management device via a network. The equipment management device includes a determining unit which determines whether a non-authenticated software item exists in each of the one or more pieces of equipment, and a license management unit which performs license management of one or more software items installed in each of the one or more pieces of equipment, based on a result of the determination by the determining unit. | 2009-11-12 |
20090282147 | System And Method For Harmonizing Changes In User Activities, Device Capabilities And Presence Information - A method and system utilizes presence information for a device. The method and system comprise receiving a communication indicating a change to a user activity from a first device operated by a user. The existing presence status of the user to the presence status associated with the user activity for the user of a second device is automatically changed in response to the received change to the user activity. The second device is informed of the changing of the existing presence status for the second device to automatically alter a capability of the second device based on the changing of the existing presence status and based on a stored indication from the user on how the capability is to be altered. | 2009-11-12 |
20090282148 | SEGMENTED CRC DESIGN IN HIGH SPEED NETWORKS - Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 100 Gbps or greater), while being capable of being implemented on currently available FPGAs. Accordingly, embodiments of the present invention may be used in network devices such as routers, switches, hubs, host network interfaces and the like to support high speed data transmission standards such as 100G Ethernet and beyond. | 2009-11-12 |
20090282149 | METHOD AND SYSTEM FOR DISTRIBUTING LOAD BY REDIRECTING TRAFFIC - Disclosed is a system for servers to redirect client requests to other servers in order to distribute client traffic among the servers. A client is assigned to a server although the client may be unaware of that assignment. When the client accesses a server, a server possibly identified to the client by a name service, the server checks the client's assignment. If the client is not assigned to this server, then in some scenarios this server redirects the client to its assigned server. The client responds by sending its request to the assigned server. In other scenarios, the first server accessed by the client proxies the client's traffic to the assigned server. A database is kept of client-to-server assignments. If the present load distribution is less than ideal (e.g., clients are assigned to an unavailable server), then the assignment database is updated to reflect how the load should be distributed. | 2009-11-12 |
20090282150 | SERVICE FLOW PROCESSING APPARATUS AND METHOD - A service flow processing apparatus receives a message from a service on a network in accordance with a first process specified in a first service flow description document, and in the case where the received message is to be processed by another service flow processing apparatus, extracts the description of a second process to be executed using the received message from the first service flow description document. The service flow processing apparatus sends a second service flow description document, containing the description of the second process, and the received message to the other service flow processing apparatus. | 2009-11-12 |
20090282151 | SEMI-HIERARCHICAL SYSTEM AND METHOD FOR ADMINISTRATION OF CLUSTERS OF COMPUTER RESOURCES - A method for managing clustered computer resources, and particularly very large scale clusters of computer resources by a semi-hierarchical n level, n+1 tier approach. Controller resources and controlled resources exist at different hardware levels. The top level consists of controller nodes and a first tier is defined for at least part of the top level. At a last level, at which controlled nodes are found, a last tier is defined. Additional levels of controlled and controller resources may exist between the top and last levels. At least one logical intermediate tier is introduced between adjacent levels and comprises at least one proxy or set of proxy processes. | 2009-11-12 |
20090282152 | METHOD AND APPARATUS FOR PREVENTING COUNTERFEITING OF A NETWORK-SIDE MEDIA ACCESS CONTROL ADDRESS - A method and apparatus is provided for preventing the counterfeiting of a network-side Media Access Control (MAC) address. The method includes: receiving a message from a user equipment (UE) and resolving the message from the UE in order to obtain a MAC address of the UE; learning the MAC address of the UE if the MAC address of the UE is different from a known MAC address of a network-side equipment; learning the MAC address of the network-side equipment; and generating a MAC address learning table by utilizing the learned MAC address of the network-side equipment and setting the MAC address learning table to be a static address table, and/or filtering messages having source MAC addresses being the MAC address of the network-side equipment and from other user-side ports by utilizing the learned MAC address of the network-side equipment. | 2009-11-12 |
20090282153 | COMMUNICATION CONTROL SYSTEM - A communication control system for intervening in the communication between a PC terminal in an external network and a portable telephone terminal with an electronic mail transmission/reception function in a mobile communication network has a database in which a portable telephone number and a mail account are stored in association with each other. Upon receipt of an access request with an FQDN to a predetermined portable telephone terminal from the PC terminal, the communication control system solves the name of the portable telephone terminal by searching the database on the basis of a host name (mail account name) extracted from the FQDN to acquire the telephone number corresponding to the host name (mail account name) as address information, thereby making a connection of the communication to the mobile communication terminal on the basis of the address information acquired by solving the name. | 2009-11-12 |
20090282154 | CONTROL SYSTEM AND CONTROL METHOD, METHOD AND APPARATUS FOR PROCESSING INFORMATION, INFORMATION PROCESSING TERMINAL AND METHOD THEREOF, STORAGE MEDIUM, AND PROGRAM - A client (such as a PC, portable telephone, PDA, electrical appliances), to which a device such as a IC card is connected, starts a handshake protocol to request a server to start communication. When communication is established via the handshake protocol, the initiative of communication is transferred to the server, and the state changes into a neutral state. In this neutral state, a control packet including a particular number of messages and a finished message is transmitted from the server to the client. If the client receives the control packet, the client performs a process according to the messages included in the control packet. This makes it possible to remotely control a device via a network in a highly reliable and efficient manner. | 2009-11-12 |
20090282155 | PROVIDING PEER-TO-PEER MEDIA - This disclosure provides a system and method for providing peer-to-peer multimedia. In some embodiments, a method includes identifying media devices based, at least in part, on a call session between communication devices. Peer-to-peer multimedia is provided between the identified media devices. | 2009-11-12 |
20090282156 | OCCURRENCE DATA DETECTION AND STORAGE FOR MOTE NETWORKS - Systems and processes for detecting and storing occurrence data using mote networks are disclosed. In some embodiments, a system includes a computing component coupled with a data storage device and operable to receive data from one or more motes. Instructions on the data storage device configure the computing component to receive data from one or more motes into a received data set, receive an input selection corresponding to a target-occurrence having a representative feature, the representative feature including at least one recognizable pattern of at least one parameter in the data received from the one or more of the motes, select a pattern recognition criteria corresponding one of the representative features of the target-occurrence, and in response to the input selection corresponding to the target-occurrence, automatically search the received data set for data correlating to the target-occurrence representative feature using the selected pattern recognition criteria. | 2009-11-12 |
20090282157 | FIRMWARE UPGRADE FOR THIN CLIENTS USING ONE OR MORE SERVERS - A process and system for upgrading firmware in a thin client in a network environment. The process may proceed on an automated basis during boot-up by using one or more FTP addresses stored in the thin client. Multiple FTP servers may be accessed. The same firmware upgrades may be stored on more than one FTP server. Different firmware upgrades may instead or in addition be stored on different FTP servers. | 2009-11-12 |
20090282158 | METHOD AND SYSTEM FOR FAST CHANNEL SWITCHING USING STANDARD RTSP MESSAGES - Method and system for performing fast channel switching in client-server systems, in which live media streams sent by a streaming server under the RTSP protocol are played by the client, are described. The seek functionality in the media player is overloaded to provide switching between live media streams by using standard RTSP message in-band within a single RTSP session. | 2009-11-12 |
20090282159 | CONTENT DELIVERY IN A NETWORK - An embodiment of a method includes receiving a request for the content from a requester, retrieving the content from a media access server, and while retrieving the content from the media access server, simultaneously streaming the content to the requester. An embodiment of a system includes an edge server having a media streaming server configured to receive the request and stream the specified content to a requester from a local memory, and a stream caching server configured to retrieve the requested content from a media access server while the media streaming server is streaming at least a specified portion of the content, and wherein the stream caching server is further configured to store the retrieved content in a local cache and notify the media streaming server that content is stored in local cache. | 2009-11-12 |
20090282160 | Method for Constructing Network Topology, and Streaming Delivery System - A method for constructing a network topology is applied in a streaming delivery system. The streaming delivery system includes: a center server (CS-P), an edge server (ES-P), a request scheduling server (RRS-P), and a client. The disclosed embodiments utilizes the upload capabilities of the client to transmit a part of streaming data, thus consuming fewer center server resources. By constructing the network topology, the disclosed embodiments enable the client to obtain a part of streaming data from other clients, reduces the load capability requirements for the server, and ensures that a streaming delivery network may provide streaming live services with higher bandwidths and better quality. | 2009-11-12 |
20090282161 | DATA TRANSFER CONTROL SYSTEM AND METHOD - Transfer of data files, such as large files for digital media, is performed through the intermediary of a gateway communication manager (GCM) that resides in an interface zone between external clients and an internal network. The external clients are registered with the GCM and request transfer of data files to the internal network. The GCM identifies a transfer agent to handle the transfer, and allocates a portion of shared bandwidth. If insufficient bandwidth is available or transfer agents are unavailable, the requested transfer may be placed in a queue and transfer occurs when bandwidth and agents can accommodate the request. The GCM may prioritize and re-prioritize transfers, such as based on the sender, content, and so forth. Multiple GCMs may manage transfers for external clients, and shared logs may be maintained to permit flexibility in management by the GCMs. | 2009-11-12 |
20090282162 | OPTIMIZED CLIENT SIDE RATE CONTROL AND INDEXED FILE LAYOUT FOR STREAMING MEDIA - An indexed file layout, comprising index information, is defined for segmented streaming of multimedia content. The index information can comprise program description information and streaming segment index information. In addition, the layout can comprise files containing streaming segments of the program, where the streaming segments are each encoded at one or more bitrates independently of other streaming segments of the program. The layout supports client switching between different bitrates at segment boundaries. Optimized client-side rate control of streaming content can be provided by defining a plurality of states, selecting available paths based on constraint conditions, and selecting a best path through the states (e.g., based on a distortion measure). In one client-side rate control solution states correspond to a specific bitrate of a specific streaming segment, and in another client-side rate control solution states correspond to a measure of client buffer fullness. | 2009-11-12 |
20090282163 | Communication Apparatus, Communication Method, Program and Communication System - A communication apparatus includes a communication unit, a connection establishment processing unit for exchanging connection data between the communication unit and a communication party to perform a connection establishment processing, and a communication controlling unit for statically setting a data rate of the connection data and dynamically setting a data rate of transmission data to be transmitted from the communication unit after the connection establishment processing. | 2009-11-12 |
20090282164 | Method, Communication System, Multimedia Nodes, and Gateway for Transmitting Multimedia Data in MPEG Format - A method for transmitting multimedia data in MPEG format between multimedia nodes of a communication system via at least one communication link of the communication system. To configure the transmission of the multimedia data in the most efficient possible manner and to reduce the number of different communication systems in a vehicle, the MPEG multimedia data is transmitted via a FlexRay communication system according to the FlexRay protocol. For this purpose, the size of the payload segments of FlexRay data frames may be adjusted to the size of the MPEG data frames. The payload segment of a FlexRay data frame may be selected to be of the same size as the MPEG data frame, in particular 188 bytes long. | 2009-11-12 |
20090282165 | Communication System for a Control System Over Ethernet and IP Networks - A communication system is provided for communication within a control system. The communication system has a plurality of simple devices connected to an intra-level communications network, each simple device being adapted to directly exchange data with the other simple devices. The communications system also has at least one intelligent device connected to the intra-level communications network, each intelligent device being adapted to directly exchange data with each simple device on the intra-level communications network. The communication system can have a plurality of intra-level communications networks. The intra-level communications networks can be directly connected by an intra-level core connector or by an inter-level core connector through an inter-level network of the intelligent devices | 2009-11-12 |
20090282166 | System and method for data exchange in multiprocessor computer systems - A system for data exchange in multiprocessor computer system is disclosed. The system includes at least one processing module adapted to communicate with at least one of a plurality of routing modules or a plurality of buffer modules or both and at least one communicating interfaces to facilitate data exchange in multiprocessor computer system. | 2009-11-12 |
20090282167 | METHOD AND APPARATUS FOR BRIDGING - The present invention relates to a network and provides a method and apparatus for bridging. The method includes: storing the convergence values of the operation keys of a source node that represent the network node features into a Hash bucket table; performing convergence calculation on the operation keys that represent the destination node in an Ethernet data frame according to an entry convergence algorithm and obtaining the convergence values of the operation keys of the destination node in the Ethernet data frame; querying the Hash bucket table and forwarding table according to the convergence values of the operation keys of the destination node, and obtaining the forward information required for forwarding the Ethernet data frame; and forwarding the Ethernet data frame according to the forward information. With the present invention, the storage space occupied by the Hash bucket table may be decreased greatly, and the RAM resources are saved, while the pin resources of the chip are used reasonably. | 2009-11-12 |
20090282168 | SERVER, P2P NETWORK SYSTEM, AND METHOD FOR ROUTING AND TRANSFERRING RESOURCE KEY ASSIGNMENT THEREOF - A server, a P2P network system, a method for routing, and a method for transferring resource key assignment are provided. The server comprises a routing processing module and a storage module connected therewith. The P2P network system comprises a structured P2P network and a server configured therein. The server routes the searching node to the node storing the resource key assignment based on the stored information, to thereby achieve a quick route. The method for routing is realized by searching for the node storing the resource key assignment via the server. Therefore, it merely takes two hops, i.e., the server and the node storing the resource key assignment, for the node to find the resource key assignment in search. | 2009-11-12 |
20090282169 | SYNCHRONIZATION PROGRAMS AND METHODS FOR NETWORKED AND MOBILE DEVICES - Mobile synchronization systems are provided for synchronizing user data objects among user devices. In one embodiment, mobile devices are provided with a synchronized environment to a user desktop, having either synchronized copies of the data objects, or a shortcut to a system peer storing the data object. Another embodiment provides priority scoring of data objects to keep the most desired objects locally on mobile devices. Another embodiment provides separate handling and prioritization for user media files. Preferably, synchronization is always-on and user transparent. | 2009-11-12 |
20090282170 | TELEVISION WITH MULTIPLE INTERFACES - A television includes multiple interfaces, a storage medium, an updating module, a processing module and a display module. The multiple interfaces are mounted on a housing of the television, for connecting to peripheral devices. The storage medium stores a table comprising logos of the multiple interfaces and names of the peripheral devices connected to the multiple interfaces. The updating module receives the names of the peripheral devices and updates the table with the names of the peripheral devices. The processing module reads the data of the table stored in the storage medium and converts the data of the table into image signals. The display module visually displays a menu based on the image signals. The menu shows the logos of the multiple interfaces and the names of the peripheral devices connected to the multiple interfaces. | 2009-11-12 |
20090282171 | Generating an identifier for a SATA disk - In described embodiments, a method of generating an identifier for a disk includes the steps of requesting an ASCII identification string for the disk and generating a padded string by processing the ASCII identification string into a predetermined number of bytes. The padded string is divided into portions and an encoded value is generated for each portion. The two or more encoded values for the portions are combined into a candidate value compatible with a World-Wide Name (“WWN”). The candidate value is compared to a list of previously generated candidate values and if the candidate value differs from the values in the list, the candidate value is included in the list of generated values and the candidate value is provided as the system-wide name for the disk. | 2009-11-12 |
20090282172 | MEMORY ACCESS ENGINE HAVING MULTI-LEVEL COMMAND STRUCTURE - A direct memory access system utilizing a local memory that stores a plurality of DMA command lists, each comprising at least one DMA command. A command queue can hold a plurality of entries, each entry comprising a pointer field and a sequence field. The pointer field points to one of the DMA command lists. The sequence field holds a sequence value. A DMA engine accesses an entry in the command queue and then accesses the DMA commands of the DMA command list pointed to by the pointer field of the accessed entry. The DMA engine performs the DMA operations specified by the accessed DMA commands. The DMA engine makes available the sequence value held in the sequence field of the accessed entry when all of the DMA commands in the accessed command list have been performed. In one embodiment, the command queue is part of the DMA engine. | 2009-11-12 |
20090282173 | METHOD OF EDITING MULTI-MEDIA PLAYING SCHEDULE FOR DIGITAL PHOTO FRAME, SYSTEM AND COMPUTER READABLE STORAGE MEDIUM THEREOF - The present invention discloses a method of editing a multi-media playing schedule for a digital photo frame, a system and a computer readable storage medium thereof, which are characterized in that users can edit a multi-media playing schedule on the data processing apparatus when the digital photo frame is electrically connected to the data processing apparatus, and after editing of the multi-media playing schedule is finished, the multi-media playing schedule is transmitted to the digital photo frame and stored in the digital photo frame. Therefore, the problem of being unable to edit complicated multi-media playing schedules due to simple operation interface of digital photo frames can be solved. | 2009-11-12 |
20090282174 | STATUS SIGNAL DISPLAYING SYSTEM - A status signal displaying system includes a motherboard, a micro-controller and a display device. The motherboard includes a central processing unit and a plurality of status signal generating circuits for generating status signals. The micro-controller is electrically connected to the status signal generating circuits. The display device is electrically connected to the micro-controller. The status signals are processed by the micro-controller, and the processed status signals are directly transmitted to the display device for display without being processed by the central processing unit. | 2009-11-12 |
20090282175 | System and Method for Enabling Multiple Processors to Share Multiple SAS Wide Ports - Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate with all ports. Thus, the IOC can process CPU communications to determine which port to send them to, and send them to the correct port as well as process incoming communications from the ports to determine which CPU to send them to and send these communications to the correct CPU. This may significantly increase the flexibility and efficiency of a storage network. | 2009-11-12 |
20090282176 | COMPUTER SYSTEM AND METHOD FOR PROCESSING DATA SIGNAL OF MEMORY INTERFACE THEREOF - A computer system and a method for processing a data signal of a memory interface thereof are provided. The computer system includes a memory module, a memory controller, and a digital signal processor. The memory controller accesses data temporarily stored in the memory module through a data bus. The digital signal processor processes varied data on the bus according to a select code to recover the data. | 2009-11-12 |
20090282177 | APPARATUS AND METHOD FOR SIGNAL TRANSMISSION IN EMBEDDED SYSTEM - An apparatus and a method for signal transmission in an embedded system. The apparatus comprises: a master control chip, embedded in the embedded system and comprising a controller and a plurality of I/O pins; a plurality of slave chips; and a bus having one end coupled to the plurality of I/O pins and the other end coupled to one of the plurality of slave chips; wherein data or signals are bi-directionally transmitted. The method comprises steps of: transmitting a control signal from a master control chip to a slave chip; starting an operation by the slave chip after receiving the control signal; transmitting a data signal and a command signal to the master control chip from the slave chip; processing the data signal according to the command signal by the master control chip; and transmitting another control signal from the master control chip to the slave chip to terminate the operation. | 2009-11-12 |
20090282178 | Bounded Starvation Checking of an Arbiter Using Formal Verification - A system for formal verification of bounded fairness properties of pseudo random number generators and arbiters that use random priority-based arbitration schemes. The formal verification system determines an upper bound of a request-to-grant delay of an arbiter in terms of a number of complete random sequences. The formal verification system also determines, in terms of a number of clock cycles, an upper bound and a lower bound of a length of a complete random sequence in the random number sequence generated by a random number generator used by the arbiter. The formal verification system then determines a worst case request-to-grant delay bounds of the arbiter system, in terms of a number of clock cycles, by combining the upper bound of the request-to-grant delay of the arbiter with the upper bound of the length of the complete random sequence and the lower bound of the length of the complete random sequence. | 2009-11-12 |
20090282179 | METHOD AND SYSTEM OF GROUPING INTERRUPTS FROM A TIME-DEPENDENT DATA STORAGE MEANS - A method of grouping interrupts from a time-dependent data storage means in accordance with the types of the interrupts, the method comprising the steps of providing each part of the data storage means with an indicator of an event associated with the part, generating interrupts upon the occurrence of events in different parts of the data storage means, allocating interrupts associated with substantially the same part of the data storage means to a same processing means. | 2009-11-12 |
20090282180 | Plug-and-play hard disk read/write drive - A plug-and-play hard disk read/write drive includes a body, a control circuit board, and a connecting interface unit. The body has hard disk insertion slots and a power supply unit. The control circuit board is arranged in the body and is electrically connected with the connecting interface. The connecting interface unit has hard disk adapting interfaces corresponding to the hard disk insertion slots. The hard disk adapting interface has a first connecting end and a second connecting end. The hard disk is accommodated in the hard disk insertion slot, and is connected to the hard disk adapting interface. The power supply unit is electrically connected on the control circuit board for controlling a power switch of the connecting interface unit. The present invention allows the hard disks of different specifications to be accommodated in the hard disk read/write drive for transmitting and accessing data via the hard disk adapting interface. | 2009-11-12 |
20090282181 | DATA PIPELINE MANAGEMENT SYSTEM AND METHOD FOR USING THE SYSTEM - The present invention relates to a data pipeline management system and more particularly to a minimum memory solution for unidirectional data pipeline management in a situation where both the Producer and Consumer need asynchronous access to the pipeline, data is non-atomic, and only the last complete (and validated) received message is relevant and once a data read from/write to the pipeline is initiated, that data must be completely processed. The data pipeline management system according to the invention can be implemented as a circular queue of as little as three entries and an additional handshake mechanism, implemented as a set of indices that can fit in a minimum of six bits (2×2+2×1). Both the Producer and Consumer will have a 2 bit index indicating where they are in the queue, and a 1 bit binary value indicating a special situation. Both parties can read all the indices but can only write their own, i.e. P and wrapP for the Producer and C and wrapC for the Consumer. For management of the handshakes a set of rules is provided. | 2009-11-12 |
20090282182 | MULTIPLE PROCESSOR SYSTEM AND METHOD INCLUDING MULTIPLE MEMORY HUB MODULES - A processor-based electronic system includes several memory modules arranged in first and second ranks. The memory modules in the first rank are directly accessed by any of several processors, and the memory modules in the second rank are accessed by the processors through the memory modules in the first rank. The data bandwidth between the processors and the memory modules in the second rank is varied by varying the number of memory modules in the first rank that are used to access the memory module in the second set. Each of the memory modules includes several memory devices coupled to a memory hub. The memory hub includes a memory controller coupled to each memory device, a link interface coupled to a respective processor or memory module, and a cross bar switch coupling any of the memory controllers to any of the link interfaces. | 2009-11-12 |
20090282183 | ELECTRONIC TAG SYSTEM HAVING BANK STATUS AND CONTROLLING METHOD THEREOF - An electronic tag system, an electronic tag, and a controlling method thereof according to the present invention include an electronic tag that includes a memory having a divided band and a bank status that stores a status of data stored in the divided bank, a controlling circuit that reads and writes the data from and to the bank and changes the status and a controlling device that allows the controlling circuit connected through the electronic tag and an electronic tag reader/writer to transmit and receive the read and written data from and to the bank and issue an instruction to change the status. | 2009-11-12 |
20090282184 | COMPENSATING NON-VOLATILE STORAGE USING DIFFERENT PASS VOLTAGES DURING PROGRAM-VERIFY AND READ - Optimized verify and read pass voltages are obtained to improve read accuracy in a non-volatile storage device. The optimized voltages account for changes in unselected storage element resistance when the storage elements become programmed. This change in resistance is referred to as a front pattern effect. In one approach, the verify pass voltage is higher than the read pass voltage, and a common verify voltage is applied on the source and drain sides of a selected word line. In other approaches, different verify pass voltages are applied on the source and drain sides of the selected word line. An optimization process can include determining a metric for different sets of verify and read pass voltages. The metric can indicate threshold voltage width, read errors or a decoding time or number of iterations of an ECC decoding engine. | 2009-11-12 |
20090282185 | FLASH MEMORY DEVICE AND A METHOD FOR USING THE SAME - A flash memory device is presented. The device includes a flash memory, which has a temporary storage portion, a main storage portion and a controller. The temporary storage portion is provided for buffering data and addresses. The buffered addresses are indicative of the destination of the buffered data in the main storage portion. The controller is configured for selectively accessing the main storage portion or the temporary storage portion or a combination thereof for receiving and/or outputting the data from the memory. The controller is further configured for enabling communication of data between the two portions. Because non-volatile flash memory is used for the temporary storage, no other memory components are needed and, in case of an unexpected power failure, the data in the temporary area is not lost. | 2009-11-12 |
20090282186 | DYNAMIC AND ADAPTIVE OPTIMIZATION OF READ COMPARE LEVELS BASED ON MEMORY CELL THRESHOLD VOLTAGE DISTRIBUTION - A process is performed periodically or in response to an error in order to dynamically and adaptively optimize read compare levels based on memory cell threshold voltage distribution. One embodiment of the process includes determining threshold voltage distribution data for a population of non-volatile storage elements, smoothing the threshold voltage distribution data using a weighting function to create an interim set of data, determining a derivative of the interim set of data, and identifying and storing negative to positive zero crossings of the derivative as read compare points. | 2009-11-12 |
20090282187 | FLASH MEMORY DEVICE CAPABLE OF PREVENTING READ DISTURBANCE - A storage has a first cache area temporarily storing one page data read from a flash memory, and a second cache area to which data of the first cache area is transferred. A controller stores data of the first cache area in the second cache area, and reads and outputs the data stored in the second cache area when data having the same address as data read from the first cache area is read. | 2009-11-12 |
20090282188 | MEMORY DEVICE AND CONTROL METHOD - A memory device includes a first controller and a second controller. The first controller receives a first command from a host and stores the first command in a first command queue, and transmits the first command to the second controller relating to the first command stored in the first command queue. The second controller transmits the first command stored in the second command queue to a flash memory. | 2009-11-12 |
20090282189 | MEMORY CONTROLLER WITH REFRESH LOGIC TO ACCOMODATE LOW-RETENTION STORAGE ROWS IN A MEMORY DEVICE - A memory controller is disclosed that provides refresh control circuitry to generate first refresh commands directed to a first row of storage cells within a memory device at a first rate. The refresh control circuitry generates second refresh commands directed to a second row of storage cells within the memory device at a second rate. Output circuitry outputs the first and second refresh commands to the memory device. | 2009-11-12 |
20090282190 | DATA STRUCTURE FOR CONTROL INFORMATION ON REWRITEABLE DATA STORAGE MEDIA - A data storage medium includes a data structure, called a disk control block, used for administration and control information for the data storage medium. One medium may contain multiple different disk control blocks, each addressing a different function. Each disk control block includes a control block identifier that specifies the function of the disk control block. Each control block also includes a set of standard access control parameters. If a drive encounters an unrecognized disk control block, the drive can still decode the standard control parameters, so that the drive behavior is not inconsistent with the requirements of the unrecognized disk control block. | 2009-11-12 |
20090282191 | Operating Method for a Memory Subsystem and Devices for Executing the Operating Method - A memory subsystem has at least one first mass memory with a solid-state memory medium, at least one second mass memory with a moving read/write head or moving memory medium, and at least one control unit for controlling the first mass memory and the second mass memory. A method of operating the memory subsystem includes receiving a request for storing or reading data, defining first and second memory regions in the first and second mass memories, respectively, and transmitting first and second subrequests to the first and second memory regions, respectively. | 2009-11-12 |
20090282192 | Smartcard Accessed Secure Electronic Data Storage System - A health monitoring and diagnostic device (LIFESTREAM cholesterol meter) configured as a self-contained testing and diagnostic unit in a clam-shell type case. One side of the case includes a spring-loaded finger stick and a compartment for carrying one or more packages of disposable items including a test strip, a needle for the finger stick, and an alcohol swipe. The other half of the case includes a test strip reader, a key pad, and a liquid crystal display. The meter reads a test strip carrying a droplet of blood and receives additional diagnostic information from the patient, such as age, gender, weight, and family history of heart disease. Within minutes, the meter displays test results, including total cholesterol levels. The meter also displays additional diagnostic results, such as the patient's “cardiac age,” recommended weight loss, and a cardiac risk assessment. The meter also works in connection with a network-based comprehensive health analysis and reporting system. The meter writes patient data to a smartcard. This patient data typically includes patient identification information, the test results, the diagnostic information, and the diagnostic results. A computer station reads the smartcard and establishes a network connection with a health report server over the Internet. The computer then downloads the patient data to the health report server, which prepares a comprehensive health report. Within minutes, this report is transmitted back to the computer station, where it is printed out and delivered to the patient. | 2009-11-12 |
20090282193 | MANAGING DEVICE CONFIGURATIONS AND DOCUMENTS WORKFLOW THROUGH A PORTABLE STORAGE DEVICE - An MFP that is configured to receive instruction sets for processing documents, such as workflows, from a portable memory device. The MFP may be part of a larger network computer system and may also be able to receive workflows for processing documents from other components of the system in addition to the portable memory device. The portable memory device may comprise a memory stick, or any other portable electronic device that has memory functionality. The system may also be able to filter files on the portable memory device so that the MFP only receives workflow files related to processing documents. | 2009-11-12 |
20090282194 | Removable storage accelerator device - An accelerator device including a cache memory, a controller that is electrically coupled to the cache memory, a host computer connecter that is electrically coupled to the controller, and a removable storage device connector that is electrically coupled to the controller. The accelerator device can be electrically coupled to a host computer via the host computer connector. The accelerator device can also be electrically coupled to a removable storage device via the removable storage device connector. When the accelerator device is electrically coupled to the host computer and the removable storage device is electrically coupled to the accelerator device, the controller caches data sent from the host computer to the removable storage device in the cache memory prior to the data being sent from the accelerator device to the removable storage device. | 2009-11-12 |
20090282195 | METHOD OF MANAGING MEMORY STORAGE SPACE AND A COMPUTER SYSTEM - A method of managing memory storage space and a computer system using the same are disclosed. The method is used for a computer comprising a storage device and an expansion slot. The method has the steps of: detecting whether there is a memory card in the expansion slot; combining the storage space of the storage device and the memory card to form a combined storage space; and using application software to manage the combined storage space, wherein at least one file stored in the combined storage space may be selected to move between the storage device and the memory card via the application software. | 2009-11-12 |
20090282196 | FIRST IN FIRST OUT EVICTION IMPLEMENTATION - Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction timing method, and the eviction timing method to trigger eviction of an object from the region of cache. The sorting component includes code to implement a sorting method to identify an object that is eligible for eviction in the region of cache. The sorting method involves identifying an object that has been cached in the region of cache for a longer time period than other objects that are cached in the cache region. | 2009-11-12 |
20090282197 | Network On Chip - A network on chip (‘NOC’) that includes integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controllers; each IP block adapted to a router through a memory communications controller and a network interface controller; and at least one IP block also including a computer processor and an L1, write-through data cache comprising high speed local memory on the IP block, the cache controlled by a cache controller having a cache line replacement policy, the cache controller configured to lock segments of the cache, the computer processor configured to store thread-private data in main memory off the IP block, the computer processor further configured to store thread-private data on a segment of the L1 data cache, the segment locked against replacement upon cache misses under the cache controller's replacement policy, the segment further locked against write-through to main memory. | 2009-11-12 |
20090282198 | SYSTEMS AND METHODS FOR OPTIMIZING BUFFER SHARING BETWEEN CACHE-INCOHERENT CORES - According to at least some embodiments, systems and methods are provided for mapping, by a first processor, of a memory portion that is inaccessible to a second processor to at least a segment of a pre-reserved region of memory addresses used by the second processor to enable the second processor to access the contents of the memory portion. The mapped memory portion comprising two temporary pages and all pages of data in a buffer to be shared excepting a first block of data and a last block of data, and copying the contents of the first block of data and the last block of data into its respective temporary page, at least one of the first and last blocks of data are unaligned prior to being copied into its respective temporary page. In some embodiments, at least one of the first and last blocks of data, prior to being copied into its respective temporary page, comprises a portion of data to be shared on a same cache line as a portion of data not to be shared. | 2009-11-12 |
20090282199 | Memory control system and method - The present invention systems and methods enable dynamic allocation and control of on-chip memory. In one embodiment, a system includes a plurality of internal memory components and a control component. The plurality of internal memory components store information. The control component controls access requests from a plurality of heterogeneous components to the internal memory components. The plurality of internal memory components are dynamically assigned to the plurality of heterogeneous components. The heterogeneous components can include different types of engines. In one embodiment, the system includes a clock compensation component for coordinating clocking for access requests from the heterogeneous engines. | 2009-11-12 |
20090282200 | Storage Device Procurement System - A storage device procurement system for managing storage failure and full warnings and conditions to minimize a need for storage device inventory. Such a system minimizes a need for storage system administrators to be knowledgeable with procurement options and procedures. Such a system provides for an end-to-end automated storage device procurement system by combining elements of a direct order model with elements of storage array monitoring. | 2009-11-12 |
20090282201 | STORAGE DEVICE CONTROL METHOD AND COMPUTER SYSTEM - A storage device control method for operating a logical volume to which a control command cannot be issued directly from a host computer is provided. The host computer manages a storage device. The storage device includes a disk device which provides logical volumes and a disk control device which controls the disk device. The host computer issues a control command to a recognized volume in the disk control device. The disk control device operates a recognized volume which is an issue destination of the control command or an unrecognized volume contained in the control command. A logical volume to which the control command is to be issued from the host computer is determined by using definition information (a disk information table, a copy pair information table, or a copy group information table) concerning copy operation retained by storage control software which operates on the host computer. | 2009-11-12 |
20090282202 | Technique to perform memory disambiguation - A memory access management technique. More particularly, at least one embodiment of the invention relates to a technique to issue loads to a memory ahead of older store operations corresponding to the same target address. | 2009-11-12 |
20090282203 | MANAGING STORAGE AND MIGRATION OF BACKUP DATA - A method and system for client backup data management and storage using virtual tape libraries (VTLs). A VTL controller executing a software method receives metadata that distinguishes among a plurality of different versions of backup data. The VTL controller determines a latest version of the backup data. The VTL controller determines a migration set of zero or more versions of the backup data. The latest version and any version included in the migration set are included in the plurality of different versions. The VTL controller determines that a storage of the latest version in a first storage medium (e.g., magnetic disk) of the VTL is complete. The VTL controller migrates the migration set to a second storage medium (e.g., magnetic tape) of the VTL if the migration set includes at least one version of the backup data. | 2009-11-12 |
20090282204 | METHOD AND APPARATUS FOR BACKING UP STORAGE SYSTEM DATA - A method for backing up data of a storage system, where at least two mirroring channels are provided between a first mainboard and a second mainboard of a storage system, and the method includes: transmitting data through at least one mirroring channel if all the mirroring channels are effective; and transmitting the data through remaining mirroring channel(s) if at least one of the mirroring channels for transmitting the data fails. The present disclosure enables traffic to be transmitted evenly on normal mirroring channels, and ensures maximized utilization of the bandwidth of mirroring channels. Corresponding to the foregoing method, an apparatus for backing up data of a storage system is provided in another embodiment of the present disclosure. | 2009-11-12 |
20090282205 | Prerecorded Digital Portable Personal Stereo - This digital portable personal stereo comprises a housing containing a connection interface for connection to earphones; a digital memory immovably attached to the housing; an electronic circuit for accessing said memory; and a control interface for controlling said electronic circuit wherein that a encrypted audio content is prerecorded in the digital memory, and in that the portable personal stereo is adapted to prevent any other audio content from being written in the digital memory. | 2009-11-12 |
20090282206 | Method for Resolving Memory Leak Problems Resulting from Loitering Objects - The exemplary embodiments provide a computer implemented method, apparatus, and computer usable program code for managing memory. A suspect loitering object is detected for a set of selected applications, forming a detected object. The detected object is paged to persistent storage, forming a paged object. The paged object is deallocated from system memory, forming a deallocated object. | 2009-11-12 |
20090282207 | SYSTEM & METHOD FOR STORING A SPARSE MATRIX - A system and method for storing and retrieving a sparse matrix from memory of a computing device while minimizing the amount of data stored and costly jumps in memory. The computing device may be an FPGA having memory and processing elements. The method comprises storing non-zero data elements of the matrix in a data array and storing their corresponding column address values in a column index array. To read this stored data from memory, each preceding value of the column index array may be compared with each current value of the column index array to determine if the data array value corresponding with the current column index array value belongs on the next row of the matrix. The method may include pre-ordering the matrix with zero-pad placeholders or creating a row increment pointer array which typically stores fewer values than the number of rows in the matrix. | 2009-11-12 |
20090282208 | SIMPLE STACK TYPES - Embodiments that facilitate type checking of assembly language instructions are disclosed. In one embodiment, a method includes receiving a low level language instruction in a memory. The instruction includes a word having a first type. The memory includes either a stack or a heap. Each of the stack or heap includes a plurality of positions. The method also includes labeling the plurality of positions in one of the stack or the heap as one or more specified positions and one or more unspecified positions. The method further includes assigning a second type to the memory, the second type including the first type of the word. The word is stored in a specified position or an unspecified position. The method additionally includes determining whether the instruction is well-typed by applying one or more rules to the instruction and to the second type. | 2009-11-12 |
20090282209 | Storage System, Storage Extent Release Method and Storage Apparatus - This storage system has an allocation unit for allocating a storage extent in prescribed units to the dynamic logical volume upon storing the data sent from the host computer in the dynamic logical volume; a management unit for managing the storage extent recognized as being currently used by the file system among the storage extents allocated to the dynamic logical volume by the allocation unit; and a release unit for releasing the storage extent that is not being managed by the management unit from the dynamic logical volume. | 2009-11-12 |
20090282210 | Partition Transparent Correctable Error Handling in a Logically Partitioned Computer System - A method and apparatus for transparently handling recurring correctable errors to prevent costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. Similarly, the hypervisor can move direct memory access (DMA) memory locations using an I/O translation table. | 2009-11-12 |
20090282211 | Network On Chip With Partitions - Data processing with a network on chip (‘NOC’) that includes integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, including: organizing the network into partitions; assigning all IP blocks of a partition a partition identifier (‘partition ID’) that uniquely identifies for an IP block a particular partition in which the IP block is included; establishing one or more permissions tables associating partition IDs with sources and destinations of data communications on the NOC, each record in the permissions tables representing a restriction on data communications on the NOC; executing one or more applications on one or more of the partitions, including transmitting data communications messages among IP blocks and between IP blocks and memory, each data communications message including a partition ID of a sender of the data communications message; and controlling data communications among the partitions in dependence upon the permissions tables and the partition IDs. | 2009-11-12 |
20090282212 | SYSTEM FOR ENABLING ACCESS TO ADDITIONAL MEMORY AND STORAGE CAPACITY - An electronic device including a controller having a processor that works with a memory or a storage. The memory or storage has an additional partition that is prevented from being accessed by the processor until enabled with an access logic and a key associated with this partition. A user of the device upgrades it to access the additional partition by running the access logic in the device, being informed that an upgrade is permitted, determining if they wish the upgrade and, if so, then purchasing it, the key being transferred to the device from an external source, and the key being applied with the access logic to enable the partition. | 2009-11-12 |
20090282213 | SEMICONDUCTOR INTEGRATED CIRCUIT - A basic cell capable of a fixed operating frequency regardless of the configuration information, which is also capable of effectively utilizing the arithmetic logic circuit within the cell in a LSI semiconductor integrated circuit, is capable of dynamic changes in configuration information. The circuit has an input switch ISW connected to multiple data input nodes, an output switch OSW connected to multiple data output nodes, a first data path containing an arithmetic logic circuit ALU and a result storage flip-flop CFF0 between the input switch ISW and output switch OSW. The second data path containing a data transfer flip-flop between an input switch ISW and an output switch OSW, and the result storage flip-flop CFF stores the calculated result data from the arithmetic logic circuit ALU, and the data transfer flip-flop holds data input from any of the multiple data input nodes. | 2009-11-12 |
20090282214 | Network On Chip With Low Latency, High Bandwidth Application Messaging Interconnects That Abstract Hardware Inter-Thread Data Communications Into An Architected State of A Processor - Data processing on a network on chip (‘NOC’) that includes integrated processor (‘IP’) blocks, each of a plurality of the IP blocks including at least one computer processor, each such computer processor implementing a plurality of hardware threads of execution; low latency, high bandwidth application messaging interconnects; memory communications controllers; network interface controllers; and routers; each of the IP blocks adapted to a router through a separate one of the low latency, high bandwidth application messaging interconnects, a separate one of the memory communications controllers, and a separate one of the network interface controllers; each application messaging interconnect abstracting into an architected state of each processor, for manipulation by computer programs executing on the processor, hardware inter-thread communications among the hardware threads of execution; each memory communications controller controlling communication between an IP block and memory; each network interface controller controlling inter-IP block communications through routers. | 2009-11-12 |
20090282215 | MULTI-PROCESSOR SYSTEM AND MULTI-PROCESSING METHOD IN MULTI-PROCESSOR SYSTEM - Provided are a multi-processor system and a multi-processing method in the multi-processor system. The multi-processor system comprises a plurality of processors each including a data core and a processing core; and switches connecting the data core to the processing core in each of the processors as a combination of a data core-processing core pair. Therefore, the multi-processor system may be useful to remove any overhead for communications and make programming easy and simple. | 2009-11-12 |
20090282216 | HARDWARE ENGINE CONTROL APPARATUS - A hardware engine control apparatus includes: a plurality of hardware engines (HWEs) connected by a control bus, each of the hardware engines executing a series of different kinds of processing; a host control device that outputs control commands for controlling operation of the HWEs to a subordinate control device; and the subordinate control device that has a register, in which the control commands from the host control device is sequentially set, and outputs the control commands set in the register to the control bus at timing based on a clock signal. The HWEs operate according to the control commands output from the subordinate control device. | 2009-11-12 |
20090282217 | Horizontal Scaling of Stream Processing - A computer implemented method, data processing system, and computer program product for dynamically scheduling algorithms in a pipeline which operate on a stream of data. The illustrative embodiments determine a computational cost of each algorithm in a plurality of algorithms in a pipeline. The plurality of algorithms in the pipeline processes an incoming data stream in a first sequential algorithm order. The illustrative embodiments reorder the plurality of algorithms in the pipeline to form a second sequential algorithm order based on the computational cost of each algorithm. The plurality of algorithms may then be executed in the second sequential algorithm order. When the illustrative embodiments assign a spare processing unit to an algorithm at an end of the pipeline, the computational cost of each algorithm in the plurality of algorithms in the pipeline is redetermined. | 2009-11-12 |
20090282218 | Unsupervised Clustering of Multimedia Data Using a Large-Scale Matching System - A method and apparatus for clustering a plurality of data elements. The method comprises receiving a plurality of cluster elements, each cluster element containing at least a data element; generating a clustering score for each cluster element of the plurality of cluster elements versus all other cluster elements of the plurality of cluster elements using a computing device; determining a size of a diagonal matrix having a size corresponding to the number of the plurality of cluster elements; placing the clustering score in a diagonal matrix in storage one clustering score for each pair of cluster elements; creating a new cluster element for each two cluster elements in the diagonal matrix having a clustering score that exceeds a threshold; and storing generated new cluster elements in the storage. | 2009-11-12 |
20090282219 | METHOD FOR REDUCING PIN COUNTS AND MICROPROCESSOR USING THE SAME - The present invention relates to a microprocessor with reduced pin counts. The microprocessor transmits a higher bit address, a lower bit address and data via a common port so that a pin for transmitting the higher bit address is omitted. In an embodiment of the present invention, a new higher bit address latching signal is added in order to latch the higher bit address so that an original lower bit address latching signal and the higher bit address latching signal can respectively latch the lower bit address and the higher bit address. | 2009-11-12 |
20090282220 | Microprocessor with Compact Instruction Set Architecture - A re-encoded instruction set architecture (ISA) provides smaller bit-width instructions or a combination of smaller and larger bit-width instructions to improve instruction execution efficiency and reduce code footprint. The ISA can be re-encoded from a legacy ISA having larger bit-width instructions and can be used to unify one or more ISA extensions such as application specific ASEs. The re-encoded ISA maintains assembly-level compatibility with the ISA from which it is derived. In addition, the re-encoded ISA can have new and different types of additional instructions. | 2009-11-12 |
20090282221 | Preferential Dispatching Of Computer Program Instructions - A computer processor that includes a plurality of execution pipelines, each execution pipeline including a configuration of one or more execution units of the processor, each execution pipeline characterized by an execution pipeline type, each execution pipeline type determined according to the types of computer program instructions executed in each execution pipeline; a plurality of hardware threads of execution, each hardware thread including computer program instructions characterized by instruction types, each hardware thread including sequences of instructions of a same instruction type, the sequences interspersed with instructions of other types; and an instruction dispatcher capable of dispatching instructions preferentially during a predefined preference period from a preferred hardware thread to a particular execution pipeline in dependence upon whether the preferred hardware thread presents a sequence of instructions, ready for execution from the preferred hardware thread, of a type for execution in the particular execution pipeline. | 2009-11-12 |
20090282222 | Dynamic Virtual Software Pipelining On A Network On Chip - A NOC for dynamic virtual software pipelining including IP blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, the NOC also including: a computer software application segmented into stages, each stage comprising a flexibly configurable module of computer program instructions identified by a stage ID, each stage assigned to a thread of execution on an IP block; and each stage executing on a thread of execution on an IP block, including a first stage executing on an IP block, producing output data and sending by the first stage the produced output data to a second stage, the output data including control information for the next stage and payload data; and the second stage consuming the produced output data in dependence upon the control information. | 2009-11-12 |
20090282223 | DATA PROCESSING CIRCUIT - Provided is a data processing circuit. A control unit outputs an operation control signal and a memory control signal. A plurality of program memories each outputs a command in response to the memory control signal. A plurality of arithmetic sections each selectively performs any one of the commands from the plurality of program memories in response to the operation control signal. Operation modes of the data processing circuit can be flexibly changed according to operation environments. | 2009-11-12 |
20090282224 | CLIPPING A KNOWN RANGE OF INTEGER VALUES USING DESIRED CEILING AND FLOOR VALUES - An aspect of the present invention clips a sequence of data values within a known range (defined by a set of integer values) by a ceiling value and a floor value. In an embodiment, such a feature is obtained by first storing in each of a sequence of memory locations a respective value corresponding to each integer value, with a stored value in a memory location equaling the floor value if the memory location corresponds to an integer having a value less than the floor value, equaling the ceiling value if the memory location corresponds to an integer having a value greater than the ceiling value, and equaling the value of the corresponding integer otherwise. When a sequence of data values are thereafter received for clipping, the clipped value for each data value is obtained by merely retrieving a corresponding stored value from the corresponding location. | 2009-11-12 |
20090282225 | STORE QUEUE - Embodiments of the present invention provide a system which executes a load instruction or a store instruction. During operation the system receives a load instruction. The system then determines if an unrestricted entry or a restricted entry in a store queue contains data that satisfies the load instruction. If not, the system retrieves data for the load instruction from a cache. If so, the system conditionally forwards data from the unrestricted entry or the restricted entry by: (1) forwarding data from an unrestricted entry that contains the youngest store that satisfies the load instruction when any number of unrestricted or restricted entries contain data that satisfies the load instruction; (2) forwarding data from an unrestricted entry when only one restricted entry and no unrestricted entries contain data that satisfies the load instruction; and (3) deferring the load instruction by placing the load instruction in a deferred queue when two or more restricted entries and no unrestricted entries contain data that satisfies the load instruction. | 2009-11-12 |
20090282226 | Context Switching On A Network On Chip - A network on chip (‘NOC’) that includes IP blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to the network by an application messaging interconnect including an inbox and an outbox, one or more of the IP blocks including computer processors supporting a plurality of threads, the NOC also including an inbox and outbox controller configured to set pointers to the inbox and outbox, respectively, that identify valid message data for a current thread; and software running in the current thread that, upon a context switch to a new thread, is configured to: save the pointer values for the current thread, and reset the pointer values to identify valid message data for the new thread, where the inbox and outbox controller are further configured to retain the valid message data for the current thread in the boxes until context switches again to the current thread. | 2009-11-12 |
20090282227 | Monitoring Software Pipeline Performance On A Network On Chip - Software pipelining on a network on chip (‘NOC’), the NOC including integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers. Embodiments of the present invention include implementing a software pipeline on the NOC, including segmenting a computer software application into stages, each stage comprising a flexibly configurable module of computer program instructions identified by a stage ID; executing each stage of the software pipeline on a thread of execution on an IP block; monitoring software pipeline performance in real time; and reconfiguring the software pipeline, dynamically, in real time, and in dependence upon the monitored software pipeline performance. | 2009-11-12 |
20090282228 | Automated Selection of Computer Options - A user of a computer indicates a desired user interface behavior, and the computer automatically selects and sets options of programs and devices of the computer individually for each program to achieve that behavior. Alternatively, the user indicates a condition of the user, such as a specific motor or sensory disability, and the computer automatically adjusts its programs and devices to accommodate the user's needs. | 2009-11-12 |
20090282229 | CONDITIONAL INCLUSION OF RESOURCES IN A COMPUTER SYSTEM CONFIGURATION - A system for creating a device tree. First, it is determined whether more than one version of a resource for a data processing system exists in a resource location code array table. In response to determining that more than one version of the resource for the data processing system does exist in the resource location code array table, it is determined which version of the resource was installed in the data processing system. Then, a presence detection procedure is performed for the resource in the data processing system. Afterward, it is determined whether the resource is present in the data processing system. In response to determining that the resource is present in the data processing system, an entry is created in a device tree for the resource based on the determined version of the resource. Finally, the device tree is cached in firmware. | 2009-11-12 |
20090282230 | GENERATING A LOAD PROFILE FOR A COMPUTER SYSTEM - Some embodiments of the present invention provide a system that generates a load for a computer system in accordance with a predetermined load profile. During operation, the load for the computer system is generated by modulating the load using pulse-width modulation, wherein the load is periodically cycled between at least two different test load levels so that a moving window average of the modulated load follows the predetermined load profile. | 2009-11-12 |
20090282231 | Server computer, computer system, and file management method - A server computer which determines the configuration of a file for configuring a plurality of virtual computers respectively is configured to comprise: an OS/AP file evaluation criteria table which stores evaluation criteria for judging whether to split and manage a file required for the configuration of the virtual computers; a user data evaluation criteria TBL; and a verification and splitting unit which judges whether the file conforms to the evaluation criteria, and determines a part of a file judged to conform to the evaluation criteria as a first file stored as an entity and determines the remaining part of the file as a second file for referencing an entity of a predetermined destination storage. | 2009-11-12 |
20090282232 | MEMORY DEVICE BOOT COMMAND - Memory devices and methods facilitate initiation and termination of boot data output from a memory device through the use of received commands. For example, boot data output is initiated in response to a command indicative of a desire to enter a boot mode of operation. The initiate boot command may include a base command and a unique argument indicative of a desire to enter the boot mode of operation. Boot data output may be terminated by a received command indicative of a desire to terminate the boot mode of operation. The terminate boot command may include the same base command as the initiate boot command with any argument other than the argument indicative of a desire to enter the boot mode of operation. | 2009-11-12 |
20090282233 | TESTING AND ALERT DEVICE AND METHOD FOR POWER LEAKAGES - A testing and alert device for power leakages of a computer includes a basic input/output system (BIOS) chip located on a motherboard of the computer, a south bridge chip connected to the BIOS chip, and an alarm device controlled by the BIOS chip. The south bridge chip has a first general purpose input/output terminal capable of being coupled to a ground of an exterior power source. The BIOS chip is capable of detecting the input signal of the first general purpose input/output terminal of the south bridge chip and outputting an alarm command to initiate the alarming device when the input signal from the first general purpose input/output terminal is at a high level. | 2009-11-12 |
20090282234 | REMOTE CONNECTION BETWEEN INTERMEDIARY DEVICE AND COMPUTING DEVICE VIA CENTRAL AUTHORITY SOFTWARE - Upon an intermediary device on a network being turned on, controlling system software at the intermediary device is booted such that no public network address is ever assigned to the intermediary device. The intermediary device sends a boot message over the network to central authority software running on one or more first computing devices on the network. The central authority software in response sends messages over the network to the intermediary device and to a second computing device on the network to establish a private tunnel with one another. The intermediary device and the second computing device establish the private tunnel with one another over the network. The intermediary device then opens a remote connection to the second computing device through the private tunnel so that peripherals connected to the intermediary device as if they were directly connected to the second computing device. | 2009-11-12 |
20090282235 | METHOD, ELEMENT AND CIRCUIT BOARD FOR CONTROLLING SHUTDOWN OF ELECTRONIC DEVICE - The invention provides a method, an element and a circuit board for controlling an electronic device to be shut down. The method according to the invention includes the steps as follows. First, a power control signal is received, and the duration of the power control signal at a preset signal level is calculated. Then, whether the duration is greater than a threshold value is determined. If yes, an interrupt signal is generated and transmitted to a processing module of the electronic device to drive the processing module to set the preset mechanism of the electronic device according to the interrupt signal. | 2009-11-12 |
20090282236 | Method And Apparatuses For Establishing A Secure Channel Between A User Terminal And A SIP Server - A method of establishing a secure communication channel between a user terminal ( | 2009-11-12 |
20090282237 | HITLESS MANUAL CRYTOGRAPHIC KEY REFRESH IN SECURE PACKET NETWORKS - In a hitless manual cryptographic key refresh scheme, a state machine is independently maintained at each network node. The state machine includes a first state, a second state, and a third state. In the first state, which is the steady state, a current cryptographic key is used both for generating signatures for outgoing packets and for authenticating signatures of incoming packets. In the second state, which is entered when a new cryptographic key is provisioned, the old (i.e. formerly current) key is still used for generating signatures for outgoing packets, however one or, if necessary, both of the old key and the newly provisioned key is used for authenticating signatures of incoming packets. In the third state, the new key is used for generating signatures for outgoing packets and either one or both of the old key and new key are used for authenticating signatures of incoming packets. | 2009-11-12 |
20090282238 | Secure handoff in a wireless local area network - A system and method including computing keying information by a server for authentication of devices accessing a wireless local area network and forwarding the keying information by the server to access points included in a security domain of the wireless local area network, wherein one of the access points is associated with a mobile device are described. | 2009-11-12 |
20090282239 | SYSTEM, METHOD AND PROGRAM PRODUCT FOR CONSOLIDATED AUTHENTICATION - A first computer sends a request to the second computer to access the application. In response, the second computer determines that the user has not yet been authenticated to the application. In response, the second computer redirects the request to a third computer. In response, the third computer determines that the user has been authenticated to the third computer. In response, the third computer authenticates the user to the application. In response, the second computer returns a session key to the third computer for a session between the application and the user. The session has a scope of the second computer or the application but not a scope of a domain. In response to the authentication of the user to the second application and receipt by the third computer of the session key from the second computer for a session between the user and the second computer or the application, the third computer generates another session key with a scope of the domain and sends the domain-scope session key to the first computer. The first computer sends another request to the application with the domain-scope session key. | 2009-11-12 |
20090282240 | Secure Decentralized Storage System - A secure decentralized storage system provides scalable security by addressing the performance bottleneck of the security manager and the complexity issue of security administration in large-scale storage systems. The storage system includes: an application client for accessing a file system using a plurality of storage devices and transmitting a command to a storage device; a storage device for storing data and access control entries associated to the data, analyzing the command from the client and performing corresponding operations of the command; a metadata server for storing and managing metadata, such as location and length information of data and system configuration; and a security manager for storing and managing global access control entries and policies of the system and performing the access policy and privilege control according to the global access control entries and policies, such as changing the priority and inheritance rule of access control entries, adding and deleting the access control entries. | 2009-11-12 |
20090282241 | METHOD AND APPARATUS TO PROVIDE A USER PROFILE FOR USE WITH A SECURE CONTENT SERVICE - A secure content service available through a network comprising a user profile stored in a user profile store and a profile access controller to enforce access rights to the user profile, wherein the user profile is used to provide access rights to other content. | 2009-11-12 |