45th week of 2011 patent applcation highlights part 38 |
Patent application number | Title | Published |
20110275120 | Fusion Proteins With Cleavable Spacers and Uses Thereof - A polypeptide comprising a first protein domain, a second protein domain, and a dithiocyclopeptide spacer containing at least one protease cleavage site, wherein the dithiocyclopeptide is exogenous relative to the first or second protein domain, and wherein the first and second protein domains are operably linked by the dithiocyclopeptide. Also disclosed are methods of producing the polypeptide and delivering the protein domains into a cell. | 2011-11-10 |
20110275121 | Methods and Compositions for Production of Recombinant Protein in HBX-Expressing Mammalian Cells - The method of the invention provides for producing a heterologous protein in mammalian host cells having nucleic acid encoding Hepatitis B X protein and the heterologous protein, by growing mammalian host cells selected from the group consisting of HKB11, CHO, BHK21, C2C12, and HEK293 cells, by growing mammalian host cells in non-adherent suspension culture, or by growing mammalian host cells which contain nucleic acid providing exogenous X-box Binding Protein, XBP1s. The conditions should be such that HBx, exogenous XBP1s if present, and the heterologous protein are expressed by the mammalian cells. The invention includes compositions for carrying out the method. | 2011-11-10 |
20110275122 | THROMBOPOIETIC COMPOUNDS - The invention relates to the field of compounds, especially peptides or polypeptides, that have thrombopoietic activity. The peptides and polypeptides of the invention may be used to increase platelets or platelet precursors (e.g., megakaryocytes) in a mammal. | 2011-11-10 |
20110275123 | Compositions and methods for generating antibodies - The compositions and methods of the present invention comprise the efficient and effective presentation of antigens to the appropriate components of the immune system resulting in the production of species-specific antibodies in vitro. In general, these compositions comprise one or more antigenic components together with a colloidal metal, optionally combined with derivatized PEG (polyethylene glycol) or other agents. The invention also comprises methods and compositions for making such colloidal metal compositions. | 2011-11-10 |
20110275124 | Reagents for reversibly terminating primer extension - This invention relates to the field of nucleic acid chemistry, more specifically to the field of compositions of matter that comprise triphosphates of modified 2′-deoxynucleosides and oligonucleotides that are formed when these are appended to the 3′-end of a primer, wherein said modifications comprise NH | 2011-11-10 |
20110275125 | System and Method for Processing a Biological Sample - Systems and methods for processing a biological sample are provided herein. For example, the system can be configured to deaggregate/declump a sample before, during, and/or after sample preparation and/or sample analysis. For example, the system can include a deaggregation device/system in communication with, for example, a nucleic acid amplification process (e.g., an ePCR system). Various embodiments of the deaggregation device are provided herein. For example, in some embodiments, the deaggregation device can include a valve, a valve manifold, a conduit, a channel, or some combinations thereof. | 2011-11-10 |
20110275126 | Method for Producing Nucleic Acid Sample and Method for Producing Nucleic Acid Amplification Product Using the Same - Provided are a simple method for producing a nucleic acid sample that does not need to use high-risk chaotropic salt in large amounts, does not need to use a limited special carrier, and offers a superior level of safety; and a method for producing a nucleic acid amplification product using the same. With respect to a cell sample containing cells, by releasing nucleic acid complexes from the cells and bringing this treatment liquid into contact with a carrier, the nucleic acid complexes are held in the carrier. Further, in the presence of a dispersion medium, by applying heat treatment to the carrier, DNAs such as genomic DNA and mitochondrial DNA, and RNA are released. Thereby, a nucleic acid sample can be recovered. | 2011-11-10 |
20110275127 | Process for Producing Ethanol - A process for producing ethanol including a combination of biochemical and synthetic conversions results in high yield ethanol production with concurrent production of high value coproducts. An acetic acid intermediate is produced from carbohydrates, such as corn, using enzymatic milling and fermentation steps, followed by conversion of the acetic acid into ethanol using esterification and hydrogenation reactions. Coproducts can include corn oil, and high protein animal feed containing the biomass produced in the fermentation. | 2011-11-10 |
20110275128 | Use Of Whey For The Manufacture Of Erythritol - Erythritol is prepared from whey. Whey is treated to form lactose, the lactose is treated to form glucose and galactose, the glucose and galactose are separated, and then the glucose is treated to form erythritol. | 2011-11-10 |
20110275129 | Reduced by-product accumulation for improved production of isobutanol - The present invention relates to recombinant microorganisms comprising biosynthetic pathways and methods of using said recombinant microorganisms to produce various beneficial metabolites. In various aspects of the invention, the recombinant microorganisms may further comprise one or more modifications resulting in the reduction or elimination of 3 keto-acid (e.g., acetolactate and 2-aceto-2-hydroxybutyrate) and/or aldehyde-derived by-products. In various embodiments described herein, the recombinant microorganisms may be microorganisms of the | 2011-11-10 |
20110275130 | FERMENTATIVE GLYCEROL-FREE ETHANOL PRODUCTION - The present invention relates to a yeast cell, in particular a recombinant yeast cell, the cell lacking enzymatic activity needed for the NADH-dependent glycerol synthesis or the cell having a reduced enzymatic activity with respect to the NADH-dependent glycerol synthesis compared to its corresponding wild-type yeast cell, the cell comprising one or more heterologous nucleic acid sequences encoding an NAD+-dependent acetylating acetaldehyde dehydrogenase (EC 1.2.1.10) activity. The invention further relates to the use of a cell according to the invention in the preparation of ethanol. | 2011-11-10 |
20110275131 | METHODS OF PROCESSING ENSILED BIOMASS - The invention relates to methods of processing ensiled biomass for production of bioethanol or other fermentation products and, in particular, to methods that do not require expensive pretreatment (e.g. heat or chemical pretreatment). | 2011-11-10 |
20110275132 | PURIFICATION OF BACTERIAL ANTIGENS - Presented are methods of isolation of pili and pilus-like structures from Gram-positive bacteria including | 2011-11-10 |
20110275133 | Proteinaceous Digestates - A method of aiding the digestion of a proteinaceous material, the method comprising adding to a sample of proteinaceous raw material a composition comprising fruit, fruit waste or an enzyme derived therefrom. A digestate liquor obtained by said method is also described. | 2011-11-10 |
20110275134 | Arrestin Biosensor - The present invention relates to a novel biosensor. A resonance energy transfter (RET) biosensor comprising a beta(β)-arrestin tagged with a first and a second chromophore, wherein said first chromophore is a fluorophore and said second chromophore is a fluorophore or a bioluminophore is described. | 2011-11-10 |
20110275135 | Genetic elements, proteins, and associated methods including application of additional genetic information to gram (+) thermoacidophiles - Isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from | 2011-11-10 |
20110275136 | AMYLASE VARIANTS - The present invention relates to variants (mutants) of polypeptides, in particular Termamyl-like alpha-amylases, which variant has alpha-amylase activity and exhibits an alteration in at least one of the following properties relative to said parent alpha-amylase: substrate specificity, substrate binding, substrate cleavage pattern, thermal stability, pH/activity profile, pH/stability profile, stability towards oxidation, Ca | 2011-11-10 |
20110275137 | IMPROVING AGENT FOR NEUROPATHIC PAIN - An object of the present invention is to provide a substance which can be used as an active ingredient for improving neuropathic pain having a novel mechanism of action different from those of currently available agents and, therefore, provide an improving agent for neuropathic pain which rarely interacts with currently available agents and also does not have adverse reactions similar to those of currently available agents. An improving agent for neuropathic pain due to a hyperalgesic response of the present invention as a means for resolution is characterized by comprising, as an active ingredient, a lyase (an elimination enzyme) which has an activity of degrading a chondroitin sulfate chain of a chondroitin sulfate proteoglycan, and is typified by chondroitinase ABC which selectively removes chondroitin sulfate and dermatan sulfate of a proteoglycan. | 2011-11-10 |
20110275138 | KETOSE 3-EPIMERASE, ITS PREPARATION AND USES - An object of the present invention is to provide a novel ketose 3-epimerase, a process for producing the same, a DNA encoding the enzyme, a recombinant DNA and transformant comprising the DNA, and a process for producing a ketose by using the enzyme. The present invention solves the above objects by providing a ketose 3-epimerase which is obtainable from a microorganism of the genus | 2011-11-10 |
20110275139 | RECOMBINANT VACCINIA VIRUS HAVING HEPATITIS C VIRUS GENE - Provided is a recombinant virus which is efficacious in preventing the onset of hepatitis C infection and has a high safety. Also provided is a vaccine for hepatitis C virus which contains the recombinant virus. A recombinant vaccinia virus which can express hepatitis C virus gene. The hepatitis C virus vaccine as described above contains the recombinant virus as described above. | 2011-11-10 |
20110275140 | APPARATUS AND METHODS FOR PRODUCTION OF BIODIESEL - A photobioreactor includes a cultivation zone configured to contain a liquid culture medium and facilitate growth of a microalgae biomass, a plurality of parallel edge-lit light transmitting devices mounted within the cultivation zone, and a collection zone oriented in relation to the cultivation zone such that at least a portion of the liquid culture medium and microalgae from the cultivation zone may be periodically harvested. Methods for illuminating algae, for dissolving materials into an algae medium, for extracting oil from algae, and for producing biodiesel from algal oil are also provided. | 2011-11-10 |
20110275141 | ANAERBOIC DIGESTER AND A METHOD FOR TREATING SLUDGE IN THE DIGESTOR - A method for treating sludge in an anaerobic digester includes the steps of providing a pit in the ground that is lined with a seal and then forming cells in the pit into which a mixture of vegetal waste and sludge that has optionally undergone a pre-acidification stage is provided. After a sealing cover is placed over the digester, an optional trigger is provided that enhances formation of biogas that is recovered from the digester to be utilized for the production of energy and the digested mixture recovered at the end of the use of the digester is utilized as an organic fertilizer. | 2011-11-10 |
20110275142 | Dandelion processes, compositions and products - Dandelion processes, compositions and products are provided. One process is a method of preparing dandelion that utilizes a species of a | 2011-11-10 |
20110275143 | Microfluidic Bubble Logic Devices - Fluid-based no-moving part logic devices are constructed from complex sequences of micro- and nanofluidic channels, on-demand bubble/droplet modulators and generators for programming the devices, and micro- and nanofluidic droplet/bubble memory elements for storage and retrieval of biological or chemical elements. The input sequence of bubbles/droplets encodes information, with the output being another sequence of bubbles/droplets or on-chip chemical synthesis. For performing a set of reactions/tasks or process control, the modulators can be used to program the device by producing a precisely timed sequence of bubbles/droplets, resulting in a cascade of logic operations within the micro- or nanofluidic channel sequence, utilizing the generated droplets/bubbles as a control. The devices are based on the principle of minimum energy interfaces formed between the two fluid phases enclosed inside precise channel geometries. Various devices, including logic gates, non-volatile bistable memory, ring oscillators, bubble synchronizers, analysis chips, and printers have been designed. | 2011-11-10 |
20110275144 | DEVICES AND METHODS FOR DUAL EXCITATION RAMAN SPECTROSCOPY - Spectroscopic analysis systems and methods for analyzing samples are disclosed. An analysis system may contain an electromagnetic radiation source to provide radiation, a spectroscopic analysis chamber to perform a coherent Raman spectroscopy (e.g., stimulated Raman or coherent anti-Stokes Raman spectroscopy), and a radiation detector to detect radiation based on the spectroscopy. The chamber may have a resonant cavity to contain a sample for analysis, at least one window to the cavity to transmit the first radiation into the cavity and to transmit a second radiation out, a plurality of reflectors affixed to a housing of the cavity to reflect radiation of a predetermined frequency, the plurality of reflectors separated by a distance that is sufficient to resonate the radiation. The spectroscopic analysis system may be coupled with a nucleic acid sequencing system to receive a single nucleic acid derivative in solution and identify the derivative to sequence the nucleic acid. | 2011-11-10 |
20110275145 | MANUFACTURING METHOD AND STRUCTURE OF CELL CRYOPRESERVATION TUBE - Manufacturing method of cell cryopreservation tube comprises the steps of providing a metal tubule having an inside wall and an outside wall. Smoothing the inside wall of the metal tubule thereby forming a smooth surface on the inside wall, and the roughness of the smooth surface is named the first roughness. Roughening the outside wall of the metal tubule thereby forming a rough surface on the outside wall, and the roughness of the rough surface is called the second roughness. The magnitude of the second roughness is greater than the first roughness. | 2011-11-10 |
20110275146 | FUSION PROTEINS COMPRISING DP-178 AND OTHER VIRAL FUSION INHIBITOR PEPTIDES USEFUL FOR TREATING AIDS - The present invention relates to fusion peptides which exhibit potent anti-retroviral activity. The fusion peptides of the invention comprise a macromolecular carrier group fused to a gp41-derived DP178 (SEQ ID NO:1) peptide corresponding to amino acids 638 to 673 of the HIV-1 | 2011-11-10 |
20110275147 | HYBRIDOMA PRODUCING ANTIBODIES TO LAWSONIA INTRACELLULARIS - The present invention relates to the field of animal health and in particular to | 2011-11-10 |
20110275148 | HYBRIDOMA PRODUCING ANTIBODIES TO LAWSONIA INTRACELLULARIS - The present invention relates to the field of animal health and in particular to | 2011-11-10 |
20110275149 | HYBRIDOMA PRODUCING ANTIBODIES TO LAWSONIA INTRACELLULARIS - The present invention relates to the field of animal health and in particular to | 2011-11-10 |
20110275150 | COMPSTATIN ANALOGS WITH IMPROVED ACTIVITY - Compounds comprising peptides and peptidomimetics capable of binding the C3 protein and inhibiting complement activation are disclosed. These compounds display improved complement activation-inhibitory activity as compared with currently available compounds. Isolated nucleic acid molecules encoding the peptides are also disclosed. | 2011-11-10 |
20110275151 | METHODS AND COMPOSITIONS FOR REPAIR OF CARTILAGE USING AN IN VIVO BIOREACTOR - Methods and compositions for the biological repair of cartilage using a hybrid construct combining both an inert structure and living core are described. The inert structure is intended to act not only as a delivery system to feed and grow a living core component, but also as an inducer of cell differentiation. The inert structure comprises concentric internal and external and inflatable/expandable balloon-like bio-polymers. The living core comprises the cell-matrix construct comprised of HDFs, for example, seeded in a scaffold. The method comprises surgically removing a damaged cartilage from a patient and inserting the hybrid construct into the cavity generated after the foregoing surgical intervention. The balloons of the inert structure are successively inflated within the target area, such as a joint, for example. Also disclosed herein are methods for growing and differentiating human fibroblasts into chondrocyte-like cells via mechanical strain. | 2011-11-10 |
20110275152 | Method of in vitro differentiation of neural stem cells, motor neurons and dopamine neurons from primate embryonic stem cells - A method of differentiating embryonic stem cells into neural and motor cells is disclosed. In one embodiment, the invention comprises culturing a population of cells comprising a majority of cells that are characterized by an early rosette morphology and are Sox1 | 2011-11-10 |
20110275153 | CRYOGENIC STORAGE DEVICE - A cryopreservation device for storing reproductive biological material is provided. The device comprises an elongate first member includes an elongate first member extending between a distal end and a proximal end, a first bulge portion disposed around a circumference of the first member, and a trough defined within the first member, the trough being configured to receive a reproductive biological sample thereon. A second member includes a second member with a lumen defined therethrough. The second member is configured to slide over the first member and the inner diameter of the second member is similar to an outer diameter of the bulge portion to form a seal between the first and second members. | 2011-11-10 |
20110275154 | DERIVATIZED PEPTIDE-CONJUGATED (METH) ACRYLATE CELL CULTURE SURFACE AND METHODS OF MAKING - A synthetic cell culture surface, prepared from a mixture of at least three (meth)acrylate monomers where one of the monomers has an N-hydroxysuccinimide moiety is provided, which supports the growth of cells including undifferentiated human embryonic stem cells in defined media. Methods for preparing the cell culture surface is also provided. | 2011-11-10 |
20110275155 | ENTRAPPED STEM CELLS AND USES THEREOF - The invention relates to the stem cells, embryonic stem cells in particular. It has been found that, when these stem cells are entrapped such that their proliferation is inhibited, they produce material which inhibits the proliferation of other, non-entrapped cells, including stem cells and neoplastic and/or hyperproliferative, but otherwise normal cells. It has also been found that entrapped cancer cells will produce material which inhibits the proliferation of stem cells. Further, it has been found that the entrapment of the stem cells inhibits their differentiation and thus the entrapment process can serve as a long-term storage device for maintaining the undifferentiated state of at least a portion of the entrapped cells. | 2011-11-10 |
20110275156 | Delivery of DNA or RNA Via Gap Junctions from Host Cells to Target Cells and a Cell-Based Delivery System for Antisense or siRNA - A method of delivering an oligonucleotide or a plasmid expressing an oligonucleotide into a target cell comprises introducing an oligonucleotide into a donor cell, particularly a stem cell, and contacting the target cell with the donor cell under conditions permitting the donor cell to form a gap junction with the target cell, whereby the oligonucleotide or a product of the oligonucleotide is delivered into the target cell from the donor cell. | 2011-11-10 |
20110275157 | COMPOSITION FOR REPROGRAMMING SOMATIC CELLS TO GENERATE INDUCED PLURIPOTENT STEM CELLS, COMPRISING Bmi1 AND LOW MOLECULAR WEIGHT SUBSTANCE, AND METHOD FOR GENERATING INDUCED PLURIPOTENT STEM CELLS USING THE SAME - Provided is a composition for reprogramming somatic cells to generate embryonic stem cell-like cells, comprising: a) a Bmi1 (B cell-specific Moloney murine leukemia virus integration site 1) protein or a nucleic acid molecule encoding the Bmi1 protein; and b) at least one low molecular weight substance selected from the group consisting of a set of a MEK/ERK (mitogen-activated protein kinase/extracellular regulated kinase) inhibitor and a GSK (glycogen synthase kinase) inhibitor, a set of a G9a HMTase (G9a histone methyltransferase) inhibitor and a DMNT (DNA methyltransferase) inhibitor, and a histone deacetylase inhibitor. Also, a method is provided for reprogramming somatic cells to generate embryonic stem cell-like cells using the composition. In addition to reducing the number of the reprogramming factors conventionally needed, the composition and method allow the generation of pluripotent embryonic stem cell-like cells which have high potential in the cell therapy of various diseases. | 2011-11-10 |
20110275158 | Method of Modifying Target Region in Host DNA and Selectable Marker Cassette - A method of modifying a target region in a host DNA using a donor DNA: wherein the donor DNA having regions homologous to a 5′-side region outside of the target region in the host DNA, a 3′-side region outside of the target region in the host DNA and a first homologous recombination region inside of the target region in the host DNA, respectively, in this order, and further having a first selectable marker gene, an expression-inducing promoter and a second selectable marker gene expressed under the control of the expression-inducing promoter between the region homologous to the 3′-side region and the region homologous to the first homologous recombination region; which method has the steps of: a first step of performing homologous recombination between the donor DNA and the host DNA at the regions of the 5′-side region and the first homologous recombination region, to conduct selection of a host integrated with the donor DNA based on expression of the first selectable marker gene; and a second step of performing homologous recombination, within the host DNA integrated with the donor DNA by the first step, between two regions of the 3′-side region derived from the host DNA and the 3′-side region derived from the donor DNA, to conduct selection of a host whose target region is modified based on expression of the second selectable marker gene under an expression-inducing condition for the expression-inducing promoter; and a selectable marker cassette for use in the method. | 2011-11-10 |
20110275159 | CHEMICAL INDICATOR COMPOSITION, INDICATORS AND METHODS - A chemical indicator composition comprising a bismuth (III) compound selected from the group consisting of bismuth (III) oxide and a bismuth (III) compound comprising at least one organic group which includes 2 to 20 carbon atoms; elemental sulfur; and a compound which makes the composition alkaline when exposed to water vapor at an elevated temperature; a chemical indicator composition comprising a bismuth (III) compound; elemental sulfur; a compound which makes the composition alkaline when exposed to water vapor at an elevated temperature; and at least one acid other than any acid present in the bismuth (III) compound; a chemical indicator comprising a substrate and the composition coated on at least a portion of a major surface of the substrate; methods of making the chemical indicator; and methods of using the chemical indicator are disclosed. | 2011-11-10 |
20110275160 | MICROFLUIDIC SYSTEMS AND CONTROL METHODS - The systems and methods disclosed herein include a microfluidic system, comprising a pneumatic manifold having a plurality of apertures, and a chip manifold having channels disposed therein for routing pneumatic signals from respective ones of the apertures to a plurality of valves in a microfluidic chip, wherein the channels route the pneumatic signals in accordance with a configuration of the plurality of valves in the microfluidic chip. | 2011-11-10 |
20110275161 | METHOD OF DETECTING NERVE AGENTS USING NOVEL ASSAY AGENTS - The teachings provided herein are directed to compounds and methods for detecting nerve agents using rhodamine-derived detection compounds. A rhodamine-derived detection compound for nerve agents can include any rhodamine derivative that can bind to a nerve agent and produce a detectable signal for detection of the nerve agent. In some embodiments, the rhodamine-derived detection compound comprises rhodamine B-hydroxamate and the nerve agent can be detected in amounts as low as about 10 ppm. | 2011-11-10 |
20110275162 | ASSAY READER OPERABLE TO SCAN A TEST STRIP - Low-cost assay test strip readers are disclosed. Such readers enable creation of profiles of analyte reactions detected on an assay test strip utilizing a simple detector fixedly mounted to a body of the reader. The detector may be a single detector, such as a photodetector, which detects an optical signal at a single point. The assay test strip is inserted and/or removed from the test strip reader and the detector detects the optical elements of the strip during such insertion and/or removal. The movement of the test strip with respect to the body enables the detector to scan a length of the test strip, such that a one-dimensional profile of the optical signals can be generated. The reader may convert the detected profile into a displayable indication of analyte concentrations for diagnostic purposes. Moving the test strip relative to an array of detectors enables creation of a two-dimensional profile. | 2011-11-10 |
20110275163 | Zr-SUBSTITUTED BaTiO3 FILMS - The use of a monolayer or partial monolayer sequencing process, such as atomic layer deposition (ALD), to form a zirconium substituted layer of barium titanium oxide (BaTiO | 2011-11-10 |
20110275164 | COMPOSITION AND METHOD FOR RECYCLING SEMICONDUCTOR WAFERS HAVING LOW-K DIELECTRIC MATERIALS THEREON - A removal composition and process for removing low-k dielectric material, etch stop material, and/or metal stack material from a rejected microelectronic device structure having same thereon. The removal composition includes hydrofluoric acid. The composition achieves at least partial removal of the material(s) from the surface of the microelectronic device structure having same thereon, for recycling and/or reuse of said structure, without damage to the underlying polysilicon or bare silicon layer employed in the semiconductor architecture. | 2011-11-10 |
20110275165 | THERMOELECTRIC CONVERSION MODULE AND METHOD OF RESTORING THE SAME - A thermoelectric conversion module includes a pair of heat transfer plates, p-type semiconductor blocks and n-type semiconductor blocks arranged between the heat transfer plates, and terminal electrodes formed respectively on inner surfaces of the heat transfer plates and connecting the semiconductor blocks in series. The heat transfer plates include holes reaching from an outer surface to the terminal electrodes, and grooves each formed between the terminal electrodes and communicating between the adjacent holes. If a disconnection occurs, for example, a pin of a tester is brought into contact with the terminal electrode via the hole to specify a disconnected portion, and the terminal electrodes are electrically connected by injecting conductive paste into the holes in the disconnected portion as well as the groove. | 2011-11-10 |
20110275166 | SYSTEMS AND METHODS FOR THIN-FILM DEPOSITION OF METAL OXIDES USING EXCITED NITROGEN-OXYGEN SPECIES - The present invention relates to a process and system for depositing a thin film onto a substrate. One aspect of the invention is depositing a thin film metal oxide layer using atomic layer deposition (ALD). | 2011-11-10 |
20110275167 | Endpoint Method Using Peak Location Of Modified Spectra - A method of optically monitoring a substrate during polishing includes receiving an identification of a selected spectral feature and a characteristic of the selected spectral feature to monitor during polishing, measuring a first spectrum from the substrate during polishing, the first spectrum measured within an initial time following initiation of polishing, measuring a sequence of second spectra from the substrate during polishing, the sequence of second spectra measured after the initial time, for each second spectrum in the sequence of second spectra, removing the first spectrum from the second spectrum to generate a sequence of modified third spectra, determining a value of a characteristic of the selected spectral feature for each third spectrum in the sequence of third spectra to generate a sequence of values for the characteristic, and determining a polishing endpoint or an adjustment for a polishing rate based on the sequence of values. | 2011-11-10 |
20110275168 | SINGLE STEP CMP FOR POLISHING THREE OR MORE LAYER FILM STACKS - A one-step CMP process for polishing three or more layer film stacks on a wafer having a multilayer film stack thereon including a silicon nitride (SiNx) layer on its semiconductor surface, and a silicon oxide layer on the SiNx layer, wherein trench access vias extend through the silicon oxide layer and SiNx layer to trenches formed into the semiconductor surface, and wherein a polysilicon layer fills the trench access vias, fills the trenches, and is on the silicon oxide layer. CMP polishes the multilayer film stack with a slurry including slurry particles including at least one of silica and ceria. The CMP provides a removal rate (RR) for the polysilicon layer>a RR for the silicon oxide layer>a RR for the SiNx layer. The CMP process is continued to remove the polysilicon layer, silicon oxide layer and a portion of the SiNx layer to stop on the SiNx layer. Optical endpointing during CMP can provide a predetermined remaining thickness range for the SiNx layer. | 2011-11-10 |
20110275169 | SEMICONDUCTOR NANOCRYSTAL PROBES FOR BIOLOGICAL APPLICATIONS AND PROCESS FOR MAKING AND USING SUCH PROBES - A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents, having a first portion linked to the one or more semiconductor nanocrystals and a second portion capable of linking to one or more affinity molecules. One or more semiconductor nanocrystal compounds are linked to one or more affinity molecules to form a semiconductor nanocrystal probe capable of bonding with one or more detectable substances in a material being analyzed, and capable of, in response to exposure to a first energy, providing a second energy. Also described are processes for respectively: making the semiconductor nanocrystal compound; making the semiconductor nanocrystal probe; and treating materials with the probe. | 2011-11-10 |
20110275170 | SYSTEM FOR CONCURRENT TEST OF SEMICONDUCTOR DEVICES - A tool to aid a test engineer in creating a concurrent test plan. The tool may quickly map test system resources to specific pins to satisfy the requirements of a concurrent test. The tool may project test time when such a mapping is possible. When a mapping is not possible, the tool may inform its user, including making suggestions of additional resources that could allow the test system to perform the test or suggestions for other variations in input parameters that would allow a mapping. The tool employs an assignment process in which groups of associated pins are identified, along with associated resource requirements for each group. Groups of test system resources that collectively fulfill a higher level requirement are identified and the assignment is made by mapping resource sets to resource groups, using ordering and matching heuristics to reduce processing time. | 2011-11-10 |
20110275171 | Method of Wafer Level Purifying Light Color Emitting from a Light Emitting Semiconductor Wafer - A method of wafer level purifying light color of a LED semiconsuctor is disclosed. After a LED wafer is fabricated, multi-transparent films formed of first layer and a second layer alternatively until reaching a predetermined number deposited by e-gun deposition with an aid of ion plasma beam. The first layer is formed of an oxide layer and the second layer is formed of a metal oxide layer. The two materials, one has a high index of refraction and the other has a low index of refraction. The total multi-transparent films are about 80 to 120 layer which can narrow wave width about a central wavelength. | 2011-11-10 |
20110275172 | Method of manufacturing semiconductor light-emitting device - A method of manufacturing a semiconductor light-emitting device which includes the steps of forming a plurality of light-emitting device sections ( | 2011-11-10 |
20110275173 | ISOLATION BY IMPLANTATION IN LED ARRAY MANUFACTURING - An improved method of creating LED arrays is disclosed. A p-type layer, multi-quantum well and n-type layer are disposed on a substrate. The device is then etched to expose portions of the n-type layer. To create the necessary electrical isolation between adjacent LEDs, an ion implantation is performed to create a non-conductive implanted region. In some embodiments, an implanted region extends through the p-type layer, MQW and n-type layer. In another embodiment, a first implanted region is created in the n-type layer. In addition, a second implanted region is created in the p-type layer and multi-quantum well immediately adjacent to etched n-type layer. In some embodiments, the ion implantation is done perpendicular to the substrate. In other embodiments, the implant is performed at an angle. | 2011-11-10 |
20110275174 | Solid state energy conversion device - A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. A first and a second Ohmic contact are applied to the first and the second doped regions of the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device to produce electromagnetic radiation upon the application of electrical power to the first and second Ohmic contacts. In another embodiment, the solid state energy conversion device operates as a photovoltaic device to produce electrical power between the first and second Ohmic contacts upon the application of electromagnetic radiation. | 2011-11-10 |
20110275175 | Light Induced Plating of Metals on Silicon Photovoltaic Cells - A method and composition for plating metal contacts on photovoltaic solar cells is described. The cell is immersed in an aqueous bath containing platable metal ions and a solubilizing agent for aluminum or aluminum alloy ions from the back side of the solar cell. The cell is then exposed to light, causing the two sides of the cell to become oppositely charged. The metal ions are plated without requiring an external electrical contact. | 2011-11-10 |
20110275176 | Method of Assembly and Assembly Thus Made - An assembly ( | 2011-11-10 |
20110275177 | SEMICONDUCTOR PACKAGE HAVING INK-JET TYPE DAM AND METHOD OF MANUFACTURING THE SAME - A semiconductor package includes a substrate which includes a chip mounting unit disposed on a first surface thereof and a pad forming unit disposed on an outer region of the chip mounting unit. The semiconductor package further includes a plurality of pads disposed on the pad forming unit of the substrate, a semiconductor chip disposed on the chip mounting unit of the substrate, a dam disposed on the first surface of the substrate between the semiconductor chip and the pad forming unit, and wherein the dam separates at least a portion of the pads from the semiconductor chip. In addition, the semiconductor package further includes an underfill material disposed between an active surface of the semiconductor chip and the first surface of the substrate and wherein an upper surface of the dam is rounded due to surface tension. | 2011-11-10 |
20110275178 | PATTERNED CONTACT - A chip having at least one electrical contact having a first end proximate to the chip and a second end removed from the chip, the second end including a pattern configured to facilitate penetration of the at least one contact into a malleable contact on another chip, the pattern comprising a non-planar surface having a perimeter and a surface area, the surface area being larger than a planar surface of an identical perimeter. | 2011-11-10 |
20110275179 | PROTECTIVE TAPE JOINING METHOD AND PROTECTIVE TAPE USED THEREFOR - Provided is an improved method of joining a protective tape having one object to suppress generation of bending of a semiconductor wafer after a back-grinding process. The protective tape is supplied toward the semiconductor wafer suction-held on a chuck table, and an intermediate sheet is supplied along an upper side of the protective tape. Then, the intermediate sheet is interposed between a joining member and the protective tape along a surface of a base material in the protective tape so as to be movable. Under this state, the joining member and the semiconductor wafer move relative to each other in a horizontal direction, whereby the protective tape is joined to a surface of the semiconductor wafer. | 2011-11-10 |
20110275180 | METHOD OF MAKING A SEMICONDUCTOR CHIP ASSEMBLY WITH A POST/BASE HEAT SPREADER WITH A THERMAL VIA - A method of making a semiconductor chip assembly includes providing a post, a base, a support layer and an underlayer, wherein the post extends above the base and the support layer is sandwiched between the base and the underlayer, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a heat spreader that includes the post, the base, the underlayer and a thermal via that extends from the base through the support layer to the underlayer, then mounting a semiconductor device on the post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader. | 2011-11-10 |
20110275181 | SEMICONDUCTOR PACKAGE HAVING AN ANTENNA WITH REDUCED AREA AND METHOD FOR FABRICATING THE SAME - A semiconductor package includes an electromagnetic shielding member for shielding electromagnetic waves. An antenna is disposed on an upper face of the electromagnetic shielding member and includes an antenna part with a plurality of conductive particles electrically connected with each other and an insulation part disposed on the upper face of the electromagnetic shielding member and insulating the antenna part. Ball lands are disposed on the electromagnetic shielding member and are electrically connected with the antenna part. A Radio Frequency Identification (RFID) chip is electrically connected to the ball lands. | 2011-11-10 |
20110275182 | STACKED NON-VOLATILE MEMORY WITH SILICON CARBIDE-BASED AMORPHOUS SILICON THIN FILM TRANSISTORS - A stacked non-volatile memory device uses amorphous silicon based thin film transistors stacked vertically. Each layer of transistors or cells is formed from a deposited a-Si channel region layer having a predetermined concentration of carbon to form a carbon rich silicon film or silicon carbide film, depending on the carbon content. The dielectric stack is formed over the channel region layer. In one embodiment, the dielectric stack is an ONO structure. The control gate is formed over the dielectric stack. This structure is repeated vertically to form the stacked structure. In one embodiment, the carbon content of the channel region layer is reduced for each subsequently formed layer. | 2011-11-10 |
20110275183 | Enhancement Mode III-Nitride FET - A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device. The gate electrode can be a schottky contact or an insulated metal contact. Two gate electrodes can be provided to form a bi-directional switch with nominally off characteristics. The recesses formed with the gate electrode can have sloped sides. The gate electrodes can be formed in a number of geometries in conjunction with current carrying electrodes of the device. | 2011-11-10 |
20110275184 | Semiconductor Device - A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode. | 2011-11-10 |
20110275185 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH OFFSET SIDEWALL STRUCTURE - A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. An N-type impurity such as arsenic is ion implanted to a relatively low concentration in the surface of a silicon substrate ( | 2011-11-10 |
20110275186 | FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION - Techniques are disclosed herein for applying different process steps to single-level cell (SLC) blocks in a memory array than to multi-level cell (MLC) blocks such that the SLC blocks will have high endurance and the MLC blocks will have high reliability. In some aspects, different doping is used in the MLC blocks than the SLC blocks. In some aspects, different isolation is used in the MLC blocks than the SLC blocks. Techniques are disclosed that apply different read parameters depending on how many times a block has been programmed/erased. Therefore, blocks that have been cycled many times are read using different parameters than blocks that have been cycled fewer times. | 2011-11-10 |
20110275187 | METHOD FOR FORMING A VERTICAL MOS TRANSISTOR - A method is used to form a vertical MOS transistor. The method utilizes a semiconductor layer. An opening is etched in the semiconductor layer. A gate dielectric is formed in the opening that has a vertical portion that extends to a top surface of the first semiconductor layer. A gate is formed in the opening having a major portion laterally adjacent to the vertical portion of the gate dielectric and an overhang portion that extends laterally over the vertical portion of the gate dielectric. An implant is performed to form a source region at the top surface of the semiconductor layer while the overhang portion is present. | 2011-11-10 |
20110275188 | SEMICONDUCTOR DEVICE HAVING A BURIED GATE THAT CAN REALIZE A REDUCTION IN GATE-INDUCED DRAIN LEAKAGE (GIDL) AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device having a buried gate that can realize a reduction in gate-induced drain leakage is presented. The semiconductor device includes a semiconductor substrate, a buried gate, and a barrier layer. The semiconductor substrate has a groove. The buried gate is formed in a lower portion of the groove and has a lower portion wider than an upper portion. The barrier layer is formed on sidewalls of the upper portion of the buried gate. | 2011-11-10 |
20110275189 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - In one aspect of the present invention, a semiconductor device may include a semiconductor substrate; an element isolation region provided in the semiconductor substrate and having an oxide layer and an oxidant-diffusion prevention layer provided on the oxide layer; a gate dielectric film provided on the semiconductor substrate and the oxidant-diffusion prevention layer; and a gate electrode provided on the gate dielectric film. | 2011-11-10 |
20110275190 | METHOD OF FORMING AN INSULATION STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform. | 2011-11-10 |
20110275191 | Method of Manufacturing Semiconductor Device - A method of forming a semiconductor device is provided, including a step of forming a layer which absorbs light over one face of a first substrate, a step of providing a second substrate over the layer which absorbs light, a step of providing a mask to oppose the other face of the first substrate, and a step of transferring the part of the layer which absorbs light to the second substrate by irradiating the layer which absorbs light with a laser beam through the mask. | 2011-11-10 |
20110275192 | FUSION BONDING PROCESS AND STRUCTURE FOR FABRICATING SILICON-ON-INSULATION (SOI) SEMICONDUCTOR DEVICES - A method of fabricating a semiconductor-on-insulator device including: providing a first semiconductor wafer having an about 500 angstrom thick oxide layer thereover; etching the first semiconductor wafer to raise a pattern therein; doping the raised pattern of the first semiconductor wafer through the about 500 angstrom thick oxide layer; providing a second semiconductor wafer having an oxide thereover; and, bonding the first semiconductor wafer oxide to the second semiconductor wafer oxide at an elevated temperature. | 2011-11-10 |
20110275193 | METHOD AND APPARATUS FOR DIVIDING THIN FILM DEVICE INTO SEPARATE CELLS - A method and apparatus for dividing a thin film device having a first layer which is a lower electrode layer, a second layer which is an active layer and a third layer which is an upper electrode layer, the layers each being continuous over the device, into separate cells which are electrically interconnected in series. The dividing of the cells and the electrical connection between adjacent cells are carried out in a single pass of a process head across the device, the process head performing the following steps in the single pass: a) making a first cut through the first, second and third layers; b) making a second cut through the second and third layers, the second cut being adjacent to the first cut; c) making a third cut through the third layer the third cut being adjacent to the second cut and on the opposite side of the second cut to the first cut; d) using a first ink jet print head to deposit a non-conducting material into the first cut; and e) using a second ink jet print head to apply conducting material to bridge the non-conducting material in the first cut and either fully or partially fill the second cut such to form an electrical connection between the first layer and the third layer, wherein step (a) precedes step (d), step (d) precedes step (e) and step (b) precedes step (e), (otherwise the steps may be carried out in any order in the single pass of the process head across the device). The thin film device may be a solar panel, a lighting panel or a battery. | 2011-11-10 |
20110275194 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing semiconductor device includes the following steps. First, a carrier substrate and a plurality of pieced segments of wafer are provided. Each of the pieced segments of wafer has an active surface and a back surface on opposite sides thereof. Further, there is at least a bonding pad disposed on the active surface. Next, an adhering layer is formed between the carrier substrate and the active surfaces of the pieced segments of wafer, so as to make the pieced segments of wafer adhere to the carrier substrate. Next, a through silicon via is formed in each of the pieced segments of wafer to electrically connect to the bonding pad correspondingly. Then, the pieced segments of wafer are separated from the carrier substrate. | 2011-11-10 |
20110275195 | METHOD OF TREATING A SEMICONDUCTOR DEVICE - A method of treating a semiconductor device wherein there is provided a semiconductor device, the semiconductor device being at least in part chemically bonded to an undesired chemical species. The semiconductor device is subjected to light of a wavelength sufficient to cleave at least some of the chemical bonds between the semiconductor device and the undesired chemical species, and the semiconductor device is exposed to a source of a desired chemical species, such that the semiconductor device becomes at least in part chemically bonded to the desired chemical species. | 2011-11-10 |
20110275196 | Thermal Evaporation Sources with Separate Crucible for Holding the Evaporant Material - One aspect of the invention comprises a thermal evaporation source comprising an evaporant chamber, a heater for providing heat to the evaporation chamber; and a crucible in thermal communication with the evaporation chamber for containing a volume of evaporant. The evaporant chamber comprises a first material of construction, and the crucible comprises a second material of construction different from the first material of construction and having a lesser porosity with respect to the evaporant than the first material of construction. For example, for a copper evaporant, the evaporant chamber may comprise a sintered material, such as sintered graphite, and the crucible may comprise a pyrolytic material, such as pyrolytic graphite or pyrolytic boron nitride. | 2011-11-10 |
20110275197 | SEMICONDUCTOR MEMORY DEVICE, METHOD OF FORMING THE SAME, AND MEMORY SYSTEM - A method of forming a semiconductor memory device, a semiconductor memory device, and a memory system, the method including forming a thin film structure on a semiconductor substrate such that the thin film structure includes a plurality of thin films; patterning the thin film structure to form a through region in the thin film structure; forming a first silicon film using a first precursor such that the first silicon film covers the through region; and forming a second silicon film on the first silicon film using a second precursor, wherein the first precursor is different from the second precursor. | 2011-11-10 |
20110275198 | FILM WRAPPED NFET NANOWIRE - A semiconductor structure includes an n-channel field effect transistor (NFET) nanowire, the NFET nanowire comprising a film wrapping around a core of the NFET nanowire, the film wrapping configured to provide tensile stress in the NFET nanowire. A method of making a semiconductor structure includes growing a film wrapping around a core of an n-channel field effect transistor (NFET) nanowire of the semiconductor structure, the film wrapping being configured to provide tensile stress in the NFET nanowire. | 2011-11-10 |
20110275199 | COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - An AlN layer ( | 2011-11-10 |
20110275200 | METHODS OF DYNAMICALLY CONTROLLING FILM MICROSTRUCTURE FORMED IN A MICROCRYSTALLINE LAYER - A method for an intrinsic type microcrystalline silicon layer is provided. In one embodiment, a method for forming an intrinsic type microcrystalline silicon layer includes dynamically ramping up a silane gas supplied in a gas mixture to a surface of a substrate disposed in a processing chamber, dynamically ramping down a RF power applied in the gas mixture supplied to the processing chamber to form a plasma in the gas mixture, and forming an intrinsic type microcrystalline silicon layer on the substrate. | 2011-11-10 |
20110275201 | METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE HAVE FIN-SHAPED SEMICONDUCTOR REGIONS - First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r | 2011-11-10 |
20110275202 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD - A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region. | 2011-11-10 |
20110275203 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING ION IMPLANTATION AT A TILT ANGLE IN EXPOSED REGIONS - A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for adjusting the threshold voltage of a cell will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°. | 2011-11-10 |
20110275204 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING ION IMPLANTATION AT A TILT ANGLE IN EXPOSED REGIONS - A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for suppressing punch-through will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°. | 2011-11-10 |
20110275205 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING ION IMPLANTATION AT A TILT ANGLE IN EXPOSED REGIONS - A method of fabricating a semiconductor device includes forming a mask pattern for defining a region on a semiconductor substrate. A well will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°. | 2011-11-10 |
20110275206 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - In a method for fabricating a semiconductor device, a first insulating film which is to serve as a gate insulating film of a protected element is formed on a semiconductor substrate. At least a portion of the first insulating film is removed in a protective element portion. Thereafter, a surface of the first insulating film is nitrided in a protected element portion. A conductive film is selectively formed, extending over the protected element portion and the protective element portion, to form a gate electrode of the protected element and an electrode of a protective element, which are connected together. | 2011-11-10 |
20110275207 | SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME - A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly include a laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this sequence, a gate insulating film of silicon oxide formed on the surface of the side wall of the laminate, and a gate electrode formed so as to cover the side wall of the laminate. The vertical MISFETs are perfect depletion type MISFETs. | 2011-11-10 |
20110275208 | SHIELD CONTACTS IN A SHIELDED GATE MOSFET - A semiconductor structure is formed as follows. Trenches are formed in a semiconductor region and a shield electrode is formed in each trench. Gate electrodes are formed in a portion of the trenches that form an active region. Each gate electrode is disposed over the shield electrode and is isolated from the shield electrode by an inter-electrode dielectric. An interconnect layer is formed extending over the trenches. The interconnect layer is isolated from the gate electrodes in the active region by a dielectric layer and contacts the shield electrodes in a shield contact region separate from the active region. The interconnect layer contacts mesa surfaces between adjacent trenches in the shield contact region. | 2011-11-10 |
20110275209 | VERTICAL FIELD EFFECT TRANSISTOR ARRAYS AND METHODS FOR FABRICATION THEREOF - Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar. Alternatively, the array may comprise semiconductor pillars with different linewidths, optionally within the context of the foregoing linewidth and separation distance limitations. A method for fabricating the array of semiconductor pillars uses a minimally photolithographically dimensioned pillar mask layer that is annularly augmented with at least one spacer layer prior to being used as an etch mask. | 2011-11-10 |
20110275210 | METHOD OF MAKING VERTICAL TRANSISTOR WITH GRADED FIELD PLATE DIELECTRIC - An electronic device has a plurality of trenches formed in a semiconductor layer. A vertical drift region is located between and adjacent the trenches. An electrode is located within each trench, the electrode having a gate electrode section and a field plate section. A graded field plate dielectric having increased thickness at greater depth is located between the field plate section and the vertical drift region. | 2011-11-10 |
20110275211 | Methods of Etching Nanodots, Methods of Removing Nanodots From Substrates, Methods of Fabricating Integrated Circuit Devices, Methods of Etching a Layer Comprising a Late Transition Metal, and Methods of Removing a Layer Comprising a Late Transition Metal From a Substrate - Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF. | 2011-11-10 |
20110275212 | Integrated High-K/Metal Gate in CMOS Process Flow - A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first active region and a second active region, forming a first metal layer over a high-k dielectric layer, removing at least a portion of the first metal layer in the second active region, forming a second metal layer on first metal layer in the first active region and over the high-k dielectric layer in the second active region, and thereafter, forming a silicon layer over the second metal layer. The method further includes removing the silicon layer from the first gate stack thereby forming a first trench and from the second gate stack thereby forming a second trench, and forming a third metal layer over the second metal layer in the first trench and over the second metal layer in the second trench. | 2011-11-10 |
20110275213 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a plurality of first interconnection layers which are provided in an insulating layer and formed in a pattern having a width and space smaller than a resolution limit of an exposure technique, and a second interconnection layer which is provided between the first interconnection layers in the insulating layer and has a width larger than that of a first interconnection layer. A space between the second interconnection layer and each of first interconnection layers adjacent to both sides of the second interconnection layer equals the space between the first interconnection layers. | 2011-11-10 |
20110275214 | DUAL DAMASCENE-LIKE SUBTRACTIVE METAL ETCH SCHEME - Metal interconnects are formed with larger grain size and improved uniformity. Embodiments include patterning metal layers into metal interconnects and vias prior to depositing a dielectric layer. An embodiment includes forming metal layers on a substrate, patterning the metal layers to form metal interconnect lines and vias, and forming a dielectric layer on the substrate, metal interconnect lines, and vias, thereby filling gaps between the metal interconnect lines and between the vias. The metal layers may be annealed prior to patterning. A liner may be formed on the sidewalls of the metal interconnect lines and vias prior to forming the dielectric layer. The dielectric layer may be formed of a porous material with a dielectric constant less than 2.4. | 2011-11-10 |
20110275215 | METHOD FOR FORMING A TITANIUM-CONTAINING LAYER ON A SUBSTRATE USING AN ATOMIC LAYER DEPOSITION (ALD) PROCESS - A method for forming a titanium-containing layer on a substrate, the method comprising at least the steps of: a) providing a vapor comprising at least one precursor compound of the formula Ti(Me | 2011-11-10 |
20110275216 | TWO STEP CHEMICAL-MECHANICAL POLISHING PROCESS - A chemical mechanical polishing method includes employing a topologically selective slurry or an abrasive trapped or abrasive mounted pad in an initial polishing operation to provide a substantially planar topology of a polysilicon layer of a semiconductor wafer, and performing a second polishing operation to remove a portion of the polysilicon layer to expose discrete elements of the semiconductor wafer. | 2011-11-10 |
20110275217 | POLISHING SOLUTION FOR CMP AND POLISHING METHOD USING THE POLISHING SOLUTION - The polishing solution for CMP of the invention comprises abrasive grains, a first additive and water, wherein the first additive is at least 1,2-benzoisothiazole-3(2H)-one or 2-aminothiazole. The polishing method of the invention is a polishing method for a substrate having a silicon oxide film on the surface, and the polishing method comprises a step of polishing the silicon oxide film with a polishing pad while supplying the polishing solution for CMP between the silicon oxide film and the polishing pad. | 2011-11-10 |
20110275218 | DOUBLE PATTERNING STRATEGY FOR CONTACT HOLE AND TRENCH IN PHOTOLITHOGRAPHY - A method of lithography patterning includes forming a hard mask layer on a material layer and forming a capping layer on the hard mask layer. The capping layer does not react with oxygen gas during a photoresist ashing process. The capping layer is patterned by using a first resist pattern and a second resist pattern as etch masks. After the capping layer is patterned, the hard mask layer is patterned by using the patterned capping layer as an etch mask. | 2011-11-10 |
20110275219 | HIGH PRESSURE BEVEL ETCH PROCESS - A method of bevel edge processing a semiconductor in a bevel plasma processing chamber in which the semiconductor substrate is supported on a semiconductor substrate support is provided. The method comprises evacuating the bevel etcher to a pressure of 3 to 100 Torr and maintaining RF voltage under a threshold value; flowing a process gas into the bevel plasma processing chamber; energizing the process gas into a plasma at a periphery of the semiconductor substrate; and bevel processing the semiconductor substrate with the plasma. | 2011-11-10 |