45th week of 2008 patent applcation highlights part 16 |
Patent application number | Title | Published |
20080272722 | Brushless direct current motor driving circuit - A brushless DC motor drive circuit includes a drive unit and a transient current suppression circuit. The drive unit comprises a Hall component, a drive component, a first transistor and a second transistor. The Hall component detects the position of a rotor of the DC motor and transmits digital command signals to the drive component; the drive component further generates two complementary digital command signals; and the first and second transistors connect with the drive component respectively. The transient current suppression circuit comprises a first auxiliary transistor and a second auxiliary transistor, wherein the first auxiliary transistor receives one of the complementary digital command signals different from the other one received by the first transistor and the second auxiliary transistor receives the other one of the complementary digital command signals different from the one received by the second transistor. | 2008-11-06 |
20080272723 | Absolute Encoder and Method for Generating an Absolute Value for a Angle of Rotation - An electric motor ( | 2008-11-06 |
20080272724 | FAN MOTOR DRIVING CIRCUIT - A fan motor driving circuit controls an energized state of a fan motor by performing on and off control of a switching circuit connected to a coil of the fan motor of a driving object. A variable reference voltage circuit generates a voltage whose voltage level changes with time by charging or discharging a capacitor at the start of starting up the fan motor. A drive signal combining unit generates drive signals on the basis of the voltage when at least starting up, and performs on and off control of the switching circuit by the drive signals. An initialization circuit initializes the capacitor before starting up with a transition from off to on of a power supply voltage to be supplied to the fan motor driving circuit as a turning point. | 2008-11-06 |
20080272725 | Load Monitor - A load monitor for monitoring the load of a motor comprises a Central Processing Unit (CPU) and a memory. During normal operation of the motor, the load monitor is arranged to repeatedly measure the torque and registering the speed of the motor. In connection with each measurement of the torque and registering of the speed, the load monitor determines a load limit value valid for the registered speed, which load limit value is a function of a plurality of torques and speeds and a predetermined deviation value stored in the memory. The measured torque is then compared with the determined load limit value and if the measured torque is not within an acceptable range limited by the determined load limit value then an appropriate action is taken. | 2008-11-06 |
20080272726 | Control Apparatus and Method for Controlling an Adjusting Device in a Motor Vehicle - Control apparatus for an adjusting device in a motor vehicle, having
| 2008-11-06 |
20080272727 | Method for Determination of the Risk to Disturbance-Free Operation of a Frequency Converter - The invention relates to a method for determining the chance of a disturbance-free operation of a frequency converter ( | 2008-11-06 |
20080272728 | ROBOTIC JOINT - A driven joint for coupling two structural members is angularly adjustable in two polar or orthogonal dimensions and provides a pair of nonparallel, crossed axles, each having a middle section located between a pair of opposed side sections, wherein the pair of axles are mounted to each other along their respective middle sections and each axle of the pair of axles is rotationally mounted at its respective side sections to a respective structural member, a separate arcuate drive member orthogonally affixed to each respective axle and adapted to enable rotation of its respective axle and a separate drive mechanism mounted to each structural member and adapted to engage and rotate the respective arcuate drive member and the respective axle rotationally mounted to said each structural member. | 2008-11-06 |
20080272729 | Assembly of a Motor Vehicle Body and Control Device of Such an Assembly - A control device is provided for an assembly of a motor vehicle body, which assembly can be moved between at least two positions, specifically at least between a position retracted to the maximum extent and a position deployed to the maximum extent, in particular a spoiler. The control device contains a first sensor which transmits a signal to an evaluation device, which determines the position of the assembly from the signal of the first sensor, in dependence on the rotational speed of a motor which serves to move the assembly, and a second sensor which monitors a deployed position of the assembly and transmits a corresponding signal to the evaluation device. The evaluation device corrects the signal provided by the first sensor when the assembly is at least temporarily located in the position monitored by the second sensor and the signal provided by the first sensor is outside a tolerance range. | 2008-11-06 |
20080272730 | Control Device for Stepping Motor - A control device for a stepping motor is provided that can reduce torque generated by a motor and control the expansion of a speed deviation when the rotational speed of a rotor exceeds a speed command. The control device includes first judging means ( | 2008-11-06 |
20080272731 | METHOD AND SYSTEM FOR RESOLVER ALIGNMENT IN ELECTRIC MOTOR SYSTEM - Methods and systems are provided for aligning a resolver in an electric motor system. The method includes commanding a d-axis current command and a speed command, operating an electric motor without a load in response to the d-axis current command and the speed command, determining a rotor speed in response to the speed command, and determining an offset of the resolver based on the speed command and the rotor speed when the rotor speed has substantially stabilized. | 2008-11-06 |
20080272732 | METHOD AND SYSTEM FOR MOTOR CONTROL WITH DELAY COMPENSATION - Methods and systems are provided for controlling an electric machine via an inverter while compensating for one or more hardware delays. The method includes receiving a control signal, producing a first sampling signal based on the control signal, and adjusting the sampling signal to compensate for a first delay of the one or more hardware delays. The inverter is operable to produce a voltage signal based on the control signal, and the electric machine is operable to produce a current based on the voltage signal. A sampling of the current is performed based on the first sampling signal. | 2008-11-06 |
20080272733 | Dual Mode Portable Charger - A portable charger is disclosed including; a rechargeable battery module; a fluid energy converting device for converting kinetic energy of fluids flowing therethrough into electric power to charge the rechargeable battery module; a control circuit coupled to the rechargeable battery module; and a power output interface coupled to the control circuit for supplying power to an electronic device under the control of the control circuit when the power output interface is electrically connected to the electronic device. | 2008-11-06 |
20080272734 | Energy Consuming Body and A Method for Supplying Dynamic Force Energy to the Energy Consuming Body - The present invention discloses a type of secure and efficient wheel assembly using fluid or solid stuffing materials so as to minimize the blowout risks, a wheel rim transmission assembly, an energy exchanging arrangement used in transporting system, and a vehicle energy storage system, as well as corresponding methods for manufacturing and preparing such assemblies and arrangements in applications. | 2008-11-06 |
20080272735 | Circuit arrangement and method for transferring electrical charge between accumulator arrangement - A circuit arrangement for transferring electrical charge between accumulators of an accumulator arrangement includes a number of first series circuits, each connecting in parallel to one of the accumulators, and each comprising a switching element and an inductive storage element connected in series to the load path of the switching element. The circuit arrangement also includes a further series circuit connected in parallel to the accumulator arrangement and comprising a further switching element having a load path and a control terminal, and a further inductive element connected in series to the load path, the further inductive element being inductively coupled to the inductive elements of the first series circuits. The circuit arrangement also includes a control circuit comprising a number of first control outputs connected to the control terminals of the switching elements of the first series circuits, and a further control output connected to the control terminal of the further switching element. | 2008-11-06 |
20080272736 | SMART LEAD ACID BATTERY (DIS)CHARGING MANAGEMENT SYSTEM - A smart lead-acid battery (dis)charging management system comprised of one or a plurality of identical smart battery unit with each including a controller, a lead-acid battery, and a sensor switch device working together with a alternator and a voltage regulator to upgrade charging efficiency, achieve consistent capacity among batteries, and isolate malfunctioning or failing battery to extend service life of the battery. | 2008-11-06 |
20080272737 | Wireless chargeable energy cell - One embodiment of the present invention discloses a circuitry and an element which can be activated, charged, or interacted using any useful source of EM-radiation which is able to emit a suitable EM-field, which circuitry or element can be produced in a cost-effective manner, as well as a method for charging the same. The circuitry or element includes an antenna for receiving and converting EM-radiation into electric energy; a rectifier for converting the energy to a rectified current, and a dechargeable energy cell. The energy cell includes, in at least one embodiment, a first and a second electrochemically active element, which are electronically separated from each other, and an electrolyte which is arranged in ionic contact with at least a portion of both the first and second electrochemically active element, wherein the energy cell is arranged to receive rectified current from the rectifier, and to convert the rectified current into stored energy by altering its electrochemical state in response to the rectified current. | 2008-11-06 |
20080272738 | INTEGRATED CIRCUIT FOR CONTROLLING CHARGING, CHARGING DEVICE USING THE INTEGRATED CIRCUIT, AND METHOD FOR DETECTING CONNECTION OF SECONDARY BATTERY - An integrated circuit for charging a secondary battery including a charge current detection circuit detecting a charge current output from a charging transistor, and generating a signal including the charge current information; a voltage comparison circuit comparing a voltage of the battery with one or more predetermined voltages, and generating a signal including the voltage comparison information; and a charge controlling circuit controlling the charging transistor according to information on the voltage of the battery and the signals output from the charge current detection circuit and the voltage comparison circuit such that the charging transistor performs constant current charging or constant voltage charging, wherein the charge controlling circuit stops applying a charge current for a predetermined time in the beginning of charging, and judges that the battery is abnormally connected when the voltage of the battery becomes less than a predetermined voltage within the predetermined time. | 2008-11-06 |
20080272739 | BATTERY MONITORING ARRANGEMENT HAVING AN INTEGRATED CIRCUIT WITH LOGIC CONTROLLER IN A BATTERY PACK - A battery monitoring device of a battery pack configured for powering a cordless power tool may include an integrated circuit connected to a microprocessor of the pack that is external to the integrated circuit, and which is connected to each of N battery cells of the pack. The integrated circuit may be configured to take, singly or sequentially, a sampled reading comprising one of an individual cell voltage or a total pack voltage for all cells in the pack. The sampled reading is filtered in the integrated circuit prior to being read by the microprocessor. | 2008-11-06 |
20080272740 | Method of Charging a Lithium-Ion Battery Comprising a Negative Electrode - The present invention relates to a method for charging a lithium-ion accumulator with a negative electrode at an operating potential larger than 0.5 volts relatively to the Li+/Li pair, which comprises a first charging step at a constant voltage between 2 volts and 5 volts. | 2008-11-06 |
20080272741 | Systems and methods for detecting power sources - Embodiments of the present invention include techniques for detecting power sources. In one embodiment, the present invention includes a method of detecting a power source comprising coupling a power source to a portable electronic device, the power source comprising a first supply voltage and a second supply voltage, and at least a first data terminal and a second data terminal, coupling a resistor to the first data terminal a predetermined time period after the power source is coupled to the electronic device, detecting the voltage on the first data terminal and second data terminal, and generating a first signal corresponding to a first power source if the first and second data terminals have the same voltage after said predetermined time period, and generating a second signal corresponding to a second power source if the first and second data terminals have differential voltages after said predetermined time period. | 2008-11-06 |
20080272742 | Method and apparatus for acquiring battery temperature measurements using stereographic or single sensor thermal imaging - A method and apparatus for acquiring battery temperature measurements using stereographic thermal imaging sensors or a simple single thermal imaging sensor which can detect increases in battery heat within the field of view of any single thermal sensor, or any combination of a plurality of thermal imaging sensors is presented. Infrared Detection (ID) using the thermal imaging sensor (pyrometer) is used to focus on certain parts of a housing thereby providing an ability to “see through” or “partially see through” the battery housing to battery cells enclosed by the battery housing. Advantageously, this affords the unique capability of measuring the battery temperature before heat propagates from an individual battery cell or a plurality of battery cells to the battery housing, allowing faster heat gradient detection. Moreover, universality of battery temperature monitoring is achieved by elimination of proprietary communication between the manufacturer of the battery and the charger. | 2008-11-06 |
20080272743 | Driver Circuit Arrangement - The invention relates to a driver circuit arrangement ( | 2008-11-06 |
20080272744 | POWER CONTROL SYSTEM USING A NONLINEAR DELTA-SIGMA MODULATOR WITH NONLINEAR POWER CONVERSION PROCESS MODELING - A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The switching power converter utilizes a nonlinear energy transfer process to provide power to a load. The PFC and output voltage controller generates a control signal to control power factor correction and voltage regulation of the switching power converter. The PFC and output voltage controller includes a nonlinear delta-sigma modulator that models the nonlinear energy transfer process of the switching power converter. The nonlinear delta-sigma modulator generates an output signal used to determine the control signal. By using the nonlinear delta-sigma modulator in a control signal generation process, the PFC and output voltage controller generates a spectrally noise shaped control signal. In at least one embodiment, noise shaping of the control signal improves power factor correction and output voltage regulation relative to conventional systems. | 2008-11-06 |
20080272745 | POWER FACTOR CORRECTION CONTROLLER WITH FEEDBACK REDUCTION - A power control system includes a feedback loop having a power factor correction (PFC) and output voltage controller and a switching power converter. The switching power converter includes an inductor to supply charge to an output capacitor and a switch to control inductor current ramp-up times. The PFC and output voltage controller provides a control signal to the switch to control PFC and regulate output voltage of the switching power converter. During a single period of the control signal, the PFC and output voltage controller obtains the line input voltage and output voltage of the switching power converter using a single feedback signal received from the switching power converter. | 2008-11-06 |
20080272746 | POWER FACTOR CORRECTION CONTROLLER WITH SWITCH NODE FEEDBACK - A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The PFC and output voltage controller provides a control signal to a switch to control power factor correction and regulate output voltage of the switching power converter. During a single period of the control signal, the PFC and output voltage controller determines the line input voltage, the output voltage, or both using a single feedback signal received from the switching power converter. The feedback signal is received from a switch node located between an inductor and the switch. The PFC and output voltage controller determines either the line input voltage or the output voltage, whichever was not determined from the feedback signal, using a second feedback signal received from either a PFC stage or a driver stage of the switching power converter. | 2008-11-06 |
20080272747 | PROGRAMMABLE POWER CONTROL SYSTEM - A power control system includes a switching power converter and a programmable power factor correction (PFC) and output voltage controller. The programmable PFC and output voltage controller generates a control signal to control power factor correction and voltage regulation of the switching power converter. In at least one embodiment, the control signal is a pulse width modulated signal. The programmability of the PFC and output voltage controller provides the programmable PFC and output voltage controller flexibility to operate in accordance with programmable parameters, to adapt to various operating environments, and to respond to various operating exigencies. In at least one embodiment, the programmable PFC and output voltage controller includes a state machine to process one or more programmable, operational parameters to determine the period and pulse width states of the control signal. | 2008-11-06 |
20080272748 | Power Factor Correction (PFC) Controller and Method Using a Finite State Machine to Adjust the Duty Cycle of a PWM Control Signal - A power factor correction (PFC) controller and method uses a finite state machine to adjust the duty cycle of a pulse width modulation (PWM) switching control signal. The PFC controller has a target current generator that receives the link output voltage and generates a target current proportionate to the rectified line input voltage. The PFC controller further includes a comparator which outputs a two-level current comparison result signal. The finite state machine responsive to the two-level current comparison result signal, generates a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. | 2008-11-06 |
20080272749 | High Frequency Device, Power Supply Device and Communication Apparatus - The present invention provides a high frequency device in which stabilization of a DC bias voltage applied to an electrostatic drive type vibrator is attempted and a power supply device which can supply a stable DC bias voltage. | 2008-11-06 |
20080272750 | Device - A device includes an output and a linear regulator coupled to the output. The device also includes a switching regulator coupled to the output and means for controlling said switching regulator in dependence on power loss in said linear regulator. | 2008-11-06 |
20080272751 | PARAMETER CONTROL CIRCUIT AND METHOD THEREFOR - In one embodiment, a single input terminal of a parameter control circuit is utilized to form two different parameters of the parameter control circuit. | 2008-11-06 |
20080272752 | PULSE ADDING SCHEME FOR SMOOTH PHASE DROPPING AT LIGHT LOAD CONDITIONS FOR MULTIPHASE VOLTAGE REGULATORS - A multiphase regulator which includes an output node developing an output voltage, a feedback circuit determining error of the output voltage and providing a compensation signal indicative thereof, at least three phase circuits coupled in parallel to the output node, and an adaptive controller. Each phase circuit includes a modulation circuit and a switch circuit. Each modulation circuit receives the compensation signal and generates pulses on a corresponding one of the pulse modulation signals. Each switch circuit is coupled to the output node and is controlled by a corresponding pulse modulation signal. The adaptive controller is responsive to a load indication signal, such as indicating a low load condition, and drops operation of at least one of the phase circuits and adds at least one pulse to a pulse modulation signal of each remaining phase circuit. | 2008-11-06 |
20080272753 | REGULATOR CIRCUIT - A stabilized regulator circuit is provided A first Pch transistor (PTr) (P | 2008-11-06 |
20080272754 | CONSTANT VOLTAGE POWER SUPPLY CIRCUIT AND METHOD OF CONTROLLING THE SAME - A constant-voltage power supply circuit is disclosed that is able to prevent overshoot of an output voltage possibly occurring when changing a constant-voltage circuit in operation and is able to supply a constant output voltage. The constant-voltage power supply circuit includes a first constant-voltage circuit, having a first output transistor and a first output voltage controller, that generates a first reference voltage and generates a first proportional voltage in proportion to a voltage on an output terminal, and a second constant-voltage circuit having a second output transistor and a second output voltage controller that generates a second reference voltage and generates a second proportional voltage in proportion to the voltage on the output terminal. When the first output voltage controller or the second output voltage controller starts operations according to a control signal input from the outside, a rising edge of the first reference voltage or the second reference voltage is delayed so as to be later than a rising edge of the first proportional voltage or the second proportional voltage. | 2008-11-06 |
20080272755 | SYSTEM AND METHOD WITH INDUCTOR FLYBACK DETECTION USING SWITCH GATE CHARGE CHARACTERISTIC DETECTION - A method and system monitor gate charge characteristics of one or more field effect transistors in a switching power converter to detect an end of an inductor flyback time interval. The switching power converter includes a switch coupled to an inductor to control current flow in the inductor. When the switch turns OFF, a collapsing magnetic field causes the inductor current to decrease and the inductor voltage to reverse polarity. When the magnetic field completely collapses, the inductor current goes to zero. At the end of the inductor flyback time interval, a voltage is induced across a Miller capacitance of the switch. The voltage can be detected as a transient change in the gate voltage of the switch. A switch gate sensor detects the gate voltage change associated with the end of the inductor flyback time interval and provides a signal indicating an end of the inductor flyback time interval. | 2008-11-06 |
20080272756 | POWER FACTOR CORRECTION CONTROLLER WITH DIGITAL FIR FILTER OUTPUT VOLTAGE SAMPLING - A power control system includes a digital FIR filter in an output voltage feedback loop of a switching power converter. A feedback loop includes an output voltage signal of the switching power converter. The output voltage signal includes direct current (DC) and alternating current (AC) components. The FIR filter provides discrete samples of an output voltage feedback signal to a switch state controller that allows the switch state controller to generate a control signal that reflects a relatively quick response to changes in the output voltage signal while reducing an influence of the AC component. In at least one embodiment, the FIR filter is configured to generate the discrete samples at a sampling frequency f | 2008-11-06 |
20080272757 | POWER SUPPLY DC VOLTAGE OFFSET DETECTOR - A power supply output voltage direct current (DC) offset detector determines a DC offset in a power supply output voltage signal, and the output voltage signal has a DC component and an alternating current (AC) “ripple” component. Once during each period of the ripple, the DC offset detector determines the DC offset from an output voltage signal using a comparison between the output voltage signal and a reference voltage. In at least one embodiment, from the comparison and during a period of the ripple, the DC offset detector determines an ‘above’ duration for which the ripple is above the reference voltage, determines a ‘below’ duration for which the ripple is below the reference voltage, or both to determine the DC offset of the power supply output voltage signal. The DC offset detector uses the above and/or below duration(s) to determine the DC offset of the output voltage signal. | 2008-11-06 |
20080272758 | Switching Power Converter with Switch Control Pulse Width Variability at Low Power Demand Levels - A power control system includes a switch mode controller to control the switching mode of a switching power converter. The switch mode controller generates a switch control signal that controls conductivity of a switch of the switching power converter. Controlling conductivity of the switch controls the switch mode of the switching power converter. The switch mode controller includes a period generator to determine a period of the switch control signal and to vary the determined period to generate a broad frequency spectrum of the switch control signal when the determined period corresponds with a frequency in at least a portion of an audible frequency band. Generating a switch control signal with a broad frequency spectrum in the audible frequency band allows the system to utilize switching frequencies in the audible frequency band. | 2008-11-06 |
20080272759 | DC converter with halt mode setting means - A DC converter with a halt mode setting is disclosed for preventing the occurrence of over-current while alleviating the increase in the size of circuits, along with a method for setting up such a halt mode. The DC converter includes a semiconductor switch, a clock generator for outputting a clock signal to a gate of the semiconductor switch to be utilized for controlling an on/off time of the semiconductor switch such that a predetermined power is output from the generator, and a drive circuit for switching the semiconductor switch to the continuous-on state according to a halt mode setting requirement regardless of the clock signal, when the semiconductor switch, normally repeating on/off operations responsive to the clock signal, is in its off-state. | 2008-11-06 |
20080272760 | Rechargeable Battery for Connection to a Load - The invention relates to a rechargeable battery for connection to a load, in particular for supplying a manually operated electric tool device with electrical energy, comprising a rechargeable-battery housing ( | 2008-11-06 |
20080272761 | DEVICE AND METHOD OF DETECTING FERRITE AND NON-FERRITE OBJECTS - A metal detector for detecting the presence of a ferrite object in the proximity of inductively coupled sensor having overlapping D shaped transmitter and receiver coils. The metal detector has a phase shift circuit to phase shifting a sensor output signal by a known amount and a switch operating in synchronisation with an excitation signal of the sensor for sampling the amplitude of the phase shifted output signal. | 2008-11-06 |
20080272762 | Inverter - An inverter has an inverter circuit and a current detector. In the inverter circuit, upper-arm switching elements and lower-arm switching elements, which are connected to DC power supply, provide DC with pulse-width modulation (PWM) so as to output AC to a load. The current detector detects current of the load. With the structure above, the inverter calculates an average value of DC that flows between the DC power supply and the inverter circuit according to a product of an ON-period in which any one of the switching elements maintains ON and a current value detected by the current sensor. | 2008-11-06 |
20080272763 | Antistatic Demonstrator - The present invention relates to a device for demonstrating the antistatic properties of at least one first transparent glass substrate, at least part of one of the main surfaces of which is an antistatic surface, said device comprising a hollow box having an upper surface provided with at least one window to which said first transparent glass substrate is fitted, wherein said box contains elements capable of moving under the action of electrostatic attraction, said elements being chosen from cellular particles of synthetic or natural polymers, individualized fibres of synthetic or natural polymers and their blends. | 2008-11-06 |
20080272764 | TEST TRAY FOR TEST HANDLER - The present invention relates to a test tray for a test handler. According to this invention, there is disclosed a technique that an insert loaded in a loading part which is arranged in a matrix pattern in a frame of the test tray allows an amount and direction of free movement thereof to be determined in accordance with a location of the loading part, where the insert is loaded, on the matrix, thereby enabling a thermal expansion or contraction of a match plate or the test tray to be compensated. | 2008-11-06 |
20080272765 | Brushless DC Motor Using Linear Hall-Effect Sensor And Realization Method Of Speed Signal Thereof - Disclosed is a realization method of a speed signal of a motor using a linear Hall-effect sensor characterized by comprising the steps of: by using a Hall signal in the form of a sine wave of a linear Hall-effect sensor, determining coordinate values on a x-y coordinate system of the position sensor; evaluating a summed coordinate value of the above coordinate values; calculating the angle(θ) formed by a summed coordinate value and the x axis; determining the quadrant of the resulted angle(θ); and determining a speed signal by dividing the final motor displacement value by the rate of time change. | 2008-11-06 |
20080272766 | Inductive sensor - An inductive sensor is provided having a housing with a sensing face and a sensing unit arranged in the housing. The sensing unit has an oscillatory circuit with at least one inductive element. The at least one inductive element is arranged proximate to the sensing face of the housing and has an outer surface made of copper or a copper alloy. | 2008-11-06 |
20080272767 | POSITION DETECTING CIRCUIT AND IMAGING APPARATUS - A position detecting circuit provided in an imaging apparatus having an optical system that images a subject image, an imaging element that performs photoelectric conversion of the subject image, and a release switch capable of setting states of two stages includes: a plurality of magnetic field change detecting elements that detect the intensity of a magnetic field formed by a magnetic field generating body attached to either the optical system or the imaging element and that are provided so as to be separated from each other; a position detecting portion that detects the position of the magnetic field generating body on the basis of outputs from the plurality of magnetic field change detecting elements; and a standby portion that stops a function of at least one of the position detecting portion and the plurality of magnetic field change detecting elements until a first stage of the release switch is set. | 2008-11-06 |
20080272768 | Angular Position Magnetic Sensor - A magnetic angular-position sensor is mounted between two carrier elements that are movable in rotation relative to each other about an axis of rotation. The sensor has firstly a magnetic body defining a working zone in which there extends a magnetic field having field lines perpendicular to the axis of rotation, and secondly a detector member having at least one probe extending in the working zone of the magnetic member in order to provide a signal as a function of the angular orientation of the probe relative to the field lines in the working zone. The magnetic member has two parallel magnet segments and two elongate pole pieces of ferromagnetic material extending perpendicularly to the magnet segments and covering the ends thereof. | 2008-11-06 |
20080272769 | Pulse Generator Wheel, Preferably for Shafts, and Method for Manufacturing such a Pulse Generator Wheel - A pulse generator wheel has a cylindrical wall provided with windows distributed about a circumference of the cylindrical wall and closed axially at a first end by a ring. The ring is made of circumferentially extending profiled sections of profiled parts that are separated from one another. The pulse generator wheel is made by stamping in a round sheet metal about the circumference profiled parts each having at least one profiled section extending in the circumferential direction for forming windows between the profiled parts. The profiled sections are spaced from one another in the circumferential direction. The profiled parts are erected and the profiled sections then form a circumferential ring delimiting the windows axially. | 2008-11-06 |
20080272770 | Current-Loop Position Sensor and Rolling Bearing Equipped with Same - The invention concerns a system for determining the position of mobile element relative to a stationary structure, said system comprising an encoder configured to emit a pseudo-sinusoidal spatial signal representing the position of the encoder, a sensor ( | 2008-11-06 |
20080272771 | Magnetic tunnel junction (MTJ) based magnetic field angle sensor - A magnetic field angle sensor for measurement of a magnetic field angle over a 360° range has magnetic tunnel junction elements oriented at multiple angles. The magnetic field angle sensor includes multiple magnetic tunnel junction elements formed on a substrate that have an anti-ferromagnetic layer and pinned synthetic multiple layer. The magnetic tunnel junction elements are patterned to have a large dimensional aspect ratio and large anisotropies the pinned synthetic multiple layer of the magnetic tunnel junction elements. The magnetic tunnel junction elements are annealed in the presence of a strong magnetic field in a direction of the reference axis and the annealed for a second time with no external magnetic field so that exchange pinning is reduced and strong stress induced anisotropies of the pinned synthetic multiple layer align magnetization of the pinned synthetic multiple layer align a long axis of each of the magnetic tunnel junction elements. | 2008-11-06 |
20080272772 | METHODS AND APPARATUS FOR INSPECTING MATERIALS - Apparatus and methods for inspecting materials such as cylindrical and tubular members are disclosed. One apparatus includes a frame that supports a magnetic coil and a detector assembly, the detector assembly having one or more magnetic detectors adapted to be spaced a first distance from the material being inspected by one or more substantially frictionless members. | 2008-11-06 |
20080272773 | VISCOSITY DETERMINATION FROM LOGARITHMIC MEAN RATIO OF RELAXATION TIMES - A method for determining viscosity, η, of a fluid downhole, calls for performing a nuclear magnetic resonance (NMR) survey of the fluid; determining a longitudinal relaxation time, T | 2008-11-06 |
20080272774 | Magnetic Resonance Method for the Detection and Imaging of Susceptibility Related Magnetic Field Distortions - Disclosed are methods and apparatuses for generating susceptibility-related contrast images, as induced, e.g., by marker material interventional devices used for passive MR-guided interventions, or by particles or cells loaded with marker materials used for molecular imaging, cell-tracking or cell-labeling. Near a local magnetic field perturber a positive contrast signal emanates from local gradient compensation to form, e.g., a balanced SSFP type of echo, whereas everywhere else echoes are shifted outside of the data acquisition window. | 2008-11-06 |
20080272775 | QUANTUM THEORY-BASED CONTINUOUS PRECISION NMR/MRI: METHOD AND APPARATUS - A method for spin magnetic resonance applications in general, and for performing NMR (nuclear magnetic resonance spectroscopy) and MRI (nuclear magnetic resonance imaging) in particular is disclosed. It is a quantum theory—based continuous precision method. This method directly makes use of spin magnetic resonance random emissions to generate its auto-correlation function and power spectrum, from which are derived the relaxation times and spin number density. The method substantially reduces the NMR/MRI machine and data processing complexity, thereby making NMR/MRI machines much less-costly, much less-bulky, more accurate, and easier to operate than the current pulsed NMR/MRI. By employing extremely low transverse RF magnetic B | 2008-11-06 |
20080272776 | MAGNETIC RESONANCE IMAGE ACQUISITION WITH SUPPRESSION OF BACKGROUND TISSUES AND RF WATER EXCITATION AT OFFSET FREQUENCY - Background tissue signals such as water and/or fat are suppressed in an MR image by using an imaging agent that chemically shifts the tissue spins of interest. An imaging pulse sequence is used to acquire the image data using an RF excitation pulse that is tuned to the off-resonance tissue spins of interest with the saturation pulse sequences being interleaved with the imaging pulse sequences to selectively suppress signals from on-resonance background tissues such as water and/or fat. | 2008-11-06 |
20080272777 | ARTIFACT REDUCTION IN STEADY-STATE FREE PRECESSION IMAGING - A method of reducing artifacts in steady-state free precession (SSFP) signals for use in magnetic resonance imaging is provided. A plurality of SSFP imaging sequences is applied to an object. An imaging data for each of the SSFP imaging sequences is acquired. The imaging data is combined using a weighted combination where weights depend on a control parameter that adjusts a trade-off between banding artifact reduction and signal to noise ratio (SNR). | 2008-11-06 |
20080272778 | ENHANCED SPECTRAL SELECTIVITY FOR STEADY-STATE FREE PRECESSION IMAGING - A method of collecting image data with selective spectral suppression for at least two species is provided. A sequence of RF excitation pulses is repeatedly applied, whereby a repeated sequence of at least two substantially different spectrally selective steady-state magnetizations is established. Magnetic gradients are applied between said RF pulses. A plurality of magnetic resonance image (MRI) signals is acquired. The plurality of MRI signals is combined using a weighted combination where the weights depend on a control parameter that adjusts a trade-off between selective spectral suppression and signal-to-noise ratio (SNR). | 2008-11-06 |
20080272779 | Determination of Distribution Information of a Contrast Agent by Mr Molecular Imaging - MR based molecular imaging is used for the quantification of contrast agent concentrations. According to an exemplary embodiment of the present invention, a difference between R2 and R2* relaxation rates of a contrast agent is determined on the basis of data measured after contrast agent application. This may provide for an in vivo information relating to a compartmentalization or binding status of the contrast agent, and thus may improve the significance of the examination result. | 2008-11-06 |
20080272780 | Method for Accounting for Shifted Metabolic Volumes in Spectroscopic Imaging - In a magnetic resonance method, a localizing magnetic field gradient (G | 2008-11-06 |
20080272781 | Q-SPACE SAMPLING METHOD AND DIFFUSION SPECTRUM IMAGING METHOD EMPLOYING THE SAME - A q-space sampling method includes: (a) receiving a required sampling number and a range of sampling region in q-space set by a user; (b) obtaining a sampling interval by iteration using a regular non-rectangular sampling lattice when an actual sampling number converges to the required sampling number; and (c) obtaining positions of sampling data in q-space based on the sampling interval and the regular non-rectangular sampling lattice. A diffusion spectrum imaging method using the q-space sampling method is also disclosed. | 2008-11-06 |
20080272782 | SUPPRESSION OF NOISE IN MR IMAGES AND MR SPECTROSCOPIC IMAGES USING SIGNAL SPACE PROJECTION FILTERING - A method for suppressing the noise component of a measured magnetic resonance (MR) signal is disclosed. In particular, a signal-space projection operator is produced and employed to suppress the noise component from acquired MR signals that is uncorrelated with the spatial pattern of a desired NMR signal. In one embodiment, an fMRI scan is performed to acquire time course image data. The NMR data is filtered with a signal-space projection operator and reconstructed into a series of image frames. In another embodiment, the signal-space projection operator is employed to suppress lipid signal in MRS image data. | 2008-11-06 |
20080272783 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - A magnetic resonance imaging apparatus that applies a gradient magnetic field and a radio-frequency magnetic field to a subject in a static magnetic field to image the subject based on magnetic resonance signals emitted from the subject, includes a unit which generates K transmission radio-frequency pulse signals required to produce the radio-frequency magnetic field, an allocation unit which allocates the K transmission radio-frequency pulse signals to K in M transmission signal paths, a connection unit to which at most M radio-frequency coils are attachable and which selectively connects the M transmission signal paths and M reception signal paths to the radio-frequency coils, a selection unit which selects N in magnetic resonance signals which are respectively received by the at most M radio-frequency coils and transmitted through the at most M reception signal paths, and a unit which performs reception processing for each of the selected N magnetic resonance signals. | 2008-11-06 |
20080272784 | Magnetic Resonance Imaging Device and Method for Operating a Magnetic Resonance Imaging Device - The present invention relates to a magnetic resonance imaging (MRI) device and to a method for operating it. The basic components of an MRI device are the main magnet system ( | 2008-11-06 |
20080272785 | Phased Array Coil for MRI - A method and apparatus for ameliorating high-field image distortion in magnetic resonance imaging of tissue. Two separate scans of a target region are taken with different phase and amplitude values for each scan. The phase and amplitude values of each scan are selected to be complimentary so as to provide scans that have improved SNR when averaged using, for example, sum-of-squares averaging. | 2008-11-06 |
20080272786 | Integrated Power Supply for Surface Coils - A radio frequency receive coil for receiving a magnetic resonance signal includes a radio frequency antenna. The radio frequency antenna includes one or more electrical conductors ( | 2008-11-06 |
20080272787 | SYSTEM AND METHOD FOR MULTI-CHANNEL MR TRANSMISSION - A system and method for transmitting multiple radio frequency (RF) channels via an RF coil assembly are provided. An RF coil assembly having a number of coil elements may be configured to transmit a number of RF channels which is less than the number of coil elements thereof. Some implementations may use signal splitters for some or all of the RF channels to produce driving inputs for each coil element. By using more coil elements than RF channels, various embodiments may exhibit increased power efficiency and improved B1 uniformity. | 2008-11-06 |
20080272788 | Microcoil NMR Detectors - The present invention provides resonance circuits, detection devices incorporating such circuits, and methods for their design, construction, and use. | 2008-11-06 |
20080272789 | Permittivity Measurements With Oil-Based Mud Imaging Tool - Oil-based mud imaging systems and methods that measure formation permittivity. In some embodiments, disclosed logging systems include a logging tool in communication with surface computing facilities. The logging tool is provided with a sensor array having at least two voltage electrodes positioned between at least two current electrodes that create an electric field in a borehole wall, and is further provided with electronics coupled to the voltage electrodes to determine a differential voltage magnitude and phase. From the magnitude and phase, formation resistivity and permittivity measurements can be determined and used to construct a borehole wall image. | 2008-11-06 |
20080272790 | METHOD FOR DETERMINING STATE OF CHARGE OF LEAD-ACID BATTERIES OF VARIOUS SPECIFIC GRAVITIES - In accordance with various embodiments, there is a method for determining the state of charge of a battery. Various embodiments include the steps of determining the specific gravity of the battery and measuring an open circuit voltage of the battery at rest. The open circuit voltage at rest can be used to determine the battery state of charge from a correlation function dependent on the battery specific gravity. | 2008-11-06 |
20080272791 | SYSTEM TO MEASURE SERIES-CONNECTED CELL VOLTAGES USING A FLYING CAPACITOR - A system for measuring voltage of individual cells connected in series includes a single flying capacitor. The capacitor stores the charge of one of the cells such that an analog-to-digital converter (ADC) connected to the capacitor may process an accurate representation of the voltage of the cell being measured. A plurality of MOSFET-based switches electrically connects and disconnects the cells and the capacitor. A controller is in communication with the ADC and the switches for sequencing the switches and recording the voltage measurements of each cell. | 2008-11-06 |
20080272792 | Method and Device for Testing of Non-Componented Circuit Boards - The method according to the invention is used to determine deviations of circuit board test points of a series of circuit boards from the CAD data relating to these circuit boards, by scanning the surface of the circuit board by an imaging method and subjecting this image to automatic image analysis so that it may be compared with the CAD data. The CAD data are then suitably corrected so that, with the aid of the corrected CAD data, the circuit board may be tested in a finger tester, with test fingers of the finger tester being controlled on the basis of the deviations found. | 2008-11-06 |
20080272793 | Finger Tester for Testing Unpopulated Printed Circuit Boards and Method for Testing Unpopulated Printed Circuit Boards Using a Finger Tester - The present invention relates to a finger tester for the testing of non-componented printed circuit boards using at least two test fingers ( | 2008-11-06 |
20080272794 | METHOD OF MANUFACTURING A PROBE CARD - A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements. | 2008-11-06 |
20080272795 | Prober Apparatus and Operating Method Therefor - An operating method for a prober apparatus is disclosed which includes controlling the temperature of at least one part of the prober apparatus. Another operating method for a prober apparatus includes production and transfer of thermal energy between means for the exchange of heat and at least one component of the prober apparatus, wherein the production, the transfer or the production and the transfer of thermal energy is controlled. A prober apparatus includes at least one heat exchange element disposed in a spatial relation to at least one probe tool support so as to have an impact on the temperature thereof. | 2008-11-06 |
20080272796 | PROBE ASSEMBLY - The probe assembly according to the present invention comprises a probe board and a plurality of probes. Each probe has an arm portion extending from the probe board at a distance and substantially along the probe board, a tip portion provided in the arm portion and projecting in a direction away from the probe board, and the tips provided in the tip portions are supported on the probe board at their base ends so as to be arranged in a matrix state on an imaginary XY plane along the X-axis and Y-axis. The respective probes are arranged so that the extending directions of said arms are arranged angularly relative to the X-axis and Y-axis and parallel to one another as seen on a plane P parallel to the imaginary plane. | 2008-11-06 |
20080272797 | Intergrated Circuit Self-Test Architecture - An integrated circuit ( | 2008-11-06 |
20080272798 | Display device and liquid crystal television - The present invention discloses enabling readily determining which circuit, among a plurality of circuits including an optical source lighting circuit and a power supply circuit, has a failure and repairing the circuits easily in a short period. A liquid crystal television | 2008-11-06 |
20080272799 | Electronic Device - An electronic device comprising at least one input/output circuit ( | 2008-11-06 |
20080272800 | Dynamic dual control on-die termination - Controlling on-die termination on a bi-directional single-ended data bus carrying data between a controller and a memory device. The controller and the memory device respectively include input termination pull-ups and input termination pull-downs. An enabled state is maintained for the input termination pull-downs of the controller except when data is driven on the bi-directional single ended data bus by the controller. Similarly, an enabled state is maintained for the set of input termination pull-downs of the memory device except when data is driven on the bi-directional single ended data bus by the memory device. In conjunction with this, a disabled state is maintained for the input termination pull-ups of the memory device (or controller) except when data is being received from the bi-directional single-ended data bus by the memory device (or controller). | 2008-11-06 |
20080272801 | RUNTIME LOADING OF CONFIGURATION DATA IN A CONFIGURABLE IC - Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network. Also, the IC of some embodiments includes a configuration controller for retrieving configuration data from outside of the IC, formulating configuration data sets, and routing the configuration data sets to the second set of configurable circuits over the configuration network. | 2008-11-06 |
20080272802 | Random access of user design states in a configurable IC - Some embodiments of the invention is a configurable integrated circuit (IC) that includes (1) several configurable logic circuits, (2) a first routing network for connecting the configurable logic circuits, (3) several user design state (UDS) circuits, and (4) a second network communicatively coupled to the UDS circuits. In least one period during the operation of the IC, the second network receives addresses for a several UDS circuits in a random access manner. In some embodiments, the second network is a debug network for reading randomly state values stored by the addressed UDS circuits during the user-design operation of the IC. | 2008-11-06 |
20080272803 | SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT INCLUDING DUAL-FUNCTION ANALOG AND DIGITAL INPUTS - An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block. | 2008-11-06 |
20080272804 | NON-VOLATILE MEMORY CONFIGURATION SCHEME FOR VOLATILE-MEMORY-BASED PROGRAMMABLE CIRCUITS IN AN FPGA - A non-volatile memory configuration scheme is disclosed for volatile-memory-based programmable circuits in a programmable integrated circuit that includes an FPGA fabric, a plurality of first configurable circuit elements external to the FPGA fabric, and a plurality of second configurable circuit elements external to the FPGA fabric. A plurality of distributed configuration non-volatile memory cells is disposed in the FPGA, each one of the distributed configuration non-volatile memory cells coupled to a different one of the plurality of first configurable circuit elements. A non-volatile memory array stores configuration information for the second configurable circuit elements. A plurality of register cells is disposed with the second configurable circuit elements and is coupleable to the non-volatile memory array, each one of the register cells coupled to a different one of the plurality of second configurable circuit elements. | 2008-11-06 |
20080272805 | Method and apparatus for boundary scan programming of memory devices - In accordance with at least one embodiment, a method, apparatus, and article of manufacture are provided for configuring a virtual boundary register in a programmable logic device (PLD), transmitting a first user-definable-command operation code (opcode) to the PLD to effect programming of a memory device coupled to the PLD, and preferably transmitting a second user-definable-command opcode to the PLD, the second user-definable-command opcode causing the physical boundary scan circuitry to load the virtual boundary register. The foregoing is preferably achieved in accordance with a boundary scan standard (e.g., Institute of Electrical and Electronics Engineers, Inc. (IEEE) 1149.1, dated 2001). | 2008-11-06 |
20080272806 | SCALABLE NON-BLOCKING SWITCHING NETWORK FOR PROGRAMMABLE LOGIC - A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits. | 2008-11-06 |
20080272807 | Thin film logic device and system - Thin film logic circuits employ thin-film switching devices to execute complementary logic functions. Such logic devices operate, as complementary metal oxide semiconductor (CMOS) logic devices do, in a manner that does not provide a direct conduction path between a system supply and a system return. Complementary logic circuits may employ three-terminal threshold switches as switching elements. | 2008-11-06 |
20080272808 | Means To Detect A Missing Pulse And Reduce The Associated PLL Phase Bump - A phase/frequency locked loop (PLL) includes circuitry adapted to detect missing pulses of a reference clock and to control the phase bump of the PLL. The circuitry includes, in part, first and second flip-flops, as well as a one-shot block. The first flip-flop has a data input terminal responsive to a voltage supply, and a clock terminal responsive to an inverse of feedback clock. The second flip-flop has a data input terminal responsive to an output of the first flip-flop, and a clock terminal responsive to the inverse of the feedback clock. The one-shot block generates a pulse in response to a rising edge of the reference clock that is used to generate the feedback clock. The one-shot block generates an output signal applied to a reset terminal of the first flip-flop. | 2008-11-06 |
20080272809 | Integrated circuit power-on control and programmable comparator - An integrated circuit is provided with a main supply rail and a virtual supply rail connected by strong and weak header transistors. A power-on controller controls the switching on of the strong transistors after the virtual supply rail voltage has already been driven up to close to its operating level by the weak transistor. The power-on controller comprises a comparator monitoring a single reference voltage level with its output being latched within a latch and used to switch on the strong transistor. The comparator may be programmable to detect multiple different trigger voltage levels by using opposing charging and discharging transistors with one set of these operating in a saturated regime and the other in a regime in which the current therethrough varies in dependence upon the voltage being sensed. These opposing transistors can be used to charge or discharge a node with the state of that node being taken to generate the sensed output. | 2008-11-06 |
20080272810 | FILTERLESS DIGITAL FREQUENCY LOCKED LOOP - A frequency and/or phase locked loop architecture that eliminates the loop filter generally required in conventional phase locked loops, and which may be implemented in digital logic, for example, as a field programmable gate array. In one example, a frequency/phase locked loop includes both a frequency comparison component and a phase comparison component to allow locking of an output clock signal to both the frequency and phase of a reference signal. | 2008-11-06 |
20080272811 | SIGNAL GENERATING APPARATUS AND METHOD THEREOF - A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode. | 2008-11-06 |
20080272812 | SEMICONDUCTOR MEMORY DEVICE INCLUDING DELAY-LOCKED-LOOP CONTROL CIRCUIT AND CONTROL METHOD FOR EFFECTIVE CURRENT CONSUMPTION MANAGEMENT - A delay-locked-loop control circuit and a method of controlling a delay-locked-loop. When the delay-locked-loop is in an off-operation mode, such as a power-down mode, a self-refresh emulation mode, a self-refresh mode, and the like, the delay-locked-loop is updated with a predetermined period, thereby preventing a malfunction of the delay-locked-loop. The delay-locked-loop has an oscillating portion which generates an oscillation signal having a predetermined period when in an OFF state; a pulse generating portion which generates a pulse signal having a predetermined period using the oscillation signal; a dividing portion which divides the pulse signal to generate a delay-locked-loop update signal; and a combining portion which combines the delay-locked-loop update signal and a delay-locked-loop on signal that is enabled by an external command to generate a delay-locked-loop control signal for controlling the delay-locked-loop. | 2008-11-06 |
20080272813 | Analog To Digital Converter Clock Synchronizer - The present application generally relates to apparatuses such as television signal processing apparatus that process radio frequency signals. More specifically, the present application is particularly useful in integrated circuits that must receive a radio frequency signal and simultaneously use circuitry where the timing of the operations are based on the received RF signal and circuitry where the timing is based on a fixed rate signal with sensitivity to clock jitter. According to an exemplary embodiment, the apparatus comprises, a first input (RefClk), a second input (PllClk), an output (CLK | 2008-11-06 |
20080272814 | PARALLEL MULTIPLEXING DUTY CYCLE ADJUSTMENT CIRCUIT WITH PROGRAMMABLE RANGE CONTROL - A receive interface circuit includes a duty cycle adjustment circuit that adjusts the duty cycle of a reference clock signal based, at least in part, on a selected number of duty cycle adjustment units and a selected range of duty cycle adjustment. The duty cycle adjustment circuit may select as the reference clock signal one of a clock signal and at least a lower version of the clock signal in parallel with the duty cycle adjustment. | 2008-11-06 |
20080272815 | DUTY CYCLE CORRECTION CIRCUITS INCLUDING A TRANSITION GENERATOR CIRCUIT FOR GENERATING TRANSITIONS IN A DUTY CYCLE CORRECTED SIGNAL RESPONSIVE TO AN INPUT SIGNAL AND A DELAYED VERSION OF THE INPUT SIGNAL AND METHODS OF OPERATING THE SAME - A duty cycle correction circuit is operated by maintaining a state of a duty cycle corrected signal, generating a first transition in the state of the duty cycle corrected signal responsive to an input signal, and generating a second transition in the state of the duty cycle corrected signal responsive to a delayed version of the input signal. | 2008-11-06 |
20080272816 | Inverter with Four-Transistor Schmitt Trigger - A four-transistor Schmitt trigger inverter is provided. The Schmitt trigger inverter is made from an n-channel MOS (NMOS) dual-gate thin-film transistor (DG-TFT) and a p-channel MOS (PMOS) DG-TFT, both DG-TFTs having a top gate, a back gate, and source/drain regions. A (conventional) NMOS TFT has a gate connected to an NMOS DG-TFT first S/D region and a PMOS DG-TFT first S/D region. The NMOS TFT also has a first S/D region connected to the NMOS DG-TFT back gate and the PMOS DG-TFT back gate. A (conventional) PMOS TFT has a gate connected to the NMOS TFT gate, and a first S/D region connected to the NMOS TFT first S/D region. | 2008-11-06 |
20080272817 | Integrated Circuit on a Semiconductor Chip with a Phase Shift Circuit and a Method for Digital Phase Shifting - The present invention relates to an integrated circuit on a semiconductor chip with at least one phase shift circuit ( | 2008-11-06 |
20080272818 | VOLTAGE-CONTROLLED OSCILLATOR GENERATING OUTPUT SIGNAL FINELY TUNABLE IN WIDE FREQUENCY RANGE AND VARIABLE DELAY CIRCUITS INCLUDED THEREIN - A voltage-controlled oscillator includes a plurality of variable delay circuits, wherein a first differential output signal of an adjacent previous stage is provided as a first differential input signal and a second differential output signal of a second previous stage is provided as a second differential input signal. Each variable delay circuit includes a loading circuit including first and second loading units, a first input circuit including first and second input transistors gated by the first differential input signal, a second input circuit including third and fourth input transistors gated by the second differential input signal, first and second current sources connected between a first common node and a second power source and in electrical parallel with each other, and third and fourth current sources connected between a second common node and the second power source and in electrical parallel with each other. | 2008-11-06 |
20080272819 | CLOCK RECEIVERS - A clock receiver is provided. A receiving unit receives a pair of complementary clocks and generates a first clock, and a calibration unit detects whether a cross point of the complementary clocks has shifted, generates a detected result and accordingly adjusts toggling of the first clock. | 2008-11-06 |
20080272820 | Circuit to Reduce Transient Current Swings During Mode Transitions of High Frequency/High Power Chips - A method, an apparatus, and a computer program are provided to reduce transient current swings during mode transitions. Traditionally, transient supply voltage fluctuations on a chip account for a large portion of the power supply. The number of series inductances and resistances are typically minimized, while adding large decoupling capacitances between the supply voltage and ground. However, situations may arise where reduction of series inductances and resistances cannot be accomplished. Therefore, to assist in controlling the transient current swings, reduction of clocking frequencies are performed in a controlled manner. | 2008-11-06 |
20080272821 | Signal Converting Circuit - A signal conversion circuit | 2008-11-06 |