45th week of 2015 patent applcation highlights part 54 |
Patent application number | Title | Published |
20150318391 | SEMICONDUCTOR ELEMENT AND DISPLAY DEVICE USING THE SAME - A semiconductor having an active layer; a gate insulating film in contact with the semiconductor; a gate electrode opposite to the active layer through the gate insulating film; a first nitride insulating film formed over the active layer; a photosensitive organic resin film formed on the first nitride insulating film; a second nitride insulating film formed on the photosensitive organic resin film; and a wiring provided on the second, nitride insulating film. A first opening portion is provided in the photosensitive organic resin film, an inner wall surface of the first opening portion is covered with the second nitride insulating film, a second opening portion is provided in a laminate including the gate insulating film, the first nitride insulating film, and the second nitride insulating film inside the first opening portion, and the semiconductor is connected with the wiring through the first opening portion and the second opening portion. | 2015-11-05 |
20150318392 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes: a first region including: a first semiconductor layer; a first semiconductor region; a second semiconductor region; a third semiconductor region having higher impurity concentration than the first semiconductor region; a first electrode; a second electrode; an insulating film; a third electrode; a fourth electrode, a second region including a pad electrode, and the third region including: the first semiconductor layer; the first semiconductor region; a third semiconductor region; the first electrode; the second electrode; and a first insulating layer. | 2015-11-05 |
20150318393 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A semiconductor-device production method includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film around the fin-shaped semiconductor layer, and a second step of, after the first step, forming a second insulating film around the fin-shaped semiconductor layer, depositing a first polysilicon on the second insulating film to achieve planarization, forming, in a direction perpendicular to a direction of the fin-shaped semiconductor layer, a second resist for forming a first gate line and a first pillar-shaped semiconductor layer and a third resist for forming a first contact line and a second pillar-shaped semiconductor layer, and etching the first polysilicon, the second insulating film, and the fin-shaped semiconductor layer to form the first pillar-shaped semiconductor layer, a first dummy gate formed from the first polysilicon, the second pillar-shaped semiconductor layer, and a second dummy gate formed from the first polysilicon. | 2015-11-05 |
20150318394 | Tunable Stressed Polycrystalline Silicon on Dielectrics in an Integrated Circuit - A method of forming an integrated circuit device is disclosed. A polycrystalline silicon layer is formed in direct contact with a dielectric material so that the dielectric material induces a stress in the polycrystalline silicon layer as the polycrystalline silicon layer is formed. A MOS transistor that includes a gate comprising the polycrystalline silicon is then completed. | 2015-11-05 |
20150318395 | SELF-ALIGNED SILICIDE FORMATION ON SOURCE/DRAIN THROUGH CONTACT VIA - According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process. | 2015-11-05 |
20150318396 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a semiconductor device and a method of manufacturing the same. An example device may include: a substrate having a well formed therein, the well including a first section and a second section, wherein the first section has a lower doping concentration and is closer to a surface of the substrate than the second section; a fin structure formed on the surface of the substrate; an isolation layer formed on the surface of the substrate, wherein the isolation layer exposes a portion of the fin structure, which serves as a fin for the semiconductor device; a gate stack formed on the isolation layer and intersecting the fin, wherein a Punch-Through Stopper (PTS) is formed in only a region directly under a portion of the fin where the fin intersects the gate stack | 2015-11-05 |
20150318397 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a semiconductor device and a method of manufacturing the same. An example device may include: a fin formed on a substrate; a gate stack formed on the substrate and intersecting the fin, wherein the gate stack is isolated from the substrate by an isolation layer, and a Punch-Through Stopper (PTS) formed under the fin, including a first section directly under a portion of the fin where the fin intersects the gate stack and second sections on opposite sides of the first section, wherein the second sections each have a doping concentration lower than that of the first section. | 2015-11-05 |
20150318398 | METHODS OF FORMING EPI SEMICONDUCTOR MATERIAL IN A TRENCH FORMED ABOVE A SEMICONDUCTOR DEVICE AND THE RESULTING DEVICES - One method disclosed includes, among other things, forming a gate structure above an active region of a semiconductor substrate, wherein a first portion of the gate structure is positioned above the active region and second portions of the gate structure are positioned above an isolation region formed in the substrate, forming a sidewall spacer adjacent opposite sides of the first portion of the gate structure so as to define first and second continuous epi formation trenches comprised of the spacer that extend for less than the axial length of the gate structure, and forming an epi semiconductor material on the active region within each of the first and second continuous epi formation trenches. | 2015-11-05 |
20150318399 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes a first multi-channel active pattern defined by a field insulating layer and extending along a first direction, the first multi-channel active pattern including a first portion having a top surface protruding further in an upward direction than a top surface of the field insulating layer and a second portion on both sides of the first portion, the second portion having sidewalls with a continuous profile and a top surface protruding further in the upward direction than the top surface of the field insulating layer and protruding in the upward direction less than the top surface of the first portion, a gate electrode on the first portion of the first multi-channel active pattern and extending along a second direction different from the first direction, and a first source/drain region on the second portion of the first multi-channel active pattern and contacting the field insulating layer. | 2015-11-05 |
20150318400 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR - Provided is a back-channel etch (BCE) thin-film transistor (TFT) without an etch stopper layer, wherein an oxide semiconductor layer of the TFT has excellent resistance to an acid etchant used when forming a source-drain electrode, and has excellent stress stability. The TFT comprises a gate electrode, a gate insulator film, an oxide semiconductor layer, a source-drain electrode, and a passivation film which protects the source-drain electrode, on a substrate. The oxide semiconductor layer comprises one or more elements selected from a group consisting tin, indium, gallium and zinc; and oxygen; and a value in a cross-section in the lamination direction of the TFT, as determined by [100×(the thickness of the oxide semiconductor layer directly below a source-drain electrode end−the thickness in the center portion of the semiconductor layer)/the thickness of the semiconductor layer directly below the source-drain electrode end], is not more than 5%. | 2015-11-05 |
20150318401 | VERTICALLY STACKED HETEROSTRUCTURES INCLUDING GRAPHENE - A vertically stacked heterostructure device includes: (1) a substrate; and (2) vertically stacked layers disposed over the substrate and including (a) a source electrode including a layer of graphene; (b) a drain electrode; and (c) a semiconducting channel disposed between the source electrode and the drain electrode. During operation of the device, a current is configured to flow between the source electrode and the drain electrode through the semiconducting channel. | 2015-11-05 |
20150318402 | SEMICONDUCTOR DEVICE - A transistor including an oxide semiconductor and having favorable operation characteristics is provided. Further, by using the transistor, a semiconductor having improved operation characteristics can be provided. In planar view, one of a source electrode and a drain electrode of the transistor is surrounded by a ring-shaped gate electrode. Further, in planar view, one of the source electrode and the drain electrode of the transistor is surrounded by a channel formation region. Accordingly, the source electrode is not electrically connected to the drain electrode through a parasitic channel generated in an end portion of an island-shaped oxide semiconductor layer. | 2015-11-05 |
20150318403 | ALUMINUM SUBSTRATE FOR A THIN FILM TRANSISTOR - A substrate comprises of a recrystallized aluminum alloy. An organic polymer layer coats the top surface of the aluminum substrate. A layer of one of: SiO | 2015-11-05 |
20150318404 | Semiconductor device - A manufacturing method of a display device having an array substrate includes the steps of forming a projection of an organic material in a pixel on the array substrate by patterning a photosensitive material or by inkjet, forming a TFT on the array substrate, wherein a source electrode of the TFT is formed to extend on at least part of the upper surface of the projection, forming an inorganic passivation layer over the TFT and over at least part of the upper surface of the projection, forming an organic passivation layer over the inorganic passivation layer, forming an upper insulating layer over at least part of the organic passivation layer, forming a contact hole in the inorganic passivation layer and the upper insulation layer over the upper surface of the projection, and forming a pixel electrode on the upper insulation layer which contacts the source electrode. | 2015-11-05 |
20150318405 | FIELD-EFFECT TRANSISTOR INCLUDING TRANSPARENT OXIDE AND LIGHT-SHIELDING MEMBER, AND DISPLAY UTILIZING THE TRANSISTOR - A field-effect transistor includes a substrate, a source electrode, a drain electrode, a gate electrode, a gate-insulating film, and an active layer. The active layer contains an oxide having a transmittance of 70% or more in the wavelength range of 400 to 800 nm. A light-shielding member is provided as a light-shielding structure for the active layer, for example, on the bottom face of the substrate. | 2015-11-05 |
20150318406 | CONTINUOUS TUNABLE LC RESONATOR USING A FET AS A VARACTOR - A varactor includes a field effect transistor (FET) integrated with at least a portion of a bipolar junction transistor (BJT), in which a back gate of the FET shares an electrical connection with a base of the BJT, and in which a reverse voltage applied to the back gate of the FET creates a continuously variable capacitance in a channel of the FET. | 2015-11-05 |
20150318407 | Adding Decoupling Function for TAP Cells - A circuit includes a tap cell. The tap cell includes a well region, a first well pickup region in the well region, a VDD power rail and a VSS power rail spaced apart from the VDD power rail. The tap cell also includes a first jog extending from the VDD power rail toward the VSS power rail and forming a continuous region with the VDD power rail. The tap cell further comprises a first capacitor including a first gate electrode line acting as a first capacitor plate, and the first well pickup region acting as a part of a second capacitor plate. A first one of the first and second capacitor plates is overlapped by and connected to the first jog, and a second one of the first and second capacitor plates is coupled to the VSS power rail. | 2015-11-05 |
20150318408 | Edge Illuminated Photodiodes - This invention comprises plurality of edge illuminated photodiodes. More specifically, the photodiodes of the present invention comprise novel structures designed to minimize reductions in responsivity due to edge surface recombination and improve quantum efficiency. The novel structures include, but are not limited to, angled facets, textured surface regions, and appropriately doped edge regions. | 2015-11-05 |
20150318409 | ASSEMBLY FOR HOUSING WIRE ELEMENTS - The assembly has a central block that includes a first main face, a second main face and side faces. The second main face is opposite to the first main face, and the side faces connect the first main face to the second main face. The assembly also includes a first cover arranged on the first main face. The first main face and a first external surface of the first cover form a first groove for housing a first wire element, and the first groove extends along an entire length of the first main face. The assembly further includes a second cover arranged on the second main face. The second main face and a second external surface of the second cover form a second groove for housing a second wire element, and the second groove extends along an entire length of the second main face. | 2015-11-05 |
20150318410 | SOLAR PHOTOVOLTAIC PANEL AND SOLAR PHOTOVOLTAIC SYSTEM - A solar photovoltaic panel disposed in a matrix for use, wherein the solar photovoltaic panel comprises a plurality of antennas configured to communicate with antennas placed on adjoining solar photovoltaic panels, a receptor configured to receive a search command via the plurality of antennas, a transmitter configured to transmit a search command from the antennas excluding the antenna having received the search command in response to the received search command, and a responder configured to create a response signal including the panel ID of its own solar photovoltaic panel and transmit the response signal from the antenna having received the search command when no response signal to the search command transmitted from the transmitter is received, and when a response signal to the search command transmitted from the transmitter is received, transmit the response signal with the addition of information from the antenna having received the search command. | 2015-11-05 |
20150318411 | PHOTONIC LOCK BASED HIGH BANDWIDTH PHOTODETECTOR - The technique introduced herein decouples the traditional relationship between bandwidth and responsivity, thereby providing a more flexible and wider photodetector design space. In certain embodiments of the technique introduced here, a photodetector device includes a first mirror, a second mirror, and a light absorption region positioned between the first and second reflective mirrors. For example, the first mirror can be a partial mirror, and the second mirror can be a high-reflectivity mirror. The light absorption region is positioned to absorb incident light that is passed through the first mirror and reflected between the first and second mirrors. The first mirror can be configured to exhibit a reflectivity that causes an amount of light energy that escapes from the first mirror, after the light being reflected back by the second mirror, to be zero or near zero. | 2015-11-05 |
20150318412 | Microstructured ZnO coatings for improved performance in Cu(In, Ga)Se2 photovoltaic devices - A microstructured ZnO coating that improves the performance of Cu(In,Ga)Se | 2015-11-05 |
20150318413 | PHOTOVOLTAIC DEVICE STRUCTURE AND METHOD - A surface region of a semiconductor material on a surface of a semiconductor device is doped during its manufacture, by coating the surface region of the semiconductor material with a dielectric material surface layer and locally heating the surface of the semiconductor material in an area to be doped to locally melt the semiconductor material with the melting being performed in the presence of a dopant source. The heating is performed in a controlled manner such that a region of the surface of the semiconductor material in the area to be doped is maintained in a molten state without refreezing for a period of time greater than one microsecond and the dopant from the dopant source is absorbed into the molten semiconductor. | 2015-11-05 |
20150318414 | AN ELECTRO-CONDUCTIVE PASTE COMPRISING AN INORGANIC REACTION SYSTEM WITH A HIGH GLASS TRANSITION TEMPERATURE IN THE PREPARATION OF ELECTRODES IN MWT SOLAR CELLS - The invention relates to an electro-conductive paste comprising an inorganic reaction system with a high glass transition temperature in the preparation of electrodes in solar cells, particularly in the preparation of electrodes in MWT solar cells, particularly in the preparation of the metal wrap through, or plug, electrode in such solar cells. In particular, the invention relates to a solar cell precursor, a process for preparing a solar cell, a solar cell and a module comprising solar cells. | 2015-11-05 |
20150318415 | FULLY INTEGRATED CMOS-COMPATIBLE PHOTODETECTOR WITH COLOR SELECTIVITY AND INTRINSIC GAIN - A metal-semiconductor-metal photodetecting device and method of manufacturing a metal-semiconductor-metal photodetecting device that includes a p-type silicon substrate with an oxide layer disposed on the p-type silicon substrate. Schotty junctions are disposed adjacent to the oxide layer on the p-type silicon substrate and a plasmonic grating disposed on the oxide layer. The plasmonic grating provides wavelength range selectability for the photodetecting device. | 2015-11-05 |
20150318416 | TEXTURED MULTI-JUNCTION SOLAR CELL AND FABRICATION METHOD - A method for forming a multi-junction photovoltaic device includes providing a germanium layer and etching pyramidal shapes in the germanium layer such that (111) facets are exposed to form a textured surface. A first p-n junction is formed on or over the textured surface from III-V semiconductor materials. Another p-n junction is formed over the first p-n junction from III-V semiconductor materials and follows the textured surface. | 2015-11-05 |
20150318417 | PHOTOELECTRIC CONVERSION ELEMENT - A photoelectric conversion element includes a first electrode layer, a photoelectric conversion layer, and a second electrode layer. The first electrode layer includes a first base member, and a rough layer formed on the first base member. The photoelectric conversion layer is formed on the rough layer, and the second electrode layer is formed above the photoelectric conversion layer. The rough layer includes a plurality of metal fine particles irregularly connected together and to a surface of the first base member, and the photoelectric conversion layer infiltrates among the plurality of metal fine particles constituting the rough layer. | 2015-11-05 |
20150318418 | MINORITY CARRIER BASED HGCDTE INFRARED DETECTORS AND ARRAYS - Disclosed are minority carrier based mercury-cadmium telluride (HgCdTe) infrared detectors and arrays, and methods of making, are disclosed. The constructions provided by the invention enable the detectors to be used at higher temperatures, and/or be implemented on less expensive semiconductor substrates to lower manufacturing costs. An exemplary embodiment a substrate, a bottom contact layer disposed on the substrate, a first mercury-cadmium telluride layer having a first bandgap energy value disposed on the bottom contact layer, a second mercury-cadmium telluride layer having a second bandgap energy value that is greater than the first bandgap energy value disposed on the first mercury-cadmium telluride layer, and a collector layer disposed on the second mercury-cadmium telluride layer, wherein the first and second mercury-cadmium telluride layers are each doped with an n-type dopant. | 2015-11-05 |
20150318419 | CONDUCTIVE PASTE USED FOR SOLAR CELL ELECTRODES AND METHOD OF MANUFACTURING THE SOLAR CELL ELECTRODES - A conductive paste used for a solar cell electrode comprising, (i) 60 wt % to 95 wt % of a conductive powder; (ii) 0.1 wt % to 5.0 wt % of a lead-tellurium-oxide powder, comprising 20 wt % to 60 wt % of PbO and 20 wt % to 60 wt % of TeO | 2015-11-05 |
20150318420 | BONDS FOR SOLAR CELL METALLIZATION - A solar cell can include a substrate and a semiconductor region disposed in or above the substrate. The solar cell can also include a conductive contact disposed on the semiconductor region with the conductive contact including a conductive foil bonded to the semiconductor region. | 2015-11-05 |
20150318421 | SEMICONDUCTOR FILM, METHOD OF PRODUCING SEMICONDUCTOR FILM, SOLAR CELL, LIGHT-EMITTING DIODE, THIN FILM TRANSISTOR, AND ELECTRONIC DEVICE - A semiconductor film, including: an assembly of semiconductor quantum dots containing a metal atom; and a ligand that is coordinated to the semiconductor quantum dots and that is represented by the following Formula (A): | 2015-11-05 |
20150318422 | SOLAR CELL MODULE - A solar cell module comprising: a first protective member having a curved surface having a prescribed radius of curvature set in at least a first direction; a first filling material arranged upon the first protective member; a plurality of solar cell strings arranged in the first direction upon the first filling material and connected in parallel to each other; a second filling material arranged upon the solar cell strings; and a second protective member arranged upon the second filling material. The solar cell strings have connected in series a plurality of solar cells that are arranged in a second direction. The solar cells have end cross-sections along at least the first direction that have a waveform shape. | 2015-11-05 |
20150318423 | A BACK SHEET FOR PHOTOVOLTAIC MODULES - A back sheet for a photovoltaic module includes a polymeric support and a weather resistant layer, the weather resistant layer including a binder containing a crosslinkable group and an aliphatic isocyanate crosslinking agent, characterized in that the weather resistant layer further includes an aromatic or an alicyclic isocyanate crosslinking agent, and wherein the molar ratio of the isocyanate groups of the aliphatic isocyanate crosslinking agents to the isocyanate groups of the aromatic and/or alicyclic crosslinking agents is ≦3. | 2015-11-05 |
20150318424 | Solar panel enclosure unit - A solar energy enclosure unit having a housing defining a central cavity in which there is located a turntable upon which is mounted a solar panel; the turntable and solar panel rotated at low revolutions per minute by an associated electric motor, the enclosure having a convex transparent dome covering the solar panel, the transparent convex dome having prismatic facets formed thereon for magnifying, concentrating, and focusing solar rays onto the solar panel regardless of the position of the sun, in the sky, relative to the housing. | 2015-11-05 |
20150318425 | MONOLITHIC INTEGRATION OF HETEROJUNCTION SOLAR CELLS - A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned over the doped layer to form conductive islands such that the conductive islands are aligned with the alternating regions to define a plurality of photovoltaic cells connected in series on a monolithic structure. | 2015-11-05 |
20150318426 | MITIGATION TECHNIQUES FOR PHOTOVOLTAIC (PV) MODULE INSTALLATION SURFACE ABRASION - Mitigation techniques for photovoltaic (PV) module installation surface abrasion are described. According to one embodiment, a photovoltaic system includes first and second photovoltaic modules, each including a first coupling element (e.g., mounting leg) on a first end and a second coupling element on a second end opposite of the first end. The system also includes a connector assembly including a fastener adapted to engage the first coupling element of the first photovoltaic module with the second coupling element of the second photovoltaic module. The fastener is configured to provide an engagement state that enables movement of the second coupling element of the second photovoltaic module independent of the first photovoltaic module. | 2015-11-05 |
20150318427 | PHOTOVOLTAIC DEVICE ASSEMBLY AND METHOD - The present invention is premised upon a connector device and method that can more easily electrically connect a plurality of PV arrays and/or locate these arrays upon a building or structure. It also can optionally provide some additional components (e.g. a bypass diode and/or an indicator means) and can enhance the serviceability of the array. | 2015-11-05 |
20150318428 | PLATED ELECTRICAL CONTACTS FOR SOLAR MODULES - The present invention concerns a plating method for manufacturing of electrical contacts on a solar module wherein the wiring between silicon solar cells in a solar module is deposited by electroplating onto a conductive seed. The wiring between individual silicon solar cells comprises wiring reinforcement pillars which improve the reliability of said wiring. | 2015-11-05 |
20150318429 | ACTIVE SOLAR CELL AND METHOD OF MANUFACTURE - Methods for improving the efficiency of solar cells, and a solar cell thereof. One aspect involves a solar cell with a semiconductor layer ( | 2015-11-05 |
20150318430 | Organic Optoelectronic Component with Infrared Detector - An organic optoelectronic component includes a substrate, an organic light-emitting element which has an organic light-emitting layer between two electrodes, and an organic radiation-detecting element which has an organic radiation-detecting layer. The organic light-emitting element and the organic radiation-detecting element are arranged on the substrate. The organic light-emitting element is designed to emit visible light during operation and the organic radiation-detecting element is designed to detect infrared radiation during operation. | 2015-11-05 |
20150318431 | METHOD FOR MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - A method for manufacturing a photoelectric conversion device, comprising: a first step of forming a buffer layer on a light absorption layer containing a group I-III-VI compound or a group I-II-IV-VI compound; and a second step of bringing a surface of the buffer layer into contact with a first solution containing sulfide ions or hydrogen sulfide ions. | 2015-11-05 |
20150318432 | TUBULAR PHOTOVOLTAIC DEVICE AND METHOD OF MAKING - A tubular photovoltaic device capable of collecting light from a variety of angles is disclosed. The tubular photovoltaic device is sealed at an end with a sealing ring and hermetic sealing cap. Novel deposition electrodes and processes for depositing thin films inside a tubular substrate are also disclosed. | 2015-11-05 |
20150318433 | METHOD FOR PRODUCING A COMPOUND SEMICONDUCTOR, AND THIN-FILM SOLAR CELL - The present invention relates to a method for producing a compound semiconductor ( | 2015-11-05 |
20150318434 | BACKSIDE TRANSPARENT SUBSTRATE ROUGHENING FOR UV LIGHT EMITTING DIODE - In the present invention, a fabrication process for epitaxy onto back-side patterned substrate, where the substrate patterns were defined prior to epitaxy and therefore simplify post growth processing. Specifically, for LED devices, said fabrication process reduces the post growth processing steps required to obtain high LEE due to strong scattering of the back-side features defined on the substrate. The features defined on the back-side patterned substrate scatters strongly with light emitted from the LED devices. Methods of obtaining such features include wet and dry etching. | 2015-11-05 |
20150318435 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×10 | 2015-11-05 |
20150318436 | METHOD FOR SEPARATING GROWTH SUBSTRATE, METHOD FOR MANUFACTURING LIGHT-EMITTING DIODE, AND LIGHT-EMITTING DIODE MANUFACTURED USING METHODS - Disclosed are a method for separating a growth substrate, a method for manufacturing a light-emitting diode, and the light-emitting diode. The method for separating a growth substrate, according to one embodiment, comprises: preparing a growth substrate; forming a sacrificial layer and a mask pattern on the growth substrate; etching the sacrificial layer by using electrochemical etching (ECE); covering the mask pattern, and forming a plurality of nitride semiconductor stacking structures which are separated from each other by an element separation area; attaching a support substrate to the plurality of semiconductor stacking structures, wherein the support substrate has a plurality of through-holes connected to the element separation area; and separating the growth substrate from the nitride semiconductor stacking structures. | 2015-11-05 |
20150318437 | SINGLE-PHOTON SOURCE SUITABLE FOR MASS PRODUCTION AND PRODUCTION METHOD - A single-photon source was developed and the source comprises at least one active solid body, which upon excitation with light having photons which each have excitation energy, emits a single photon having lower emission energy within a predefined time period. The active solid body is disposed on a surface or an interface of an electrically operated light source for photons having the excitation energy, so that the solid body can be excited through this surface or interface. It was found that the ease of handling and the ability to miniaturize electrical primary light sources can thus advantageously be combined with the ability of the active solid body to emit exactly one photon. Since the active solid body emits only a single photon within a predefined time period, it is no longer a disadvantage if the light source that is used for excitation emits a large number of photons per unit of time. This opens a way to mass-produce single-photon sources, among other things. | 2015-11-05 |
20150318438 | PREPARATION METHOD FOR HIGH-VOLTAGE LED DEVICE INTEGRATED WITH PATTERN ARRAY - The invention disclosed a preparation method for a high-voltage LED device integrated with a pattern array, comprising the following process steps: providing a substrate, and forming a N-type GaN limiting layer, an epitaxial light-emitting layer and a P-type GaN limiting layer on the substrate in sequence; isolating the N—GaN limiting layer, the epitaxial light-emitting layer and the P—GaN limiting layer on the substrate into at least two or more independent pattern units by means of photo lithography and etching process, wherein each of the pattern unit is in a triangular shape, and very two adjacent pattern units are arranged in an opposing and crossed manner to form a quadrangle, and the quadrangles formed by a plurality of adjacent pattern units are distributed in array; and connecting each pattern unit with metal wires to form a series connection and/or a parallel connection, thereby forming a plurality of interconnected LED chips. For the purpose of improving the current distribution so as to increase the luminescent efficiency of the device, a current blocking layer is also arranged beneath the P-type metal contact of each unit in addition, an insulation material is also arranged to cover the surface of the chip so as to achieve the purposes of protecting the chip and increasing the light extraction efficiency of the chip. | 2015-11-05 |
20150318439 | OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - An optoelectronic device includes a substrate; a first semiconductor layer having a first conductivity-type impurity formed on the substrate, an active layer formed on the first semiconductor layer, and a second semiconductor layer having a second conductivity-type impurity formed on the active layer; and a hollow component formed inside the active layer or the second semiconductor layer, wherein a material of the active layer or a material of the second semiconductor layer comprises group IIIA nitride semiconductor. | 2015-11-05 |
20150318440 | SEMICONDUCTOR LIGHT EMITTING DEVICE HAVING PATTERNS - A semiconductor light emitting device includes a substrate structure; a semiconductor layer disposed on the substrate structure, the semiconductor layer including a light emitting layer; and an electrode formed on a surface of the semiconductor layer, wherein a relatively coarse uneven portion and a relatively fine uneven portion are formed by a frost process on a surface of the semiconductor layer at a side of the electrode. | 2015-11-05 |
20150318441 | P-TYPE DOPING LAYERS FOR USE WITH LIGHT EMITTING DEVICES - A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits. | 2015-11-05 |
20150318442 | ELECTROLUMINESCENT DEVICES AND APPLICATIONS THEREOF - In one aspect, electroluminescent architectures and devices are described herein. An electroluminescent device, in some embodiments, comprises a first electrode, a second electrode and at least one light emitting layer comprising charge carrier injection structures in contact with an electroluminescent phase in a predetermined spatial distribution, the electroluminescent phase comprising luminescent centers in a semiconductor matrix. | 2015-11-05 |
20150318443 | LED CHIP RESISTANT TO ELECTROSTATIC DISCHARGE AND LED PACKAGE INCLUDING THE SAME - A light emitting diode chip and a light emitting diode package including the same. The light emitting diode chip includes a substrate, a light emitting diode section disposed on the substrate, an inverse parallel diode section disposed on the substrate and connected inversely parallel to the light emitting diode section. In the light emitting diode chip, the light emitting diode section is disposed together with the inverse parallel diode section. | 2015-11-05 |
20150318444 | Integrated LED Light-Emitting Device and Fabrication Method Thereof - An integrated LED light-emitting device includes: at least two mutually-isolated LED light-emitting epitaxial units having an upper and a lower surface, in which, the upper surface is a light-emitting surface; an electrode pad layer over the lower surface of the LED light-emitting epitaxial unit, with sufficient thickness for supporting the LED epitaxial unit and connecting to each LED light-emitting epitaxial unit to form a connection circuit plane with no height difference; and the electrode pad layer is divided into a P electrode region and an N electrode region. The LED light-emitting epitaxial units constitute a series, parallel or series-parallel circuit. Embodiments disclosed herein can effectively improve the problems of package welding, electrode shading and poor wiring stability. | 2015-11-05 |
20150318445 | NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride-based semiconductor light-emitting device includes: a nitride-based semiconductor multilayer structure including a p-type semiconductor region having an m-plane as a growing plane; and an Ag electrode provided so as to be in contact with the growing plane of the p-type semiconductor region, wherein the Ag electrode has a thickness in a range of not less than 200 nm and not more than 1,000 nm; an integral intensity ratio of an X-ray intensity of a (111) plane on the growing plane of the Ag electrode to that of a (200) plane is in a range of not less than 20 and not more than 100; and the Ag electrode has a reflectance of not less than 70%. | 2015-11-05 |
20150318446 | Low-Temperature Fabrication of Transparent Conductive Contacts for p-GaN and n-GaN - A ternary transparent conductive oxide, indium zinc oxide (IZO), is formed as a thin film by co-sputtering zinc oxide with indium oxide at a deposition temperature between 25 and 200 C. Optionally, up to 1-2% Al may be added by various methods. The layers may be annealed at temperatures between 200 and 400 C. Measurements of IZO with 75-85 wt % In | 2015-11-05 |
20150318447 | Display Apparatus and Method of Manufacturing the Same - Provided are a display apparatus and a method of manufacturing the display apparatus. A color filter layer including at least a red color filter, a green color filter, and a blue color filter is disposed on a first substrate. A black matrix is disposed on the color filter layer. A color filter overlapped unit where the red, green and blue color filters are overlapped is disposed in a black matrix area corresponding to the black matrix. The color filter overlapped unit has a lower reflectivity with respect to an external light than the other color filters. The color filter overlapped unit is formed in the black matrix area, and the color filter overlapped unit is formed by overlapping the blue, red and green color filters in order, and, thus, can prevent mixing of colors and reduce reflection with respect to an external light. | 2015-11-05 |
20150318448 | LED Epitaxial Structure and Fabrication Method Thereof - An LED epitaxial structure includes a substrate; a GaN nucleating layer; a superlattice buffer layer comprising a plurality pairs of alternately stacked AlGaN/n-GaN structures; an n-GaN layer; a MQW light-emitting layer, a p-GaN layer and a p-type contact layer. Al(n) represents Al composition value of the n | 2015-11-05 |
20150318449 | A hermetically sealed optoelectronic component - This invention provides inexpensively hermetically packaged optoelectronic chips. Multiple similar or dissimilar optoelectronic chips can be produced according to the present methods. Additionally, the chips may include a heat sink for efficient thermal management and elements for wavelength conversion without compromising their efficiency or quality. Furthermore, optical structures are provided to allow optimization of optical performance. | 2015-11-05 |
20150318450 | POLYCARBONATE COMPOSITIONS CONTAINING CONVERSION MATERIAL CHEMISTRY AND HAVING ENHANCED OPTICAL PROPERTIES, METHODS OF MAKING AND ARTICLES COMPRISING THE SAME - In some embodiments, a composition includes: a conversion material and a bisphenol-A polycarbonate; wherein a molded article of the bisphenol-A polycarbonate has a transmission level of greater than or equal to 90.0% at a thickness of 2.5 mm as measured by ASTM D1003-00; and wherein the molded article comprises an increase in the yellow index of less than 2 during 2,000 hours of heat aging at 130° C.; and wherein the conversion material comprises a yellow conversion material, a green conversion material, a red conversion material, or a combination comprising at least one of the foregoing. | 2015-11-05 |
20150318451 | LIGHT EMITTING DEVICE - A light emitting device of an embodiment includes a light emitting element emitting near-ultraviolet light or blue light as exciting light; and a yellow color conversion layer including a yellow phosphor and a resin, the yellow phosphor represented by formula (1) and being capable of converting the exciting light to yellow light, the resin surrounding the yellow phosphor, the yellow color conversion layer containing the yellow phosphor at a volume concentration of at most 7%, the yellow color conversion layer having a region whose cross section parallel to a light emitting surface of the light emitting element has an area larger than the light emitting surface, | 2015-11-05 |
20150318452 | LED PACKAGE STRUCTURE FOR ENHANCING MIXED LIGHT EFFECT - An LED package structure for enhancing mixed light effect comprises: at least one first light emitting chip; at least one second light emitting chip, a frame structure having a first containing portion, a second containing portion, a spacing portion and a light mixing area; a first colloid, filled into the first containing portion; a second colloid, filled into the second containing portion; and an encapsulating colloid, packaged and filled into the light mixing area. This design can enhance the light emission efficiency and achieve a uniform light-mixing dot light source. | 2015-11-05 |
20150318453 | PACKAGE METHOD AND PACKAGE - A package method includes steps of providing a light emitting module, a mold and a molding compound, wherein the light emitting module includes a substrate and at least one light emitting unit disposed on the substrate, the mold has at least one recess, and a side wall of the recess is parallel to a side surface of the light emitting unit; filling the recess with the molding compound; placing the substrate on the mold reversely, so that the light emitting unit is immersed into the recess and the molding compound directly encapsulates the light emitting unit; and heating and pressing the substrate and the mold, so as to solidify the molding compound. | 2015-11-05 |
20150318454 | LIGHT EMITTING DIODE - Provided are a light emitting diode, a method of manufacturing the same, and a use thereof. The light emitting diode having excellent initial light flux and excellent color uniformity and dispersion, the method of manufacturing the same, and the use thereof may be provided. | 2015-11-05 |
20150318455 | QUANTUM DOT (QD) DELIVERY METHOD - An LED is fabricated with a composite layer including quantum dots (QDs), wherein the QDs are provided in a silicone paste. A plurality of QD silicone paste reservoirs each contain a provided silicone paste with QDs of different wavelengths. Further, a silicone paste reservoir containing a clear silicone paste. A paste mixing chamber, in to which the QD paste reservoirs and the silicone paste reservoir supply their respective pastes, mixes together the pastes and form a mixed QD silicone paste. A silicone mixing and metering component receives the mixed QD silicone paste from the paste mixing chamber, and further receives A silicone and B silicone from a respective A silicone reservoir and a B silicone reservoir, measures, and mixes the mixed QD silicone paste with the A and B silicones to form a silicone polymer composite. A dispensing component receives to the silicone polymer composite from the mixing and metering component and dispenses the composite to a molding tool. | 2015-11-05 |
20150318456 | OPTICAL LENS DEVICE - The present invention provides an optical lens device, comprising a LED module and an optical lens. The structure of the optical lens is symmetrically formed with respect to a central axis, the structure comprising a funnel-like upper face, a base face and a lateral face. At the center of base face, there is projectingly provided with a light-guiding structure. Rays emitted from the LED module are allowed to enter into the optical lens through the light-guiding structure, and a part of wide-angle rays are totally reflected by a lateral side of the light-guiding structure to be directed toward the upper face, and then emitted through the lateral face after totally reflected by the upper face. Accordingly, the side illuminating rays may be increased by directing the part of wide-angle rays to be emitted through the lateral face, and thus the luminous efficacy of side illumination is enhanced. | 2015-11-05 |
20150318457 | LIGHT EMITTING DIODE PACKAGE - A light emitting diode (LED) package includes an LED chip, a first lead frame and a second lead frame electrically connected to the LED chip and separated by a space, and a housing disposed on the first lead frame and the second lead frame. The housing includes an external housing surrounding a cavity, the cavity exposing a first portion of the first lead frame and a first portion of the second lead frame, and an internal housing disposed in the space, the internal housing covering a top portion of the first lead frame and a top portion of the second lead frame. | 2015-11-05 |
20150318458 | LIGHT EMITTING DEVICE MOUNT AND LIGHT EMITTING APPARATUS - A light emitting device mount includes a positive lead terminal, a negative lead terminal, and a resin portion. Each of the positive lead terminal and the negative lead terminal includes a first main surface, a second main surface opposite to the first main surface in a thickness direction of each of the positive lead terminal and the negative lead terminal, and an end surface which is provided between the first main surface and the second main surface and which includes a first recessed surface area and a second recessed surface area. The first recessed surface area extends from the first main surface. The second recessed surface area extends from the second main surface, includes a closest point closest to the first main surface, and includes an extension part that extends outward of the closest point and toward the second main surface. | 2015-11-05 |
20150318459 | LIGHT EMITTING DEVICE WITH REDUCED EPI STRESS - Elements are added to a light emitting device to reduce the stress within the light emitting device caused by thermal cycling. Alternatively, or additionally, materials are selected for forming contacts within a light emitting device based on their coefficient of thermal expansion and their relative cost, copper alloys being less expensive than gold, and providing a lower coefficient of thermal expansion than copper. Elements of the light emitting device may also be structured to distribute the stress during thermal cycling. | 2015-11-05 |
20150318460 | THERMOELECTRIC CONVERSION MODULE - A thermoelectric conversion module includes a p-type thermoelectric conversion member ( | 2015-11-05 |
20150318461 | BULK ACOUSTIC WAVE (BAW) DEVICE HAVING ROUGHENED BOTTOM SIDE - A bulk acoustic wave (BAW) resonator includes a substrate having a top side surface and a bottom side surface. A Bragg mirror is on the top side surface of the substrate. A bottom electrode layer is on the Bragg mirror, and a piezoelectric layer is on the bottom electrode layer. A top dielectric layer is on the piezoelectric layer, and a top electrode layer is on the top dielectric layer. The bottom side surface of the substrate has a surface roughness of at least 1 μm root mean square (RMS). | 2015-11-05 |
20150318462 | PIEZOELECTRIC VIBRATION DEVICE FOR MOBILE TERMINAL - A piezoelectric vibration device for a mobile terminal is disclosed. A bimorph piezoelectric vibrator includes a pair of piezoelectric element layers connected to one of positive and negative poles and a middle electrode plate interposed between the piezoelectric element layers and connected to the other pole. The piezoelectric vibrator generates vibration due to up/down bending displacement by fixing both end portions thereof to an inner surface of a casing of a mobile terminal. A voltage-boosting transformer raises a power source voltage of a mobile terminal to a driving voltage. A driving chip receives the raised driving voltage from the voltage-boosting transformer and drives the piezoelectric vibrator. Weights are attached to at least one of both sides of the piezoelectric vibrator to amplify vibration. Insulation members are provided at both end portions of the piezoelectric vibrator to prevent electricity applied to the piezoelectric vibrator from leaking to the casing. | 2015-11-05 |
20150318463 | VIBRATOR - A vibrator includes: a housing having an interior space; a vibrating member installed within the housing; a piezoelectric element installed on a top surface of the vibrating member; and space forming parts disposed to face side surfaces of the piezoelectric element, respectively, and forming a space in which a filler is provided, together with the side surfaces of the piezoelectric element. | 2015-11-05 |
20150318464 | Method for Producing an Electronic Component - A method for producing an electronic component includes providing a piezoelectric main body, which is provided with electrodes. A first electric polarization field having a first polarity direction is applied to the piezoelectric main body between the two electrodes and then a second electric polarization field is applied in a second polarity direction, opposite to the first polarity direction, to the piezoelectric main body between the electrodes. The absolute value of the second electric polarization field differs from that of the first electric polarization field. | 2015-11-05 |
20150318465 | Magnetoresistive Structure having Two Dielectric Layers, and Method of Manufacturing Same - A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least an encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. | 2015-11-05 |
20150318466 | OXIDATION PROCESS APPARATUS, OXIDATION METHOD, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE - An oxidation process apparatus according to one embodiment of the present invention includes: a substrate holder provided in a processing chamber and having a substrate holding surface; a gas introduction unit for introducing an oxygen gas; a cylindrical member; and a substrate holder drive unit for changing relative positions of the substrate holder and the cylindrical member to allow the substrate holding surface and the cylindrical member to form an oxidation process space. The cylindrical member is provided so as to form a gap between the cylindrical member and the substrate holder during formation of the space. The oxygen gas is introduced restrictively into the space. The oxygen gas introduced from the gas introduction unit is evacuated through the gap. | 2015-11-05 |
20150318467 | PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS - Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner. | 2015-11-05 |
20150318468 | PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS - Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner. | 2015-11-05 |
20150318469 | PHASE CHANGE MEMORY CELL AND PHASE CHANGE MEMORY - A phase change memory cell includes a carbon nanotube layer, a phase change layer, a first electrode, a second electrode, and a third electrode. At least part of the phase change layer is overlapped with the carbon nanotube layer. The first electrode and the second electrode are electrically connected with the carbon nanotube layer, wherein the first electrode and the second electrode are configured to apply a first voltage to the carbon nanotube layer. The third electrode is electrically connected with the phase change layer, wherein the third electrode and the first electrode are configured to apply a second voltage to the phase change layer. | 2015-11-05 |
20150318470 | Memory Cells and Methods of Forming Memory Cells - Some embodiments include methods of forming memory cells. Programmable material may be formed directly adjacent another material. A dopant implant may be utilized to improve adherence of the programmable material to the other material by inducing bonding of the programmable material to the other material, and/or by scattering the programmable material and the other material across an interface between them. The memory cells may include first electrode material, first ovonic material, second electrode material, second ovonic material and third electrode material. The various electrode materials and ovonic materials may join to one another at boundary bands having ovonic materials embedded in electrode materials and vice versa; and having damage-producing implant species embedded therein. Some embodiments include ovonic material joining dielectric material along a boundary band, with the boundary band having ovonic material embedded in dielectric material and vice versa. | 2015-11-05 |
20150318471 | STORAGE DEVICE AND STORAGE UNIT - There are provided a storage device and a storage unit capable of improving retention performance of an intermediate resistance value in writing at a low current, and a storage device and a storage unit capable of reducing random telegraph noise. A storage device of one embodiment of the present technology includes a first electrode, a storage layer, and a second electrode in this order, and the storage layer includes: an ion source layer including one or more kinds of chalcogen elements selected from tellurium (Te), sulfur (S), and selenium (Se), and one or more kinds of transition metal elements selected from Group 4 elements, Group 5 elements, and Group 6 elements of the periodic table; and a resistance change layer including boron (B) and oxygen (O). A storage device of another embodiment of the present technology includes the above-described ion source layer and a resistance change layer including one or more kinds of transaction metal elements selected from Group 4 elements, Group 5 elements, and Group 6 elements of the periodic table, and oxygen (O). | 2015-11-05 |
20150318472 | DETERMINISTIC SEEDING OF SWITCHING FILAMENT IN OXIDE-BASED MEMRISTIVE DEVICES - A method for manufacturing an RRAM cell includes providing a metal-insulator-metal stack and exposing a subsection of a MIM stack to particle bombardment and/or radiation. Exposing a subsection of the MIM stack to particle bombardment and/or radiation forms localized defects in the functional layer of the MIM stack, thereby reducing the required forming voltage of the RRAM cell and further providing precise control over the location of a conductive filament created in the MIM stack during forming of the device. | 2015-11-05 |
20150318473 | SEMICONDUCTOR DEVICE AND OPERATION METHOD FOR SAME - A semiconductor device, includes first, second, and third switching elements. The third switching element comprises first and second terminals. Each of the first and second switching elements comprise a unified ion conductor, a first electrode disposed to contact the ion conductor and supply metal ions thereto, and a second electrode disposed to contact the ion conductor and is less susceptible to ionization than the first electrode. The first electrodes of the first switching element and the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the first electrodes which are electrically connected, or the second electrode of the first switching element and the second electrode of the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the second electrodes which are electrically connected. | 2015-11-05 |
20150318474 | RESISTIVE RAM, METHOD FOR FABRICATING THE SAME, AND METHOD FOR DRIVING THE SAME - A resistive random access memory (ReRAM) includes a first electrode, a threshold switching layer formed over the first electrode and configured to perform a switching operation according to an applied voltage, a resistance change layer formed over the threshold switching layer, and configured to perform a resistance change operation, and a second electrode formed over the resistance change layer, wherein the threshold switching layer comprises a stoichiometric transition oxide while the resistance change layer comprises a non-stoichiometric transition metal oxide. | 2015-11-05 |
20150318475 | Imprinted Memory - The present invention discloses an imprinted memory, more particularly a three-dimensional imprinted memory (3D-iP). Instead of photo-lithography, it uses imprint-lithography (also referred to as nano-imprint lithography, or NIL) to record data. For the sub-100 nm nodes, the data-template used by imprint-lithography is much less expensive than the data-mask used by photo-lithography. | 2015-11-05 |
20150318476 | PROCESS AND MATERIALS FOR MAKING CONTAINED LAYERS AND DEVICES MADE WITH SAME - There is provided a process for forming a contained second layer over a first layer, including the steps:
| 2015-11-05 |
20150318477 | Perovskite Material Layer Processing - A method for processing a perovskite photoactive layer. The method comprises depositing a lead salt precursor onto a substrate to form a lead salt thin film, depositing a second salt precursor onto the lead salt thin film, annealing the substrate to form a perovskite material. | 2015-11-05 |
20150318478 | MATERIALS FOR ORGANIC ELECTROLUMINESCENT DEVICES - The present invention describes indenocarbazole derivatives having electron- and hole-transporting properties, in particular for use in the emission and/or charge-transport layer of electroluminescent devices or as matrix material. The invention furthermore relates to a process for the preparation of the compounds according to the invention and to electronic devices comprising same. | 2015-11-05 |
20150318479 | Visible/Near-Infrared Porphyrin-Tape/C60 Organic Photodetectors - Porphyrin compounds are provided. The compounds may further comprise a fused polycyclic aromatic hydrocarbon or a fused heterocyclic aromatic. Fused polycyclic aromatic hydrocarbon s and fused heterocyclic aromatics may extend and broaden absorption, and modify the solubility, crystallinity, and film-forming properties of the porphyrin compounds. Additionally, devices comprising porphyrin compounds are also provided. The porphyrin compounds may be used in a donor/acceptor configuration with compounds, such as C | 2015-11-05 |
20150318480 | SOLAR CELL - The present invention aims to provide a solar cell having high photoelectric conversion efficiency and excellent durability. The present invention relates to a solar cell including at least: a cathode; an anode; a photoelectric conversion layer provided between the cathode and the anode; and a hole transport layer provided between the photoelectric conversion layer and the anode, the hole transport layer containing an organic semiconductor, the organic semiconductor having a carboxyl group and having a conjugated structure. | 2015-11-05 |
20150318481 | AN ORGANIC POLYMER PHOTO DEVICE WITH BROADBAND RESPONSE AND INCREASED PHOTO-RESPONSITIVITY - An organic polymer photo device with broadband response and high photo-responsitivity includes an anode terminal with a hole transporting network, and a cathode terminal with an electron transporting network. Positioned in electrical communication with the hole transporting network and the electron transporting network is a blended material that has at least one organic polymer light absorbing component. The organic light absorbing component is configured to have a collection length that is larger than the distance to the nearest electron transporting network and hole transporting network. As such, the blended material forms a light absorbing area that has a dimension that is greater than the collection length of the organic polymer light absorbing component. | 2015-11-05 |
20150318482 | PHOTOCURABLE COMPOSITION AND DEVICE INCLUDING BARRIER LAYER FORMED FROM COMPOSITION - The present invention relates to: a photocurable composition containing (A) a photocurable monomer and (B) a monomer containing phosphorus and an amide group; and a device including a barrier layer formed of the composition. | 2015-11-05 |
20150318483 | NOVEL COMPOUND AND ORGANIC ELECTROLUMINESCENT DEVICE COMPRISING SAME - The present disclosure relates to a novel compound having excellent hole injection capabilities and transport capabilities, light-emitting capabilities, and the like, and an organic electroluminescent device which includes the compound in one or more organic material layers thereof so as to improve characteristics such as light-emitting efficiency, driving voltage, and a service life. | 2015-11-05 |
20150318484 | MATERIALS FOR ELECTRONIC DEVICES - The present application relates to a compound according to formula (I), and the use thereof as a functional material in an electronic device. The compound according to formula (I) is preferably used as a hole-transporting material in an organic electroluminescence device (OLED). | 2015-11-05 |
20150318485 | MICROMOLECULAR ELECTRON TRANSPORT MATERIAL BASED ON PYRIDINE AND TRIAZOLE, PREPARATION METHOD AND ORGANIC LIGHT-EMITTING DIODE THEREOF - The present invention provides a micromolecular electron transport material based on pyridine and triazole, which is represented by the formula I, and an organic light-emitting diode using the micromolecular electron transport material. The micromolecular electron transport material of the present invention can improve the capacity of electron injection, transmitting and hole-blocking, thus can gain high E | 2015-11-05 |
20150318486 | ORGANIC LIGHT-EMITTING DEVICE - An organic light-emitting device and a flat panel display device, the organic light-emitting device including an anode; cathode; and organic layer therebetween, the organic layer including a hole transport region between the anode and the emission layer and that includes at least one of a hole injection layer, a hole transport layer, a buffer layer, and an electron blocking layer, an electron transport region between the emission layer and the cathode, the electron transport region including at least one of a hole blocking layer, an electron transport layer, and an electron injection layer, and a mixed organic layer disposed between the emission layer and the electron transport region, wherein the mixed organic layer includes a hole transport compound and an electron transport compound, and an electron affinity (EA1) of the hole transport compound and an electron affinity (EA2) of the electron transport compound satisfy the following relationship: | 2015-11-05 |
20150318487 | ORGANIC LIGHT-EMITTING DEVICE - An organic light-emitting device and a flat panel display device, the organic-light emitting device including an anode; a cathode; and an organic layer therebetween including an emission layer, a hole transport region between the anode and the emission layer, the hole transport region including at least one of a hole injection layer, a hole transport layer, and an electron blocking layer, an electron transport region between the emission layer and the cathode, the electron transport region including at least one of a hole blocking layer, an electron transport layers and an electron injection layer, and a buffer layer between the emission layer and the electron transport region, wherein the buffer layer includes a biscarbazole-based derivative and triphenylene-based derivative, and a triplet energy (E | 2015-11-05 |
20150318488 | ORGANIC LIGHT-EMITTING DEVICE - An organic light-emitting device includes a first electrode, a second electrode facing the first electrode, and an organic layer disposed between the first electrode and the second electrode and including an emission layer; an electron transport region disposed between the second electrode and the emission layer; a mixed layer disposed between the emission layer and the electron transport region and including a first material and a second material; wherein the first material and the second material are pyrrolidine-based compounds; and triplet energy Eg | 2015-11-05 |
20150318489 | ORGANIC ELECTROLUMINESCENCE ELEMENT, ILLUMINATION DEVICE, AND DISPLAY DEVICE - An organic electroluminescence element includes: an anode; a cathode; and a luminous layer. The luminous layer includes: a luminescent dopant having a reorganization energy of 0 eV to 0.7 eV in electron transition from a ground state (S | 2015-11-05 |
20150318490 | CONDENSED CYCLIC COMPOUND AND ORGANIC LIGHT-EMITTING DEVICE COMPRISING THE SAME - A condensed cyclic compound represented by Formula 1 and an organic light-emitting device including the condensed cyclic compound are provided; | 2015-11-05 |