45th week of 2009 patent applcation highlights part 21 |
Patent application number | Title | Published |
20090273906 | Transport housing for an electronic flat module - A transport housing for receiving an electronic flat assembly, the electronic assembly having at least one controllable electronic component in the form of a DIP switch and a connecting line, has two housing halves receiving the flat assembly, wherein the one housing half is inserted at least partially into the other housing half, and wherein the two housing halves have a plurality of molded elements that are disposed in a staggered arrangement, for creating a molded lock having two detent positions successively disposed in the locking direction. | 2009-11-05 |
20090273907 | CIRCUIT BOARD AND PROCESS THEREOF - A circuit board and process thereof are provided. The circuit board includes a dielectric layer, an active circuit, and two shielding circuits. The dielectric layer has an active surface. The active circuit is disposed on the active surface, and the shielding circuits are respectively disposed on two sides of the active circuit. The height of the shielding circuits is larger than the height of the active circuit. | 2009-11-05 |
20090273908 | NETWORK TRANSFORMER, NETWORK MODULE THEREOF, AND ELECTRONIC DEVICE THEREOF - The invention discloses a network transformer, a network module thereof, and an electronic device thereof The network transformer includes a plurality of coil sets, an insulating board, a casing and a plurality of pins. The pins are disposed on the casing. The network transformer is disposed on a PCB via the pins. The insulating board is disposed in the casing and connects with at least two side walls of the casing to form a plurality of isolation chambers, each of which is for containing one coil set. | 2009-11-05 |
20090273909 | FLEXIBLE DEVICE, FLEXIBLE PRESSURE SENSOR, AND FABRICATION METHOD THEREOF - A flexible device, a flexible pressure sensor, and a fabrication method thereof. The present flexible device includes: a first flexible substrate formed of a flexible material to have a flexibility; an active element formed to have a predetermined thickness and a flexibility, and being attached on the first flexible substrate; and a second flexible substrate formed of a flexible material to have a flexibility, and being deposited on the active element. The flexible device and the flexible pressure sensor have a high flexibility, so that they may be applied for a medical treatment such as implantation to a living body, a human body and so forth. In addition, the flexible device has a high flexibility, so that it may be inserted to a curved surface, which contributes to remove the limit of space where the semiconductor package device may be inserted. | 2009-11-05 |
20090273910 | Functional Unit And Method For The Production Thereof - The present invention relates to a functional unit, containing at least one active or passive electronic component, the functional unit being surrounded by at least one flexible dielectric layer and, on the outer side of the functional unit, contacts are provided for contacting the electrical components for further mounting. | 2009-11-05 |
20090273911 | Self-Detecting Electronic Connection For Electronic Devices - According to one embodiment, an apparatus has first and second connectors configured for removably connecting to one another. The first connector circuit has a first differential amplifier, a first differential signal path, a first capacitor section capacitively coupling the first differential amplifier to the first differential signal path, and a first DC biasing circuit for imparting a first DC bias to the first differential signal path opposite the first capacitor section. The second connector circuit has a second differential amplifier, a second differential signal path, a second capacitor section capacitively coupling the second differential amplifier to the second differential signal path, and a second DC biasing circuit for imparting a second DC bias to the second differential signal path opposite the second capacitor section having a different magnitude than the first DC bias when the first and second connector are not connected. One or both of the first and second connector circuits is configured for detecting a change in the first or second DC bias and outputting a connection status signal in response to the detected change. | 2009-11-05 |
20090273912 | INTERLOCKING EMI SHIELD - An electromagnetic interference shield system is provided. Each EMI shield may include a frame providing the structure around the electronic device components to be shielded, and a cover operative to be placed over the frame to prevent electromagnetic radiation from passing over the frame. Each frame may be coupled to a circuit board, and enclose electronic components in need of shielding. Each cover may be coupled to its corresponding frame using at least one snap that extends from the periphery of the cover towards the frame and circuit board. To minimize the space taken by the EMI shields, the snaps of adjacent covers may be offset or staggered so that opposing snaps engage voids left between snaps of the opposing cover, thus reducing the space needed between adjacent EMI shields by up to the width of a snap. | 2009-11-05 |
20090273913 | CIRCUIT ARRANGEMENT HAVING TWO SEMICONDUCTOR SWITCHING ELEMENTS AND ONE FREEWHEELING ELEMENT - One aspect is a circuit arrangement including a first semiconductor switching element, a second semiconductor switching element connected in series with the first semiconductor switching element and a freewheeling element connected in parallel with the second semiconductor switching element. | 2009-11-05 |
20090273914 | Apparatus and methods of forming an interconnect between a workpiece and substrate - Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed. | 2009-11-05 |
20090273915 | APPARATUS AND METHOD FOR ORGANIZING CABLES IN A CABINET - An equipment cabinet ( | 2009-11-05 |
20090273916 | Capacitor Apparatus - A capacitor apparatus, i.e. a PCU, includes a resin mold provided to surround capacitor elements and integrating the plurality of capacitor elements, and a case body for containing the resin mold. A wave structure is provided at least partially on a wall surface of the case body. With such a configuration, a capacitor apparatus capable of suppressing the transmission of the vibration to the vehicle body and improving the cooling efficiency is provided. | 2009-11-05 |
20090273917 | LIGHTING DEVICE - A lighting device which includes a body with at least two contacts, an energy storage device which is connected to the contacts and which stores electrical energy when the contacts are connected to an electrical power source, a first light source, and a switch arrangement which is responsive to disconnection of the power source from the contacts and which then switches to connect the first light source to the energy storage device. | 2009-11-05 |
20090273918 | Remote-phosphor led downlight - An embodiment of a collimating downlight has front-mounted blue LED chips facing upwards, having a heat sink on the back of the LED chips exposed in ambient air. The LED chips are mounted in a collimator that sends their blue light to a remote phosphor situated near the top of the downlight can. Surrounding the remote phosphor is a downward-facing reflector that forms a beam from its stimulated emission and reflected blue light. The phosphor thickness and composition can be adjusted to give a desired color temperature. | 2009-11-05 |
20090273919 | Backlight unit - A backlight unit capable of preventing its mis-operation and the generation of sparks due to electrical connection defects is disclosed. The backlight unit includes: a plurality of lamps emitting lights; a lamp printed-circuit board including a power supply portion electrically connected to the plural lamps and a connector wiper transferring a drive voltage to be applied to the power supply portion; a connector including a connector housing, engaged with the connector wiper and electrically connected to the connector wiper, and wires electrically connected to the connector housing; and another printed-circuit board, electrically connected to the wires, applying the drive voltage to the lamp printed-circuit board. The connector housing includes stoppers extruded toward the lamp printed-circuit board. The stoppers prevent a contact defect of the connector wiper and the lamp printed-circuit board which is caused by the connector housing. | 2009-11-05 |
20090273920 | LIGHT GENERATING DEVICE, BACKLIGHT ASSEMBLY HAVING THE SAME, AND DISPLAY APPARATUS HAVING THE BACKLIGHT ASSEMBLY - A light-generating device includes a driving substrate and a plurality of light source arrays. The driving substrate has a rectangular planar shape. The plurality of light source arrays is formed on the driving substrate. The light source arrays include at least one light emitting diode to generate light in response to power being applied through the substrate, and the light source arrays are spaced apart from each other. Thus, heat generated from the light-generating device is rapidly dissipated from the light-generating device, improving brightness of the light, brightness uniformity of the light and color reproducibility of the light. | 2009-11-05 |
20090273921 | High power LED lamp with heat dissipation enhancement - A high power LED lamp comprises a container having a cavity to fill with a liquid, a light source module for providing a high power LED source light to penetrate through the liquid, and an axial thermal conductor having a first portion nearby the light source module and a second portion extending in the liquid along an axial direction of the cavity to far away from the light source module to evenly transfer heat from the light source module through the liquid to the container. | 2009-11-05 |
20090273922 | Street light utilizing combination low-pressure sodium and metal halide light sources - A street light that uses both a low-pressure sodium vapor bulb and a metal halide bulb is disclosed. The combination of these two light bulbs creates an efficient light source that is highly effective in bad weather conditions as well as able to provide good color differentiation. Further, the street light can be battery powered, where the batteries are recharged by solar cells, wind turbines, or both. A self-sufficient cost-effective street light is produced that uses renewable energy to provide light that has high penetration and wide color spectrum characteristics. | 2009-11-05 |
20090273923 | SANITARY FITTING COMPRISING AT LEAST ONE ILLUMINATING DEVICE - The invention relates to a sanitary fitting provided with at least one illuminating device comprising at least two illuminants, especially RGB illuminants, having different irradiation colours for generating light with a colour obtained by mixing different irradiation colours, and a diffuser for the light. At least one beam splitter for splitting the light beams into a main partial beam and a reflected partial beam is arranged between each illuminant and the diffuser. A deviation means for deviating the corresponding reflected partial beam is respectively applied such that the reflected partial beam and the main partial beam hit in different regions on the diffuser. | 2009-11-05 |
20090273924 | High power LED lamp with heat dissipation enhancement - A high power LED lamp comprises a container having a cavity to fill with a liquid, a light source module for providing a high power LED source light to penetrate through the liquid, and an axial thermal conductor having a first portion nearby the light source module and a second portion extending in the liquid along an axial direction of the cavity to far away from the light source module to evenly transfer heat from the light source module through the liquid to the container. | 2009-11-05 |
20090273925 | LED ILLUMINATION ASSEMBLY WITH COMPLIANT FOIL CONSTRUCTION - An illumination assembly includes a compliant substrate comprising a first and second electrically conductive foil separated by an electrically insulating layer. The insulating layer includes a polymer material loaded with particles that enhance thermal conductivity of the insulating layer. A plurality of LED dies are disposed on the first conductive foil. | 2009-11-05 |
20090273926 | CONFIGURABLE LAMP BAR - A lamp bar includes a plurality of LEDs positioned along the body, and a rotational mechanism for rotating the body independently of an electrical connection to a power source. | 2009-11-05 |
20090273927 | POLY NIGHT LIGHT - A poly night light is made of an un-saturated polyester resin (UPR) compound to provide the night light with a certain degree of softness and cushioning to meet quality tests. The poly night light has a molded-in clip that allows the display unit to fit into a lamp holder's connector for solid installation. The lamp holder can be for an incandescent bulb, neon bulb, LED(s), organic electro-luminescent element(s), or other conventional lighting elements. The poly display unit may have a three-dimensional design, shape, curvature, and/or configuration for an eye-catching, valuable appearance and further may be painted by hand or spray paint to make it more elegant than any other currently-marketed night light. | 2009-11-05 |
20090273928 | DECORATIVE LIGHT STRING - A decorative lighting article is disclosed. The article includes a string of lights, such as miniature bulbs for holiday lighting. A mesh sleeve is placed substantially surrounding the string of lights. The mesh sleeve is preferably flexible and translucent. Thus, light passing through it is diffused and creates a unique appearance. The sleeve may be colored or clear. Ideally it is formed of a flexible material such as a nylon material. Additional decorative items may be attached to the exterior of the sleeve, such as ribbons or trinkets. Preferably, the sleeve is non-flammable. | 2009-11-05 |
20090273929 | Decoration plate - A decoration plate includes a transparent substrate; an opaque ink layer provided on a portion of the transparent substrate surface, so that the transparent substrate has a plurality of transparent regions and opaque regions; a deep color transparent ink layer provided on the transparent regions of the transparent substrate; and a multicolor transparent ink layer provided on the deep color transparent ink layer, the transmittance of the multicolor transparent ink layer regarding light being larger than that of the deep color transparent ink layer. Via this arrangement, after the light is transmitted via the transparent regions of the decoration plate, the transparent regions will exhibit different colors. | 2009-11-05 |
20090273930 | Light-Emitting Diode Module, Method for Producing a Light-Emitting Diode Module and Optical Projection Apparatus - The invention specifies a light-emitting diode module ( | 2009-11-05 |
20090273931 | ILLUMINATION DEVICE AND INPUT UNIT WITH ILLUMINATION DEVICE - A recess portion is formed in a substrate to accommodate a light emitting element so as to be sealed with a sealant. A light guide layer formed of a thin transparent resin film is fixed onto the substrate via an adhesive layer to realize an illuminating device with a thin structure. The light emitted from the light emitting element is irradiated into the light guide layer via the sealant and the adhesive layer. The light fully reflecting on the boundary surfaces between the light guide layer and the adhesive layer, and between the light guide layer and the air layer passes inside the light guide layer. Then the light which has not fully reflected leaks outside from the surface of the transparent resin film which forms the light guide layer. This makes it possible to illuminate the surface of the illumination device | 2009-11-05 |
20090273932 | Bonded single-piece ultra-violet lamp luminaire for microwave cavities - A luminaire reflector comprises a first end reflector segment, a second end reflector segment, and a main reflector segment bonded together as a single-piece. The main reflector segment, the first end reflector segment, and the second end reflector segment form a microwave cavity that can accommodate a microwave-powered bulb. The luminaire reflector is configured to be mated to at least one waveguide of a luminaire assembly. The luminaire reflector comprises at least one RF coupling slot to transmit microwave energy from the waveguide side to the microwave cavity side of the reflector assembly. | 2009-11-05 |
20090273933 | Compact High Efficient Optic - The present invention is directed towards a lighting assembly having a light source, at least one optic, and at least one light input surface formed as part of the optic for receiving substantially all the light produced from the light source. The present invention also includes at least one light output surface which is formed as part of the optic such that light received into the optic by the light input surface is directed by the optic out of the light output surface, thereby producing a desired beam pattern. | 2009-11-05 |
20090273934 | PAR LAMP WITH SHORT ARC HID BULB AND CUT-OUT IN ALUMINUM TO PREVENT ARCING - A lamp is disclosed that includes a light source that requires high voltage for starting. A reflector body includes an electrically conductive reflective surface that is oriented to receive light from the light source and direct the light in the desired direction. A preselected surface portion of the reflector body is devoid of the electrically conductive reflective surface. First and second lead assemblies associated with the light source, and that supply power thereto, pass through openings in the reflector body. The lead assemblies are spaced from the electrically conductive reflective surface portion by the preselected surface portion that is devoid of the reflective material to preclude arcing. Asymmetrical lead wire assemblies may also be advantageously used to increase the electrical standoff. | 2009-11-05 |
20090273935 | HOTSPOT CUTOFF D-OPTIC - The present invention is an optic used for producing a desired beam pattern having a body portion having a height and a thickness, and at least one sidewall profile, as well as an input port for receiving light from a light source. The optic of the present invention also includes an output surface formed as part of the body portion on the opposite side of the body portion in relation to the input port, at least one leg portion formed as part of the body portion, and at least one alignment feature formed as part of the at least one leg portion, the at least one alignment feature for controlling the alignment of the optic in relation to the light source. | 2009-11-05 |
20090273936 | GAS COOLED REFLECTOR STRUCTURE FOR AXIAL LAMP TUBES - A light weight reflector structure for an axial UV lamp wherein a shell-like channel housing supporting spaced apart ribs that in turn support flexed reflective spars that take the shape of the ribs. A preferred shape for the ribs and spars is parabolic about the axial UV lamp so that a beam is formed and directed out of the channel housing. The spars have a gap partially blocked by a deflector spar for creating a tortuous path for air forced direct into a tunnel between the channel housing and the spars. Forced air swirls through the gap and cools both the lamp and the spars. | 2009-11-05 |
20090273937 | Radio frequency screen assembly for microwave cavities - A luminaire assembly comprising at least one magnetron, a least one microwave-powered bulb, a luminaire reflector, at least one waveguide, and a radio-frequency screen assembly is provided. The radio-frequency screen assembly, the radio frequency gasket, and the luminaire reflector are configured to form a microwave cavity that can accommodate a microwave-powered bulb. The at least one waveguide is configured to couple energy from the at least one magnetron to the microwave-powered bulb. The radio-frequency screen accommodates at least one latching structure. The at least one latching structure is configured to sufficiently compress or to release the radio-frequency screen and the luminaire assembly. In another embodiment, a radio-frequency screen assembly comprises a frame which comprises an opening defined by a plurality of edges. The frame comprises a planar portion and further comprises a ridge at one of the edges that extends in a direction perpendicular to the planar portion. | 2009-11-05 |
20090273938 | Reflector Assembly for a Recessed Luminaire - The reflector assembly maintains the integrity and shape of a multi-member reflector for a recessed luminaire. The reflector assembly includes a reflector having multiple members. The members are arranged in a geometric form, such as a rectangle. A frame is disposed around the reflector. The frame includes at least one integral member manipulated around a joint formed between adjacent members of the reflector. For example, the integral member can include a clamp or tab. The frame and the integral member secure the positions of the members of the reflector relative to one another and prevent light from leaking through joints between the members. One or more connectors are coupled to the frame for connecting the reflector assembly to a lighting fixture. For example, each connector can include a torsion spring coupled to a lever configured to engage a corresponding catch of a collar on the lighting fixture. | 2009-11-05 |
20090273939 | SURFACE MOUNT CIRCUIT BOARD INDICATOR - The present invention is directed to a surface mount circuit board indicator. In one embodiment the surface mount circuit board indicator includes a printed circuit board (PCB) having at least one light emitting diode (LED) die, one or more traces and at least one lens, a housing comprising at least one opening on a side along a perimeter of the housing, wherein the PCB is coupled to the housing such that a light output surface of the at least one LED die faces a same direction as the at least one opening and at least one alignment pin coupled to the housing. | 2009-11-05 |
20090273940 | LED lighting device - The present invention is a light generation device utilizing higher efficiency LED's while also allowing for interface with current lighting interfaces. The LED's are replaceable in the unit and may be interchanged with other LED's to affect lighting mood and style or simply for replacement in the event an LED ceases to function. | 2009-11-05 |
20090273941 | EXTERNAL SAFETY ILLUMINATION FOR A BUS WITH LIGHT MOUNTED TO MIRROR ARM - A light source along the mirror mounting arm of a school bus or other passenger vehicle to reduce the risk of people or other objects being injured by the school bus. The light source may be mounted directly on the mirror mounting arm or embedded within a mirror mount. The light source may be focused downward to illuminate the ground and may provide vehicle status information and guiding information. Additionally the light source may sweep the ground back and forth or be directed under the control of the driver. The light source may be activated automatically when movement is detected near the vehicle. | 2009-11-05 |
20090273942 | HEADLIGHT ASSEMBLY WITH CONFIGURABLE INDICATOR ARRAY - The present disclosure provides a headlight assembly comprising a configurable indicator array that includes a plurality of individually controllable lights that may be activated and deactivated to form a plurality of light patterns. | 2009-11-05 |
20090273943 | TRAVEL LIMITING HEADLAMP ADJUSTER - A headlamp adjuster includes an adjustment gear for axially positioning an output shaft relative to a housing of the adjuster. A driving engagement of the adjustment gear and output shaft runs out at either axial extreme position to which the output shaft can be adjusted, and rotation of the adjustment gear can continue without further movement of the output shaft and without damage to the adjuster or a headlamp assembly in which the adjuster is installed. Biasing assemblies urge the output shaft toward re-engagement with the adjustment gear when the drive direction is reversed. | 2009-11-05 |
20090273944 | VARIABLE CONDENSER FOR DELIVERY OF ILLUMINATION INCLUDING RECURSIVELY NESTED CIRCLE-TO-LINE FIBER OPTIC CONVERTER CABLE - A variable condenser for delivery of illumination, including a recursively nested circle-to-line fiber optic shape-converting cable and a focusable input lens system. At the input of the fiber optic cable, sets of individual optical fibers comprise successively smaller annuli recursively nested about a common center. At the output of the fiber optic cable, the sets of individual optical fibers comprise pairs of line segments recursively nested about the line midpoint, whereby the nesting level of the pairs of line segments has an exact or an approximate correspondence to the nesting level of the annuli. The output may be split into a plurality of lines, whereby the sets of individual optical fibers are distributed among the plurality of lines. The input lens system has a single adjustable focus means to vary the radius of an illumination spot incident upon the input of the fiber optic cable circle input. | 2009-11-05 |
20090273945 | MODULAR, LUMINOUS, SMALL FORM-FACTOR SOLID-STATE LIGHTING ENGINE - The invention comprises a small form-factor solid-state light engine that provides uniform lighting with high efficiency. The invention provides uniform lighting by practically eliminating any “dead spot” produced by conventional light engines. The invention produces light more effectively and thus fewer light engines need to be employed in a given lighting arrangement. The invention is modular, easily accommodating fiber optics of various sizes and shapes with minimal modification to the components of the light engine. | 2009-11-05 |
20090273946 | Illumination module, and a display and general lighting apparatus using the same - The present invention provides an illumination module, and a display and a general lighting apparatus using the same. Said illumination module includes a plurality of light guiding strips arranged in juxtaposition with a predefined distance; a plurality of light sources, disposed on at least one end of said light guiding strips respectively for providing the light into said light guiding strips; and a plurality of light reflecting units, disposed between said light guiding strips for reflecting the light from said light guiding strips. The light reflecting units according to the present invention can guide the light from the sides of light guiding strips or other light not toward the right side of the illumination module back to the right side of the illumination module, and thus improving the light output efficiency and uniformity. | 2009-11-05 |
20090273947 | Surface light source device and display - Members including light guide plate | 2009-11-05 |
20090273948 | BACKLIGHT ASYMMETRIC LIGHT INPUT WEDGE - A backlight is disclosed and includes a visible light transmissive body primarily propagating light by TIR with a light input surface and a light output surface and a light guide portion and a light input portion. The light guide portion has a light reflection surface and a light emission surface. The light input portion has opposing side surfaces that are not parallel. One of the opposing surfaces is co-planar with either the light emission surface or the light reflection surface. A light source is disposed adjacent to the light input surface. The light source emits light into the light input portion. A reflective layer is disposed adjacent to or on the opposing side surfaces. | 2009-11-05 |
20090273949 | Light guiding system for multiple areas - A light guiding system for multiple areas is provided for a mobile communication device with a keypad module. The light guiding system includes a lighting source unit, a light guiding unit, and a control circuit unit. The lighting source unit has at least one light emitting member for generating a single lighting or a combined lighting. The control circuit unit is utilized for controlling the light emitting members of the lighting source unit to emit the single or combined lighting. The light guiding unit is provided for guiding the single or the combined lighting to a portion of or an entire area of the keypad module. Accordingly, the portion of the keypad module or the entire area of the keypad module is lit by the single/combined lighting. The different lighting areas of the keypad module provides a guiding effect that improves the using efficiency. | 2009-11-05 |
20090273950 | Power-saving device for power supply - A power-saving device for power supply, including a transformer having a primary coil and a secondary coil. The primary coil is electrically connected with a power supply circuit of the power supply. The secondary coil is serially connected with a diode to electrically connect with a load via a load circuit. The power supply circuit controls powering on/off of the primary coil by means of a switch element. The load circuit includes a π-type filter circuit, which is chargeable and dischargeable. A power indicator circuit is forward parallel connected between the secondary coil of the transformer and the load circuit. The power indicator circuit includes a light-emitting diode. One terminal of the light-emitting diode is connected with P-pole of the diode. The diode acts as a barrier to the discharge of the π-type filter circuit so as to effectively reduce energy consumption of the power indicator circuit. | 2009-11-05 |
20090273951 | SMART DRIVING METHOD FOR SYNCHRONOUS RECTIFIER AND ITS APPARATUS THEREOF - The present invention discloses a smart driving method for a secondary synchronous rectifier of an isolated converter and its apparatus thereof. The apparatus comprises: a main circuit having a secondary synchronous rectifier Q | 2009-11-05 |
20090273952 | INVERTER WITH HIGH FREQUENCY ISOLATION TRANSFORMER - An inverter receives a DC power supply and converts it into AC power to a primary coil of a high frequency transformer. The output of the high frequency transformer passes through two secondary coils, and each secondary coil is associated with a bus. The busses supply positive and negative AC power to a downstream output. The flow of the power from the two busses is alternatively controlled to provide a desired frequency on the output. | 2009-11-05 |
20090273953 | Inverter - An inverter includes a pulse width modulation (PWM) circuit, a direct current (DC) voltage input terminal, a storage capacitor, a first transformer, a soft start circuit, and a first transistor. The PWM circuit includes a first output terminal. The first transformer includes a first primary winding. The first primary winding includes a first terminal and a second terminal capable of being grounded via the storage capacitor. The soft start circuit includes an inductor and a first capacitor. A gate electrode of the first transistor is connected to the first output terminal. A source electrode of the first transistor is connected to the first terminal of the first transformer via the inductor. A drain electrode of the first transistor is connected to the DC voltage input terminal and connected to the source electrode via the capacitor. | 2009-11-05 |
20090273954 | Protection Method, System and Apparatus for a Power Converter - Among many embodiments, a power converter and a method for operating a power converter are disclosed. The power converter may include a pair of switches connected in series, an output transformer connected to a common node between the switches and a protection apparatus for protecting each switch from being hard driven, each switch being enabled by a gate signal and turning ON in alternating half cycles so as to drive transformer current in alternate directions through the transformer. The protection apparatus may include: a detector configured to detect whether an intrinsic diode in a first switch is conducting the transformer current; and a gate signal disabler configured in response to the detector blocking an ON gate pulse from reaching a second switch in the pair of switches so that the second switch is not turned ON while the intrinsic diode of the first switch is conducting. | 2009-11-05 |
20090273955 | OPTIMUM STRUCTURE FOR CHARGE PUMP CIRCUIT WITH BIPOLAR OUTPUT - A charge pump circuit with bipolar output comprises a first switch capable of selectively connecting a first input terminal of a transfer capacitor to a voltage source, a second switch capable of selectively connecting a first input terminal of a first storage capacitor to said first input terminal of said transfer capacitor; a third switch capable of selectively connecting a second input terminal of said transfer capacitor to said voltage source; a fourth switch selectively connecting said second input terminal of said transfer capacitor to a ground terminal; and a fifth switch selectively connecting said second input terminal of said transfer capacitor to a second input terminal of a second storage capacitor. The charge pump circuit is collocated with clock signals to be selectively driven by a four-phase signal so as to produce bipolar voltages with magnitudes higher than the input voltage with minimum number of switches and capacitors and also accomplish the highest efficiency. | 2009-11-05 |
20090273956 | MODULAR CONVERTER FOR CONVERTING THE ELECTRIC POWER PRODUCED BY AEROGENERATORS, AND WIND-POWER PLANT THAT USES SAID CONVERTER - A modular converter | 2009-11-05 |
20090273957 | System and Method for Providing Adaptive Dead Times - System and method for adaptively altering a power supply's dead time. A method comprises detecting a start of a dead time, detecting an ending condition of the dead time, and ending the dead time. The detecting of the ending condition is based on a first current flowing through a lower portion of the power supply or a second current flowing through a gate driver of a lower switching element in the power supply. | 2009-11-05 |
20090273958 | Cat-Ear Power Supply Having a Latch Reset Circuit - A cat-ear power supply is operable to generate a DC voltage and draws current from an AC power source near the beginning and end of a half-cycle of the AC power source. A controllably conductive switching circuit selectively charges an energy storage capacitor to produce the DC voltage and become conductive to charge the energy storage capacitor near the beginning of the half-cycle of the AC power source. A latch circuit controls the controllably conductive switching circuit to become non-conductive in response to the magnitude of the DC voltage. A switch voltage monitor circuit controls the controllably conductive switching circuit to become non-conductive and resets the latch circuit when the magnitude of a switch voltage across the switching circuit exceeds a predetermined switch voltage threshold. The switching circuit becomes conductive to charge the energy storage capacitor near the end of the half-cycle when the magnitude of the switch voltage drops below the predetermined switch voltage threshold. | 2009-11-05 |
20090273959 | BIASED-MOSFET ACTIVE BRIDGE WITH ACTIVE GATE DRIVE - A transistor active bridge circuit ( | 2009-11-05 |
20090273960 | SYSTEM FOR PROVIDING ON-DIE TERMINATION OF A CONTROL SIGNAL BUS - A system for providing on-die termination (ODT) of a control signal bus. The system includes a memory device that includes a plurality of data bus connectors, one or both of a load signal connector and a reset signal connector, a control bus connector, an ODT, and a mechanism. The ODT is in communication with the control bus connector, and the ODT provides a level of termination resistance to a control bus connected to the control bus connector. The mechanism latches data received via the data bus connectors in response to a signal received via one or both of the load signal connector and the reset signal connector. The data is utilized to set the level of termination resistance provided by the ODT. | 2009-11-05 |
20090273961 | SEMICONDUCTOR DEVICE - A technique for increasing rewriting current without increasing a power supply voltage and also reducing location dependency inside a memory array of a resistive state after the rewriting is provided in a resistance change memory in which the resistance value of a memory cell changes between logical values “1” and “0”. In the resistance change memory, bit lines are formed into a layered structure, the bit line select switches for connecting to the global bit line are provided at both ends of the local bit line, and a control method of the bit line select switches is changed in the writing and the reading, thereby realizing the optimum array configurations for each of them. More specifically, in the writing and the reading, two current paths are provided in parallel by turning ON the bit line select switches simultaneously. | 2009-11-05 |
20090273962 | FOUR-TERMINAL MULTIPLE-TIME PROGRAMMABLE MEMORY BITCELL AND ARRAY ARCHITECTURE - Embodiments disclosed herein relate to a non-volatile memory bitcell and arrays thereof, methods of detecting whether the bitcell is in a programmed state, methods of detecting whether the bitcell is in an erased state, methods of setting the bitcell in a programmed state and methods of setting the bitcell in an erased state. The non-volatile memory bitcell may be a four terminal bitcell. The bitcell may have a pull-up electrode, a pull-down electrode, a cantilever electrode and a contact electrode. An NMOS transistor may be coupled to the contact electrode. Depending upon the orientation of the word line, the current through the bitcell may be measured on the bitline, the data line or the pull-down electrode. | 2009-11-05 |
20090273963 | SEMICONDUCTOR STORAGE DEVICE, SEMICONDUCTOR STORAGE DEVICE MANUFACTURING METHOD AND PACKAGE RESIN FORMING METHOD - A ferroelectric capacitor comprising a transistor layer superimposed on a semiconductor substrate, a ferroelectric capacitor layer provided superior to the transistor layer, a wiring layer provided superior to the ferroelectric capacitor layer, and a passivation film. Further, at least one layer of barrier film capable of inhibiting penetration of moisture and hydrogen into the underlayer is provided between the ferroelectric capacitor layer and the passivation film, and the passivation film is characterized by containing a novolac resin. | 2009-11-05 |
20090273964 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises: a two terminal structured variable resistive element, wherein resistive characteristics defined by current-voltage characteristics at both ends transit between low and high resistance states stably by applying a voltage satisfying predetermined conditions to the both ends, a transition from the low resistance state to the high resistance state occurs by applying a voltage of a first polarity whose absolute value is at or higher than a first threshold voltage, and the reverse transition occurs by applying a voltage of a second polarity whose absolute value is at or higher than a second threshold voltage; a load circuit connected to the variable resistive element in series having an adjustable load resistance; and a voltage generation circuit for applying a voltage to both ends of a serial circuit; wherein the variable resistive element can transit between the states by adjusting a resistance of the load circuit. | 2009-11-05 |
20090273965 | Nonvolatile Memory Device - Ferromagnetic layers ( | 2009-11-05 |
20090273966 | Integrated Circuit, Memory Cell Array, Memory Module, and Method of Operating an Integrated Circuit - According to one embodiment of the present invention, an integrated circuit includes a plurality of thermal selectable memory cells, each memory cell being connected to a conductive line, the conductive line having a first portion for applying a heating current, and a second portion for applying a programming current. The integrated circuit is configured such that the heating current and the programming current can be routed respectively to the first and the second portion of the conductive line independently from each other. | 2009-11-05 |
20090273967 | METHOD AND INTEGRATED CIRCUIT FOR DETERMINING THE STATE OF A RESISTIVITY CHANGING MEMORY CELL - A method and an integrated circuit for determining the state of a resistivity changing memory cell. In one embodiment the method includes detecting a first resistance of the resistivity changing memory cell, determining whether the first resistance value is smaller than a predetermined threshold value thereby determining a first result value, initializing the resistivity changing memory cell into one of at least four resistivity changing memory states, detecting a second resistance value of the resistivity changing memory cell, determining whether the second resistance value is smaller than the predetermined threshold value determining a second result value, and determining the state of the resistivity changing memory cell state using the first and the second result values. | 2009-11-05 |
20090273968 | METHOD AND APPARATUS FOR IMPLEMENTING SELF-REFERENCING READ OPERATION FOR PCRAM DEVICES - A method of implementing a self-referencing read operation for a PCRAM array includes applying a stimulus to a bit line associated with a selected phase change element (PCE) to be read; comparing a first voltage on a node of the bit line with a second voltage on a delay node, wherein the second voltage represents a delayed voltage with respect to the first voltage due to a resistance/capacitance time constant associated therewith; and determining whether, during the read operation, the first voltage drops below the value of the second voltage; wherein in the event the first voltage drops below the value of the second voltage during the read operation, the PCE is determined to be programmed to an amorphous state and in the event the first voltage does not drop below the value of the second voltage, the PCE is determined to be programmed to a crystalline state. | 2009-11-05 |
20090273969 | CAPACITIVE DIVIDER SENSING OF MEMORY CELLS - The present disclosure includes devices and methods for sensing resistance variable memory cells. One device embodiment includes at least one resistance variable memory cell, and a capacitive divider configured to generate multiple reference levels in association with the at least one resistance variable memory cell. | 2009-11-05 |
20090273970 | MEMORY DEVICE INCLUDING A PROGRAMMABLE RESISTANCE ELEMENT - Disclosed are a phase change memory with improved retention characteristic of a phase change device, and a method for refreshing the phase change memory. The fact that a memory is a DRAM interface compatible memory is exploited. There are provided dummy cells stressed in accordance with the number of times of read and write operations. Changes in the resistance value of the dummy cells are detected by comparator circuits. If the resistance value have been changed beyond a predetermined reference value (that is, changed to a low resistance), a refresh request circuit requests an internal circuit, not shown, to effect refreshing. The memory cells and the dummy cells are transitorily refreshed and correction is made for variations in the programmed resistance value of the phase change devices to assure the margin as well as to improve retention characteristic. | 2009-11-05 |
20090273971 | CONTINUOUSLY DRIVING NON-VOLATILE MEMORY ELEMENT - Embodiments discussed herein generally relate to utilizing non-volatile memory elements to continuously drive other circuitry. There are many advantages to utilizing non-volatile memory to continuously drive other circuitry. For example, back end of the line (BEOL) compatible process may be used to fabricate the non-volatile memory elements that does not affect any front end of the line (FEOL) devices. This allows for an earlier integration of non-volatile technology into the latest state-of-the-art semiconductor process nodes. This is specifically important for FPGA and CPLDs, which make use of the latest process nodes. | 2009-11-05 |
20090273972 | MAGNETIC LOGIC ELEMENT WITH TOROIDAL MULTIPLE MAGNETIC FILMS AND A METHOD OF LOGIC TREATMENT USING THE SAME - A magnetic logic element with toroidal magnetic multilayers ( | 2009-11-05 |
20090273973 | MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION - An access buffer, such as page buffer, for writing to non-volatile memory, such as Flash, using a two-stage MLC (multi-level cell) operation is provided. The access buffer has a first latch for temporarily storing the data to be written. A second latch is provided for reading data from the memory as part of the two-stage write operation. The second latch has an inverter that participates in the latching function when reading from the memory. The same inverter is used to produce a complement of an input signal being written to the first latch with the result that a double ended input is used to write to the first latch. | 2009-11-05 |
20090273974 | Nonvolatile Memory, Verify Method Therefor, and Semiconductor Device Using the Nonvolatile Memory - Provided is a nonvolatile memory that realizes a high-speed verify operation. During verify writing/erasing, the writing/erasing and reading are performed at the same time. As to a circuit that performs a verify operation, for instance, there is obtained a construction where the output from a sense amplifier ( | 2009-11-05 |
20090273975 | NON-VOLATILE MULTILEVEL MEMORY CELLS WITH DATA READ OF REFERENCE CELLS - Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell. | 2009-11-05 |
20090273976 | SEMICONDUCTOR MEMORY DEVICE WHICH INCLUDES MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE - A semiconductor memory device includes memory cells, a source line, a word line, a bit line, and a driver circuit. The memory cells are formed on a semiconductor layer and have a charge accumulation layer and a control gate on the charge accumulation layer. The word line is connected to gate of the memory cell. The bit line is electrically connected to a drain of the memory cell. The source line is electrically connected to a source of the memory cell. The driver circuit varies potential of the semiconductor layer in conjunction with potential of the source line. | 2009-11-05 |
20090273977 | MULTILAYERED NONVOLATILE MEMORY WITH ADAPTIVE CONTROL - A method and device for adaptive control of multilayered nonvolatile semiconductor memory are provided, the device including memory cells organized into groups and a control circuit having a look-up matrix for providing control parameters for each of the groups, where characteristics of each group are stored in the look-up matrix, and the control parameters for each group are responsive to the stored characteristics for that group; the method including organizing memory cells into groups, storing characteristics for each group in a look-up matrix, providing control parameters for each of the groups, where the control parameters for each group are responsive to its stored characteristics, and driving each memory cell in accordance with its provided control parameters. | 2009-11-05 |
20090273978 | NAND FLASH MEMORY - A NAND flash memory has a control circuit. The control circuit applies a writing voltage between a control gate and a well by applying a first voltage to the well and a positive second voltage higher than the first voltage to the control gate during the writing operation, and then the control circuit applies a detrapping voltage between the control gate and the well by applying a third voltage to the control gate and a positive fourth voltage higher than the third voltage to the well before the verification reading operation. | 2009-11-05 |
20090273979 | PROGRAMMING METHOD TO REDUCE WORD LINE TO WORD LINE BREAKDOWN FOR NAND FLASH - A NAND architecture non-volatile memory device and programming process programs the various cells of strings of non-volatile memory cells by the application of differing word line pass voltages (Vpass) to the unselected word lines adjacent to the selected word line and memory cell being programmed in order to reduce voltage differences between the word lines of the memory cell string or array during a programming cycle. This allows the word line to word line voltage differential to be reduced and thus decreases the likelihood of breakdown or punch through of the insulator materials placed between the adjacent word lines. | 2009-11-05 |
20090273980 | NAND ARCHITECTURE MEMORY WITH VOLTAGE SENSING - A NAND architecture non-volatile memory voltage sensing data read/verify process and sense amplifier has been described that senses data in floating gate or floating node field effect transistor memory cells using a voltage sensing data read/verify process. The voltage sensing process utilized a reference NAND string and reference memory cell that is coupled to a reference bit line. A voltage is precharged onto a bit line to be read and an associated reference bit line. The bit line is then coupled to a NAND string and selected memory cell while the reference bit line is coupled to a reference NAND string and selected reference memory cell. The relative voltage level of the bit line and reference bit line are then set by the relative currents flowing through the coupled NAND string and reference NAND string, and the voltage differential read by a coupled voltage sense amplifier. | 2009-11-05 |
20090273981 | Methods and apparatuses for programming flash memory using modulated pulses - Methods and apparatuses for programming non-volatile semiconductor memory devices by using modulated pulses are disclosed. Embodiments generally comprise a pulse generator, to create a sequence of pulses and set a threshold voltage of a non-volatile memory cell, and a pulse coupler. Alternative embodiments may include a threshold verifier capable of verifying that the threshold voltage is set within an acceptable voltage range of a target threshold voltage. A pulse width modulator in some apparatus embodiments may modulate the pulse durations early in the sequence when programming fast bits and late in the sequence when programming slow bits. Method embodiments generally comprise generating a sequence of pulses, applying the sequence of pulses to a memory cell to set a threshold voltage of the memory cell, and modulating among pulses in the sequence the parameters of pulse duration, pulse separation time, and step voltage magnitude. | 2009-11-05 |
20090273982 | SEMICONDUCTOR MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND DATA WRITE METHOD - A semiconductor memory device includes an output buffer which outputs an enable signal which makes an external memory device operable, an address buffer which generates an address at which data is held in the external memory device, an input buffer which receives the data held at the address from the external memory device, and a write data buffer which holds the data received by the input buffer, and writes the data in a plurality of memory cells at once. Whenever the write data buffer writes data, the input buffer receives, from the external memory, the data having a size which is written in the memory cells at once. | 2009-11-05 |
20090273983 | NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD - Disclosed is a programming method for a nonvolatile memory device. The method includes; charging word-line signal lines to a pass voltage during a pass voltage charge operation, simultaneously executing an initial precharge operation for strings including program-inhibited cells during the pass voltage charge operation, and applying the pass voltage to word lines from the word-line signal lines in response to a block-selection enabling signal | 2009-11-05 |
20090273984 | BIASING SYSTEM AND METHOD - Embodiments are provided that include a memory system that includes a memory system, having an access device coupled between a global line and a local line and a voltage source coupled to the global line and configured to output a bias voltage on the global line when the memory system is in a non-operation state. The access device is selected when the memory system is in the non-operation state, and the access device is deselected when the memory system is in an other state. Further embodiments provide, for example, a method that includes coupling a global access line to a local access line, biasing the local access line to a voltage other than a negative supply voltage while a memory device is in a first state and uncoupling the global access line from the local access line while the memory device is in an other state. | 2009-11-05 |
20090273985 | SEMICONDUCTOR DEVICE HAVING MULTIPLE I/O MODES - Semiconductor device having multiple I/O modes. The device includes a data buffer configured to receive data; a strobe input buffer configured to receive a data strobe signal, a phase controller configured to shift a phase of the data strobe signal by different numbers of degrees, including 0 degrees, according to input modes and a data detector configured to detect the data in response to the data strobe signal output from the phase controller. | 2009-11-05 |
20090273986 | Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits - A memory has defective locations in its user portion replaceable by redundant locations in a redundant portion. Data latches in column circuits of user and redundant portions allow data sensed from or to be written to a memory to be exchanged with a data bus. A remote redundancy scheme has the redundant data available from a central buffer accessible by any number of column circuits. Redundant data buffer circuits enable bus exchange with data from the user data latches except for defective locations when data are taken from the central buffer. In this way only addressing for the user portion is used for bus exchange. Also, accessibility to the redundant data will not be restricted by the locations of the column circuits relative to the redundant data latches and the buffered redundant data can be accessed at a finer granularity than that imposed by the column circuits. | 2009-11-05 |
20090273987 | DATA OUTPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS - A data output circuit of a semiconductor memory apparatus includes: a control unit that outputs a first standby instruction signal, a second standby instruction signal, a first output instruction signal, and a second output instruction signal in response to an input of a standby instruction signal, an output instruction signal, a first test signal, and a second test signal; a first output driver that causes first data to be output or to enter a standby state according to whether or not the first standby instruction signal or the first output instruction signal is enabled; and a second output driver that causes second data to be output or to enter a standby state according to whether or not the second standby instruction signal or the second output instruction signal is enabled. | 2009-11-05 |
20090273988 | CIRCUIT AND METHODS TO IMPROVE THE OPERATION OF SOI DEVICES - According to the present invention, a circuit and methods for enhancing the operation of SOI fabricated devices are disclosed. In a preferred embodiment of the present invention, a pulse discharge circuit is provided. Here, a circuit is designed to provide a pulse that will discharge the accumulated electrical charge on the body of the SOI devices in the memory subarray just prior to the first access cycle. As explained above, once the accumulated charge has been dissipated, the speed penalty for successive accesses to the memory subarray is eliminated or greatly reduced. With a proper control signal, timing and sizing, this can be a very effective method to solve the problem associated with the SOI loading effect. Alternatively, instead of connecting the bodies of all SOI devices in a memory circuit to ground, the bodies of the N-channel FET pull-down devices of the local word line drivers can be selectively connected to a reference ground. This would enable the circuit to retain most of the speed advantages associated with SOI devices while overcoming the loading problem described above. With this preferred embodiment of the present invention, the major delay caused by the bipolar loading effect is minimized while the speed advantage due to providing a lower, variable V | 2009-11-05 |
20090273989 | Synchronous Command Base Write Recovery Time Auto Precharge Control - Methods of operating a memory device and memory devices are provided. For example, a method of operating a memory array is provided that includes a synchronous path and an asynchronous path. A Write-with-Autoprecharge signal is provided to the synchronous path, and various bank address signals are provided to the asynchronous path. In another embodiment, the initiation of the bank address signals may be provided asynchronously to the assertion of the Write-with-Autoprecharge signal. | 2009-11-05 |
20090273990 | SEMICONDUCTOR DEVICE - There is provided a semiconductor memory device, including: a plurality of bank groups each comprising a plurality of banks; a plurality of data pads grouped by a predetermined number for receiving data for the bank groups, wherein the data pads are divided into a plurality of first pad groups receiving data and a plurality of second pad groups selectively receiving data according to a data input/output option value; a first driving unit configured to drive data input via the first pad group to transfer the data input via the first pad group to the bank group corresponding to the first pad group; a second driving unit configured to drive data input via the second pad group to transfer the data input via the second pad group to the bank group corresponding to the second pad group; and a third driving unit configured to drive data input via the first pad group to transfer the data input via the first pad group to the bank group corresponding to the second pad group in response to the data input/output option value. | 2009-11-05 |
20090273991 | SEMICONDUCTOR MEMORY DEVICE, OPERATING METHOD THEREOF, AND COMPRESSION TEST METHOD THEREOF - A semiconductor memory device including a plurality of banks, each including a plurality of memory cells, a pattern signal generator configured to generate pattern signals having combinations in response to an input signal applied through an arbitrary pad in a compression test mode. Input paths are configured to transfer the plurality of pattern signals to the corresponding banks. | 2009-11-05 |
20090273992 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device includes a pad configured to receive a data strobe signal, and a path selector configured to output the data strobe signal through a corresponding input path during a normal operation, and to output the data strobe signal through a plurality of input paths in response to a path selection signal during a test operation. | 2009-11-05 |
20090273993 | SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF - A semiconductor memory device that generates a data strobe reset signal for preventing ring-back of a data strobe signal, and an operation method thereof. The semiconductor memory device includes a pulse signal generating unit for generating first and second pulse signals by synchronizing a write instruction with first and second internal clock signals, a reset signal generating unit for generating a reset signal having an activation width setup in response to the first and second pulse signals, and a data strobe reset signal generating unit for generating a data strobe reset signal by shifting the second pulse signal as much as a predetermined burst length and limiting an activation period of the data strobe reset signal in response to the reset signal. | 2009-11-05 |
20090273994 | DUAL MODE ACCESSING SIGNAL CONTROL APPARATUS AND DUAL MODE TIMING SIGNAL GENERATING APPARATUS - A dual mode accessing signal control apparatus for being used in a dummy cells set of a memory, and a dual mode timing signal generating apparatus comprising a dual mode accessing signal control apparatus are provided. The dual mode accessing signal control apparatus respectively generates a write delay signal and a read signal during the write and the read process. The memory is thereby capable of self-timing its write and the read process, and is able to generate a wordline signal with a shorter width in the write process to ensure an early start to precharging. As a result, the whole duty period of the memory can be shortened. | 2009-11-05 |
20090273995 | APPARATUS FOR REMOVING CROSSTALK IN SEMICONDUCTOR MEMORY DEVICE - An apparatus for removing crosstalk in a semiconductor memory device includes pads for receiving externally provided signals, transmission lines for delivering the signals received by each of the pads to corresponding elements in the apparatus, and capacitors, coupled between adjacent ones of the lines, for adjusting the transmission delay of the signals depending on a signal transmission mode between the adjacent lines. | 2009-11-05 |
20090273996 | Memory testing system and memory module thereof - A testing system with data compressing function includes a third data end, a first encoder, and a second encoder. The testing system receives testing data and testing address for testing if any memory cell fails in a memory. The memory includes a first data end, a second end, and an address end. The first encoder encodes the testing data to the data type of the first data end according to the testing address. The second encoder encodes the testing data to the data type of the second data end according to the testing address. In this way, the corresponding memory cells of the first data and second ends store same testing data. | 2009-11-05 |
20090273997 | Controlling Apparatus and Controlling Method for Controlling a Pre-Charge Activity on a SRAM Array - A controlling apparatus and a controlling method for controlling a pre-charge activity on a SRAM array are provided. The controlling apparatus comprises: a detecting module, a controlling module and a pre-charge module. The detecting module is to detect whether the row address of the SRAM array in operation is changed and generate a row-changing signal according to the detection result; the controlling module is to detect an operation mode of the SRAM array and generate a disable signal according to the row-changing signal and the operation mode; and the pre-charge module is to generate a pre-charge signal according to a pseudo-pre-charge signal and the disable signal, wherein the pre-charge signal substantially controls the pre-charge activity on the SRAM cell in operation. | 2009-11-05 |
20090273998 | BITCELL CURRENT SENSE DEVICE AND METHOD THEREOF - A memory device includes a sense amplifier to sense the state of a bitcell. The sense amplifier includes two input terminals connected via a switch. One of the input terminals is connected to a node, whereby a current through the node represents a difference in current drawn by a bitcell and a reference current. During a first phase, the switch between the input terminals of the sense amplifier is closed, so that a common voltage is applied to both input terminals. During a second phase, the switch is opened, and the sense amplifier senses a state of information stored at the bitcell based on the current through the node. By using the switch to connect and disconnect the inputs of the sense amplifier in the two phases, the accuracy and speed with which the state of the information stored at the bitcell can be determined is improved. | 2009-11-05 |
20090273999 | SENSE AMPLIFIER AND DATA SENSING METHOD THEREOF - A data sensing method for sensing data stored in first and second memory cells includes the steps of: setting a first voltage according to a bit-line voltage corresponding to the first memory cell in response to an enabled level of a first clock signal; providing the first voltage as a sensing voltage in response to a disabled level of the first clock signal; comparing the sensing voltage with a reference voltage to generate a first output voltage; setting a second voltage according to a bit-line voltage corresponding to the second memory cell in response to an enabled level of a second clock signal, a phase difference between the first and second clock signals being 180 degrees; providing the second voltage as the sensing voltage in response to a disabled level of the second clock signal; and comparing the sensing voltage with the reference voltage to generate a second output voltage. | 2009-11-05 |
20090274000 | SYSTEM AND METHOD OF COMMAND BASED AND CURRENT LIMIT CONTROLLED MEMORY DEVICE POWER UP - Devices and systems for powering up a memory device, for example, are disclosed. One such memory device includes power up circuitry configured to receive an external power supply and to provide an internal power supply to the memory device upon receipt of a command. The power up circuitry may be configured to provide the internal power supply limited to a peak current, or may be configured to provide the internal power supply not limited to a peak current. The memory device may be, for example, a synchronous dynamic random access memory (SDRAM) device or Flash memory. | 2009-11-05 |
20090274001 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME - Semiconductor memory device and method for operating the same includes a data output unit configured to output data in synchronization with a data output clock and a clock control unit configured to selectively transfer the data output clock to the data output unit under the control of a read command. | 2009-11-05 |
20090274002 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF PROCESSING ADDRESS AND COMMAND SIGNALS THEREOF - A semiconductor integrated circuit device includes an input unit configured to receive address and command signals, an internal address generator configured to output an internal address signal by adjusting a timing of the input address signal to correspond to a predetermined internal signal processing timing margin, and an internal command generator configured to output an internal command having a predetermined time difference from the internal address signal by adjusting a timing of the input command signal. | 2009-11-05 |
20090274003 | Extruder - In an extruder wherein the slip-on elements ( | 2009-11-05 |
20090274004 | USING TOWED SEISMIC SURVEYS THAT DO NOT HAVE COINCIDING STREAMER POSITIONS IN THE TIME LAPSE ANALYSIS OF A PRODUCING FIELD - A technique includes performing at least one intervening towed seismic survey after a prior towed seismic survey and before a future towed seismic survey. The prior towed seismic survey has associated first streamer positions, and the future towed seismic survey has associated second streamer positions that do not coincide with the first streamer positions. The technique includes using measurements that are acquired in the intervening towed seismic survey(s) to link the prior towed seismic survey to the future towed seismic survey for time lapse analysis involving the prior and future towed seismic surveys. | 2009-11-05 |
20090274005 | METHOD FOR MONITORING A MULTI-LAYERED SYSTEM - A method for monitoring a multi-layered system below a surface comprising a slow layer and a fast layer; the method comprising: transmitting one or more seismic waves from one or more seismic sources through the multi-layered system; receiving signals emanating from the multi-layered system in response to the one or more seismic waves with one or more receivers located a distance from the one or more seismic sources; identifying one or more critically refracted compressional (CRC) waves amongst the signals; and inferring information about a change in the slow layer based on the one or more CRC waves; wherein the CRC wave is a refracted wave which has traveled along an interface between the fast layer and an adjacent layer. | 2009-11-05 |