44th week of 2014 patent applcation highlights part 74 |
Patent application number | Title | Published |
20140325133 | AMOUNT OF MEMORY FOR EXECUTION OF AN APPLICATION - Examples disclose determining an amount of memory for execution of an application, associated with a user preference, based on an inspection of data associated with the application. Further the example discloses transmitting a request to a non-volatile memory to allocate a segment corresponding to the amount of memory for execution of the application. Additionally, the example also discloses receiving a response of the amount of memory available for the segment and reserving a portion of the segment for the execution of the application. | 2014-10-30 |
20140325134 | PREARRANGING DATA TO COMMIT TO NON-VOLATILE MEMORY - An apparatus includes a hybrid memory module, and the hybrid memory module includes volatile memory and non-volatile memory. Data is prearranged in the volatile memory. The data is committed to the non-volatile memory, as prearranged, in a single write operation when a size of the prearranged data reaches a threshold. | 2014-10-30 |
20140325135 | TERMINATION IMPEDANCE APPARATUS WITH CALIBRATION CIRCUIT AND METHOD THEREFOR - A termination impedance apparatus includes a variable pull-up resistor, a variable pull-down resistor, and a small-signal calibration circuit. The variable pull-up resistor is coupled between a first power supply voltage terminal and an output terminal. The variable pull-down resistor is coupled between the output terminal and a second power supply voltage terminal. The small-signal calibration circuit is for calibrating the variable pull-up resistor and the variable pull-down resistor to achieve a desired small-signal impedance. | 2014-10-30 |
20140325136 | CONFIGURATION FOR POWER REDUCTION IN DRAM - Disclosed embodiments may include an apparatus having a segment wordline enable coupled to logic to selectively disable ones of a number of segment wordline drivers. The logic may partition a page of the apparatus to reduce power consumed through activation of the disabled ones of the number of segment wordlines. Other embodiments may be disclosed. | 2014-10-30 |
20140325137 | MEMORY CONTROLLER AND ASSOCIATED SIGNAL GENERATING METHOD - The invention is directed to a memory controller and an associated signal generating method. By appropriately arranging a sequence according to which command signals are generated and expanding a latching interval of a part of address signals, not only the memory controller is enabled to control the DDR memory modules in a functional manner to further overcome issues of conventionally small latching intervals, but also system stability and access performance are reinforced as the memory access clock speed continue to increase. | 2014-10-30 |
20140325138 | REPLICATING TAG ENTRIES FOR RELIABILITY ENHANCEMENT IN CACHE TAG ARRAYS - Technologies are generally described for exploiting program phase behavior to duplicate most recently and/or frequently accessed tag entries in a Tag Replication Buffer (TRB) to protect the information integrity of tag arrays in a processor cache. The reliability/effectiveness of microprocessor cache performance may be further improved by capturing/duplicating tags of dirty cache lines, exploiting the fact that detected error-corrupted clean cache lines can be recovered by L2 cache. A deterministic TRB replacement triggered early write-back scheme may provide full duplication and recovery of single-bit errors for tags of dirty cache lines. | 2014-10-30 |
20140325139 | LOW POWER, HASH-CONTENT ADDRESSABLE MEMORY ARCHITECTURE - A method is comprised of inputting a comparand word to a plurality of hash circuits, each hash circuit being responsive to a different portion of the comparand word. The hash circuits output a hash signal which is used to enable or precharge portions of a CAM. The comparand word is also input to the CAM. The CAM compares the comparand word in the precharged portions of the CAM and outputs information responsive to the comparing step. When used to process Internet addresses, the information output may be port information or an index from which port information may be located. A circuit is also disclosed as is a method of initializing the circuit. | 2014-10-30 |
20140325140 | AUTOMATIC CREATION, DEPLOYMENT, AND UPGRADE OF DISK IMAGES - A computer installs an operating system. The computer receives, in a logical partition (LPAR) via a management network, a deploy program configured to download a disk image from an image repository and to write the disk image to a first direct access storage device (DASD) of the LPAR. The disk image includes an operating system, applications, and management components including an upgrade program. The computer receives, in the LPAR via a data network, the disk image, and writes, to the first DASD of the LPAR, the disk image. The computer boots the LPAR into the operating system of the disk image written to the first DASD, and determines whether the installed operating system is a deployment or an upgrade. | 2014-10-30 |
20140325141 | TRIM SUPPORT FOR A SOLID-STATE DRIVE IN A VIRTUALIZED ENVIRONMENT - A computer system that employs a solid-state memory device as a physical storage resource includes a hypervisor that is capable of supporting TRIM commands issued by virtual machines running in the computer system. When a virtual machine issues a TRIM command to its corresponding virtual storage device to invalidate data stored therein, the TRIM command is received at an interface layer in the hypervisor that translates the TRIM command to a SCSI command known as UMMAP. A SCSI virtualization layer converts the UNMAP command to a file system command to delete portions of the virtual storage device that is maintained as a file in the hypervisor's file system. Upon receiving the delete commands, the hypervisor's file system driver generates a TRIM command to invalidate the data stored in the solid-state memory device at locations corresponding to the portions of the file that are to be deleted. | 2014-10-30 |
20140325142 | Input/Output De-Duplication Based on Variable-Size Chunks - Techniques, systems, and articles of manufacture for input/output de-duplication based on variable-size chunks. A method includes partitioning virtual block data into multiple variable-sized chunks, caching each of the multiple variable-sized chunks in a chunk cache according to content of each of the multiple variable-sized chunks, initializing virtual block-to-chunk mapping and chunk-to-physical block mapping for each of the multiple variable-sized chunks, and detecting duplicate disk input and/or output requests across multiple hosts based on content-based mappings of the input and/or output requests to the chunk cache and the virtual block-to-chunk mapping and chunk-to-physical block mapping for each of the multiple variable-sized chunks in the chunk cache. | 2014-10-30 |
20140325143 | USING PROTECTION INFORMATION METADATA FIELDS FOR STORING CONFIGURATION INFORMATION - A SCSI command is issued to a mass storage device to read a first block that stores a first portion of a DDF data structure associated with a first volume. The SCSI command instructs the mass storage device not to check at least a first portion of protection information metadata associated with the first block. In response to the SCSI command, a host receives configuration information encoded into the protection information metadata. The host decodes the configuration information encoded into the protection information metadata to determine a first property associated with the first volume. | 2014-10-30 |
20140325144 | PROTECTION INFORMATION INITIALIZATION - M number of physical drives are divided into a plurality of strips. The plurality of strips each has an equal number of blocks on each of the M physical drives. Each of the strips has a first logical block address associated with a first block of the strip. The plurality of strips are grouped across the M physical drives into a plurality of stripes. Each of the stripes is configured use one strip from each of the M physical drives. A first stripe of the plurality of strips has M total strips configured as M−1 data strips and one parity strip. Protection information parity values are calculated for the parity strip in the first stripe using the respective first logical block addresses of the M−1 data strips. | 2014-10-30 |
20140325145 | CACHE REBUILDS BASED ON TRACKING DATA FOR CACHE ENTRIES - Methods and structure are provided for rebuilding cache data from a failed cache device based on tracking data for the failed cache device. The system includes a memory and a cache manager. The memory stores tracking data that correlates entries at a cache with logical block addresses of a logical volume. The cache manager is able to determine that a device implementing the cache has failed and to analyze the tracking data to identify logical block addresses correlated with cache entries from the failed cache device. The cache manager is further able to generate new cache entries at a new cache device, and to populate the new cache entries with data from the identified logical block addresses. | 2014-10-30 |
20140325146 | CREATING AND MANAGING LOGICAL VOLUMES FROM UNUSED SPACE IN RAID DISK GROUPS - Methods and structure are provided for creating and managing unused storage capacity in Redundant Array of Independent Disks (RAID) systems. One embodiment is a RAID controller that includes a controller operable to create and manage a logical volume out of storage space that would otherwise not be used by a RAID system. The logical volume is then exposed to the host operating system as a logical volume where the storage space can be used as a cache device for a host operating system. | 2014-10-30 |
20140325147 | DEDUPLICATION OF DATA BLOCKS ON STORAGE DEVICES - A storage system comprises a cache for caching data blocks and storage devices for storing blocks. A storage operating system may deduplicate sets of redundant blocks on the storage devices based on a deduplication requirement. Blocks in cache are typically deduplicated based on the deduplication on the storage devices. Sets of redundant blocks that have not met the deduplication requirement for storage devices and have not been deduplicated on the storage devices and cache are targeted for further deduplication processing. Sets of redundant blocks may be further deduplicated based on their popularity (number of accesses) in cache. If a set of redundant blocks in cache is determined to have a combined number of accesses being greater than a predetermined threshold number of accesses, the set of redundant blocks is determined to be “popular.” Popular sets of redundant blocks are selected for deduplication in cache and the storage devices. | 2014-10-30 |
20140325148 | DATA STORAGE DEVICES WHICH SUPPLY HOST WITH DATA PROCESSING LATENCY INFORMATION, AND RELATED DATA PROCESSING METHODS - A method is for operating a data storage device including a plurality of memory chips. The method includes generating state information regarding the plurality of memory chips, storing the generated state information in a memory, receiving an access command from a host, analyzing the state information in response to the access command, and transmitting a response to the host indicative of whether the access command is performed based on the analyzed state information. | 2014-10-30 |
20140325149 | METHOD AND SYSTEM FOR CONSOLIDATING A PLURALITY OF HETEROGENEOUS STORAGE SYSTEMS IN A DATA CENTER - A system and method for consolidating a plurality of heterogeneous storage systems in a data center comprising collecting data from a plurality of heterogeneous storage devices ( | 2014-10-30 |
20140325150 | WIRELESS APPARATUS - According to one embodiment, a wireless apparatus includes a substrate, a first semiconductor chip, a transmission line, a non-conductive layer, a conductive layer and a wire. The first semiconductor chip is arranged on the substrate and includes a circuit which transmits and receives a signal. The transmission line includes a first portion which is formed in at least one of the substrate and the first semiconductor chip. The non-conductive layer seals the first semiconductor chip. The conductive layer covers a surface of the non-conductive layer, an opening being formed in at least a part of the conductive layer. The wire is connected to the first portion so as to extend from the first portion toward the opening and is arranged in a position in which the opening is excited. | 2014-10-30 |
20140325151 | METHOD AND SYSTEM FOR DYNAMICALLY MANAGING BIG DATA IN HIERARCHICAL CLOUD STORAGE CLASSES TO IMPROVE DATA STORING AND PROCESSING COST EFFICIENCY - A system and method for autonomic data storage and movement for big data analytics. A cost, such as storing cost and a processing cost are calculated for received data. The processing type associated with the received data is determined in response to the calculated costs. The received data is classified as one of a set of hierarchical storage classes based upon the determined processing type. The hierarchical storage classes include no data store, memory, HDFS, database, disk archive, external clouds, and data removal. The received data is then stored in the storage location associated with that class. In the event that insufficient capacity is available in the location, the priority of the received data and the priority of previously stored data is determined and compared. The priority is calculated based on potential usage, privacy, estimated cost, frequency of usages and the age of data. The lower priority data is then moved to the next lower hierarchical class for storage. | 2014-10-30 |
20140325152 | QUADTREE BASED DATA MANAGEMENT FOR MEMORY - A method for managing memory. The method includes executing a memory management function, and reading data from memory into a particular size array structure using the memory management function based on using quadtree structure sub-functions to scan the particular size array structure for filtering the data iteratively. | 2014-10-30 |
20140325153 | MULTI-HIERARCHY INTERCONNECT SYSTEM AND METHOD FOR CACHE SYSTEM - A multi-hierarchy interconnect system for a cache system having a tag memory and a data memory includes an address interconnect scheduling device and a data interconnect scheduling device. The address interconnect scheduling device performs a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory. The data interconnect scheduling device performs a data bank arbitration to schedule data requests to a plurality of data banks of the data memory. Besides, a multi-hierarchy interconnect method for a cache system having a tag memory and a data memory includes: performing a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory, and performing a data bank arbitration to schedule data requests to a plurality of data banks of the data memory. | 2014-10-30 |
20140325154 | Private Memory Regions and Coherence Optimizations - A system for optimizing cache coherence message traffic volume is disclosed. The system includes a plurality of caches in a multi-level memory hierarchy and a plurality of agents. Each agent is associated with a cache. The system includes one or more monitoring engines. Each agent in the plurality of agents is associated with a monitoring engine. The agents can execute a processor level software instruction causing a memory region to be private to the agent. Each of the agents is configured to execute a memory access for data on an associated cache and to send a request for data up the hierarchy on a cache miss. The monitoring engine is configured to intercept request for data from an agent and to prevent snooping for the cache line in peer caches when the cache line associated with a memory region represented as private to the agent. | 2014-10-30 |
20140325155 | MANAGING RESOURCES USING RESOURCE EXPIRATION DATA - Resource management techniques, such as cache optimization, are employed to organize resources within caches such that the most requested content (e.g., the most popular content) is more readily available. A service provider utilizes content expiration data as indicative of resource popularity. As resources are requested, the resources propagate through a cache server hierarchy associated with the service provider. More frequently requested resources are maintained at edge cache servers based on shorter expiration data that is reset with each repeated request. Less frequently requested resources are maintained at higher levels of a cache server hierarchy based on longer expiration data associated with cache servers higher on the hierarchy. | 2014-10-30 |
20140325156 | Long Latency Tolerant Decoupled Memory Hierarchy for Simpler and Energy Efficient Designs - A decoupled memory execution verification method is provided that includes executing load and store commands separately using an appropriately programmed computer, where the load and store commands are independent of correctness, where the load commands and the store commands are re-executed in-order at memory retirement to verify correctness, where an energy efficient power decoupled execution of memory (e-PDEMI) is provided. | 2014-10-30 |
20140325157 | DATA ACCESS REQUEST MONITORING TO REDUCE SYSTEM RESOURCE USE FOR BACKGROUND OPERATIONS - An I/O processing stack includes a proxy that can provide processing services for access requests to initialized and uninitialized storage regions. For a write request, the proxy stores write information in a write metadata repository. If the write is requested for an address in an initialized storage region of the storage system, the proxy performs a write to the initialized region based on region information in the write I/O access request. If the write is requested for an address in an uninitialized storage region of the storage system, the proxy performs an on-demand initialization of the storage region and then performs a write to the storage region based on region information provided by the proxy. | 2014-10-30 |
20140325158 | MANAGING GLOBAL CACHE COHERENCY IN A DISTRIBUTED SHARED CACHING FOR CLUSTERED FILE SYSTEMS - Systems. Methods, and Computer Program Products are provided for managing a global cache coherency in a distributed shared caching for a clustered file systems (CFS). The CFS manages access permissions to an entire space of data segments by using the DSM module. In response to receiving a request to access one of the data segments, a calculation operation is performed for obtaining most recent contents of one of the data segments. The calculation operation performs one of providing the most recent contents via communication with a remote DSM module which obtains the one of the data segments from an associated external cache memory, instructing by the DSM module to read from storage the one of the data segments, and determining that any existing contents of the one of the data segments in the local external cache are the most recent contents. | 2014-10-30 |
20140325159 | CONTROL OF PRE-FETCH TRAFFIC - Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request. | 2014-10-30 |
20140325160 | CACHING CIRCUIT WITH PREDETERMINED HASH TABLE ARRANGEMENT - Disclosed herein are an apparatus, an integrated circuit, and method to cache objects. At least one hash table of a circuit comprises a predetermined arrangement that maximizes cache memory space and minimizes a number of cache memory transactions. The circuit handles requests by a remote device to obtain or cache an object. | 2014-10-30 |
20140325161 | COLLABORATIVE CACHING - A method is provided for collaborative caching between a server cache ( | 2014-10-30 |
20140325162 | MEMORY DEVICE AND METHOD FOR HIGH SPEED AND RELIABILITY - A memory device is provided with an instruction decoding unit, a control and logic unit, a first memory, and a second memory. The memory device serves to decode an inputted instruction and producing a decoding signal. The control and logic unit serves to produce a control signal based on the decoding signal. The first memory has a first memory array and a first page buffer, and the second memory with a second memory array and a second page buffer. When the inputted instruction is a preset instruction, the preset instruction is used to simultaneously execute data access on a first memory and access the backup data on a second memory based on a same data. | 2014-10-30 |
20140325163 | Cross-Partition Shared Memory Attach for Data Processing Environment - A technique for managing shared memory includes linking address translation data structures used by first and second sharing applications. The first sharing application is managed by a first operating system (OS) and the second sharing application is managed by a second OS that hosts an associated virtual object. Virtual addresses of the first and second sharing applications are bound, based on the linking, to a changeable set of physical addresses that the second OS assigns to the associated virtual object such that the associated virtual object, which is shared by the sharing applications, is pageable by the second OS without permission of the first OS. | 2014-10-30 |
20140325164 | SET HEAD FLAG OF REQUEST - A request is output to a first queue of a storage device. A head flag of the request is set based on whether the request is a read type request and a comparison of a percentage of requests queued at the first queue that are read type requests to a threshold percentage. The storage device is to store the request at a head of the first queue if the head flag of the request is set. | 2014-10-30 |
20140325165 | MEMORY APPARATUS AND MEMORY MANAGEMENT METHOD - A memory apparatus includes a detection unit, a storage unit, an update unit, and a determination unit. The detection unit is configured to detect a deterioration factor of a nonvolatile memory. The storage unit is configured to hold a lifetime estimation value. The update unit is configured to update the lifetime estimation value on the basis of the deterioration factor detected by the detection unit. The determination unit is configured to use the lifetime estimation value updated by the update unit to generate a notification signal. | 2014-10-30 |
20140325166 | POWER SAVING MODE HYBRID DRIVE ACCESS MANAGEMENT - A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system supports multiple priority levels and obtains priority levels for groups of data identified by logical block addresses (LBAs). The LBAs read while the device is operating in a power saving mode are assigned a priority level that is at least the lowest of the multiple priority levels supported by the device, increasing the likelihood that LBAs read while the device is operating in the power saving mode are stored in the performance part of the hybrid drive. | 2014-10-30 |
20140325167 | Invalidating a Range of Two or More Translation Table Entries and Instruction Therefore - An instruction is provided to perform invalidation of an instruction specified range of segment table entries or region table entries. The instruction can be implemented by software emulation, hardware, firmware or some combination thereof. | 2014-10-30 |
20140325168 | MANAGEMENT OF STORED DATA BASED ON CORRESPONDING ATTRIBUTE DATA - A data storage device receives data and corresponding attribute data, stores the received data and the corresponding attribute data in a storage region of the data storage device, and automatically processes invalid data among the received data stored in the storage region based on the corresponding attribute data. | 2014-10-30 |
20140325169 | DIRTY DATA MANAGEMENT FOR HYBRID DRIVES - A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a hard disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. Some data can be stored in one part but not the other, and this data can be synchronized with (e.g., copied to) the other part at various times. The drive access system provides indications to the hybrid drive of when to synchronize data in one part with the other part. These indications are made so that potential interference with use of the device by the user and/or power saving modes of the device due to the synchronization is reduced. | 2014-10-30 |
20140325170 | Conversion of Virtual Disk Snapshots Between Redo and Copy-on-Write Technologies - A framework for converting between copy-on-write (COW) and redo-based technologies is disclosed. To take a virtual disk snapshot, disk descriptor files, which include metadata information about data stored in virtual volumes (vvols), are “swizzled” such that the descriptor file for a latest redo log, to which IOs are currently performed, points to the base vvol of a COW-based vvol hierarchy. A disk descriptor file previously associated with the base vvol may also be updated to point to the vvol newly created by the snapshot operation. To revert to an earlier disk state, a snapshot may be taken before copying contents of a snapshot vvol of the COW-based vvol hierarchy to a base vvol of the hierarchy, thereby ensuring that the reversion can be rolled back if it is unsuccessful. Reference counting is performed to ensure that vvols in the vvol hierarchy are not orphaned in delete and revert use cases. Differences between vvols in the COW-based vvol hierarchy are used to clone the hierarchy and to migrate the hierarchy to a redo-based disk hierarchy. | 2014-10-30 |
20140325171 | SEMICONDUCTOR DEVICE - The amount of data to be backed up and recovered is reduced when supply of power to a semiconductor device is stopped and restarted. A backup need determination circuit provided in the semiconductor device reads the kind of instruction decoded by a decoder and determines whether data needs to be backed up from a volatile register to a nonvolatile register. With a structure according to one embodiment of the present invention, it is possible to select necessary data from data used for operation in a logic circuit before the power supply is stopped and after the power supply is restarted. Data that is necessary after the power supply is restarted can be backed up from the volatile register to the nonvolatile register before the power supply is stopped. Data that is unnecessary is not backed up from the volatile register to the nonvolatile register before the power supply is stopped. | 2014-10-30 |
20140325172 | Selective Data Storage in LSB and MSB Pages - A method for data storage includes providing a memory, which includes multiple groups of memory cells and is configured to concurrently store first data using a first storage configuration having a first access time, and second data using a second storage configuration having a second access time, longer than the first access time, such that each memory cell in each of the groups stores at least one bit of the first data and one or more bits of the second data. Data items are accepted for storage in the memory. The accepted data items are classified into a fast-access class and a normal-access class. The data items in the fast-access class are stored in the memory using the first storage configuration, and the data items in the normal-access class are stored in the memory using the second storage configuration. | 2014-10-30 |
20140325173 | MEMORY CONTROLLER MAPPING ON-THE-FLY - Systems, methods, and devices for dynamically mapping and remapping memory when a portion of memory is activated or deactivated are provided. In accordance with an embodiment, an electronic device may include several memory banks, one or more processors, and a memory controller. The memory banks may store data in hardware memory locations and may be independently deactivated. The processors may request the data using physical memory addresses, and the memory controller may translate the physical addresses to hardware memory locations. The memory controller may use a first memory mapping function when a first number of memory banks is active and a second memory mapping function when a second number is active. When one of the memory banks is to be deactivated, the memory controller may copy data from only the memory bank that is to be deactivated to the active remainder of memory banks. | 2014-10-30 |
20140325174 | ACCESS CONTROL APPARATUS, ACCESS CONTROL METHOD, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, an access control apparatus includes a determiner and a controller. The determiner is configured to determine whether an access state of a first device to a storage device satisfies an exclusion criterion for access to the storage device from a second device. The controller is configured to prohibit the access to the storage device from the second device when the access state of the first device satisfies the exclusion criterion. | 2014-10-30 |
20140325175 | PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION - The present invention includes an integrated module including a plurality of data processing units including a memory device having processing instruction data stored therein. The processing instruction data including subconfiguration data for at least one of the data processing units, the subconfiguration data including a plurality of blocks. The integrated module further includes a barrier disposed between a first block and a second block of the plurality of blocks. Wherein, the data processing units process the processing instruction data from the memory device such that the barrier provides for the data processing units to observe a configuration sequence of the subconfiguration data. | 2014-10-30 |
20140325176 | SECURITY MEMORY ACCESS METHOD AND APPARATUS - Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory device, a request from the external device to access a storage area of the memory device and performing an unlock procedure of the storage area. The unlock procedure includes sending a first code from the memory device to the external device, and receiving a second code at the memory device from the external device. The second code is to be generated by a first encryption process performed on the first code to obtain the second code. The storage area is temporarily unlocked to allow the external device to access the storage area based on a determination that the received second code has a predetermined relationship to the first code. Additional apparatuses and methods are described. | 2014-10-30 |
20140325177 | HEAP MANAGEMENT USING DYNAMIC MEMORY ALLOCATION - Embodiments of the present invention provide a method, system, and program product for heap management using dynamic memory allocation. The method comprises receiving, via a computing device, a memory request associated with a memory block, wherein the computing device has a double linked list of fixed sized memory blocks and a double linked list of variable sized memory blocks; and wherein each memory block includes a value field and a header field, which includes one or more of a backward link, forward link, and memory block size indicator that includes a first bit and a second bit. The method further comprises determining a scope of the received memory request, which can be a request for memory allocation or memory deallocation. Further still, the method comprises servicing the received memory request. | 2014-10-30 |
20140325178 | SYSTEM HAVING ONE OR MORE MEMORY DEVICES - A system having serially connected memory devices in a ring topology organization to realize high speed performance. The memory devices have dynamically configurable data widths such that the system can operate with up to a maximum common number of active data pads to maximize performance, or to operate with a single active data pad to minimize power consumption. Therefore the system can include a mix of memory devices having different data widths. The memory devices are dynamically configurable through the issuance of a single command propagated serially through all the memory devices from the memory controller in a broadcast operation. Robust operation of the system is ensured by implementing a data output inhibit algorithm, which prevents valid data from being provided to the memory controller when read output control signal is received out of its proper sequence. | 2014-10-30 |
20140325179 | SYSTEM AND METHOD FOR WRITING PILOT DATA INTERSPERSED WITH USER DATA FOR ESTIMATING DISTURBANCE EXPERIENCED BY USER DATA - A system including a write module to write pilot data at predetermined locations in a page of memory cells that are interspersed with user data in the page. The pilot data has a first predetermined pattern and provides an indication of a disturbance experienced by the user data due to noise and a read, write, or erase operation performed on the page. A read module reads data from the predetermined locations subsequent to writing the pilot data. A signal processing module compares the data read from the predetermined locations with the pilot data and estimates, based on the comparison of the data read from the predetermined locations in the page with the pilot data, and the first predetermined pattern of the pilot data, the disturbance experienced by the user data due to the noise and the read, write, or erase operation performed on the page. | 2014-10-30 |
20140325180 | ELECTRONIC SYSTEM, CENTRAL PROCESSING UNIT EXPANSION APPARATUS, PORTABLE ELECTRONIC APPARATUS AND PROCESSING METHOD - An electronic system includes a central processing unit (CPU) expansion apparatus and a portable electronic apparatus. The CPU expansion apparatus has a first CPU connector and a first CPU. The portable electronic apparatus has a second CPU connector and a second CPU. When the first CPU connector is connected to the second CPU connector, a data transmission is implemented between the first CPU and the second CPU. A CPU expansion apparatus, portable electronic apparatus and processing method are also disclosed. With the electronic system, CPU expansion apparatus, portable electronic apparatus and processing method according to the invention, the portable electronic apparatus can be connected to an additional CPU externally and is thereby improved in efficiency of processing and computing. | 2014-10-30 |
20140325181 | HIERARCHICAL RECONFIGURABLE COMPUTER ARCHITECTURE - A reconfigurable hierarchical computer architecture having N levels, where N is an integer value greater than one, wherein said N levels include a first level including a first computation block including a first data input, a first data output and a plurality of computing nodes interconnected by a first connecting mechanism, each computing node including an input port, a functional unit and an output port, the first connecting mechanism capable of connecting each output port to the input port of each other computing node; and a second level including a second computation block including a second data input, a second data output and a plurality of the first computation blocks interconnected by a second connecting means for selectively connecting the first data output of each of the first computation blocks and the second data input to each of the first data inputs and for selectively connecting each of the first data outputs to the second data output. | 2014-10-30 |
20140325182 | System and Method for Creating Highly Scalable High Availability Cluster in a Massively Parallel Processing Cluster of Machines in a Network - System and method embodiments are provided to implement highly scalable and high availability (HA) clusters in massively parallel processing (MPP) systems. The embodiments include a method to build a highly scalable MPP HA cluster, which provides HA to the cluster while allowing it to scale to relatively larger number of nodes. An embodiment apparatus includes a plurality of data processing nodes distributed in a plurality of corresponding sub-clusters and configured to exchange heart-beat messages between each other within limit of each of the corresponding sub-clusters to maintain sub-cluster membership integrity and detect failures in the corresponding sub-clusters. The sub-clusters are arranged in a fan-out tree hierarchy and configured to prevent heart-beat messaging between each other. | 2014-10-30 |
20140325183 | INTEGRATED CIRCUIT DEVICE, ASYMMETRIC MULTI-CORE PROCESSING MODULE, ELECTRONIC DEVICE AND METHOD OF MANAGING EXECUTION OF COMPUTER PROGRAM CODE THEREFOR - An asymmetric multi-core processing module is described. The asymmetric multi-core processing module comprises at least one processing core of a first type, at least one processing core of at least one further type, and at least one core identifier configuration component. The at least one core identifier configuration component is arranged to enable dynamic configuration of a value of a core identifier of at least one of the processing cores of the first and at least one further types. | 2014-10-30 |
20140325184 | MECHANISM FOR SAVING AND RETRIEVING MICRO-ARCHITECTURE CONTEXT - A processor saves micro-architectural contexts to increase the efficiency of code execution and power management. Power management hardware during runtime monitors execution of a code block. The code block has been compiled to have a reserved space appended to one end of the code block. The reserved space includes a metadata block associated with the code block or an identifier of the metadata block. The hardware stores a micro-architectural context of the processor in the metadata block. The micro-architectural context includes performance data resulting from a first execution of the code block. The hardware reads the metadata block upon a second execution of the code block and tunes the second execution based on the performance data. | 2014-10-30 |
20140325185 | Method for Operating a Processor - A method for operating a processor in which a first program comprising a first sequence of commands is provided, at least one second program is provided comprising a second sequence of commands, where the first program comprises a time-critical section with time-critical commands, commands from the first and second programs are processed in a processor pipeline, a start time is identified for the time-critical section in the first program, and a predefined interrupt program is incorporated into the at least one second program once the start time of the time critical section in the first program has been identified. | 2014-10-30 |
20140325186 | SUPPORTING CODE EXECUTION IN DUAL ADDRESS SPACES - A processing apparatus supports execution of executable computer program code, wherein non-instruction data is read from and written to a first address space, while executable instructions are fetched from a second address space. Preferably, the processing apparatus supports execution of a modified or enhanced computer program. The programs and user interfaces in the first address space see only the unmodified first program in the first address space and cannot detect the modified or enhanced program in the second address space. | 2014-10-30 |
20140325187 | SINGLE-CYCLE INSTRUCTION PIPELINE SCHEDULING - A method includes allocating a first single-cycle instruction to a first pipeline that picks single-cycle instructions for execution in program order. The method further includes marking at least one source register of the first single-cycle instruction as ready for execution in the first pipeline in response to all older single-cycle instructions allocated to the first pipeline being ready and eligible to be picked for execution. An apparatus includes a decoder to decode a first single-cycle instruction and to allocate the first single-cycle instruction to a first pipeline. The apparatus further includes a scheduler to pick single-cycle instructions for execution by the first pipeline in program order and to mark at least one source register of the first single-cycle instruction as ready for execution in the first pipeline in response to determining that all older single-cycle instructions allocated to the first pipeline are ready and eligible. | 2014-10-30 |
20140325188 | SIMULTANEOUS FINISH OF STORES AND DEPENDENT LOADS - A method for reducing a pipeline stall in a multi-pipelined processor includes finding a store instruction having a same target address as a load instruction and having a store value of the store instruction not yet written according to the store instruction, when the store instruction is being concurrently processed in a different pipeline than the load instruction and the store instruction occurs before the load instruction in a program order. The method also includes associating a target rename register of the load instruction as well as the load instruction with the store instruction, responsive to the finding step. The method further includes writing the store value of the store instruction to the target rename register of the load instruction and finishing the load instruction without reissuing the load instruction, responsive to writing the store value of the store instruction according to the store instruction to finish the store instruction. | 2014-10-30 |
20140325189 | QUERY SAMPLING INFORMATION INSTRUCTION - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 2014-10-30 |
20140325190 | METHOD FOR IMPROVING EXECUTION PERFORMANCE OF MULTIPLY-ADD INSTRUCTION DURING COMPILING - The present invention relates to a method for improving execution performance of multiply-add instructions during compiling, comprising the following steps of: compiling a source code by a compiler to acquire internal representation; optimizing; generating a machine code on the basis of a target processor, and allocating a physical register to a pseudo-register in the machine code; and improving results of register allocation to multiply-accumulate instructions. The method for improving execution performance of multiply-add instructions during compiling provided by the present invention has the following advantages: the compiler is allowed to realize procedure optimization by acquiring the optimal MAC (multiply-accumulate) instruction use gain. | 2014-10-30 |
20140325191 | SEMICONDUCTOR TEST APPARATUS FOR CONTROLLING TESTER - A tester instruction generation unit generates a tester instruction for terminals of a plurality of devices connected to a tester based on an instruction of a user program and causes an instruction storage unit to store the tester instruction. A transfer mode setting unit sets a transfer mode to either a successive transfer mode or a batch transfer mode, based on the number of tester instructions in the instruction storage unit or an instruction of the user program. A transfer control unit transmits the tester instruction in the instruction storage unit to the tester in accordance with the set transfer mode. | 2014-10-30 |
20140325192 | MEMRISTOR BASED MULTITHREADING - A method and a device that includes a set of multiple pipeline stages, wherein the set of multiple pipeline stages is arranged to execute a first thread of instructions; multiple memristor based registers that are arranged to store a state of another thread of instructions that differs from the first thread of instructions; and a control circuit that is arranged to control a thread switch between the first thread of instructions and the other thread of instructions by controlling a storage of a state of the first thread of instructions at the multiple memristor based registers and by controlling a provision of the state of the other thread of instructions by the set of multiple pipeline stages; wherein the set of multiple pipeline stages is arranged to execute the other thread of instructions upon a reception of the state of the other thread of instructions. | 2014-10-30 |
20140325193 | DYNAMIC INSTRUMENTATION - Techniques for dynamic instrumentation are provided. A method for instrumentation preparation may include obtaining address data of an original instruction in an original instruction stream, obtaining kernel mode data comprising a kernel breakpoint handler, obtaining user mode data comprising a user breakpoint handler, allocating a page of a process address space, creating a trampoline, associating the trampoline with a breakpoint instruction, and replacing the original instruction with the breakpoint instruction. A method for instrumentation may include detecting the breakpoint instruction, calling the kernel breakpoint handler, modifying an instruction pointer via the kernel breakpoint handler such that the instruction pointer points to the trampoline, and executing the trampoline. The system for instrumentation may include a breakpoint setup module and a breakpoint execution module for respectively setting up and completing instrumentation involving the trampoline. | 2014-10-30 |
20140325194 | SYSTEM FOR CONFIGURING A CONTROLLER - A system for configuring a controller without a file transfer. Programmable controllers may typically use configuration data structures that are transferred to the controller via a file transfer mechanism. The present controller does not necessarily need a tool with file transfer capability, but only a capability to read and write network variables. Configuration data structures may incorporate replacement specifications, and replacement constants representing replacement data to be selected. Changes of value in public variables may be identified as being replacement variables by virtue of their presence in the replacement specifications. When such changes of values are detected, instructions in the replacement specifications may detail how to modify the configuration file content associated with those public variables. | 2014-10-30 |
20140325195 | METHOD FOR UNLOCKING A MOBILE DEVICE - The present disclosure is drawn to a method for unlocking a mobile device. The method comprises the steps of adopting a configuration file to define an operational input for unlocking the mobile device, adopting the configuration file to define at least one animation and/or effect, adopting the configuration file to establish a relationship between the operational input and the at least one animation and/or effect, and triggering the animation and/or effect when unlocking the mobile device. The technical scheme of the present disclosure combines the operational input for unlocking the mobile device with the animation and/or effect, helping to improve the user experience of unlocking a mobile device. | 2014-10-30 |
20140325196 | System and Method for Inventory Collection Optimization by Selective Binding of the Pre-Boot Drivers - A solution to optimize system boot-up time by selectively collecting device inventory for only the devices that have configuration changes and for skipping for all other devices. More specifically, the solution includes a selective driver binding operation which in certain embodiments executes within an inventory application. After the selective driver binding operation gathers data for a certain device, the selective driver binding operation gathers data for that certain device again only when data relating to the particular device has changed. Instead of binding to every device, the selective driver binding operation selectively binds only to devices with changes, thus executing system management code only for specific devices and saving boot time. | 2014-10-30 |
20140325197 | SPECIALIZED BOOT PATH FOR SPEEDING UP RESUME FROM SLEEP STATE - A specialized boot path for speeding up resume from a sleep state is discussed. In a UEFI-compliant system, a specially constructed alternate firmware volume is created which contains only the code modules used during resumption from an S3 sleep state. This alternate firmware volume is copied into Random Access Memory (RAM) during a normal boot. When the system subsequently enters the S3 sleep state and then begins the resume boot process, code in the boot sequence detects it is a resume from an S3 sleep state, restores a RAM configuration and jumps execution to a Pre-EFI Initialization (PEI) core entry point in the alternate firmware volume in RAM instead of to a firmware volume in ROM. This alternate firmware volume performs specified S3 resume tasks and then returns control to the operating system. | 2014-10-30 |
20140325198 | ELECTRONIC DEVICE AND LOADING METHOD OF CONTROL PROGRAM - An electronic device comprises a first memory unit, a processing unit and an operating interface. The processing unit is electronically connected to the first memory unit. The operating interface is electronically connected to the processing unit. When the processing unit is communicated with a host device via the operating interface, the processing unit executes a loading program and transmits a notification signal to the host device. The host device transmits at least one control program to the first memory unit according to the notification signal. When the control program is transmitted, the processing unit is reset and then executes the control program stored in the first memory unit. The stored firmware can be added or modified, and the circuit layout is simplified. | 2014-10-30 |
20140325199 | INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING APPARATUS AND START UP CONTROL METHOD - An information processing system includes an operation part that receives an operation performed by a user; and a body part that operates based on a request from the operation part. The operation part includes a power control part that, when receiving a power turning off instruction from the body part, reboots the operation part and causes the operation part to stand by in a power saving state in which some of operations are stopped, and, when receiving a start up notification from the body part, causes the operation part to return from the power saving state. | 2014-10-30 |
20140325200 | Memory Access Control Performing Efficient Access - A memory access control system includes a plurality of operators, a first memory, and a second memory. The plurality of operators are configured to execute different arithmetic operations. The first memory has a shared region accessible from the plurality of operators. The second memory is configured to cause any one of the plurality of operators to access. One of the operators is configured to access the second memory to load required data and execute a process concurrently with loading data required for a separate other process to cause the first memory to hold the data required for the separate other process. | 2014-10-30 |
20140325201 | AUTOMATIC ENTRANCE DEVICE AND METHOD FOR UPGRADE BOOT MODE - An automatic entrance device in accordance with the present invention performs software upgrade by starting up a terminal in an upgrade boot mode by holding operation of a memory when a USB interface of a terminal is connected to an external device, and starts up the terminal in a normal boot mode by a processor accessing memory by disabling hold of operation of memory when the USB interface and external device are disconnected. | 2014-10-30 |
20140325202 | INTELLIGENT BOOT DEVICE SELECTION AND RECOVERY - Techniques for recovering virtual machine state and boot information used to boot an installed guest operating system on systems where the information has either been lost or is not present are described. | 2014-10-30 |
20140325203 | BACKING UP FIRMWARE DURING INITIALIZATION OF DEVICE - Example embodiments disclosed herein relate to backing up firmware. An operating system can be initialized. During the initialization process, memory can be set. The firmware can be backed up to storage based on the set memory. | 2014-10-30 |
20140325204 | Device Management Macros - Mobile device management macros may be provided. A request to perform a function may be received. If the function is associated with a management macro comprising a plurality of operations, the macro may be activated to perform at least some of the plurality of operations. | 2014-10-30 |
20140325205 | SECURE TRANSMISSION BETWEEN A SOURCE COMPONENT AND A NODE DEVICE - A system and method for communicating a data file is described. The system includes at least one particular node, a source component, a node identifier request, a query, an encrypted data file and a node decryption key. The node identifier request is communicated from the source component to the particular node. The unique node identifier is communicated from the particular node to the source component. The encrypted data file is generated by the source component. The encrypted data file is produced with an encryption algorithm that utilizes the unique node identifier to generate an encryption key. The node decryption key for the node device is also generated by the source component utilizing the unique node identifier. The encrypted data file is then communicated from the source component to the particular node. The encrypted data is decrypted at the node with the node decryption key that corresponds to the particular node. | 2014-10-30 |
20140325206 | DIGITAL DEVICE AND METHOD FOR PERFORMING SECURE COMMUNICATION USING SAME - Disclosed is a method for performing secure communication using a digital device. The method includes outputting a light pattern using a radiator of a proximity sensor unit; and detecting the proximity of an object using the proximity sensor unit. Further, the method includes, when the object is in proximity within a predetermined distance range, extracting key generation information for the secure communication using the light pattern outputted from the radiator; generating a security key using the key generation information; and performing the secure communication with an external device using the generated security key. | 2014-10-30 |
20140325207 | MULTI-VERSION MESSAGE CONDITION BASED DELIVERY - A recipient message system receiving an email message set of two or more email messages and a related condition from a sender to a recipient. The recipient message system detects an attempt from the recipient to read the message set at a second time instance and evaluates the condition at the second time instance. If the evaluation of the condition results in the first evaluation value, the recipient is provided with the first email message in response to the attempt to read the message set, wherein the recipient is not able to read the second email message in this event. If the evaluation of the condition results in the second evaluation value, the recipient is provided with the second email message in response to the attempt to read the message set, wherein the recipient is not able to read the first email message in this event. | 2014-10-30 |
20140325208 | OBTAINING A SIGNED CERTIFICATE FOR A DISPERSED STORAGE NETWORK - A method begins by a dispersed storage (DS) processing module generating a certificate signing request (CSR) that includes a certificate and a certificate extension, wherein the certificate includes information regarding a requesting device and wherein the certificate extension includes information regarding an accessible dispersed storage network (DSN) address range for the requesting device. The method continues with the DS processing module outputting the CSR to a certificate authority of a DSN and receiving a signed certificate from the certificate authority, wherein the signed certificate includes a certification signature of the certificate authority authenticating the certificate and the certificate extension. The method continues with the DS processing module storing the signed certificate for use when generating a DSN access request, wherein the DSN access request is requesting access to dispersed storage error encoded data in the DSN at an address within the accessible DSN address range. | 2014-10-30 |
20140325209 | SYSTEM AND METHOD FOR MANAGING NETWORK ACCESS BASED ON A HISTORY OF A CERTIFICATE - Provided is a system and method for managing network access based on a history of a Certificate. The system includes an Authentication System structured and arranged to receive from a User a request for network access, the request including a Certificate and at least one associated Characteristic distinct from the Certificate. A validation system is in communication with the Authentication System and structured and arranged to receive a request for validation of the Certificate, the Validation System evaluating the at least one Characteristic against a History for the Certificate to provide a positive or negative evaluation. The Validation System updates the History for the Certificate to include the request for validation of the Certificate. In response to a positive evaluation validating the Certificate, the Authentication System permits network access to the user. In response to a negative evaluation the Authentication System blocking network access to the user and the Certificate being restricted. An associated method of use is also provided. | 2014-10-30 |
20140325210 | APPARATUS AND METHODS FOR ACTIVATION OF COMMUNICATION DEVICES - A method that incorporates teachings of the subject disclosure may include, for example, storing, by a universal integrated circuit card including at least one processor, a digital root certificate locking a communication device to a network provider, and disabling an activation of the communication device responsive to receiving an indication of a revocation of the stored digital root certificate from a certificate authority, wherein the indication of the revocation of the stored digital root certificate is associated with a revocation of permission for an identity authority to issue a security activation information to the communication device on behalf of the network provide. Other embodiments are disclosed. | 2014-10-30 |
20140325211 | METHOD FOR UPDATING A TABLE OF CORRESPONDENCE BETWEEN A LOGICAL ADDRESS AND AN IDENTIFICATION NUMBER - A method for updating a table of correspondence between a logical address associated to a user unit in a communication network and a unique identification number associated to one of a group of user units managed by a management centre, a method where messages are exchanged between said management centre and a specific user unit of said group by using said communication network, these messages being forwarded to the logical address of the specific user in said network, the method including searching in said table for the logical address of the user unit in said communication network corresponding to the unique identification number of the specific user unit; sending of messages to the user unit having the concerned unique identification number, to the logical address corresponding to said communication network; and if the messages are received incorrectly, sending a request containing an identifier of said specific user unit. | 2014-10-30 |
20140325212 | DISTRIBUTION OF ENCRYPTED INFORMATION IN MULTIPLE LOCATIONS - A method, system, and/or computer program product stores information in a distributed data-processing environment. The method comprises: encrypting, by one or more processors, a piece of information; splitting, by one or more processors, the encrypted piece of information into at least one first encrypted block and at least one second encrypted block, at least part of said at least one first encrypted block being required for decrypting said at least one second encrypted block; distributing, by one or more processors, said at least one first encrypted block for storing in at least one first location; and distributing, by one or more processors, said at least one second encrypted block for storing in at least one second location. | 2014-10-30 |
20140325213 | BLOCK MANAGEMENT UNIFICATION SYSTEM AND METHOD - A block management unification system and method for communicating a data file that includes a source component, a first rearrangement criterion, a first block encryption key, a second rearrangement criterion, a second block encryption key, a compression module, and an encryption module. The source component accesses the data file that is divided into a plurality of blocks. The first rearrangement criterion organize the blocks according to the first rearrangement criterion. The first block encryption key is inserted into the blocks. The second rearrangement criterion organize the blocks according to the second rearrangement criterion. The second block encryption key is inserted into the blocks. A compression module compresses the rearranged blocks. An encryption module encrypts the rearranged blocks with the first block encryption key and the second block encryption key. | 2014-10-30 |
20140325214 | ENCRYPTION SOLUTION FOR PROTECTING FILE SYSTEMS IN MULTI-HOST CLUSTERS - A method of managing file security in a cluster environment is provided. The method includes passing a request for a file from a secure file system layer to a secure volume manager layer and locking at least a portion of the file as affected by the request, at a cluster file system layer. The method includes passing one or more keys from the secure file system layer to the secure volume manager layer. The method includes decrypting the file as received, in response to the request for the file including a read request for the file, prior to sending the decrypted file to the secure file system layer. The method includes encrypting the file as received, in response to the request for the file including a write request for the file, prior to sending the encrypted file to the input/output layer. | 2014-10-30 |
20140325215 | Encryption Method and System - Methods and systems for encrypting data are disclosed. A circuit uses a white noise generator to capture a random string of bits as an encryption key. The encryption key is generated at a central server and is provided to a subscriber on a physical memory device. The subscriber uses the encryption key to encrypt a source data file. The encrypted data file is sent to the central server, which uses the encryption key to decrypt the encrypted data file and to recover the source data file. The file name for the source data file may be encrypted into the encrypted data file and a new name assigned to the encrypted data file. A random number index may be used to identify the starting point of the encrypted file. | 2014-10-30 |
20140325216 | SEGMENT DEDUPLICATION SYSTEM WITH ENCRYPTION AND COMPRESSION OF SEGMENTS - A system for storing encrypted compressed data comprises a processor and a memory. The processor is configured to determine whether an encrypted compressed segment has been previously stored. The encrypted compressed segment was determined by breaking a data stream, a data block, or a data file into one or more segments and compressing and then encrypting each of the one or more segments. The processor is further configured to store the encrypted compressed segment in the event that the encrypted compressed segment has not been previously stored. The memory is coupled to the processor and configured to provide the processor with instructions. | 2014-10-30 |
20140325217 | DATABASE APPARATUS, METHOD, AND PROGRAM - Provided a database apparatus comprising a control means to execute data access control on a database, wherein the control means, receiving a database operation command from a user apparatus, comprises, regarding data and/or metadata to be handled associated with the database operation command, means for executing database operation or computation on encrypted data and/or encrypted metadata as is in ciphertext and means for executing database operation or computation on plaintext data and/or plaintext metadata, and the control means sends a processing result to the user apparatus. | 2014-10-30 |
20140325218 | Wireless Charging System Using Secure Wireless Charging Protocols - The disclosure includes a system and method for charging a target object wirelessly. The system includes a processor and a memory storing instructions that when executed cause the system to: receive data describing a charging request from a target object; generate a challenge responsive to the charging request; send the challenge to the target object; receive a response from the target object; verify the response to determine that the response matches the challenge and a first set of secret data shared with a tagging device; determine that a location associated with the target object satisfies a safe charging range responsive to the verification of the response; and instruct a power transmitter associated with the target object to transmit power wirelessly to a power receiver associated with the target object responsive to the verification of the response and the determination that the location satisfies the safe charging range. | 2014-10-30 |
20140325219 | SECRET KEY MANAGEMENT METHOD FOR MULTI-NETWORK PLATFORM - In a secret key management method for multi-network platform, when the user logs in any network platform via arbitrary web-browser, the network platform links to the private cloud by Hypertext Transfer Protocol Daemon (HTTPD), and the private cloud shows a timeliness operational parameter on the web-browser for the user inputting personal parameters, and when the user inputs personal parameters within the predetermined time period, the private cloud then generates a pass key; the pass key generated by the private cloud is adapted to cooperate with the pass lock which is generated by the private cloud when the user registered to identify the user, and the identification result is transmitted to the network platform, and the network platform is configured to use the pass lock and pass key to identify the user. | 2014-10-30 |
20140325220 | "Unpassword": Risk Aware End-to-End Multi-Factor Authentication Via Dynamic Pairing - A method for determining an authentication score for use in exchanging information between a first and a second device. The method comprises at the first device: determining a first authentication score associated with a first information exchange session between the first and second devices; determining a second authentication score associated with a second information exchange session between the first and second devices, the second information exchange after the first information exchange; combining the first and second authentication scores to create a combined score; responsive to the first authentication score, generating an encryption key for encrypting the combined score, wherein the encryption key is known by the first and the second devices; and encrypting the combined score to generate a dynamic pairing code. | 2014-10-30 |
20140325221 | NETWORK TOKEN AUTHENTICATION SCHEME - Aspects of the disclosure relates to managed access to content and/or services. In certain aspects, tokens or other artifacts can be utilized for authentication and authorization. | 2014-10-30 |
20140325222 | PORTABLE DEVICE, A STATIONARY DEVICE, A DIGITAL DEVICE AND A METHOD FOR PERFORMING SECURE COMMUNICATION USING THEREOF - A method includes sensing an image of a portable device by using a camera unit, acquiring an orientation information estimation value of the portable device by using the sensed image, extracting key generation information for secure communication by using the orientation information estimation value, generating a secret key by using the extracted key generation information, and performing secure communication with the portable device by using the secret key. | 2014-10-30 |
20140325223 | DEVICE, SYSTEM, AND METHOD OF VISUAL LOGIN AND STOCHASTIC CRYPTOGRAPHY - Devices, systems, and methods of detecting user identity, differentiating between users of a computerized service, and detecting a possible attacker. The methods include monitoring of user-side input-unit interactions, in general and in response to an interference introduced to user-interface elements. The monitored interactions are used for detecting an attacker that utilizes a remote access channel; for detecting a malicious automatic script, as well as malicious code injection; to identify a particular hardware assembly; to perform user segmentation or user characterization; to enable a visual login process with implicit two-factor authentication; to enable stochastic cryptography; and to detect that multiple users are utilizing the same subscription account. | 2014-10-30 |
20140325224 | DISPERSED DATA STORAGE IN A VPN GROUP OF DEVICES - A method begins when at least a consensus threshold number of devices are active in a virtual private network (VPN) group of devices. The method continues by encoding group specific data based on a consensus threshold number of devices in the VPN group of devices and a number of devices in the VPN group of devices to produce one or more sets of encoded data slices. The method continues by sending the one or more sets of encoded data slices to at least one of: the consensus threshold number of devices or a dispersed storage network (DSN) memory for storage therein. When the at least the consensus threshold number of devices are not active in the VPN group of devices, each of the devices in the VPN group of devices are prohibited from creating the group specific data or accessing previously created group specific data. | 2014-10-30 |
20140325225 | Self-authenticated method with timestamp - A self-authenticated method with timestamp consists of key generating process and self-authenticated process between sender and receiver. The key generating center generates public key generator and private key according to sender's ID; combines the ID of the key generating center and the applied valid time of the sender to generate a identity of the key generating center with timestamp, and generating the corresponding coupled public and private keys; encrypting sender's ID and timestamp by using the private key of the coupled public and private keys, and obtains the first ciphertext of the sender's ID valid period; key generating center packs the sender's valid period, ID plaintext, first ciphertext of ID valid period, sender's public key generator and private key as a tool kit, and send the tool kit key to the sender; the sender encrypts its own ID and valid period by using sender's private key, to form the second ciphertext of the ID valid period, then sends the plaintext of the valid period, the second ciphertext and the first ciphertext of the ID valid period to the receiver; at the same time, performs valid period authentication and identity authentication. The present invention solves the problem in the existing self-authenticated system that the system cannot define valid period of a user's key. | 2014-10-30 |
20140325226 | System and Method for Controlling User Access to Encrypted Data - Disclosed are systems, methods and computer program products for providing user access to encrypted data. In one example, a system is configured to receive a security policy for the user device, wherein the security policy includes data access conditions and data encryption conditions for one or more users of the user device; identify one or more user accounts in the OS of the user device as specified in the data access conditions; create a pre-boot authentication account (PBA) for the identified user accounts based on the data access conditions, for storing pre-boot authentication credentials for authenticating a user before booting of the OS on the user device; and encrypt at least a portion of data stored on the user device based on the data encryption conditions, wherein access to the encrypted portion of data is granted to the user upon entry of the correct pre-boot authentication credentials. | 2014-10-30 |
20140325227 | Method and Apparatus for Verifiable Generation of Public Keys - The invention provides a method of verifiable generation of public keys. According to the method, a self-signed signature is first generated and then used as input to the generation of a pair of private and public keys. Verification of the signature proves that the keys are generated from a key generation process utilizing the signature. A certification authority can validate and verify a public key generated from a verifiable key generation process. | 2014-10-30 |
20140325228 | LOAD BALANCING HASH COMPUTATION FOR NETWORK SWITCHES - Techniques to avoid polarization in a communication network include a network switch or device having a first interface to receive a data unit or packet, and a second interface via which the packet is transmitted from the network device. The network device includes a hash value generator configured to generate, using a depolarizer, a depolarized key from an initial key (where the initial key is based on contents of the packet and the depolarizer is unique to the network device), and to generate a hash value based on the depolarized key and the packet by using a hash function that is common to all network devices in the network. The hash value may be optionally modified to load balance egress traffic of the network device. The network device selects an egress link or port, such as by determining an index into an egress table based on the (modified) hash value. | 2014-10-30 |
20140325229 | METHOD AND SYSTEM FOR SECURE DIGITAL FILE SHARING - A system and method for securely storing, retrieving and sharing data using PCs and mobile devices and for controlling and tracking the movement of data to and from a variety of computing and storage devices. | 2014-10-30 |
20140325230 | METHOD OF COMPARING PRIVATE DATA WITHOUT REVEALING THE DATA - Disclosed in this specification is a method and program storage device for comparing two sets of private data without revealing those private data. If the comparison deems the two data sets sufficiently similar, helper data may be provided to permit reconstruction of one of the private data sets without transmission of that private data set. | 2014-10-30 |
20140325231 | METHOD AND SYSTEM FOR SHARING ENCRYPTED CONTENT - The present invention relates to the field of sharing encrypted content. In one form, the invention relates to multiple user access and management of encrypted content. In one particular aspect, the present invention is suitable for use in community controlled encryption of shared content using indirect keys. | 2014-10-30 |
20140325232 | REQUESTING AND STORING CERTIFICATES FOR SECURE CONNECTION VALIDATION - A client system may be configured to request a certificate from a server system and store the certificate locally. The stored certificate may be used to later authenticate a secure connection between the client system and the server system. The secure connection validated by the stored certificate may be, for example, a secure sockets layer/transport layer security (SSL/TLS) connection. | 2014-10-30 |