43rd week of 2021 patent applcation highlights part 62 |
Patent application number | Title | Published |
20210335931 | DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE - A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a planarization layer, a pixel defining layer, an organic light emitting device, and an inorganic layer disposed between the planarization layer and the pixel defining layer to block moisture and oxygen. An encapsulation structure of the array substrate is cooperatively formed by a combination of a first interlayer dielectric layer contained in a thin-film transistor, the planarization layer, and the inorganic layer. | 2021-10-28 |
20210335932 | OLED DISPLAY SUBSTRATE, DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - An organic light-emitting diode (OLED) display panel includes: a base substrate; one or more thin-film transistor (TFT) structures provided over the base substrate; a planarization layer provided over the TFT structures; anodes provided on an upper surface of the planarization layer; a pixel defining layer provided over the planarization layer defining a plurality of pixel regions, wherein each anode includes an upper surface being exposed in each of the pixel regions; an organic functional layer provided over the anodes; and a cathode provided over the organic functional layer; wherein a sheet resistance of the portion of the anodes that is proximal to the pixel defining layer is smaller than a sheet resistance of the portion of the anodes that is opposite from the pixel defining layer. | 2021-10-28 |
20210335933 | ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE - An organic light-emitting diode display panel, a manufacturing method of an organic light-emitting diode display panel and a display device are provided. The organic light-emitting diode display panel includes: a substrate; a pixel definition layer, located on the substrate; and an encapsulation layer, located on the pixel definition layer, a desiccant is added to at least one of the pixel definition layer and the encapsulation layer. | 2021-10-28 |
20210335934 | ORGANIC LIGHT-EMITTING DIODE ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting diode (OLED) array substrate and a method of manufacturing the same are disclosed. The OLED array substrate includes a substrate, a thin-film transistor layer, an insulating layer, an anode layer, and a pixel defining layer, wherein the pixel defining layer has a first slot and a second slot. A light-emitting layer is formed in the first slot, and a plurality of fillers are provided in the second slot to form a plurality of discontinuous slots in the second slot for forming a plurality of discontinuous cathode layers. When the cathodes on the surface of the pixel defining layer away from the display area are corroded, the function of the cathodes in the display area would not be affected in such a manner that the display effect of the display device would not be affected. | 2021-10-28 |
20210335935 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME - A display device and method for manufacturing the same are provided. The display device includes a display screen and a camera disposed under the display screen. The display screen includes a flexible substrate layer, a thin film transistor substrate, a pixel defining layer, and a light emitting layer which are sequentially laminated. The camera includes a detector, an optical fiber detector, and an optical fiber for connecting the detector and the optical fiber detector. The manufacturing method of the display device includes the steps of: providing a display screen, providing a through hole, and providing a camera. | 2021-10-28 |
20210335936 | DISPLAY PANEL, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING A DISPLAY PANEL - A display panel, a display device, and a method for manufacturing a display panel are provided. The display panel includes a substrate and a display device layer. The substrate includes a display area and a non-display area positioned at a periphery of the display area. The display device layer is disposed on the substrate and includes an anode, a pixel defining layer, a common layer, and a cathode which are sequentially stacked. The anode covers the display area and extends to the non-display area, the pixel defining layer and the common layer are both disposed on the display area and neither extend to the non-display area on at least one side of the display area, and the cathode covers the common layer and extends to the non-display area to be in contact with the anode. | 2021-10-28 |
20210335937 | OLED DISPLAY PANEL - An organic light-emitting diode (OLED) display panel is disclosed. The OLED display panel includes a substrate, a pixel definition layer disposed on the substrate and configured to define a plurality of pixel units, wherein at least one first groove extending along a first direction is disposed on a side of the pixel definition layer away from the substrate; and a metal member is disposed in the first groove, and the metal member is electrically connected to a transparent cathode. | 2021-10-28 |
20210335938 | DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - The present invention provides a display panel and a manufacturing method of the display panel. By etching a certain amount of a protective layer in a first contact region and in a second contact region, a first via hole and a second via hole expose a surface of an active layer, and a source/drain metal layer is connected to the active layer through the first via hole and the second via hole. The present invention does not use a hydrofluoric acid cleaning machine (HFC) to rinse the protective layer, so a first capacitor electrode and a second capacitor electrode are effectively prevented from being etched by hydrofluoric acid (HF). Accordingly, stable thin-film-transistor (TFT) electrical parameters are obtained. | 2021-10-28 |
20210335939 | DISPLAY PANEL, DISPLAY APPARATUS, AND METHOD FOR PREPARING DISPLAY PANEL - A display panel, a display apparatus, and a method for preparing the display panel. The display panel includes: a substrate; an anode layer on the substrate; a pixel definition layer on the substrate, wherein the pixel definition layer includes an opening to at least partially expose the anode layer; a light-emitting layer in the opening of the pixel definition layer and on the anode layer; and a reflection layer on a sidewall of the opening of the pixel definition layer to reflect light emitted from the light-emitting layer. | 2021-10-28 |
20210335940 | Display device, display substrate and manufacturing method of display substrate - A display device, a display substrate, and a manufacturing method of the display substrate. The display substrate includes a display region. The display region includes a transparent display region, and the transparent display region includes a first base and a plurality of first sub-pixels on the first base. Each of the first sub-pixels includes: a first electrode; a first pixel-defining layer disposed on the first electrode, the first-pixel defining layer being provided with an opening; a first light-emitting material layer disposed in the opening of the pixel-defining layer; and a second electrode disposed on the first light-emitting material layer. Further, a plurality of isolation pillars are provided on the first pixel-defining layer and configured to separate the second electrodes of adjacent first sub-pixels, the isolation pillar is T-shaped, and the isolation pillar is an integrally formed structure. | 2021-10-28 |
20210335941 | OLED DISPLAY PANEL AND OLED DISPLAY DEVICE - The present disclosure provides an OLED display panel including a substrate, and a gate electrode, an active layer, a source electrode, and a drain electrode of a TFT device disposed on the substrate, and an anode of an OLED device disposed on the substrate; wherein the source electrode, the drain electrode, and the anode are formed in a same layer, and the anode is connected to the source electrode. The source electrode, the drain electrode, and the anode are arranged in a same layer, so that the source electrode, the drain electrode, and the anode are formed through a single process, thereby simplifying a manufacturing process and saving costs. | 2021-10-28 |
20210335942 | ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL, ORGANIC LIGHT EMITTING DIODE COUNTER SUBSTRATE, AND FABRICATING METHOD THEREOF - The present application discloses an organic light emitting diode display panel having a plurality of subpixels. The organic light emitting diode display panel includes an array substrate; and a counter substrate facing the array substrate. The counter substrate includes a plurality of organic light emitting diodes. The array substrate includes a first base substrate and a plurality of thin film transistors on the first base substrate for driving light emission of the plurality of organic light emitting diodes in the counter substrate. | 2021-10-28 |
20210335943 | ORGANIC LIGHT EMITTING DIODE COUNTER SUBSTRATE AND DISPLAY PANEL, ARRAY SUBSTRATE FOR ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL, AND FABRICATING METHOD THEREOF - The present application provides an organic light emitting diode display panel having a plurality of subpixels. The organic light emitting diode display panel includes an array substrate; and a counter substrate facing the array substrate. The counter substrate includes a plurality of organic light emitting diodes. The array substrate includes a first base substrate; a plurality of thin film transistors on the first base substrate for driving light emission of the plurality of organic light emitting diodes in the counter substrate; and a first electrode layer. The first electrode layer electrically connects the plurality of organic light emitting diodes to the plurality of thin film transistors, respectively. | 2021-10-28 |
20210335944 | DISPLAY PANEL, DISPLAY SUBSTRATE THEREOF AND METHOD OF MAKING THE SAME - Disclosed herein is a display substrate of a display panel, comprising: a support; a second layer on the support; a window extending through the second layer and optically coupled with an image sensor; and a sidewall at least partially surrounding the window; wherein the sidewall is configured to attenuate transmission of light through the sidewall. | 2021-10-28 |
20210335945 | DISPLAY PANEL AND ELECTRONIC DEVICE - A display panel and an electronic device. The display panel includes a substrate; a thin film transistor layer, the thin film transistor layer is located on the substrate; a light emitting layer, the light emitting layer is located on the thin film transistor layer, the light emitting layer includes a plurality of pixel points; the light emitting layer further includes a plurality of concentrating units, each of the concentrating units being located between two adjacent pixel points, and spaced apart from the pixel points. | 2021-10-28 |
20210335946 | DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY APPARATUS - The present disclosure relates to a pixel structure. The pixel structure may include a base substrate; a first insulating island on a side of the base substrate; a first electrode on a side of the first insulating island opposite front the base substrate; a second electrode on the base substrate and at a peripheral area of the first insulating island; an active layer electrically connected to the first electrode and the second electrode; a second insulating layer on a side of the active layer opposite from the base substrate; a gate electrode on a side of the second insulating layer opposite from the base substrate; and a third insulating layer on a side of the gate electrode opposite from the base substrate. | 2021-10-28 |
20210335947 | DISPLAY PANEL AND DISPLAY DEVICE - A display panel and a display device are provided. The display panel includes: a substrate, the substrate includes a plurality of pixel areas; a functional device layer, the functional device layer is disposed on the substrate; a plurality of via holes, the via holes are positioned on the functional device layer, and each of the via holes corresponds to one said first area; an organic layer, the organic layer is disposed on the functional device layer, and a portion of the organic layer extends into the via holes; a plurality of light emitting units; wherein, the via holes are positioned along an edge of a second area. | 2021-10-28 |
20210335948 | DISPLAY DEVICE - A display device includes a substrate, a display area located over the substrate and including a plurality of pixels, a non-display area arranged outside the display area, a first power voltage line corresponding to one side of the display area in the non-display area and including a first conductive layer and a second conductive layer arranged over the first conductive layer, a second power voltage line spaced apart from the first power voltage line in the non-display area, a first dam unit surrounding the display area and overlapping the second power voltage line in a plan view, a second dam unit arranged outside the first dam unit, and a third dam unit arranged between the display area and the first dam unit and overlapping the first conductive layer and the second conductive layer of the first power voltage line in the plan view. | 2021-10-28 |
20210335949 | ORGANIC EL DISPLAY DEVICE AND MANUFACTURING METHOD FOR ORGANIC EL DISPLAY DEVICE - This organic EL display device is equipped with a substrate that has a surface upon which a drive circuit containing a thin film transistor is formed, a planarization film that makes the surface of the substrate planar by covering the drive circuit, and an organic light-emitting element that is formed upon the surface of the planarization film facing the opposite direction from the drive circuit and is electrically connected to the drive circuit. The surface of the planarization film has an arithmetic mean roughness of no more than 50 nm. The thin film transistor is provided with a gate electrode, a drain electrode, a source electrode, and a semiconductor layer that includes regions serving as the thin film transistor channel and partially overlaps with the source electrode and the drain electrode. Respective portions of a first conductor film forming the drain electrode and a second conductor film forming the source electrode are arranged in an alternating manner along a prescribed direction, and the regions serving as the channel are sandwiched between the portions of the first conductor film and the portions of the second conductor film. | 2021-10-28 |
20210335950 | PIXEL UNIT, METHOD OF MANUFACTURING THE SAME, AND ARRAY SUBSTRATE - The present disclosure provides a pixel unit, a method of manufacturing the same, and an array substrate. The pixel unit includes: a driving transistor, a switching transistor, and a light emitting element on a substrate; wherein the driving transistor has an input electrode electrically connected to a first power supply terminal and an output electrode electrically connected to a first terminal of the light emitting element; the switching transistor has an input electrode electrically connected to a data line, a control electrode electrically connected to a scan line, and an output electrode electrically connected to a gate electrode of the driving transistor; wherein the switching transistor and the driving transistor have different threshold voltages. | 2021-10-28 |
20210335951 | STRETCHABLE DISPLAY PANEL, STRETCHABLE DISPLAY APPARATUS, AND METHOD OF FABRICATING STRETCHABLE DISPLAY PANEL - A stretchable display panel has a plurality of first regions and a plurality of second regions alternately arranged. The stretchable display panel includes a plurality of first light emitting elements and a plurality of first driving circuits for driving light emission of the plurality of first light emitting elements; and a plurality of second light emitting elements and a plurality of second driving circuits for driving light emission of the plurality of second light emitting elements. The plurality of first light emitting elements, the plurality of first driving circuits, and the plurality of second driving circuits are limited in the plurality of first regions. The plurality of second light emitting elements are limited is the plurality of second regions. The stretchable display panel in the plurality of first regions have a Young's modulus greater than a Young's modulus in the plurality of second regions of the stretchable display panel. | 2021-10-28 |
20210335952 | ORGANIC LIGHT-EMITTING DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - An organic light-emitting display panel includes a thin-film transistor layer, a light-emitting function layer, and a thin-film encapsulation layer which overlap sequentially, and a shading layer, a color film layer, and an anti-reflection layer. The shading layer is disposed on the thin-film encapsulation layer. The color film layer is disposed on the thin-film encapsulation layer. The color film layer includes a first color film layer, a second color film layer, and a third color film layer disposed at an interval from each other. The shading layer is disposed at intervals among the first color film layer, the second color film layer, and the third color film layer. The anti-reflection layer is disposed on at least one surface of the shading layer and the color film layer. | 2021-10-28 |
20210335953 | PIXEL AND DISPLAY DEVICE COMPRISING THE SAME - A pixel includes: a driving transistor including a semiconductor layer and a gate electrode; and a compensation transistor connected to the gate electrode and the semiconductor layer of the driving transistor, wherein the first thin-film transistor includes: a first sub-transistor including a first gate electrode receiving a first scan signal having a first voltage level during a period; and a second sub-transistor connected to the first sub-transistor in parallel and comprising a second gate electrode receiving a second scan signal having a second voltage level that is an inverted level of the first voltage level during the same period. | 2021-10-28 |
20210335954 | DISPLAY DEVICE - Provided is a display device. The display device comprises a first active layer disposed on a substrate and made of a first material, a second active layer disposed on the first active layer and made of a second material different from the first material, a first gate layer disposed on the second active layer, and an inorganic pattern disposed below the second active layer and overlapping a portion of the first gate layer. The second active layer includes a conductor portion disposed between a portion of the first gate layer and the inorganic pattern. | 2021-10-28 |
20210335955 | DISPLAY DEVICE - A display device includes: a first substrate including a pixel area and a transmissive area; a thin-film transistor on the first substrate; a planarization layer on the thin-film transistor; a first light emitting electrode on the planarization layer; a bank covering a part of the first light emitting electrode; a light emitting layer on the first light emitting electrode; and a second light emitting electrode on the light emitting layer and the bank. The transmissive area includes a transmissive hole penetrating the bank and the planarization layer. | 2021-10-28 |
20210335956 | OLED DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY DEVICE - An OLED display substrate, a method of manufacturing the OLED display substrate, and a display device are provided. The OLED display substrate includes a plurality of aperture regions arranged in an array on a base substrate; and a plurality of storage capacitors on the base substrate, an orthographic projection of each storage capacitor of the plurality of storage capacitors on the base substrate having an overlapping region with an orthographic projection of an aperture region corresponding to the storage capacitor in the plurality of aperture regions on the base substrate. | 2021-10-28 |
20210335957 | DISPLAY PANEL AND METHOD FOR FABRICATING SAME - The present disclosure provides a display panel and a method for fabricating the same. The display panel includes a light transmitting area for disposing an organic light emitting unit and a storage area for disposing a storage capacitor. A location of the light transmitting area corresponds to a location of the storage area. The storage capacitor includes a first electrode plate and a second electrode plate which are composed of a transparent material. | 2021-10-28 |
20210335958 | OLED DISPLAY AND RELATED FORMING METHOD - An OLED display includes: a color resistor layer, a buffer layer covering the color resistor layer, a transistor having a transparent conductive layer, a gate metal layer, and an output electrode, a pixel electrode, and a storage capacitor having a first transparent electrode and a second transparent electrode. The pixel electrode is the second transparent electrode, a projected area of the first transparent electrode on the substrate is larger than or equal to a projected area of the color resistor layer on the substrate. The upper electrode and lower electrode of the storage capacitor are replaced with a transparent material to raise the aperture rate. The gate insulating layer is used in the capacitor area to increase the capacitance. The storage capacitor adopts the transparent electrodes to solve the issues of low capacitance of the storage capacitor and the unstable components caused by the reflected light. | 2021-10-28 |
20210335959 | ORGANIC LIGHT EMITTING DIODE DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE COMPRISING ORGANIC LIGHT EMITTING DIODE DISPLAY SUBSTRATE - An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a power line and a voltage equalizing line which are electrically connected, the power line extends in a first direction which is substantially parallel to a direction in which the first data line extends, and the voltage equalizing line extends in a second direction. A method of manufacturing the display substrate and a display device are also provided. | 2021-10-28 |
20210335960 | DOUBLE-SIDED DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A double-sided display panel and a method for manufacturing the same are provided. The double-sided display panel includes: a first substrate; a second substrate opposite to first substrate; a first display unit between the first substrate and the second substrate, the first display unit including a first luminescent layer and a first reflective layer which is closer to the second substrate than the first luminescent layer, wherein at least a part of light emitted from the first luminescent layer is reflected by the first reflective layer and emitted out through the first substrate; and a second display unit between the first substrate and the second substrate, including a second luminescent layer, wherein light emitted from the second luminescent layer is emitted out through the second substrate. The first display unit includes a transparent electrode and a conductive contact layer which electrically connects the transparent electrode with the first reflective layer. | 2021-10-28 |
20210335961 | ORGANIC LIGHT EMITTING DIODE DUAL SCREEN DISPLAY - An organic light emitting diode (OLED) dual screen display is provided, including a first OLED display panel and a second OLED display panel opposite to the first OLED display panel. Both edges of the first OLED display panel and both edges of the second OLED display panel are adhered by a sealant. Both the first OLED display panel and the second OLED display panel include an open area and a non-open area, and the non-open area is provided with a black matrix. | 2021-10-28 |
20210335962 | DOUBLE-SIDED ORGANIC LIGHT EMITTING DIODE (OLED) DISPLAY PANEL AND MANUFACTURING METHOD - A double-sided organic light emitting diode (OLED) display panel is disclosed and includes a plurality of sub-pixels each of which has a top emission region and a bottom emission region. The top emission region has a first anode metal layer, a first OLED device layer, a first cathode metal layer, and an organic barrier layer. The bottom emission region has a second anode metal layer, a second OLED device layer, and a second cathode metal layer. The present invention can reduce an overall thickness of the double-sided OLED display panel. | 2021-10-28 |
20210335963 | LIGHT EMITTING DIODE AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY PANEL - The present disclosure is related to a light emitting diode. The light emitting diode includes a first transparent electrode layer; a light emitting layer on the first transparent electrode layer; a reflective electrode layer on a surface of the light emitting layer opposite from the first transparent electrode layer, and a second transparent electrode layer. The reflective electrode layer may include transmission hole. The second transparent electrode layer may cover or fill the transmission hole. The transmission hole may be configured to transmit light emitted from the light emitting layer to pass through the second transparent electrode layer. | 2021-10-28 |
20210335964 | ORGANIC LIGHT-EMITTING DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - The present disclosure provides an organic light-emitting display panel and a manufacturing method thereof. The organic light-emitting display panel includes: a substrate, a first electrode, a light-shielding layer, a buffer layer, and a second electrode. The technical effect of the present disclosure is that: the first electrode adopts a composition, such as transparent indium-doped zinc oxide (IZO) and indium gallium zinc oxide (IGZO), and the transparent first electrode can be disposed on a bottom of a light-emitting area to reduce sizes of pixel areas and improve resolution of organic light-emitting display panels. | 2021-10-28 |
20210335965 | MASK COMPONENT - A mask component includes a first mask plate and a second mask plate, and the first mask plate includes a first shield region, a first open region disposed in the first shield region, an electronic component shield region disposed in the first open region, a connecting shield region disposed in the first open region. The electronic component shield region is connected to the first shield region by the connecting shield region. The connecting shield region includes a first connecting shield region disposed on one side of the electronic component shield region and a second connecting shield region disposed on another side of the electronic component shield region, and the first mask plate is configured to evaporate a common electrode to obtain a first region of the common electrode. | 2021-10-28 |
20210335966 | OLED DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND OLED DISPLAY DEVICE - The present invention provides an organic light-emitting diode (OLED) display panel, a manufacturing method thereof, and a display device. The OLED display panel includes a substrate, an electrode layer, a pixel defining layer, and a light shielding layer. The electrode layer is spaced at intervals on the substrate. The pixel defining layer is placed on the substrate. The pixel defining layer includes dams and a light opening between any two adjacent dams. Each dam includes a dam body and a light shielding layer. A projection of the light shielding layer projected on the substrate is larger than or equal to a projection of the dam body projected on the substrate. | 2021-10-28 |
20210335967 | METHOD OF MANUFACTURING DISPLAY PANEL AND DISPLAY PANEL - A method of manufacturing a display panel and the display panel are provided. The method of manufacturing the display panel includes providing a substrate; depositing a transparent electrode layer and a first metal layer on the substrate, and etching the transparent electrode layer and the first metal layer to form a light-shielding layer and an anode; forming a buffer layer, an oxide layer, and an insulating layer on the light-shielding layer in sequentially, and the buffer layer and the insulating layer are formed by a same photomask; depositing a second metal layer on the insulating layer and etching the second metal layer to form a source, a gate, and a drain; and forming a pixel defining layer, a light-emitting layer, and a cathode layer on the second metal layer in sequentially. | 2021-10-28 |
20210335968 | DISPLAY PANEL AND METHOD OF MANUFACTURING SAME - A display panel is provided. The display panel includes thin film transistors arranged in an array. A source and a drain of each of the thin film transistors each include an electrode layer, and the electrode layer of the source or the drain extends to a pixel opening area and can be used as a pixel electrode. | 2021-10-28 |
20210335969 | DISPLAY DEVICE AND ELECTRONIC APPARATUS - A display device includes: a plurality of light-emitters including a first light-emitter in a first display area and a second light-emitter in a second display area, the first light-emitter and second light-emitter configured to emit light of a same color, the second display area having a higher light transmissivity than the first display area; an insulating layer including a first through-hole and a second through-hole; and a filter disposed on the plurality of light-emitters and including a light-shield and color filters. The first through-hole of the insulating layer overlaps the first electrode of the first light-emitter, and the second through-hole of the insulating layer overlaps the first electrode of the second light-emitter, and at least a portion of the second through-hole overlaps the light-shield. | 2021-10-28 |
20210335970 | DISPLAY APPARATUS - A display apparatus includes: a thin-film transistor including a source electrode, a drain electrode, and a gate electrode; a data line in a layer different from the source electrode, the drain electrode, and the gate electrode, wherein the data line is configured to transmit a data signal; and a shield layer between the data line and a component of the thin-film transistor. | 2021-10-28 |
20210335971 | FLEXIBLE OLED DISPLAY PANEL AND MANAFACTURING METHOD THEREOF - A flexible organic light emitting diode (OLED) display panel and a manufacturing method thereof utilize a deep hole formed in a bending area and an organic film layer having an island structure pattern on the deep hole to allow metal wires to have a longer length for bending and to enlarge a bending surface area of the metal wires in the bending area, thereby reducing the stress applied on the metal wires in bending, mitigating a damage caused by the bending of the metal wires, and extending a lifespan of the display panel in bending. | 2021-10-28 |
20210335972 | DISPLAY ASSEMBLY, DISPLAY DEVICE AND MANUFACTURING PROCESS - The present disclosure provides a display assembly, a display device, and a manufacturing process. The display assembly includes: a substrate; a display element arranged in a display region of the substrate; a package film covering the display element; a driving circuit arranged in a non-display region of the substrate; a chip-on-film bonded with the driving circuit; and a support portion arranged in the non-display region of the substrate and outside the package film. | 2021-10-28 |
20210335973 | ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DIODE (AMOLED) DISPLAY MODULE - An active-matrix organic light-emitting diode (AMOLED) display module is provided. The cathode of the AMOLED display module is uniformly arranged in a display area of an entire panel through a second conductive layer. Consequently, a common ground voltage signal (VSS) can be uniformly introduced onto the cathode so that each OLED element can receive a consistent common ground voltage signal (VSS) through the cathode. As a result, the voltage difference between the operating voltage (VDD) and the common ground voltage signal (VSS) across each OLED element is consistent, the luminance of each OLED element can be kept uniform, and the luminance uniformity in the display area of the panel can be improved, so as to enhance the picture quality of the AMOLED display module. | 2021-10-28 |
20210335974 | DISPLAY PANEL, DISPLAY DEVICE AND DETECTION METHOD - A display panel, a display device and a detection method are provided. The display panel includes a display area and a peripheral area surrounding the display area. Pixel units arranged in an array are disposed in the display area. The pixel unit includes a pixel driving circuit. A crack detecting line is disposed in the peripheral area, and the crack detecting line is connected to a reset signal terminal of the pixel driving circuit of at least one pixel unit. The display panel can reduce the influence of the voltage drop over the crack detection line on the brightness during the electrical detection stage, and can also improve the crack detection rate of the peripheral area. | 2021-10-28 |
20210335975 | ORGANIC LIGHT EMITTING DIODE FLEXIBLE ARRAY SUBSTRATE - The present invention discloses an organic light emitting diode flexible array substrate including a displaying region, a folding region adjacent to the displaying region, a flexible substrate, barrier layer, a buffer layer, a polycrystalline layer stacked together, a first insulation layer disposed on the buffer layer and covering the polycrystalline layer, a first metal layer, a second metal layer, and a third metal layer. Folding signal lines are formed on a portion of the second metal layer in the folding region. Folding signal lines are formed on a portion of the third metal layer in the folding region. Double folding signal lines of the second metal layer and third metal layer drastically increase reliability and lifespan of the signal lines in the folding region. | 2021-10-28 |
20210335976 | ARRAY SUBSTRATE, MANUFACTURING METHOD OF ARRAY SUBSTRATE AND DISPLAY PANEL - An array substrate, a manufacturing method of an array substrate, and a display panel are provided. The array substrate includes: a deformable substrate, the deformable substrate including a first region and a second region, the first region being provided with a plurality of voids, the second region being a region of the deformable substrate not provided with the plurality of voids; an electronic element on the second region of the deformable substrate. | 2021-10-28 |
20210335977 | FAN-OUT WIRING STRUCTURE OF DISPLAY PANEL AND DISPLAY PANEL - A fan-out wiring structure of a display panel is configured to electrically connect a signal transmission interface of a driving circuit to a signal receiving interface of a display area of the display panel. The fan-out wiring structure includes a first wiring layer and a second wiring layer. The first and the second wiring layers both define an extending area, a connecting area, and a bent area disposed between the extending area and the connecting area. The extending area and the connecting area of the first wiring layer each have a plurality of metal wires, and the bent area of the first wiring layer has a plurality of flexible wires. Each of the flexible wires is made of an organic electrically conductive material, and opposite ends of each of the flexible wires are connected to corresponding metal wires in the extending area and the connecting area, respectively. | 2021-10-28 |
20210335978 | ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE MOTHERBOARD AND DISPLAY DEVICE - An array substrate and a fabrication method thereof, an array substrate motherboard, and a display device are disclosed. The array substrate includes a display region and a bonding region outside the display region. The array substrate further includes: a bonding electrode, located in the bonding region and spaced apart from an outer edge of the bonding region; and an electrostatic barrier line, the electrostatic barrier line has one end electrically connected with the bonding electrode, and the other end extends to the outer edge of the bonding region, and resistivity of the electrostatic barrier line is greater than resistivity of the bonding electrode. | 2021-10-28 |
20210335979 | FLEXIBLE ARRAY SUBSTRATE AND DISPLAY DEVICE - A flexible array substrate and a display are disclosed. The flexible array substrate includes a substrate, an insulation layer disposed on the substrate and having a stepped through-hole, an organic photoresist body disposed in the stepped through-hole of the insulation on the substrate, a source/drain electrode wiring disposed over the organic photoresist body, an organic photoresist layer disposed over the source/drain electrode wiring, a photosensitive adhesive layer disposed over the organic photoresist layer, and a stress cushion layer disposed over the source/drain electrode wiring. | 2021-10-28 |
20210335980 | DISPLAY STRUCTURE AND MANUFACTRUING METHOD THEREOF - A display structure and a manufacturing method thereof are provided. The display structure includes a substrate, a display component layer, an insulating protective layer, a plurality of display signal lines, a plurality of first connecting pads and a flip-chip thin-film package, wherein the first connecting pads are disposed on a back surface of the substrate, and connected with the display signal lines; the flip-chip thin-film package has a plurality of second connecting pads electrically connecting to the first connecting pads. The connecting pads disposed on the flip-chip thin-film package are connecting to the connecting pads disposed on the back surface of the display panel, so that achieve no need to bend the display, thereby increasing a screen ratio of the display. | 2021-10-28 |
20210335981 | DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND RELATED DISPLAY DEVICE - A display panel, a manufacturing method, and a display device are provided. The display panel includes: a substrate; a signal line layer having an edge pasted on an edge of a display area; an insulating layer having an edge pasted on an edge of the signal line layer; a light emitting layer comprising lighting devices arranged with spaces; and a via, pass through the organic lighting devices and the insulating layer from a cathode layer of the organic lighting devices to a surface of the signal line layer. The present disclosure positions the signal lines under the middle portion of the display area and utilizes a via to connect the cathode layer of the display area to the signal lines. Therefore, there is no need to put the signal lines in the side frame area such that the narrow side frame design is accomplished. | 2021-10-28 |
20210335982 | DISPLAY MODULE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE - A display module and a method for manufacturing a display module, and a display device are provided. The display module includes a display panel, a main flexible printed circuit board, a secondary flexible printed circuit board and a driving circuit. The display panel comprises a signal line. The main flexible printed circuit board is at least partially on a first side of the display panel and is electrically connected to the signal line. The secondary flexible printed circuit board is at least partially on a second side of the display panel and is electrically connected to the signal line. The driving circuit is configured to provide signals to the signal line through the main flexible printed circuit board and the secondary flexible printed circuit board respectively. | 2021-10-28 |
20210335983 | DISPLAY DEVICE - Embodiments of the present disclosure provide a display device, including: a display panel, a border pattern and a light shielding pattern. The display panel includes a display area and a non-display area surrounding the display area, the display panel further includes a plurality of signal lines in the display area and a plurality of signal leading lines in the non-display area, and the signal leading lines are electrically connected to the signal lines, respectively. The border pattern is located on a light-exit side of the display panel. The light shielding pattern is located on the light-exit side and on a side of the border pattern adjacent to the display panel. An orthographic projection of the light shielding pattern on the display panel is located within the non-display area, and the light shielding pattern is configured to block light reflected by the signal leading lines from exiting out from the light-exit side. | 2021-10-28 |
20210335984 | ARRAY SUBSTRATE AND DISPLAY PANEL - An array substrate and a display panel are provided. The array substrate has a plurality of first power lines and a plurality of second power lines connecting with power lines within corresponding fan-out areas, respectively. The first power lines and the second power lines are arranged in parallel to each other and staggered within a display area. At least one of the first power lines within an anti-static area connects with one of the second power lines adjacent to the first power line thereby solving the problem of voltage drop and line defects caused by unilateral driving. | 2021-10-28 |
20210335985 | DISPLAY APPARATUS, AND METHOD OF MANUFACTURING THE SAME - A display apparatus includes a substrate, a plurality of pixelated first electrodes disposed on the substrate, an uneven surface structure or a porous structure disposed between adjacent pixelated first electrodes, a plurality of OLED lighting elements disposed on the pixelated first electrodes and the uneven surface structure or the porous structure, a second electrode layer disposed on the OLED lighting elements. Equivalent transport distance of carriers along the uneven or porous surface increases accordingly, thereby resulting in reduced lateral leakage current between adjacent pixelated first electrodes. | 2021-10-28 |
20210335986 | DISPLAY APPARATUS - A display apparatus includes a substrate including a display area, a non-display area adjacent to the display area, and a pad area arranged in the non-display area; a display portion arranged in the display area and including pixels; a pad portion arranged in the pad area and including pads; and an insulating layer overlapping an edge of each of the pads and exposing a central portion of each of the pads, wherein the insulating layer includes at least one opening arranged between adjacent ones of the pads. | 2021-10-28 |
20210335987 | DISPLAY DEVICE - A display device includes: a first display area comprising main sub-pixels; a second display area comprising pixel groups spaced apart from each other and a transmission portion between the pixel groups, the second display area having a different resolution from that of the first display area; and extension lines between two pixel groups adjacent to each other in a first direction among the pixel groups and extending in the first direction, wherein each of the pixel groups comprises a plurality of auxiliary sub-pixels and a plurality of horizontal lines electrically connected to the plurality of auxiliary sub-pixels and extending in the first direction, and the extension lines are electrically connected to the horizontal lines included in each of the two pixel groups, and a number of the extension lines is less than a number of the horizontal lines. | 2021-10-28 |
20210335988 | DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME - A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region. | 2021-10-28 |
20210335989 | DISPLAY SUBSTRATE, METHOD OF FORMING DISPLAY SUBSTRATE, AND DISPLAY DEVICE - A display substrate, a method of forming a display substrate and a display device are provided. The display substrate includes a substrate and a plurality of sub-pixels arranged in an array on the substrate; The sub-pixel includes a data line pattern extending in a first direction; an initialization signal line pattern including a portion extending in a second direction, the second direction intersecting the first direction, the initialization signal line pattern configured to transmit an initialization signal having a fixed potential; a sub-pixel driving circuit including a driving transistor, a first transistor coupled to a gate of the driving transistor, and a first shielding member coupled to an initialization signal line pattern, an orthographic projection of the first shielding member on a substrate, between the orthographic projection of the first transistor on the substrate and the orthographic projection of the target data line pattern on the substrate; a target data line pattern is included in the next sub-pixel adjacent to the sub-pixel in the second direction. | 2021-10-28 |
20210335990 | ARRAY SUBSTRABE, DISPLAY PANEL, AND MANUFACTURING METHOD OF ARRAY SUBSTRATE - The present disclosure provides an array substrate, a display panel, and a manufacturing method of the array substrate. The array substrate includes a substrate layer, an active layer, a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, an interlayer insulating layer, an organic filling layer, and a third metal layer being stacked together. The meshed second metal layer is disposed in the display area, and a double-layer power voltage trace structure in the display area is formed by connecting the first via holes and power voltage signal lines of the third metal layer. | 2021-10-28 |
20210335991 | INTEGRATED CIRCUIT WITH FEOL RESISTOR - An IC structure includes a resistor circuit and a transistor. The resistor circuit includes a first metal resistor strip over a semiconductor substrate, and a first metal line and a second metal line extending on a same level height above the first metal resistor strip. The first metal resistor strip is a dummy gate. Both the first metal line and the second metal line overlap and are electrically connected to the first metal resistor strip. The transistor includes a metal gate strip on a same level height as the first metal strip and extends in parallel with the first metal resistor strip. | 2021-10-28 |
20210335992 | CAPACITOR WITH MIM - A capacitor having a MIM structure includes a dielectric formed by laminating a plurality of times on an upper surface of a lower electrode, and an upper electrode on an upper surface of the dielectric. Forming of the dielectric includes forming the first dielectric layer on the upper surface of the lower electrode, cleaning an upper surface of the first dielectric layer by at least one of jet cleaning and dual fluid cleaning, and forming the second dielectric layer on an upper surface of the cleaned first dielectric layer. | 2021-10-28 |
20210335993 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE - A method for forming a semiconductor structure and a semiconductor structure are provided. The method includes: a stacked structure is formed on a surface of a substrate, the stacked structure including supporting layers and sacrificial layers which are alternately stacked; a buffer layer is formed on a surface of the stacked structure facing away from the substrate; capacitor holes penetrating through the stacked structure and the buffer layer and exposing capacitor contacts are formed; a first electrode layer covering inner walls of the capacitor holes is formed; an etching window penetrating through the buffer layer is formed; part of the supporting layers and all of the sacrificial layers in the stacked structure are removed along the etching window; the buffer layer is removed; and a dielectric layer and a second electrode layer are formed to form a capacitor. | 2021-10-28 |
20210335994 | PIN DIODE INCLUDING A CONDUCTIVE LAYER, AND FABRICATION PROCESS - A diode is formed by a polycrystalline silicon bar which includes a first doped region with a first conductivity type, a second doped region with a second conductivity type and an intrinsic region between the first and second doped regions. A conductive layer extends parallel to the polycrystalline silicon bar and separated from the polycrystalline silicon bar by a dielectric layer. The conductive layer is configured to be biased by a bias voltage. | 2021-10-28 |
20210335995 | CRYSTALLINE MULTILAYER STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING CRYSTALLINE STRUCTURE - A crystalline multilayer structure having a high-quality crystalline layer and a semiconductor device employing such a crystalline multilayer structure are provided. A crystalline multilayer structure, including a first crystalline layer having a first crystal, and a second crystalline layer stacked on the first crystalline layer and having a second crystal, wherein the first crystal includes polycrystalline κ-Ga | 2021-10-28 |
20210335996 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD - The embodiments of the invention provides a semiconductor device and a method for manufacturing it The semiconductor device provided by the embodiments of the invention comprises: a first electrode layer; a substrate layer positioned on the first electrode layer; an epitaxy layer positioned on the substrate layer and comprising a first surface far from the substrate layer; a plurality of well regions disposed by extending from the first surface into the epitaxy layer and orthographic projections thereof on the first surface are spaced from each other; a second electrode layer, comprising first metal layers, each disposed between adjacent two of the well regions on the first surface and forms a Schottky contact with the epitaxy layer, wherein the Schottky contact has variable barrier height. The semiconductor device provided by the embodiments of the invention may improve the forward conduction ability without affecting the reverse blocking ability. | 2021-10-28 |
20210335997 | SILICON CONTROLLED RECTIFIER AND METHOD FOR MAKING THE SAME - The present disclosure provides a silicon controlled rectifier and a manufacturing method thereof. The silicon controlled rectifier comprises: an N-type well | 2021-10-28 |
20210335998 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor layer of a first conductivity type having a device forming region and an outside region, an impurity region of a second conductivity type formed in a surface layer portion of a first main surface in the device forming region, a field limiting region of a second conductivity type formed in the surface layer portion in the outside region and having a impurity concentration higher than that of the impurity region, and a well region of a second conductivity type formed in a region between the device forming region and the field limiting region in the surface layer portion in the outside region, having a bottom portion positioned at a second main surface side with respect to bottom portions of the impurity region and the field limiting region, and having a impurity concentration higher than that of the impurity region. | 2021-10-28 |
20210335999 | THREE-DIMENSIONAL MEMORY DEVICE EMPLOYING THINNED INSULATING LAYERS AND METHODS FOR FORMING THE SAME - A three-dimensional memory device includes an alternating stack of word lines and at least one insulating layers or air gaps located over a substrate, a memory opening fill structure extending through the alternating stack. The memory opening fill structure includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film. The word lines are thicker than the insulating layers or air gaps. | 2021-10-28 |
20210336000 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is disclosed. The method includes laminating a thermally decomposable organic material on a substrate by supplying a material gas into a container in which the substrate having a first recess and a second recess, which has a wider width than a width of the first recess, are formed, fluidizing the organic material laminated on the substrate by heating the substrate to a first temperature, and removing the organic material laminated in the second recess. | 2021-10-28 |
20210336001 | MULTIPLE POWER DOMAINS USING NANO-SHEET STRUCTURES - One aspect of this description relates to an integrated circuit (IC) structure including a first layer and a second layer. The first layer includes a first metal structure coupled to a first power supply having a first voltage level and a second metal structure coupled to a second power supply having a second voltage level different from the first voltage level. The second layer is formed over the first layer. The second layer includes a first nano-sheet device coupled to the first metal structure and a second nano-sheet device adjacent to the first nano-sheet device. The second nano-sheet device is coupled to the second metal structure. A distance between the first nano-sheet device and the second nano-sheet device is less than a minimum n-well to n-well spacing. | 2021-10-28 |
20210336002 | TENSILE STRAINED SEMICONDUCTOR MONOCRYSTALLINE NANOSTRUCTURE - A semiconductor structure including a semiconductor substrate having a top surface, one or more group IV semiconductor monocrystalline nanostructures, each having a first and a second extremity defining an axis parallel to the top surface of the semiconductor substrate and separated therefrom by a non-zero distance, each nanostructure having a source structure epitaxially grown on the first extremity and a drain structure epitaxially grown on the second extremity. The epitaxial source and drain structures are made of a group IV semiconductor doped with one or more of Sb and Bi, and optionally one or more of As and P, thereby creating tensile strain in the group IV semiconductor monocrystalline nanostructure. | 2021-10-28 |
20210336003 | NANOWIRE ARRAY, OPTOELECTRONIC DEVICE AND PREPARATION METHOD THEREOF - Provided is a nanowire array, in which a plurality of nanowires are densely packed and in contact with each other via side walls to form a three-dimensional, compact layer structure, wherein the plurality of nanowires are formed from InGaN-based material. Also provided is an optoelectronic device comprising the nanowire array which is epitaxially grown on a surface of a substrate ( | 2021-10-28 |
20210336004 | Selective Liner on Backside Via and Method Thereof - A method includes providing a structure having a substrate, a fin, source/drain (S/D) features, an isolation structure adjacent to sidewalls of the fin, one or more channel layers over a first dielectric layer and connecting the S/D features, and a gate structure engaging the one or more channel layers. The method further includes thinning down the structure from its backside until the fin is exposed and selectively etching the fin to form a trench that exposes surfaces of the S/D features, the first dielectric layer, and the isolation structure. The method further includes forming a silicide feature on the S/D features and depositing an inhibitor on the silicide feature but not on the surface of the first dielectric layer and the isolation structure, depositing a dielectric liner layer on the surfaces of the isolation structure and the first dielectric layer but not on the inhibitor, and selectively removing the inhibitor. | 2021-10-28 |
20210336005 | FIELD EFFECT TRANSISTOR (FET) STACK AND METHODS TO FORM SAME - The disclosure provides a field effect transistor (FET) stack with methods to form the same. The FET stack includes a first transistor over a substrate. The first transistor includes a first active semiconductor material including a first channel region between a first set of source/drain terminals, and a first gate structure over the first channel region. The first gate structure includes a first gate insulator of a first thickness above the first channel region. A second transistor is over the substrate and horizontally separated from the first transistor. A second gate structure of the second transistor may include a second gate insulator of a second thickness above a second channel region, the second thickness being greater than the first thickness. A shared gate node may be coupled to each of the first gate structure and the second gate structure. | 2021-10-28 |
20210336006 | DIFFUSION BARRIER LAYER FOR SOURCE AND DRAIN STRUCTURES TO INCREASE TRANSISTOR PERFORMANCE - Various embodiments of the present disclosure are directed towards a semiconductor device including a gate electrode over a semiconductor substrate. An epitaxial source/drain layer is disposed on the semiconductor substrate and is laterally adjacent to the gate electrode. The epitaxial source/drain layer comprises a first dopant. A diffusion barrier layer is between the epitaxial source/drain layer and the semiconductor substrate. The diffusion barrier layer comprises a barrier dopant that is different from the first dopant. | 2021-10-28 |
20210336007 | SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device including a first active pattern that extends in a first direction on an active region of a substrate, a first source/drain pattern in a recess on an upper portion of the first active pattern, a gate electrode that runs across a first channel pattern on the upper portion of the first active pattern and extends in a second direction intersecting the first direction, and an active contact electrically connected to the first source/drain pattern. | 2021-10-28 |
20210336008 | FIELD-EFFECT TRANSISTORS (FETs) EMPLOYING EDGE TRANSISTOR CURRENT LEAKAGE SUPPRESSION TO REDUCE FET CURRENT LEAKAGE - Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage, and related methods, are disclosed. The FET includes a gate that includes extended-length edge gate regions overlapping semiconductor layer edges to form extended length edge conduction channels in edge transistors. In this manner, the threshold voltage of the edges transistors is increased, thus reducing current leakage of the edges transistors and overall current leakage of the FET. In another aspect, a body connection implant that is formed to short a source or drain region to a body of the FET is extended in length to form body connection implant regions underneath at least a portion of the edge gate regions. In this manner, the work functions of the edge gate regions are increased in voltage thus increasing the threshold voltage of the edge transistors and reducing current leakage of the edges transistors and the FET. | 2021-10-28 |
20210336009 | GRAPHENE CHANNEL SILICON CARBIDE POWER SEMICONDUCTOR TRANSISTOR - The invention provides a graphene channel silicon carbide power semiconductor transistor, and its cellular structure thereof. Characterized in that, a graphene strip serving as a channel is embedded in a surface of the P-type body region and two ends of the graphene strip are respectively contacted with a boundary between the N+-type source region and the P-type body region and a boundary between the P-type body region and the N-type drift region, and the graphene strip is distributed in a cellular manner in a gate width direction, a conducting channel of a device is still made of graphene; in the case of maintaining basically invariable on-resistance and current transmission capacity, the P-type body regions are separated by the graphene strip, thus enhancing a function of assisting depletion, which further reduces an overall off-state leakage current of the device, and improves a breakdown voltage. | 2021-10-28 |
20210336010 | SICILON CARBIDE DIODE HAVING HIGH SURGE CURRENT CAPABILITY AND MANUFACTURING METHOD THEREOF - A silicon carbide diode having a high surge current capability, and including a semiconductor base plate. The semiconductor base plate includes an N-type silicon carbide substrate and an N-type silicon carbide epitaxial layer located on the N-type silicon carbide substrate. The upper portion of the N-type silicon carbide epitaxial layer is provided with a plurality of P-type well regions. The N-type high resistance region is provided under the P-type well region or on the lower surface of the P-type well region. The resistivity of the N-type high resistance region is greater than the resistivity of the N-type silicon carbide epitaxial layer. The N-type high resistance region is provided under the P-type well region, and a plurality of grooves are provided in the P-type well region or a plurality of block-shaped P-type regions uniformly arranged at intervals are provided in the N-type high resistance region. | 2021-10-28 |
20210336011 | EPITAXIAL STRUCTURE - An epitaxial structure includes a substrate, a buffer layer, a channel layer, a barrier layer, a diffusion barrier layer, and a P-type gallium nitride layer sequentially stacked from bottom to top. The P-type gallium nitride layer has a first lattice constant. The diffusion barrier layer includes a chemical composition of In | 2021-10-28 |
20210336012 | SEMICONDUCTOR DEVICE HAVING BACKSIDE VIA AND METHOD OF FABRICATING THEREOF - Structures and methods that include a device such as a gate-all-around transistor formed on a frontside and a contact to one terminal of the device from the frontside of the structure and one terminal of the device from the backside of the structure. The backside contact may include selectively etching from the backside a first trench extending to expose a first source/drain structure and a second trench extending to a second source/drain structure. A conductive layer is deposited in the trenches and patterned to form a conductive via to the first source/drain structure. | 2021-10-28 |
20210336013 | MULTI-STAGE ETCHING PROCESS FOR CONTACT FORMATION IN A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively. | 2021-10-28 |
20210336014 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A method for manufacturing a semiconductor device includes: providing a semiconductor substrate; sequentially forming stacked layers of a gate oxide layer and a gate polysilicon layer on the semiconductor substrate; performing fluorine ion implantation at a predetermined temperature after forming the gate polysilicon layer, and annealing after the ion implantation to form Si—F bonds at an interface between the gate oxide layer and the semiconductor substrate; in which the predetermined temperature is between −100° C. and −10° C. | 2021-10-28 |
20210336015 | GROUP III NITRIDE-BASED TRANSISTOR DEVICE - In an embodiment, a Group III nitride-based transistor device includes a source electrode, a drain electrode and a gate electrode positioned on a first major surface of a Group III nitride based-based layer, wherein the gate electrode is laterally arranged between the source electrode and the drain electrode, a passivation layer arranged on the first major surface and a field plate coupled to the source electrode, the field plate having a lower surface arranged on the passivation layer. The field plate is laterally arranged between and laterally spaced apart from the gate electrode and the drain electrode. | 2021-10-28 |
20210336016 | HIGH ELECTRON MOBILITY TRANSISTOR AND FABRICATION METHOD THEREOF - A high electron mobility transistor (HEMT) includes a group III-V channel layer, a passivation layer, a group III-V barrier layer, a gate structure, and a source/drain electrode. The passivation layer is disposed on the group III-V channel layer and includes a gate contact hole and a source/drain contact hole, and the group III-V barrier layer is disposed between the group III-V channel layer and the passivation layer. The gate structure includes group III-V gate layer, a gate etch stop layer, and a gate electrode which are stacked in sequence. The gate electrode is disposed in the gate contact hole and conformally covers a portion of the top surface of the passivation layer. The source/drain electrode is disposed in the source/drain contact hole and conformally covers another portion of the top surface of the passivation layer. | 2021-10-28 |
20210336017 | SEMICONDUCTOR DEVICE - The semiconductor device includes a first electrode, a second electrode electrically coupled to the first electrode, and a third electrodes electrically coupled to at least one of the first and the second electrode, a first plating deposition portion on the first electrode, a second and a third plating deposition portions formed on the second and the third electrode, respectively. The areas of the second and the third plating deposition portion are smaller than the area of the first plating deposition portion. The periphery length of the third plating deposition portion is longer than the periphery length of the second plating deposition portion. | 2021-10-28 |
20210336018 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING SAME - A thin film transistor substrate and a method of fabricating same are provided. | 2021-10-28 |
20210336019 | DRAIN SIDE RECESS FOR BACK-SIDE POWER RAIL DEVICE - A semiconductor transistor device includes a channel structure, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, a gate contact, and a back-side source/drain contact. The gate structure wraps around the channel structure. The first source/drain epitaxial structure and the second source/drain epitaxial structure are disposed on opposite endings of the channel structure. The gate contact is disposed on the gate structure. The back-side source/drain contact is disposed under the first source/drain epitaxial structure. The second source/drain epitaxial structure has a concave bottom surface. | 2021-10-28 |
20210336020 | Backside Vias in Semiconductor Device - Methods of forming backside vias connected to source/drain regions of long-channel semiconductor devices and short-channel semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first transistor structure; a second transistor structure adjacent the first transistor structure; a first interconnect structure on a front-side of the first transistor structure and the second transistor structure; and a second interconnect structure on a backside of the first transistor structure and the second transistor structure, the second interconnect structure including a first dielectric layer on the backside of the first transistor structure; a second dielectric layer on the backside of the second transistor structure; a first contact extending through the first dielectric layer and electrically coupled to a first source/drain region of the first transistor structure; and a second contact extending through the second dielectric layer and electrically coupled to a second source/drain region of the second transistor structure, the second contact having a second length less than a first length of the first contact. | 2021-10-28 |
20210336021 | SEMICONDUCTOR POWER DEVICES HAVING GATE DIELECTRIC LAYERS WITH IMPROVED BREAKDOWN CHARACTERISTICS AND METHODS OF FORMING SUCH DEVICES - A semiconductor device includes a semiconductor layer structure that includes silicon carbide, a gate dielectric layer on the semiconductor layer structure, and a gate electrode on the gate dielectric layer opposite the semiconductor layer structure. In some embodiments, a periphery of a portion of the gate dielectric layer that underlies the gate electrode is thicker than a central portion of the gate dielectric layer, and a lower surface of the gate electrode has recessed outer edges such as rounded and/or beveled outer edges. | 2021-10-28 |
20210336022 | INTERFACE LAYER CONTROL METHODS FOR SEMICONDUCTOR POWER DEVICES AND SEMICONDUCTOR DEVICES FORMED THEREOF - A semiconductor device includes a semiconductor layer structure, a gate insulating pattern on the semiconductor layer structure, a gate electrode on the gate insulating pattern, and an interface layer between the gate insulating pattern and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween. | 2021-10-28 |
20210336023 | ARRAY SUBSTRATE AND DISPLAY PANEL - This application discloses an array substrate and a display panel. The array substrate includes a first metal layer and a second metal layer, and an area of a region overlapping the second metal layer on the first metal layer is less than that of a region not overlapping the second metal layer on the first metal layer. | 2021-10-28 |
20210336024 | Multi-Layer Channel Structures And Methods Of Fabricating The Same In Field-Effect Transistors - A semiconductor structure includes a first stack of semiconductor layers disposed over a semiconductor substrate, where the first stack of semiconductor layers includes a first SiGe layer and a plurality of Si layers disposed over the first SiGe layer and the Si layers are substantially free of Ge, and a second stack of semiconductor layers disposed adjacent to the first stack of semiconductor layers, where the second stack of semiconductor layers includes the first SiGe layer and a plurality of second SiGe layers disposed over the first SiGe layer, and where the first SiGe layer and the second SiGe layers have different compositions. The semiconductor structure further includes a first metal gate stack interleaved with the first stack of semiconductor layers to form a first device and a second metal gate stack interleaved with the second stack of semiconductor layers to form a second device different from the first device. | 2021-10-28 |
20210336025 | Field-Effect Transistor - Example embodiments relate to field-effect transistors. An example field-effect transistor includes a plurality of field-effect transistor elements, each field-effect transistor element including a gate finger and a gate runner. The gate finger of each field-effect transistor element is electrically connected at a plurality of spaced apart positions to the gate runner of that element. Each gate finger is made of a first material or material composition and has a first electrical resistivity. The field-effect transistor further includes, for each gate finger, a gate resistor through which the electrical connection between the gate finger and the gate runner at a position among the plurality of spaced apart positions is realized. The gate resistor is made of a second material or material composition and has a second electrical resistivity that is higher than the first electrical resistivity. | 2021-10-28 |
20210336026 | METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) DEVICES AND MANUFACTURING METHODS THEREOF - Provided are metal oxide field-effect transistor (MOSFET) devices having a metal gate structure, in which a work function of the metal gate structure is uniform along a length direction of a channel, and manufacturing methods thereof. The MOSFET devices include a semiconductor substrate, an active area on the semiconductor substrate and extending in a first direction, and a gate structure on the semiconductor substrate. The gate structure extends across the active area in a second direction that traverses the first direction and comprises a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer, which are sequentially stacked on the active area. A lower surface of the WFC layer may be longer than a first interface between a lower surface of the first metal layer and an upper surface of the high-k layer in the first direction. | 2021-10-28 |
20210336027 | ISOTOPE-MODIFIED HAFNIUM AND SEMICONDUCTOR DIELECTRICS - Various methods and systems are provided for facilitating the creation of a new and potentially thinner form of dielectric. Alternatively, for a given capacitance, a thicker layer can be created with lower risk of leakage. The present disclosure will enable the creation of physically smaller electronic components. Isotope-Modified Hafnium Dielectric is used to create a dielectric layer with a greater range of dielectric coefficients, which may enable the creation of smaller and/or more reliable electronic components. | 2021-10-28 |
20210336028 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING SAME - A thin film transistor (TFT) and a method of manufacturing same are provided. A photoresist layer is dry-etched to form a tunnel before an active layer is formed, wherein a bottom of the tunnel is a copper trace layer. After that, two edges of the photoresist layer are aligned with two edges of the copper trace layer. Therefore, the photoresist layer won't protrude over an amorphous silicon layer to block the etching gas from etching the amorphous silicon layer. As a result, an aperture ratio of the TFT is increased, and quality of the TFT is improved. By forming an oxidation protective layer on the tunnel, the copper trace layer is prevented from being reacted with the etching gas to form a compound. Therefore, metals or compounds on the tunnel can be completely etched, and quality of the TFT is further improved. | 2021-10-28 |
20210336029 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE - A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices. | 2021-10-28 |
20210336030 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor structure and a method for forming the semiconductor structure are provided. The semiconductor structure includes a substrate, and a first dielectric layer, a first gate structure and a plurality of second gate structures over the substrate. A second protection layer is formed on a top of a second gate structure. A first source-drain doped layer is formed between the first gate structure and an adjacent second gate structure. The first dielectric layer covers sidewalls of the first and second gate structures, and exposes a top surface of the second protection layer. The semiconductor structure also includes a first conductive structure in the first dielectric layer over the first source-drain doped layer, and a conductive layer on the first gate structure and the first conductive structure. A top surface of the conductive layer is coplanar with a top surface of the first dielectric layer. | 2021-10-28 |