43rd week of 2011 patent applcation highlights part 62 |
Patent application number | Title | Published |
20110264864 | Prefetch Unit - In one embodiment, a processor comprises a prefetch unit coupled to a data cache. The prefetch unit is configured to concurrently maintain a plurality of separate, active prefetch streams. Each prefetch stream is either software initiated via execution by the processor of a dedicated prefetch instruction or hardware initiated via detection of a data cache miss by one or more load/store memory operations. The prefetch unit is further configured to generate prefetch requests responsive to the plurality of prefetch streams to prefetch data in to the data cache. | 2011-10-27 |
20110264865 | TECHNIQUES FOR DIRECTORY SERVER INTEGRATION - Techniques for directory server integration are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for directory server integration comprising setting one or more parameters determining a range of permissible expiration times for a plurality of cached directory entries, creating, in electronic storage, a cached directory entry from a directory server, assigning a creation time to the cached directory entry, and assigning at least one random value to the cached directory entry, the random value determining an expiration time for the cached directory entry within the range of permissible expiration times, wherein randomizing the expiration time for the cached directory entry among the range of permissible expiration times for a plurality of cached directory entries reduces an amount of synchronization required between cache memory and the directory server at a point in time. | 2011-10-27 |
20110264866 | TECHNIQUE FOR USING MEMORY ATTRIBUTES - A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner. | 2011-10-27 |
20110264867 | MULTIPROCESSOR COMPUTING SYSTEM WITH MULTI-MODE MEMORY CONSISTENCY PROTECTION - Disclosed are a method and apparatus for protecting memory consistency in a multiprocessor computing system, relating to program code conversion such as dynamic binary translation. The exemplary multiprocessor computing system provides memory and multiple processors, and a set of controller/translator units TX | 2011-10-27 |
20110264868 | METHOD OF CONTROLLING TOTAL CAPACITY OF VIRTUAL VOLUMES ASSOCIATED WITH POOL AND STORAGE APPARATUS - The statuses of an actual area are (1) a first status which indicates that [the actual area] is already initialized and can be assigned to a virtual area, (2) a second status which indicates that [the actual area] is already assigned to a virtual area, and (3) a third status which indicates that [the actual area] cannot be assigned to a virtual area and initialization which is specified data write is to be performed. The storage controller limits the total virtual volume capacity which is the total capacity of one or more virtual volumes which are associated with the pool, in accordance with whether the pool comprises an actual page in the third status or not, to the capacity of the pool or smaller. | 2011-10-27 |
20110264869 | CONCLUSIVE WRITE OPERATION DISPERSED STORAGE NETWORK FRAME - A method begins by a processing module generating a payload of a dispersed storage network frame regarding a conclusive write request operation by generating one or more slice name fields of a payload to include one or more slice names corresponding to one or more write commit responses of a write request operation, wherein the conclusive write request operation is a conclusive phase of the write request operation. The method continues with the processing module generating one or more slice revision numbering fields of the payload, wherein each slice revision numbering field includes a slice revision number corresponding to an associated slice name of the one or more slice names. The method continues with the processing module generating a protocol header of the DSN frame by generating a payload length field of the protocol header to include a payload length and generating remaining fields of the protocol header. | 2011-10-27 |
20110264870 | Using region status array to determine write barrier actions - A fast method for determining which actions to take in a write barrier in a concurrent garbage collector is described. A region status array indexed by a region index computed from the written address is used for determining the status of the region containing the written object and for selecting, in part, the actions taken by the write barrier. By carefully manipulating the region status array, various operations and changes in write barrier actions can be performed very efficiently. | 2011-10-27 |
20110264871 | SYSTEMS AND METHODS FOR TRANSFORMATION OF LOGICAL DATA OBJECTS FOR STORAGE - Systems and methods for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Transforming the logical data object comprises creating in the storage device a transformed logical data object comprising one or more allocated storage sections with a predefined size; transforming one or more sequentially obtained chunks of obtained data corresponding to the transforming logical data object; and sequentially storing the processed data chunks into said storage sections in accordance with a receive order of said chunks, wherein said storage sections serve as atomic elements of transformation/de-transformation operations during input/output transactions on the logical data object. The processing may comprise two or more data transformation techniques coordinated in time, concurrently executing autonomous sets of instructions, and provided in a manner preserving the sequence of processing and storing the processed data chunks. | 2011-10-27 |
20110264872 | SYSTEMS AND METHODS FOR TRANSFORMATION OF LOGICAL DATA OBJECTS FOR STORAGE - Systems and methods for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Transforming the logical data object comprises creating in the storage device a transformed logical data object comprising and one or more allocated storage sections with a predefined size; processing one or more sequentially obtained chunks corresponding to the transforming logical data object, wherein at least one of said processed data chunks comprises transformed data resulting from said processing; sequentially storing the processed data chunks into said storage sections in accordance with an order the chunks received. The method further includes reading a data range from the transformed logical object in response to a read request specifying desired point in time to be read. | 2011-10-27 |
20110264873 | External Memory Controller - A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network. | 2011-10-27 |
20110264874 | LATENCY CONTROL CIRCUIT AND METHOD USING QUEUING DESIGN METHOD - A latency control circuit includes a FIFO controller and a register unit. The FIFO controller may generate an increase signal according to an external command, and generate a decrease signal according to an internal command. The FIFO controller may also enable a depth point signal responsive to the increase signal and the decrease signal. The register unit may include n registers. The value n (rounded off) may be obtained by dividing a larger value of a maximum number of additive latencies and a maximum number of write latencies by a column cycle delay time (tCCD). The registers may store an address received with the external command responsive to the increase signal and a clock signal, and may shift either the address or a previous address to a neighboring register. The latency control circuit transmits an address stored in a register as a column address corresponding to the enabled depth point signal. | 2011-10-27 |
20110264875 | STORAGE SYSTEM AND DATA STORAGE METHOD USING STORAGE SYSTEM - A secondary subsystem reads first differential data recorded in a magnetic tape device into a magnetic disk device, and manages such data based on second differential data that was created based on the read first differential data and differential management information. Then, whether differential data exists in partial data is determined based on the differential management information, and, if such differential data exists, the partial data is read into a cache memory, and differential data is applied to the partial data. Meanwhile, if differential data does not exist, the partial data is read into the buffer. Moreover, new full data is recorded by writing the partial data, which was read into the cache memory or the buffer, onto the magnetic tape device in parallel with other read processing. | 2011-10-27 |
20110264876 | STORAGE SYSTEM AND METHOD FOR CONTROLLING STORAGE SYSTEM - A storage system | 2011-10-27 |
20110264877 | STORAGE SUBSYSTEM AND ITS DATA PROCESSING METHOD, AND COMPUTER SYSTEM - Efficiently utilizing the bandwidth of the host interface unit even after restoration. A controller manages a storage area of a disk as multiple logical units (LUs), as well as measures the bandwidth used by each host interface unit as load information, stores the load information at the time of the backup, and at the time of the restoration, restores the backup data in logical units in the restoration destination and, with reference to the load information, distributes the paths connecting the logical units in the access source and the logical units in the restoration destination to the host interface units. | 2011-10-27 |
20110264878 | Volume Swapping of Point-In-Time Read-Only Target Volumes - A mechanism is provided for adding point-in-time copy relationships to a data processing system. A request is received to establish a first point-in-time copy relationship. Responsive to determining that a first target of the first point-in-time copy relationship is target write inhibited, that a source of the first point-in-time copy relationship is a source of a first continuous synchronous copy relationship, that a target of the first continuous synchronous copy relationship is part of a second point-in-time copy relationship, and that the source of the first point-in-time copy relationship is part of a volume swap configuration, a volume swap relationship is added between the first point-in-time target volume and the second point-in-time target volume to the volume swap configuration. Both point-in-time copy relationships are established and any continuous synchronous copy requirements of the volume swap relationship between the first point-in-time target volume and the second point-in-time target volume are disabled. | 2011-10-27 |
20110264879 | Making Automated Use of Data Volume Copy Service Targets - A method for automatically managing copies of source data volumes is provided. A copy management agent receives a message that target volume copies of source volumes are available. The copy management agent accesses the target volume copies of the source volumes. The copy management agent analyzes metadata for the target volume copies. The copy management agent determines whether any of the target volume copies is a boot volume copy based on the analyzed metadata. In response to a determination that one of the target volume copies is a boot volume copy, the copy management agent directs a provisioning agent to provision a new host for the target volume copies. The copy management agent directs the storage subsystem to present the target volume copies to a storage area network port associated with the new host. Then, the new host is booted using the boot volume copy. | 2011-10-27 |
20110264880 | Object copying with re-copying concurrently written objects - Objects are copied concurrently with mutator execution, while tracking writes to the objects being copied. Objects (or fields) that are written into during copying are re-copied to the same destination locations. Mutators use the original objects until copying is complete and are, in some embodiments, atomically (with respect to the mutators) switched to use the new copies, together with a final re-copy. | 2011-10-27 |
20110264881 | STORAGE SYSTEM AND REMOTE COPY RECOVERY METHOD - Data written in the primary logical volume of the first storage device are transmitted to the third storage device via the second storage device, the data being written in the same location as the primary logical volume within the secondary logical volume in the third storage device; when transmission of the data stops among the first to the third storage devices, the respective second storage device and the third storage device manage locations in the secondary logical volume where the data held thereby are to be written; and, when transmission of the data resumes among the first to the third storage devices, the locations in the secondary logical volume managed by the respective second and the third storage devices are aggregated, the data to be written in the respective aggregated location in the secondary logical volume being transmitted from the first storage device to the third storage device via the second storage device. | 2011-10-27 |
20110264882 | SYSTEM AND METHOD FOR LOCKING PORTIONS OF A MEMORY CARD - An improved integrated circuit is provided to facilitate communication between a microprocessor and a non-volatile memory. The integrated circuit comprises at least one lock status register, at least one control register and a memory controller. The lock status register comprises a plurality of lock status bits representing whether or not a corresponding unit of storage in the volatile memory has been locked. The control register stores configurable control information for the memory controller, including sizing information defining the size of the unit of storage. The memory controller is configured to receive a modification request to modify data in the non-volatile memory; determine a target unit of storage in the non-volatile memory based on a target memory address associated with the modification request; determine from the lock status register whether the target unit of storage has been locked; and implement the modification request only if the target unit storage has not been locked. A method to be implemented by the circuit is also provided. | 2011-10-27 |
20110264883 | Device for selecting and configuring a default storage section and the corresponding method - The present invention concerns a device and a method at the device for selecting and configuring a default storage section. The device comprises connecting means for connecting at least one storage device comprising storing means to the device, characterized in that it comprises a selector for selecting a storage device, the selected storage device becoming the default storage section, configuring means for, on selection of a default storage section, partitioning the storing means of the default storage section into more than one directory, and securing means for defining access rights to the more than one directory. | 2011-10-27 |
20110264884 | DATA STORAGE DEVICE AND METHOD OF OPERATING THE SAME - A data storage device includes a storage media storing data and a controller that receives a de-allocation command and performs the de-allocation command according to a size of a de-allocation region. When a size of the de-allocation region is larger than a minimum erase unit of the storage media, the controller performs a first de-allocation operation to erase a part of the de-allocation region, an operation to notify the host of a completion of the de-allocation command after the first de-allocation operation, and a second de-allocation operation to erase the rest of the de-allocation region. | 2011-10-27 |
20110264885 | CONTROLLING CIRCUIT APPLICABLE IN PHYSICAL STORAGE DEVICE AND RELATED METHOD - A controlling circuit applicable in a physical storage device includes: a dividing circuit coupled to the physical storage device for dividing a storage capacity of the physical storage device into a plurality of divided storage areas, wherein a divided storage capacity of each divided storage area is not larger than the capacity corresponding to the largest address generated by an operating system; and a feedback circuit coupled to the dividing circuit for feeding back the plurality of divided storage areas to the operating system such that the operating system regards the plurality of divided storage areas as a plurality of independent physical storage devices. | 2011-10-27 |
20110264886 | System and Method for Managing Memory - Systems and methods that manage memory are provided. In one embodiment, a system for communications may include, for example, a memory management system that may handle a first application employing a virtual address based tagged offset and a second application employing a zero based tagged offset with a common set of memory algorithms. | 2011-10-27 |
20110264887 | Preload instruction control - A processor | 2011-10-27 |
20110264888 | Dynamically Reconfigurable Systolic Array Accelorators - A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems. | 2011-10-27 |
20110264889 | SYSTEMS AND METHODS FOR PROCESSING DATA - Systems, methods, and an article of manufacture for the reduction in process load experienced by a primary processor when executing an application by dynamically reassigning portions of the application to one or more secondary processors are shown and described. A second processing unit is queried for one or more characteristics. One or more performance characteristics of the second processor are measured. A portion of the application can be reassigned to the second processing unit based on the queried characteristics and performance measurements. | 2011-10-27 |
20110264890 | ELECTRONIC CHIP AND INTEGRATED CIRCUIT INCLUDING SUCH AN ELECTRONIC CHIP - This electronic chip includes functional modules each including a single processing unit and a single routing unit ( | 2011-10-27 |
20110264891 | MICROPROCESSOR THAT FUSES MOV/ALU/JCC INSTRUCTIONS - A microprocessor receives first, second, and third program-adjacent macroinstructions. The first macroinstruction moves a first operand to a first register from a second register. The second macroinstruction performs an arithmetic/logic operation using the first operand in the second register and a second operand in a third register to generate a result, loads the result back into the first register, and updates condition codes based on the result. The third macroinstruction conditionally jumps to a target address. An instruction translator simultaneously translates the first, second, and third program-adjacent macroinstructions into a single micro-operation for execution by an execution unit. The micro-operation performs the arithmetic/logic operation using the first operand in the second register and the second operand in third register to generate the result, loads the result back into the first register, updates the condition codes based on the result, and conditionally jumps to the target address. | 2011-10-27 |
20110264892 | DATA PROCESSING DEVICE - Provided is a data processing device ( | 2011-10-27 |
20110264893 | DATA PROCESSOR AND IC CARD - The data processor includes: a memory device for storing a program compiled by a compiler; and CPU operable to fetch an instruction code included by a program stored in the memory device. Further, the data processor has a filter for judging an instruction code which the compiler never outputs to limit, in action, CPU in case that CPU fetches the instruction code, which limits, in action, CPU in the case where the program is rewritten by not only an undefined instruction, but also an instruction other than an undefined instruction. The level of security is increased by limiting, in action, CPU. | 2011-10-27 |
20110264894 | BRANCHING PROCESSING METHOD AND SYSTEM - A method is provided for controlling a pipeline operation of a processor. The processor is coupled to a memory containing executable computer instructions. The method includes determining a branch instruction to be executed by the processor, and providing both an address of a branch target instruction of the branch instruction and an address of a next instruction following the branch instruction in a program sequence. The method also includes determining a branch decision with respect to the branch instruction based on at least the address of the branch target instruction provided, and selecting at least one of the branch target instruction and the next instruction as a proper instruction to be executed by an execution unit of the processor, based on the branch decision and before the branch instruction is executed by the execution unit, such that the pipeline operation is not stalled whether or not a branch is taken with respect to the branch instruction. | 2011-10-27 |
20110264895 | METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA - A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data. | 2011-10-27 |
20110264896 | MICROPROCESSOR THAT FUSES MOV/ALU INSTRUCTIONS - A microprocessor receives first and second program-adjacent macroinstructions of the instruction set architecture of the microprocessor. The first macroinstruction instructs the microprocessor to move a first operand to a first architectural register from a second architectural register. The second macroinstruction instructs the microprocessor to perform an arithmetic/logic operation using the first operand in the second architectural register and a second operand in a third architectural register to generate a result and to load the result back into the first architectural register. An instruction translator simultaneously translates the first and second program-adjacent macroinstructions into a single micro-operation for execution by an execution unit. The single micro-operation instructs the execution unit to perform the arithmetic/logic operation using the first operand in the second architectural register and the second operand in third architectural register to generate the result and to load the result back into the first architectural register. | 2011-10-27 |
20110264897 | MICROPROCESSOR THAT FUSES LOAD-ALU-STORE AND JCC MACROINSTRUCTIONS - A microprocessor receives first and second program-adjacent macroinstructions of the microprocessor instruction set architecture. The first macroinstruction loads an operand from a location in memory, performs an arithmetic/logic operation using the loaded operand to generate a result, and stores the result back to the memory location. The second macroinstruction jumps to a target address if condition codes satisfy a specified condition and otherwise executes the next sequential instruction. An instruction translator simultaneously translates the first and second program-adjacent macroinstructions into first, second, and third micro-operations for execution by execution units. The first micro-operation calculates the memory location address and loads the operand therefrom. The second micro-operation performs the arithmetic/logic operation using the loaded operand to generate the result, updates the condition codes based on the result, and jumps to the target address if the updated condition codes satisfy the condition. The third micro-operation stores the result to the memory location. | 2011-10-27 |
20110264898 | CHECKPOINT ALLOCATION IN A SPECULATIVE PROCESSOR - The embodiments described in the instant application provide a system for generating checkpoints. In the described embodiments, while speculatively executing instructions with one or more checkpoints in use, upon detecting an occurrence of a predetermined operating condition or encountering a predetermined type of instruction, the system is configured to determine whether an additional checkpoint is to be generated by computing a factor based on one or more operating conditions of the processor. When the factor is greater than a predetermined value, the processor is configured to generate the additional checkpoint. | 2011-10-27 |
20110264899 | System and Method for Displaying Battery Information - A system and method are described for displaying battery condition information on a display of a portable computer. After powering on the portable computer, battery condition information of a battery of the portable computer is retrieved. The retrieved battery condition information is displayed on the display of the portable computer and operating system (OS) loaded into an executable memory of the portable computer is executed. | 2011-10-27 |
20110264900 | METHOD AND ARRANGEMENT FOR CONFIGURING ELECTRONIC DEVICES - The invention relates to a method for configuring electronic devices, particularly terminals, wherein during configuration at least parts of first configuration data on a chip card are fed to an electronic device, wherein the configuration data are stored on the chip card as second configuration data such that the stored data are the result of an obfuscation following at least one first algorithm. Furthermore, at least parts of the first algorithm can be derived by the electronic device. The stored second configuration data are subjected to a de-obfuscation by the device such that, having knowledge of the first algorithm, they can be reconstructed as first configuration data and the configuration of the terminal can be based thereon. The invention further relates to an arrangement having means for carrying out the method. | 2011-10-27 |
20110264901 | MODULAR INTEGRATED CIRCUIT WITH COMMON SOFTWARE - A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. The spoke modules include a plurality of interface circuits each having a hardware address. A memory module stores the hub software and hub data and configuration data. The hub software includes a plurality of driver modules corresponding to the plurality of interface circuits. The processing module executes boot firmware to configure the plurality of driver modules based on the hardware address of each of the plurality of interface circuits. | 2011-10-27 |
20110264902 | Method and System For Suspending Video Processor and Saving Processor State in SDRAM Utilizing a Core Processor - A method and system are provided in which a multimedia processor comprises a first portion associated with a first of a plurality of power domains and a second portion associated with a second of the plurality of power domains. The first portion and the second portion of the multimedia processor are integrated on a single substrate. Data may be transferred from the first portion to the second portion and, upon completing the transfer, the first portion may be powered down and state information associated with it stored. The state information may be stored in an external SDRAM. The data in the second portion of the multimedia processor may be transferred to an external device through a peripheral module in the second portion. When a trigger event associated with the data transfer to the external device occurs, the first portion may be powered up and rebooted using the stored state information. | 2011-10-27 |
20110264903 | ELECTRONIC DEVICE AND METHOD FOR LOADING CONFIGURATION FILES USING THE SAME - A method for loading a configuration file from a remote server to an electronic device includes obtaining a default configuration file from the remote server, and executing the default configuration file to boot the electronic device, identifying a corresponding MAC list in the remote server according to hardware configurations of the electronic device, and obtaining a specific MAC value corresponding to an unused status flag from the MAC list. The method further includes obtaining a default MAC value of a network card of the electronic device, replacing the default MAC value of the network card with the specific MAC value, obtaining a specific configuration file from the remote server according to the specific MAC value, and rebooting the electronic device according to the specific configuration file. | 2011-10-27 |
20110264904 | Wireless Connection Method and Device - A wireless connection method is applicable to establishing a wireless connection device between an uplink device and a downlink device, and includes obtaining uplink wireless configuration information, and configuring a downlink with the obtained uplink wireless configuration information. A wireless connection is established with the uplink device based on the uplink wireless configuration information and, after successful connection establishment, a wireless connection is established with the downlink device based on the uplink wireless configuration information. | 2011-10-27 |
20110264905 | SYSTEMS AND METHODS FOR SPLIT PROXYING OF SSL VIA WAN APPLIANCES - The present invention is directed towards systems and methods for split proxying Secure Socket Layer (SSL) communications via intermediaries deployed between a client and a server. The method includes establishing, by a server-side intermediary, a SSL session with a server. A client-side intermediary may establish a second SSL session with a client using SSL configuration information received from the server-side intermediary. Both intermediaries may communicate via a third SSL session. The server-side intermediary may decrypt data received from the server using the first SSL session's session key. The server-side intermediary may transmit to the client-side intermediary, via the third SSL session, data encrypted using the third SSL session's session key. The client-side intermediary may decrypt the encrypted data using the third SSL session's session key. The client-side intermediary may transmit to the client the data encrypted using the second SSL session's session key. | 2011-10-27 |
20110264906 | METHOD AND NODES FOR PROVIDING SECURE ACCESS TO CLOUD COMPUTING FOR MOBILE USERS - A mobile node, a gateway node and methods are provided for securely storing a content into a remote node. The mobile node, or a gateway node of a network providing access to the mobile node, applies a content key to the content prior to sending the content for storage in the remote node. The content key is generated at the mobile node, based on a random value obtained from an authentication server, or directly at the authentication server if applied by the gateway node. The content key is not preserved in the mobile node or in the gateway node, for security purposes. When the mobile node or the gateway node fetches again the content from the remote node, the same content key is generated again for decrypting the content. The remote node does not have access to the content key and can therefore no read or modify the content. | 2011-10-27 |
20110264907 | SECURING INFORMATION WITHIN A CLOUD COMPUTING ENVIRONMENT - Embodiments of the invention provide a solution for securing information within a Cloud computing environment. Specifically, an encryption service/gateway is provided to handle encryption/decryption of information for all users in the Cloud computing environment. Typically, the encryption service is implemented between Cloud portals and a storage Cloud. Through the use of a browser/portal plug-in (or the like), the configuration and processing of the security process is managed for the Cloud computing environment user by pointing all traffic for which security is desired to this encryption service so that it can perform encryption (or decryption in the case of document retrieval) as needed (e.g., on the fly) between the user and the Cloud. | 2011-10-27 |
20110264908 | Method and device for preventing network attacks - A method for preventing network attacks is provided, which includes: obtaining a data packet, where a source address of the data packet is a cryptographically generated address (CGA); determining that the obtained data packet includes a CGA parameter and signature information; authenticating the CGA parameter; authenticating the signature information according to the authenticated CGA parameter; and sending the data packet to a destination address when the signature information is authenticated. Accordingly, a device for preventing network attacks is also provided. A CGA parameter used by a data packet is directly used to ensure authenticity of a source address of the data packet, thus preventing network attacks performed by counterfeiting the address. In addition, by authenticating signature information, authenticity of identification of a sender of the data packet and bound address of the sender of the data packet are further ensured. Therefore, illegal data packets are filtered to prevent network attacks on servers, thus improving network security. | 2011-10-27 |
20110264909 | METHOD AND SYSTEM FOR IP MULTIMEDIA BEARER PATH OPTIMIZATION THROUGH A SUCCESSION OF BORDER GATEWAYS - A method for identifying alternative end-to-end media paths through Internet protocol realms using substitute session description protocol parameters is disclosed. The method includes receiving a session description protocol offer, including a list of internet protocol realms. The list may include any number of previously traversed through internet protocol realms and/or secondary internet protocol realms. The method continues with determining the outgoing internet protocol realm for a media path based on unspecified signaling criteria. Finally, the method includes that if the outgoing internet protocol realm to be traversed through is on the list of previously traversed through and/or secondary internet protocol realms, bypassing at least one border gateway associated with the incoming and previously traversed through internet protocol realms. The system implementing a method for identifying optimal end-to-end media paths and internet protocol multimedia subsystems includes a list of internet protocol realm instances and an application level gateway configured to receive a session description protocol offer having connection information and port information, and a procedure to determine that if the outgoing internet protocol realm that the media path may traverse through is on the list of instances, the media path connection information and port information is substituted to facilitate border gateway bypassing. | 2011-10-27 |
20110264910 | COMMUNICATION CONTROL DEVICE, COMPUTER-READABLE MEDIUM, AND COMMUNICATION CONTROL SYSTEM - A virtual authentication proxy server includes an authentication request acceptance unit, a terminal authentication program transmission unit and an authentication result transmission unit. When an application server which cannot use an authentication server accepts a user ID and a password together with a use request from a terminal, the authentication request acceptance unit accepts the authentication request. The terminal authentication program transmission unit transmits a terminal authentication program to a terminal device. The authentication result transmission unit causes the terminal device to execute the terminal authentication program so as to cause the authentication server to execute authentication. The authentication result transmission unit receives the received authentication result from the terminal device and transmits the authentication result to the application server. | 2011-10-27 |
20110264911 | MEMORY DEVICE, HOST DEVICE, AND MEMORY SYSTEM - A memory device includes: a storage section configured to store public key information of a certificate authority for verifying a certificate and revocation information for revoking illegal devices and to include a secret area for storing data of which the confidentiality is to be guaranteed; and a control section configured to have a function of communicating with an external device and to control access to the secret area of the storage section at least in accordance with the revocation information. | 2011-10-27 |
20110264912 | MANAGED SERVICES ENVIRONMENT PORTABILITY - A device and method for forming a portable network environment outside a managed network environment for sharing content is provided. A portable network device enables authorized consumption of content outside a managed environment. The portable network device may have an internal rechargeable battery and support wireless protocols such as Wi-Fi. The portable network device may act as a Wi-Fi base station allowing access to authorized Wi-Fi clients via a mesh network. | 2011-10-27 |
20110264913 | METHOD AND APPARATUS FOR INTERWORKING WITH SINGLE SIGN-ON AUTHENTICATION ARCHITECTURE - A method is provided for use in interworking a single sign-on authentication architecture and a further authentication architecture in a split terminal scenario. The split terminal scenario is one in which authentication under the single sign-on authentication architecture is required of a browsing agent ( | 2011-10-27 |
20110264914 | COMMUNICATION SYSTEM HAVING PLURAL TERMINALS AND METHOD FOR CONTROLLING TERMINAL IN COMMUNICATION SYSTEM - A method and communication system for assigning the control authorization for controlling functions of a device from a terminal to another terminal in a communication system is provided. Through the method, it is possible to simplify the authentication process of a terminal having the communication function based on the short messaging service, and to reduce the security information size generated in the authentication process. | 2011-10-27 |
20110264915 | SYSTEM AND METHOD FOR SECURING MESH ACCESS POINTS IN A WIRELESS MESH NETWORK, INCLUDING RAPID ROAMING - Authentication in a mesh network controlled by a central controller, including using standard IEEE 802.11i mechanisms between a potential child mesh access point (AP) as supplicant and the controller as authenticator. Each mesh AP in the mesh network has a secure tunnel to a controller using a protocol for controlling the mesh AP, including AP capabilities, and a fast roaming method for re-establishing a secure layer-2 link with a new parent mesh AP including, while the mesh AP is a child mesh AP to the first parent mesh AP and has a secure layer-2 link to the first parent mesh AP, caching key information and wireless mesh network identity information in the controller. | 2011-10-27 |
20110264916 | MOTOR VEHICLE ELECTRONICS DEVICE, MOTOR VEHICLE, METHOD FOR DISPLAYING DATA ON A MOTOR VEHICLE DISPLAY APPARATUS, AND COMPUTER PROGRAM PRODUCT - The invention relates to a motor vehicle electronics device comprising a first interface ( | 2011-10-27 |
20110264917 | METHOD FOR TWO STEP DIGITAL SIGNATURE - The invention relates to a method for the digital signature of a message by a signer having an identity and holding a signature device, in which a public key cryptographic scheme is used. The signer has a public key and two private keys, the second private key being deposited at a reliable third party. For each signing operation, two additional steps are respectively carried out with a separate private key, i.e.: the calculation by the signer of a pre-signature of the message using the first private key, and transmitting the message and the pre-signature to the reliable third party; and the verification by the reliable third party of the pre-signature followed by the calculation by the reliable third party of a signature of the message using the second private key deposited at the reliable third party as well as the pre-signature previously calculated by the signer. | 2011-10-27 |
20110264918 | INTER-VEHICLE COMMUNICATION SYSTEM - A communication system for transmitting and receiving communication data together with signature data attached thereto for verifying the communication data. A transmission-side in-vehicle device of the system generates the signature data for each unit of communication data consisting of M×N (M>=N>=2) pieces of communication data, and repeatedly transmits M pieces of divided signature data in N rounds, attached to M×N corresponding pieces of communication data. A reception-side in-vehicle device of the system reconstitutes the unit of communication data from M×N pieces of received communication data, reconstitutes the signature data from M pieces of received divided signature data, and then verifies the reconstituted unit of communication data with the reconstituted signature data. This can prevent data missing of the signature data due to communication errors to thereby reliably verify the communication data. | 2011-10-27 |
20110264919 | DYNAMIC SEED AND KEY GENERATION FROM BIOMETRIC INDICIA - A system, a method, and a computer program for generating a seed and/or a key from live biometric indicia, such that all the information necessary for generating the seed and/or the key is not stored on a storage medium. The method comprises receiving a biometric template from a user and enrolling the template; assigning an optimization value to the enrolled biometric template; encrypting an item of test data using the optimization value, such that the optimization value is an encryption seed; storing the encrypted item of test data on the storage medium; destroying the encryption seed after encrypting the item of test data; receiving a live biometric template; comparing the templates and determining an interval based on a probability that the templates are specific to the same user; iteratively testing values within the interval to identify the value in the interval for decrypting the encrypted item of test data, wherein the value used to decrypt the item of test data is the encryption seed; and generating the key using the seed. | 2011-10-27 |
20110264920 | SYSTEMS AND METHODS FOR COMMUNICATION, STORAGE, RETRIEVAL, AND COMPUTATION OF SIMPLE STATISTICS AND LOGICAL OPERATIONS ON ENCRYPTED DATA - Systems and methods provide for a symmetric homomorphic encryption based protocol supporting communication, storage, retrieval, and computation on encrypted data stored off-site. The system may include a private, trusted network which uses aggregators to encrypt raw data that is sent to a third party for storage and processing, including computations that can be performed on the encrypted data. A client on a private or public network may request computations on the encrypted data, and the results may then be sent to the client for decryption or further computations. The third party aids in computation of statistical information and logical queries on the encrypted data, but is not able to decrypt the data on its own. The protocol provides a means for a third party to aid in computations on sensitive data without learning anything about those data values. | 2011-10-27 |
20110264921 | METHOD OF VERIFYING AN IDENTIFICATION CIRCUIT - The invention relates to a method for verifying an identification circuit ( | 2011-10-27 |
20110264922 | DIGITAL VIDEO GUARD - This invention relates to the veracity of information that is displayed to a user of a computer and can also relate to the veracity of information provided to a computer by human input devices such as pointing devices and keyboards. A digital video guard device is a peripheral that is retrofitted to commodity computer device. The digital video guard device provides trust in specific information presented on a digital display. The digital video guard device resides in-line with a digital display and enables secure end-to-end interactions between a user and a displayed (usually remote) application. In-band signalling within the digital video stream is used to carry encrypted information from a remote source, over untrusted network infrastructure through the digital video guard device to a user for viewing. The creation of encrypted digital video content can be achieved by either local or remote applications, and is effected by manipulating what is to be rendered on a computer's display, i.e. encrypting data that will at some time form part of a digital display stream and be output from an information device to a digital display. The digital video guard device can decrypt and verify the integrity of the digital video content as it is sent to a digital display. The integrity of the displayed information is indicated by a trusted LED on the digital video guard device hardware. Part or the entire video signal may be designated as trusted, depending on what data within the video signal has been encrypted, signed, or otherwise labelled as being trustworthy. | 2011-10-27 |
20110264923 | SELF-PROTECTING DIGITAL CONTENT - Technologies are disclosed to transfer responsibility and control over security from player makers to content authors by enabling integration of security logic and content. An exemplary optical disc carries an encrypted digital video title combined with data processing operations that implement the title's security policies and decryption processes. Player devices include a processing environment (e.g., a real-time virtual machine), which plays content by interpreting its processing operations. Players also provide procedure calls to enable content code to load data from media, perform network communications, determine playback environment configurations, access secure nonvolatile storage, submit data to CODECs for output, and/or perform cryptographic operations. Content can insert forensic watermarks in decoded output for tracing pirate copies. If pirates compromise a player or title, future content can be mastered with security features that, for example, block the attack, revoke pirated media, or use native code to correct player vulnerabilities. | 2011-10-27 |
20110264924 | SYSTEMS AND METHODS FOR TRANSFORMATION OF LOGICAL DATA OBJECTS FOR STORAGE - Systems and methods for encrypting a plaintext logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Encrypting the plaintext logical data object comprises creating in the storage device an encrypted logical data object comprising a header and one or more allocated encrypted sections with predefined size; encrypting one or more sequentially obtained chunks of plaintext data corresponding to the plaintext logical data object thus giving rise to the encrypted data chunks; and sequentially accommodating the processed data chunks into said encrypted sections in accordance with an order said chunks received, wherein said encrypted sections serve as atomic elements of encryption/decryption operations during input/output transactions on the logical data object. | 2011-10-27 |
20110264925 | SECURING DATA ON A SELF-ENCRYPTING STORAGE DEVICE - Disclosed embodiments relate to a method for securing data on a self-encrypting storage device. The method may comprise, for example, receiving, by a self-encrypting storage device, information indicating a procedure for securing data stored on the self-encrypting storage device and selecting, by the self-encrypting storage device, a procedure for securing data stored on the self-encrypting storage device based on the received information. The procedure may comprise replacing data stored on the self-encrypting storage device or deleting a decryption key associated with data stored on the self-encrypting storage device. In one embodiment, the method further involves performing, by the self-encrypting storage device, the selected procedure. | 2011-10-27 |
20110264926 | USE OF A SECURE ELEMENT FOR WRITING TO AND READING FROM MACHINE READABLE CREDENTIALS - A method for conducting secure communications with credential cards using existing reader/writer hardware that enhances the security of the provisioning process is provided. The method moves the sensitive data contained in these communications together with the program that uses this sensitive data for the purpose of interacting with a credential card inside a secure computational element such as an integrated circuit card. The provisioning program inside the secure element issues commands to readers/writers of existing art in order to establish secure communication with the credential card and then uses the secure channel so created for the purpose of direction communication between the secure computation element and the credential card. | 2011-10-27 |
20110264927 | MOBILE COMPUTING MANAGEMENT AND STORAGE DEVICE - A mobile computing management and storage device configured as a portable information handling system (IHS) storage device includes a frame and a docking station supported by the frame. The docking station includes a plurality of channels configured to receive a plurality of portable IHSs. The channels include a power coupling plug and a communication coupling plug such that the power coupling plug and the communication coupling plug are configured and positioned with respect to the channels to mate with corresponding power and communication couplings of the plurality of portable IHSs when the plurality of IHSs are engaged in the plurality of channels. The device further includes a power supply system supported by the frame and electrically coupled to the power coupling(s). The power supply system is configured to provide staged charging when a plurality of portable IHSs are stored in the docking station. In addition, the device includes a communication switching system supported by the frame and communicatively coupled to the communication coupling(s) such that the communication coupling(s) provide communication signals to the plurality of portable IHSs when stored in the docking station. | 2011-10-27 |
20110264928 | CHANGING POWER MODE BASED ON SENSORS IN A DEVICE - An orientation of a device is detected based on a signal from at least one orientation sensor in the device. In response to the detected orientation, the device is placed in a full power mode. | 2011-10-27 |
20110264929 | PROCESSOR PERFORMANCE STATE OPTIMIZATION - A processor performance state optimization includes a system to change a performance state of a processor. In an embodiment, the system to change a performance state of the processor includes a processor and a step logic sub-system operatively coupled with the processor and is operable to communicate a performance state change request to the processor. A core voltage regulator is operatively coupled with the step logic sub-system. An end performance state sub-system to determine a desired end performance state is coupled with the step logic sub-system. And, an enable sub-state transition sub-system to enable sub-state transitions is coupled with the step logic sub-system. | 2011-10-27 |
20110264930 | MODULAR INTEGRATED CIRCUIT WITH UNIFORM ADDRESS MAPPING - A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. A memory module stores hub software and hub data and configuration data. The hub software operates in accordance with a memory map that includes a plurality of first reserved blocks corresponding to memory reserved for the plurality of spoke modules, and at least one second reserved block corresponding to memory reserved for at least one optional spoke module. The plurality of first reserved blocks are activated based on the configuration data and the at least one second reserved block is deactivated based on the configuration data. | 2011-10-27 |
20110264931 | POWER CONTROL SYSTEM FOR WORKSTATIONS - A power control system for workstations ( | 2011-10-27 |
20110264932 | HOME APPLIANCE AND METHOD OF OPERATING THE SAME - A home appliance and a method of operating the same are provided. By controlling operation of the home appliance with varied rate information according to a power consumption amount, an entire power consumption amount is reduced, and by preventing power consumption from being concentrated in a specific time zone, power consumption is distributed. | 2011-10-27 |
20110264933 | METHOD AND APPARATUS FOR OPTIMAL ALLOCATION OF OPERATING POWER ACROSS MULTIPLE POWER DOMAINS OF A HANDHELD DEVICE - A method and apparatus for power management in a handheld device having various power domains, including an attachable/detachable peripheral device. The power source has an available power amount. The method comprises receiving an indication of a power management event at the handheld device related to operation of a power domain, identifying a predetermined power signature associated with operation of the power domain, determining whether the available power amount is sufficient to operate the power domain in accordance with the predetermined power signature, reducing a power state of another functional upon determining that the available power is insufficient, and allocating the reduced power amount to the first power domain of the handheld device for operation according to the predetermined power signature. | 2011-10-27 |
20110264934 | METHOD AND APPARATUS FOR MEMORY POWER MANAGEMENT - A method for power management is disclosed. The method may include monitoring requests for access to a memory of a memory subsystem by one or more processor cores; and monitoring requests for access to the memory conveyed by an input/output (I/O) unit. The method may further include determining if at least a first amount of time has elapsed since any one of the processor cores has asserted a memory access request and determining if at least a second amount of time has elapsed since the I/O unit has conveyed a memory access request. A first signal may be asserted if the first and second amounts of time have elapsed. A memory subsystem may be transitioned from operating in a full power state to a first low power state responsive to assertion of the first signal. | 2011-10-27 |
20110264935 | System And Method For Dynamic Utilization-Based Power Allocation In A Modular Information Handling System - Power from a modular chassis to plural modular information handling systems contained by the chassis is dynamically allocated according to power consumed at each modular information handling system and a priority associated with each modular information handling system. A power manager of the modular chassis allocates power by setting a maximum power for each modular information handling system based upon a priority for each modular information handling system. A power monitor on a modular information handling system requests additional power allocation if power consumed is within a predetermined amount of the maximum power for that system. The power manager allocates additional power in response to the request if another modular information handling system has excess power allocated or if the requesting modular information handling system has a higher priority than another modular information handling system. The requesting system's maximum power is increased and the other system maximum power is decreased so that the maximum power available from the chassis is not exceeded. | 2011-10-27 |
20110264936 | Power supply management controller integrated circuit, power management circuit for electrically powered systems, and method of managing power to such systems - The present invention provides a power supply management controller integrated circuit for managing power supply to one or more system units of a system, said integrated circuit comprising power supply means for powering said system units, a power supply control unit for controlling said powering of said system units, a wake-up timer unit, and means for acknowledging an active or passive state of said system, wherein said power supply control unit is arranged for cooperating with said means for acknowledging said state of said system for enabling said power supply control unit to cease powering of said system units for de-activation of said system during said passive state of said system, and for enabling said power supply control unit to maintain powering of said system units during an active state of said system, and wherein said power supply control unit is ranged for cooperating with said wake-up timer unit for periodically powering said system units during said passive state of said system for enabling activation of said system. | 2011-10-27 |
20110264937 | COMPUTER ENERGY CONSERVATION WITH A SCALABLE PSU CONFIGURATION - A power management method for use by a blade server or other networked computer having a CPU, memory, network interface, and timer. The method includes monitoring processes in the computer, determining that the computer has become idle, and switching the CPU and memory from an active state to a low power state while maintaining the network interface and timer in an active state. Power management for multicore processors is also provided. A power supply system can be used for providing shared power to groups of the networked computers that each have a similar active power demand. Each PSU in the power supply system is capable of supplying the active power demand at an efficiency greater than a preselected desired minimum efficiency. Changes in power requirements resulting from a computer switching between low power and active states can be accommodated by switching a single PSU into or out of the system. | 2011-10-27 |
20110264938 | METHOD AND SYSTEM FOR DETERMINING AN ENERGY-EFFICIENT OPERATING POINT OF A PLATFORM - A method and system for determining an energy-efficient operating point of the platform or system. The platform has logic to dynamically manage setting(s) of the processing cores and/or platform components in the platform to achieve maximum system energy efficiency. By using the characteristics of the workload and/or platform to determine the optimum settings of the platform, the logic of the platform facilitates performance guarantees of the platform while minimizing the energy consumption of the processor core and/or platform. The logic of the platform identifies opportunities to run the processing cores at higher performance levels which decreases the execution time of the workload and transitions the platform to a low-power system idle state after the completion of the execution of the workload. Since the execution time of the workload is reduced, the platform spends more time in the low-power system idle state and therefore the overall system energy consumption is reduced. | 2011-10-27 |
20110264939 | STOCHASTIC MANAGEMENT OF POWER CONSUMPTION BY COMPUTER SYSTEMS - Embodiments of the present disclosure describe methods, computer-readable media and system configurations for stochastic power management of one or more computer systems. A method may include ascertaining a workload of a plurality of computer systems (e.g., a data center). Additionally or alternatively, a method may include initiating, by a control module operated by a processor of a first of the plurality of computer systems, a stochastic power management process to manage power consumption of the first of the plurality of computer systems. The stochastic power management process may be conditionally initiated based at least in part on the ascertained workload of the plurality of computer systems. The stochastic power management process may include a plurality of virtual machine management actions having corresponding probabilities being taken, one or more of which may result in power savings. Other embodiments may be described and/or claimed. | 2011-10-27 |
20110264940 | ADAPTIVE ENERGY-EFFICIENT LOCATION DETERMINATION - Managing use of a location sensor on a computing device for energy efficiency. The location sensor is briefly initialized to measure the signal quality. The measured signal quality is compared to pre-defined signal criteria values. The signal criteria values correspond to acceptable energy consumption, for example. If the signal criteria values are satisfied, location information for the computing device is obtained. Otherwise, the location sensor is disabled without obtaining the location information. In some embodiments, a lower-energy location sensor is used to obtain location information to determine whether to enable a higher-energy location sensor based on expected energy consumption. | 2011-10-27 |
20110264941 | APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION CAUSED BY COMMUNICATION BETWEEN PROCESSORS IN PORTABLE TERMINAL - An apparatus and method for reducing power consumption in a portable terminal are provided. The apparatus includes a display unit for displaying at least one indicator that indicates status information measured by a slave processor, a master processor for controlling one of ON and OFF of the display unit and for providing image data to the display unit, and the slave processor for transmitting to the master processor indicator update information for updating the at least one indicator, wherein transmission to the master processor of the indicator update information is discontinued if the status of the display unit is OFF. | 2011-10-27 |
20110264942 | Method and Apparatus for Controlling Standby Power - Reducing standby power of an information apparatus is described. In one aspect, a laptop PC is equipped with an Ethernet controller. The laptop PC operates in an intermittent manner and a DC/DC converter supplies power to the Ethernet controller. The laptop PC determines whether the Ethernet controller is connected to a network by a cable in a time Twake during which the converter is on. When it is determined that the Ethernet controller is connected, the laptop PC maintains operation of the DC/DC converter until the Ethernet controller is disconnected. When it is determined that the Ethernet controller is not connected, the laptop PC stops operation of the DC/DC converter during a time Tsleep and resumes the operation thereof when a setting time by a timer elapses. The DC/DC converter supplies power to the Ethernet controller when it is actually connected to the network. Other aspects are described. | 2011-10-27 |
20110264943 | STORAGE CONTROL DEVICE - The storage control device of the present invention reduces the power consumption amount by stopping the transmission of power to enclosures that are not accessed. A plurality of additional enclosures is switch-connected via backend switches to a base enclosure. Drives that have not been accessed for a predetermined time or more undergo spin-down. When all of the drives in the enclosure enter a spin-down state, the supply of power from the power supply in the enclosure to the respective drives is stopped. The base enclosure that manages the system constitution of the storage control device turns OFF the switch connected to the enclosure when all of the drives in a certain enclosure have spun down. The transmission of power to this enclosure is accordingly stopped. | 2011-10-27 |
20110264944 | System and Method for Managing Power of a Portable Device - A method and system for managing power of a portable device is disclosed. The portable devices has a plurality device components that has controllable power settings. The device has a plurality of power profiles, each power profile referencing a list of the available device components that are configured for adequate power needs. Set of rules are then defined having a criterion for executing the plurality of power profiles, where the criterion is based on a device input. Once the rules and power profiles are created, the device inputs are monitored to determine if there is a match. If the criteria in the rules are matched, the corresponding power profile is executed to maximize battery life. | 2011-10-27 |
20110264945 | Power supplying and data transmitting method for induction type power supply system - A power supply and data signal transmission method used in an induction type power supply system consisting of a power supply module and a power-receiving module for transmission of electrical energy and data signal is disclosed. The microprocessor of the power supply module scans the resonant point of the power supply coil to send a segment of energy for recognition of a feedback signal from the power-receiving module and then starts providing power supply after receipt of the feedback signal, and then runs further signal modulation, transmission, data decoding and other follow-up steps, achieving transmission of electrical energy and data signal wirelessly. | 2011-10-27 |
20110264946 | MODULAR INTEGRATED CIRCUIT WITH CLOCK CONTROL CIRCUIT - A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. The hub module includes a clock control circuit, coupled to the plurality of hub interfaces, that selectively supplies a plurality of clock signals to the plurality of spoke modules by receiving a clock request signal from a corresponding one of the plurality of spoke modules via the signal interface of the corresponding one of the plurality of hub interfaces, generating at least one of the plurality of clock signals in response to the clock request signal; and sending the at least one of the plurality of clock signals to the corresponding one of the plurality of spoke modules via the signal interface of the corresponding one of the plurality of hub interfaces. | 2011-10-27 |
20110264947 | ON-LINE CLIENT SERVICE METHOD FOR STORAGE APPARATUS - An on-line client service method for a storage apparatus includes establishing a link between a client host and the storage apparatus for detecting the current status of the storage apparatus, the client host generating a diagnostic result of the storage apparatus, the client host transmitting the diagnostic result to a far-end server, the far-end server determining whether the storage apparatus functions abnormally according to the diagnostic result. If the storage apparatus functions abnormally, the client host reloads a firmware provided by the far-end server to the storage apparatus, and determines whether the storage apparatus functions abnormally after the storage apparatus is reloaded with the firmware. | 2011-10-27 |
20110264948 | DISK STORAGE APPARATUS AND METHOD FOR RECOVERING DATA - According to one embodiment, a disk storage apparatus includes a write module, an operation module, and a controller. The write module is configured to write data, in units of blocks, in a designated write area of a disk. The operation module is configured to perform an exclusive OR operation on the blocks of data. The controller is configured to control the write module, causing the write module to write, in a designated block, recovery data that is a result of the exclusive OR operation on all data blocks written in the designated write area. | 2011-10-27 |
20110264949 | DISK ARRAY - A disk array provided with a RAID group in a Redundant Array of Inexpensive Disks (RAID) configuration with redundancy of two, the disk array includes, a data recovery technique selecting unit to select a technique for recovering data from a first failed disk to be recovered first, the technique being selected from among a plurality of techniques based on the type of storage apparatus included in the RAID group, and I/O conditions with respect to the RAID group, when failures occur in two storage apparatus in the RAID group, a data recovering unit to split recovered data from the first failed storage apparatus and writing the recovered data to two recovery storage apparatus in accordance with the data recovery technique selected by the data recovery technique selecting unit, and an aggregating unit to aggregate the recovered data onto one of the two recovery storage apparatus. | 2011-10-27 |
20110264950 | CHECK OPERATION DISPERSED STORAGE NETWORK FRAME - A method begins by a processing module generating a payload section of a dispersed storage network (DSN) frame regarding a check request operation by generating one or more slice name fields of the payload section to include one or more slice names corresponding to one or more encoded data slices and generating a transaction number field of the payload section to include a transaction number corresponding to the check request operation. The method continues with the processing module generating a protocol header of the DSN frame by generating a payload length field of the protocol header to include a payload length that represents a length of the payload section and generating remaining fields of the protocol header. | 2011-10-27 |
20110264951 | System and Method for Recovery of Primary Storage Resource Failure - Systems and methods for reducing problems and disadvantages associated with traditional approaches to data and program storage on an information handling system are provided. A method may include determining if a primary storage resource has a failure. The method may further include, in response to determining that the storage resource does not have a failure: booting from a first operating system stored on the primary storage resource, monitoring data stored to the primary storage resource to identify data to be copied to a persistent storage resource, and copying the identified data to the persistent storage resource. The method may further include, in response to determining that the storage resource has a failure: booting from a second operating system stored on the persistent storage resource, and via the second operating system, providing access to the copied identified data copied to the persistent storage resource. | 2011-10-27 |
20110264952 | ASSEMBLY WITH AT LEAST TWO POWER SUPPLY UNITS AND AT LEAST ONE POWER-CONSUMING COMPONENT, COMPUTER SYSTEM AND METHOD FOR CONTROL OF AN ASSEMBLY - An assembly includes a plurality of power supply units for producing an output-side operating voltage from at least one input-side supply voltage and at least one power-consuming component which is electrically coupled to the plurality of power supply units. The assembly has a controller arranged to monitor the function of the plurality of power supply units and to switch the power-consuming from a normal operating mode into a restricted operating mode, whose power consumption is lower than that of the first operating mode, when at least one power supply unit fails or to activate a previously deactivated power supply unit. | 2011-10-27 |
20110264953 | Self-Healing Failover Using a Repository and Dependency Management System - Systems, devices, methods, and articles of manufacture employing repair modules are provided. The modules may be automatically deployed in conjunction with dependency mechanisms upon identifying a malfunctioning application. The modules may be specifically tailored for certain diagnosis or repair and may be selected for deployment to a second application using information regarding the malfunction of a first application. | 2011-10-27 |
20110264954 | DISASTER-PROOF DATA RECOVERY - A recovery unit ( | 2011-10-27 |
20110264955 | SIGNAL TEST APPARATUS AND METHOD - A system and method for restoring a signal test apparatus to a previous state receives a time interval set by a user to create restore point files. The signal test apparatus tests signals of a test object and creates a restore point file according to the time interval. The restore point file stores signal test data of a test object when the restore point file is created. If the signal test apparatus needs to be restored to a previous state, the signal test data of a latest restore point file are acquired. The acquired signal test data are displayed on a display of the signal test apparatus. | 2011-10-27 |
20110264956 | MANAGEMENT SYSTEM FOR OUTPUTTING INFORMATION DENOTING RECOVERY METHOD CORRESPONDING TO ROOT CAUSE OF FAILURE - A management server includes a meta rule for identifying an event to be a root cause and a failure recovery method that corresponds to the meta rule for an event capable of occurring in a plurality of node apparatuses, and also displays a cause event to be a root cause of an event detected by the management server, and a method for recovering from this cause event. | 2011-10-27 |
20110264957 | BOOT TEST APPARATUS AND METHOD OF COMPUTER SYSTEM - A boot test apparatus and method can repeatedly execute actions of power-on and power-off for a cold boot test of a computer to test whether the computer is operable. The boot test apparatus includes a microprocessor, a controller, and a power switch. The microprocessor generates a control signal according to a period voltage provided by an internal power supply. The control signal includes a pulse signal and a voltage signal. The controller controls a power switch to send the pulse signal to the computer through a power button of the computer, and controls the power switch to send the voltage signal to the computer through a power input port of the computer. The microprocessor further obtains test information from the computer when the computer executes a cold boot process according to the control signal, and displays the test information on an LED when the cold boot process is abnormal. | 2011-10-27 |
20110264958 | TEST FRAMEWORK FOR A NOTEBOOK COMPUTER - The disclosed simplified test framework comprises a first module substituting the mobile network module of the computer to communicate with a mobile phone network, configured with signal pins of VCC connected to a voltage of +3V, RST, VPP, CLK, and DATA while enabling the VCC to power source; and a second module substituting the subscriber identity module of the computer to identify a subscriber's identity on the computer, configured with signal pins of VCC, GND, RST, VPP, CLK, and DATA; wherein the VCC, RST, CLK, and DATA of the first module is connected to those of the second module, respectively, a light emitting diode connects the VCC and RST of the second module, the RST and CLK of the first module are connected to each other, an impedance connects the CLK and DATA of the second module, and the DATA is connected to an electric ground. | 2011-10-27 |
20110264959 | PARTIAL RECORDING OF A COMPUTER PROGRAM EXECUTION FOR REPLAY - A method, system and program product for recording a program execution comprising recording processor context for each thread of the program, results of system calls by the program, and memory pages accessed by the program during an execution interval in a checkpoint file. Processor context includes register contents and descriptor entries in a segment descriptor table of the operating system. System calls are recorded for each program thread, tracked by an extension to the operating system kernel and include returned call parameter data. Accessed memory pages are recorded for each program process and include data, libraries and code pages. The program address space, processor context, and program threads are reconstructed from checkpoint data for replaying the program execution in a different operating system environment. | 2011-10-27 |
20110264960 | APPARATUS AND METHOD FOR ANALYZING ERROR GENERATION IN MOBILE TERMINAL - An apparatus and a method for determining error generation in a mobile terminal are provided. More particularly, an apparatus and a method for analyzing and reporting an error of a device driver in real-time without a separate debugging apparatus in a mobile terminal are provided. The apparatus includes a dumper and an analyzer. When an error-generating device exists, the dumper retrieves error information used for analyzing an error generating cause from a register range of the error-generating device, and receives dumped information corresponding to the retrieving of the error information. The analyzer analyzes the dumped information to determine the error generating cause. | 2011-10-27 |
20110264961 | SYSTEM AND METHOD TO TEST EXECUTABLE INSTRUCTIONS - This document discusses, among other things, a method of testing an Application Programming Interface (API) call that includes receiving data identifying a schema associated with web services together with an API call. Various example embodiments may relate to accessing a data repository associated with the schema to identify an API response corresponding to the API call. In some example embodiments, a message is returned that is based on a determination of whether the API call is valid. The example message may simulate an API response from web services. | 2011-10-27 |
20110264962 | CHECKED WRITE OPERATION DISPERSED STORAGE NETWORK FRAME - A method begins by a processing module generating a payload of a dispersed storage network frame by generating a transaction number field including a transaction number and generating one or more slice payload sections, wherein each slice payload section includes a slice name field to include a slice name corresponding to an encoded data slice, a last known slice revision numbering field including a last known revision number of the slice name, a new slice revision numbering field including a new revision number of the slice name, a slice length field including a length of the encoded data slice, and a slice payload field including the encoded data slice. The method continues with the processing module generating a protocol header including a payload length field and remaining fields of the protocol header. | 2011-10-27 |
20110264963 | SYSTEM FOR CHECKING A PROGRAM MEMORY OF A PROCESSING UNIT - A system for checking a program memory) of a processing unit includes a check module, and the processing unit is made up of an instruction counter connected to the check module. The check module has a register connected to a first changeover switch that sets the register content. In a system that allows for the instruction addresses of the entire program memory to be checked, the instruction counter contains an ancillary counter, which runs through the instruction address space of the program memory independently of the program code during normal operation and which is connected to the register. | 2011-10-27 |