43rd week of 2009 patent applcation highlights part 39 |
Patent application number | Title | Published |
20090263922 | Reflective Positive Electrode And Gallium Nitride-Based Compound Semiconductor Light-Emitting Device Using The Same - A gallium nitride-based compound semiconductor light-emitting device which has a highly reflective positive electrode that has high reverse voltage and excellent reliability with low contact resistance to the p-type gallium nitride-based compound semiconductor layer. The reflective positive electrode for a semiconductor light-emitting device comprises a contact metal layer adjoining a p-type semiconductor layer, and a reflective layer on the contact metal layer, wherein the contact metal layer is formed of a platinum group metal or an alloy containing a platinum group metal, and the reflective layer is formed of at least one metal selected from the group consisting of Ag, Al, and alloys containing at least one of Ag and Al. Also disclosed is a production method of the reflective positive electrode. | 2009-10-22 |
20090263923 | SEMICONDUCTOR DEVICE USING BURIED OXIDE LAYER AS OPTICAL WAVE GUIDES - A semiconductor optical wave guide device is described in which a buried oxide layer (BOX) is capable of guiding light. Optical signals may be transmitted from one part of the semiconductor device to another, or with a point external to the semiconductor device, via the wave guide. In one example, an optical wave guide is provided including a core insulating layer encompassed by a clad insulating layer. The semiconductor device may contain an etched hole for guiding light to and from the core insulating layer from a transmitter or to a receiver. | 2009-10-22 |
20090263924 | Organic Light-Emitting Display Device and Method of Manufacturing the Same - Provided is an organic light-emitting display device that can display a full color image by forming a simple structure of light-emitting layers and a method of manufacturing the same. The organic light-emitting display device includes a substrate; a first electrode layer formed on the substrate; a second electrode layer which is formed above the first electrode layer and faces the first electrode layer; and a light-emitting layer interposed between the first electrode layer and the second electrode layer, wherein the light-emitting layer comprises first and second light-emitting layers respectively corresponding to first and second pixels having different colors from each other, and the first light-emitting layer is commonly formed in the first and second pixels, and the second light-emitting layer is formed in the second pixel. | 2009-10-22 |
20090263925 | NITRIDE-BASED LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate. | 2009-10-22 |
20090263926 | Optical semiconductor device having active layer of p-type quantum dot structure and its manufacture method - An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and a cover portion. The ridge portion extends in one direction, and the cover portion covers the surface on both sides of the ridge portion. A capacitance reducing region is disposed on both sides of the ridge portion and reaching at least the lower surface of the cover portion. The capacitance reducing region has the first conductivity type or a higher resistivity than that of the ridge portion, and the ridge portion has a second conductivity type. If the lower cladding layer is an n-type, the capacitance reducing region reaches at least the upper surface of the lower cladding layer. | 2009-10-22 |
20090263927 | ISOLATION STRUCTURES FOR CMOS IMAGE SENSOR CHIP SCALE PACKAGES - Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge. | 2009-10-22 |
20090263928 | METHOD FOR MAKING A SELECTIVE EMITTER OF A SOLAR CELL - A method for manufacturing a selective emitter of a solar cell is provided. The method includes steps of providing a substrate; forming an emitter layer on the substrate, wherein the emitter layer has a heavily doped portion located on a top thereof and a relatively lightly doped portion located at a bottom thereof; forming a patterned mask layer on the emitter layer; and performing a wet etching for exposing a region of the relatively lightly doped portion which is not covered by the patterned mask layer. | 2009-10-22 |
20090263929 | Methods for producing solid-state imaging device and electronic device - A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on the substrate; forming openings in the planarized insulating layer so that each of the transfer electrodes is partly exposed out of the planarized insulating layer at a predetermined position; forming a wiring material layer so that the openings are filled with the wiring material layer; forming a resist layer on the wiring material layer; exposing and developing the resist layer so that only the resist layer in a predetermined area covering the openings is left; and patterning the wiring material layer using the exposed and developed resist layer to form connection wirings connected to the transfer electrodes by the openings. | 2009-10-22 |
20090263930 | MICROCRYSTALLINE SILICON DEPOSITION FOR THIN FILM SOLAR APPLICATIONS - Embodiments of the invention as recited in the claims relate to thin film multi-junction solar cells and methods and apparatuses for forming the same. In one embodiment a method of forming a thin film multi-junction solar cell over a substrate is provided. The method comprises positioning a substrate in a reaction zone, providing a gas mixture to the reaction zone, wherein the gas mixture comprises a silicon containing compound and hydrogen gas, forming a first region of an intrinsic type microcrystalline silicon layer on the substrate at a first deposition rate, forming a second region of the intrinsic type microcrystalline silicon layer on the substrate at a second deposition rate higher than the first deposition rate, and forming a third region of the intrinsic type microcrystalline silicon layer on the substrate at a third deposition rate lower than the second deposition rate. | 2009-10-22 |
20090263931 | THINNED IMAGE SENSOR WITH TRENCH-INSULATED CONTACT TERMINALS - The invention relates to the fabrication of thinned substrate image sensors, and notably color image sensors. After the fabrication steps carried out from the front face of a silicon substrate the front face is transferred onto a substrate. The silicon is thinned, and the connection terminals are produced by the rear face. A multiplicity of localized contact holes are opened through the thinning silicon, in the location of a connection terminal. The holes exposing a first conductive layer ( | 2009-10-22 |
20090263932 | Organic semiconductor thin films using aromatic enediyne derivatives and manufacturing methods thereof, and electronic devices incorporating such films - Disclosed are organic semiconductor thin films using aromatic enediyne derivatives, manufacturing methods thereof, and methods of fabricating electronic devices incorporating such organic semiconductor thin films. Aromatic enediyne derivatives according to example embodiments provide improved chemical and/or electrical stability which may improve the reliability of the resulting semiconductor devices. Aromatic enediyne derivatives according to example embodiments may also be suitable for deposition on various substrates via solution-based processes, for example, spin coating, at temperatures at or near room temperature to form a coating film that is then heated to form an organic semiconductor thin film. The availability of this reduced temperature processing allows the use of the aromatic enediynes derivatives on large substrate surfaces and/or on substrates not suitable for higher temperature processing. Accordingly, the organic semiconductor thin films according to example embodiments may be incorporated in thin film transistors, electroluminescent devices, solar cells, and memory devices. | 2009-10-22 |
20090263933 | FIELD EFFECT TRANSISTOR AND METHOD OF PRODUCING SAME - A field effect transistor is provided which comprises an organic semiconductor layer comprising a compound having a monobenzoporphyrin skeleton represented by the general formula (1): | 2009-10-22 |
20090263934 | METHODS OF FORMING CHALCOGENIDE FILMS AND METHODS OF MANUFACTURING MEMORY DEVICES USING THE SAME - A method of forming a chalcogenide film is provided which includes forming a germanium film on a substrate by exposing the substrate to a germanium source and a first antimony source, and growing a polynary film from the germanium film by exposing the germanium film to at least one of a tellurium source and a second antimony source. | 2009-10-22 |
20090263935 | RECYCLING FAULTY MULTI-DIE PACKAGES - The present invention teaches the recycling of a faulty multi-die memory package by isolating the functional part of the package and using it as a smaller memory package. | 2009-10-22 |
20090263936 | Insulating Liquid Die-Bonding Agent And Semiconductor Device - An insulating liquid die-bonding agent for bonding a semiconductor-chip-mounting member to an active surface of a semiconductor chip, said agent comprising: (A) a mixture of (a-1) an organopolysiloxane resin having alkenyl groups and (a-2) a linear-chain organopolysiloxane having in one molecule at least two alkenyl groups; (B) an organopolysiloxane having in one molecule at least two silicon-bonded hydrogen atoms; (C) an organic silicon compound having in one molecule at least one silicon-bonded alkoxy groups; (D) insulating spherical silicone rubber particles having an average diameter of 0.1 to 50 μm and having a type A durometer hardness according to JIS K 6253 equal to or below 80; and (E) a hydrosilylation-reaction catalyst, may not damage the active surface of the semiconductor chip, is well suited for screen printing, is resistant to the formation of voids on the interface between the semiconductor chip and the die-bonding agent, and does not lose its wire-bonding properties. | 2009-10-22 |
20090263937 | LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY - A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board. | 2009-10-22 |
20090263938 | Method for manufacturing semiconductor device - In a double-sided electrode package, a sealing resin layer is formed so as to fill peripheries of surface-side terminals formed on a package substrate. Since the side surfaces of the surface-side terminals have plural protruded rims, adhesion with the sealing resin layer is improved by an anchor effect. At a sealing step, since supplied liquid resin is naturally flowed to form the sealing resin layer, a “mold step” and a “grinding step” may be omitted, and thus the sealing step may be simplified more greatly than a case where the resin sealing is carried out by a transfer molding method. | 2009-10-22 |
20090263939 | SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD - A transition layer | 2009-10-22 |
20090263940 | MOLDING CLEANING SHEET AND METHOD OF PRODUCING SEMICONDUCTOR DEVICES USING THE SAME - A cleaning sheet ( | 2009-10-22 |
20090263941 | Multi-channel type thin film transistor and method of fabricating the same - A multi-channel type thin film transistor includes a gate electrode over a substrate extending along a first direction, a plurality of active layers parallel to and spaced apart from each other extending along a second direction crossing the first direction, and source and drain electrodes spaced apart from each other with respect to the gate electrode and extending along the first direction, wherein each of the plurality of active layers includes a channel region overlapped with the gate electrode, a source region, a drain region, and lightly doped drain (LDD) regions, one between the channel region and the source region and another one between the channel region and the drain region, wherein the LDD regions of the adjacent active layers have different lengths from each other. | 2009-10-22 |
20090263942 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A single crystal semiconductor substrate including an embrittlement layer is attached to a base substrate with an insulating layer interposed therebetween, and the single crystal semiconductor layer is separated at the embrittlement layer by heat treatment; accordingly, a single crystal semiconductor layer is fixed over the base substrate. The single crystal semiconductor layer is irradiated with a laser beam so that the single crystal semiconductor layer is partially melted and then is re-single crystallized, whereby crystal defects are removed. In addition, an island-shaped single crystal semiconductor layer for forming an n-channel transistor is channel-doped using a photomask and then is etched back using the photomask so that the island-shaped single crystal semiconductor layer for forming an n-channel transistor is thinner than the island-shaped single crystal semiconductor layer for forming a p-channel transistor. | 2009-10-22 |
20090263943 | METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%. | 2009-10-22 |
20090263944 | Method for making low Vt gate-first light-reflective-layer covered dual metal-gates on high-k CMOSFETs - This invention proposes a method for making low V | 2009-10-22 |
20090263945 | MANUFACTURING METHOD OF CMOS TYPE SEMICONDUCTOR DEVICE, AND CMOS TYPE SEMICONDUCTOR DEVICE - The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors, without degrading the performance of the nMOS transistors, is offered. The manufacturing method of the CMOS type semiconductor device concerning the present invention has the following process steps. Halogen is introduced to the semiconductor substrate of pMOS transistor formation areas. Next, a gate insulating film is formed on the semiconductor substrate of the pMOS transistor formation areas. Next, nitrogen is introduced to the gate insulating film. | 2009-10-22 |
20090263946 | Device Having Pocketless Regions and Methods of Making the Device - An example of the present application is directed to an integrated circuit having a first plurality of transistors and a second plurality of transistors. Each of the first plurality of transistors comprises a first gate structure oriented in a first direction and each of the second plurality of transistors comprises a second gate structure oriented in a second direction. Each of the first plurality of transistors are formed with at least one more pocket region than each of the second plurality of transistors. Methods for forming the integrated circuit devices of the present application are also disclosed. | 2009-10-22 |
20090263947 | Bottom source LDMOSFET structure and method - This invention discloses a method to form a bottom-source lateral diffusion MOS (BS-LDMOS) device with a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The method includes a step of applying a sinker-channel mask for carrying out a deep sinker multiple energy implant to form a combined sinker-channel region in lower portion of an epitaxial layer to function as a buried source-body contact extending to and contacting a bottom of the substrate functioning as a bottom source electrode. | 2009-10-22 |
20090263948 | METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) AND METHOD OF FABRICATING THE SAME - A Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) is provided. The MOSFET includes a semiconductor substrate, a device isolating region disposed on a predetermined portion of the semiconductor substrate to define an active region, a source region and a drain region spaced apart from each other about a channel region within the active region, and a gate electrode formed on the active region between the source region and the drain region. Furthermore, the MOSFET also includes a gate insulating layer formed between the active region and the gate electrode. The gate insulating layer includes a central gate insulating layer disposed under central portion of the gate electrode, an edge gate insulating layer disposed under an edge portion of the gate electrode to have a bottom surface level with a bottom of the central gate insulating layer and an upper surface protruding to be higher than an upper surface of the central gate insulating layer. | 2009-10-22 |
20090263949 | TRANSISTORS HAVING ASYMMETRIC STRAINED SOURCE/DRAIN PORTIONS - A structure formation method. First, a structure is provided including (a) a fin region comprising (i) a first source/drain portion having a first surface and a third surface parallel to each other, not coplanar, and both exposed to a surrounding ambient, (ii) a second source/drain portion having a second surface and a fourth surface parallel to each other, not coplanar, and both exposed to the surrounding ambient, and (iii) a channel region disposed between the first and second source/drain portions, (b) a gate dielectric layer, and (c) a gate electrode region, wherein the gate dielectric layer (i) is sandwiched between, and (ii) electrically insulates the gate electrode region and the channel region. Next, a patterned covering layer is used to cover the first and second surfaces but not the third and fourth surfaces. Then, the first and second source/drain portions are etched at the third and fourth surfaces, respectively. | 2009-10-22 |
20090263950 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×10 | 2009-10-22 |
20090263951 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing one of regions between the plurality of wirings, on the insulating film and the plurality of wirings, forming an air gap trench by removing the insulating film from the selectively exposed one of the regions between the plurality of wirings by etching using the resist mask, and forming an air gap in the air gap trench by depositing an inter-layer insulating film over the plurality of wirings after removal of the resist mask. | 2009-10-22 |
20090263952 | SEMICONDUCTOR DEVICE FABRICATION USING SPACERS - A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench at the bottom of the first trench using the spacers as a mask. | 2009-10-22 |
20090263953 | METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE - A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO | 2009-10-22 |
20090263954 | Semiconductor Wafer Sawing System and Method - Semiconductor wafer sawing systems and methods are described in which a wafer may be secured in a sawing position having a surface exposed to incur sawing with at least a portion of the exposed wafer surface positioned below the center of gravity of the wafer such that prevailing force of gravity may be used to assist in the removal of contaminants from the wafer. | 2009-10-22 |
20090263955 | GaN single crystal substrate and method of making the same - The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate | 2009-10-22 |
20090263956 | Spray method for producing semiconductor nano-particles - A method is provided for producing semiconductor nanoparticles comprising: (i) dissolving a semiconductor compound or mixture of semiconductor compounds in a solution; (ii) generating spray droplets of the resulting solution of semiconductor compound(s); (iii) vaporizing the solvent of said spray droplets, consequently producing a stream of unsupported semiconductor nanoparticles; and (iv) collecting said unsupported semiconductor nanoparticles on a support. | 2009-10-22 |
20090263957 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface. | 2009-10-22 |
20090263958 | CLATHRATE COMPOUNDS AND METHODS OF MANUFACTURING - The present invention comprises new materials, material structures, and processes of fabrication of such that may be used in technologies involving the conversion of light to electricity and/or heat to electricity, and in optoelectronics technologies. The present invention provide for the fabrication of a clathrate compound comprising a type II clathrate lattice with atoms of silicon and germanium as a main framework forming lattice spacings within the framework, wherein the clathrate lattice follows the general formula Si | 2009-10-22 |
20090263959 | Method of manufacturing semiconductor wafer - A device layer is formed on at least the upper surface of a prime wafer by an epitaxial growth method. Then, a protective film is formed to cover at least the device layer. The lower surface of the prime wafer is ground to have a flat lower surface. | 2009-10-22 |
20090263960 | SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD OF FABRICATING THE SAME - A semiconductor device with a recess gate includes a substrate, a semiconductive layer having an opening corresponding to a gate region, a gate electrode filled in the opening, and a gate insulating layer interposed between the gate electrode and the substrate, and between the gate electrode and the semiconductive layer. | 2009-10-22 |
20090263961 | HARDWARE SET FOR GROWTH OF HIGH K & CAPPING MATERIAL FILMS - The present invention generally includes a method and an apparatus for depositing both a high k layer and a capping layer within the same processing chamber by coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber. By coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber, a high k dielectric layer, a capping layer for a PMOS section, and a different capping layer for a NMOS may be deposited within the same processing chamber. The capping layer prevents the metal containing electrode from reacting with the high k dielectric layer. Thus, the threshold voltage for the PMOS and NMOS may be substantially identical. | 2009-10-22 |
20090263962 | NON-VOLATILE MEMORY CELL DEVICE AND METHODS - A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the second dielectric layer encases the nanodots. In addition, an intergate dielectric layer is formed over the second dielectric layer. To form sidewalls of the memory cell, a portion of the intergate dielectric layer and a portion of the second dielectric layer are removed with a dry etch, where the sidewalls include a location where a nanodot has been deposited. A spacing layer is formed over the sidewalls to cover the location where a nanodot has been deposited and the remaining portion of the second dielectric layer and the nanodots can be removed with an isotropic etch selective to the second dielectric layer. | 2009-10-22 |
20090263963 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive. Further, the multilayer wiring structure may include an insulating layer having a ratio of carbon atoms to silicon atoms not greater than 0.1, the insulating layer being formed on the top surface of the organic siloxane insulating film as a result of carbon leaving the organic siloxane insulating film. | 2009-10-22 |
20090263964 | INTERCONNECTIONS FOR INTEGRATED CIRCUITS - An interconnect connection structure having first and second interconnects and multiple connection elements that electrically connect the first interconnect to the second interconnect is described. The multiple connection elements are formed laterally in a lateral region of the first and second interconnects relative to an overlay orientation of the interconnects. A central region may be free of connection elements so that electro-migration properties of the connection structure are improved and the current-carrying capacity is increased | 2009-10-22 |
20090263965 | SELF-ALIGNED BARRIER LAYERS FOR INTERCONNECTS - An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The manganese silicate and manganese silicon nitride also promote strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use. The strong adhesion at the copper-manganese silicate and manganese silicon nitride interfaces also protect against failure by electromigration of the copper during use of the devices. The manganese-containing sheath also protects the copper from corrosion by oxygen or water from its surroundings. | 2009-10-22 |
20090263966 | APPARATUS FOR SPUTTERING AND A METHOD OF FABRICATING A METALLIZATION STRUCTURE - A method of depositing a metallization structure ( | 2009-10-22 |
20090263967 | Method of forming noble metal layer using ozone reaction gas - A noble metal layer is formed using ozone (O | 2009-10-22 |
20090263968 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes: forming a conductive film over a semiconductor wafer; forming a mask film over the conductive film; removing a portion of the mask film covering at least a peripheral portion of the semiconductor wafer such that a portion of the mask film covering a device forming region of the semiconductor wafer remains; and removing an exposed portion of the conductive film with use of the remaining portion of the mask film as a mask. | 2009-10-22 |
20090263969 | HIDDEN PLATING TRACES - A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided. | 2009-10-22 |
20090263970 | METHOD OF FORMING FINE PATTERN OF SEMICONDUCTOR DEVICE USING SIGE LAYER AS SACRIFICIAL LAYER, AND METHOD OF FORMING SELF-ALIGNED CONTACTS USING THE SAME - There are provided a method of forming a fine pattern of a semiconductor device using a silicon germanium sacrificial layer, and a method of forming a self-aligned contact using the same. The method of forming a self-aligned contact of a semiconductor device includes forming a conductive line structure having a conductive material layer, a hard mask layer, and a sidewall spacer on a substrate, and forming a silicon germanium (Si | 2009-10-22 |
20090263971 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - A method of manufacturing a semiconductor device comprises: (a) loading a substrate into a process chamber, wherein the substrate has at least a silicon exposure surface and an exposure surface of silicon oxide film or silicon nitride film on a substrate surface; (b) simultaneously supplying at least a first process gas containing silicon and a second process gas for etching into the process chamber under conditions that the substrate inside the process chamber is heated to a predetermined temperature; and (c) supplying a third process gas having a stronger etchability than the second process gas into the process chamber, wherein the operation (b) and the operation (c) are performed at least one or more times so that an epitaxial film is selectively grown on the silicon exposure surface of the substrate surface | 2009-10-22 |
20090263972 | BORON NITRIDE AND BORON-NITRIDE DERIVED MATERIALS DEPOSITION METHOD - A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate surface, and etching the spacer layer to expose the substrate structure and a portion of the substrate surface, wherein the spacer layer is disposed adjacent the substrate structure. The spacer layer may comprise a boron nitride material. The spacer layer may comprise a base spacer layer and a liner layer, and the spacer layer may be etched in a two-step etching process. | 2009-10-22 |
20090263973 | FIN MASK AND METHOD FOR FABRICATING SADDLE TYPE FIN USING THE SAME - A fin mask for forming saddle type fins in each of active regions formed in an island shape having a certain size with a major axis and a minor axis includes a first fin mask of a line type, and a second fin mask of an island type, wherein the first fin mask and the second fin mask in combination expose saddle type fin regions and cover ends of the neighboring active regions along the major axis. | 2009-10-22 |
20090263974 | Substrate processing system for performing exposure process in gas atmosphere - A substrate processing system which sprays exposure process gas onto a substrate disposed within a chamber. The substrate processing system is used, for example, for performing an exposure process of an organic film formed on a substrate in a gas atmosphere obtained by vaporizing an organic solvent solution for dissolving and reflowing an organic film. The substrate processing system comprises: the chamber having at least one gas inlet and at least one gas outlets; a gas introducing means which introduces the exposure process gas into the chamber via the gas inlet; and a gas distributing means. The gas distributing means separates an inner space of the chamber into a first space into which the exposure process gas is introduced via the gas inlet and a second space in which the substrate is disposed. The gas distributing means has a plurality of openings via which the first space and the second space communicate with each other and introduces the exposure process gas introduced into the first space into the second space via the openings. | 2009-10-22 |
20090263975 | FILM FORMATION METHOD AND APPARATUS FOR FORMING SILICON-CONTAINING INSULATING FILM DOPED WITH METAL - A film formation method for a semiconductor process performs a film formation process to form a silicon-containing insulating film doped with a metal on a target substrate, in a process field inside a process container configured to be selectively supplied with a silicon source gas and a metal source gas. The method includes forming a first insulating thin layer by use of a chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas; then, forming a first metal thin layer by use of a chemical reaction of the metal source gas, while maintaining a shut-off state of supply of the silicon source gas; and then, forming a second insulating thin layer by use of the chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas. | 2009-10-22 |
20090263976 | APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Variation in the thickness of the deposited films depending on number of the processed product wafers in the deposition process employing a batch type CVD apparatus is inhibited to provide a manufacture of the film having a predetermined thickness with an improved reproducibility. The deposition apparatus | 2009-10-22 |
20090263977 | SELECTIVE FUNCTIONALIZATION OF DOPED GROUP IV SURFACES USING LEWIS ACID/LEWIS BASE INTERACTION - A method of selectively attaching a capping agent to a Group IV semiconductor surface is disclosed. The method includes providing the Group IV semiconductor surface, the Group IV semiconductor surface including a set of covalently bonded Group IV semiconductor atoms and a set of surface boron atoms. The method also includes exposing the set of boron atoms to a set of capping agents, each capping agent of the set of capping agents having a central atom and a set of functional groups, wherein the central atom includes at least a lone pair of electrons; wherein a complex is formed between at least some surface boron atoms of the set of surface boron atoms and the central atom of at least some capping agents of the set of capping agents. | 2009-10-22 |
20090263978 | LASER MASK AND CRYSTALLIZATION METHOD USING THE SAME - An embodiment of a laser crystallization method includes providing a substrate on which an amorphous silicon thin film is deposited, positioning a laser mask over the substrate, the laser mask including a mask pattern that contains transmitting regions and a blocking region, irradiating a first laser beam onto a surface of the substrate through the pattern of the laser mask to first crystallize a predetermined region of the silicon thin film, moving the laser mask or a stage on which the substrate is loaded in an X-axis direction to perform second crystallization using the laser mask, repeatedly performing the crystallization to an end of the substrate in the X-axis direction, moving the laser mask or the stage in a Y-axis direction, and repeatedly performing the crystallization in the Y-axis direction to complete crystallization. | 2009-10-22 |
20090263979 | Retractable adapter - The present invention provides a retractable adapter for connecting a towed vehicle to a towing vehicle. The retractable adapter may include a lower housing, an upper housing and a retractable mechanism to store the wiring harness when not in use with the towed vehicle. The lower housing may be attached to the towing vehicle. The adapter may include a rotating disc assembly, a wire guide assembly and an electrical connector or wiring harness that may be coiled around the wire guide assembly. The adapter may also include a circuit tester with light emitting diodes (LEDs) and a backup alarm. In addition, the adapter may mate a seven-way blade connector to a four-flat connecter harness. | 2009-10-22 |
20090263980 | Powered patch panel - A powered communications patch panel is adapted to power network devices connected to the communications patch panel. Power is supplied to the network devices by the powered communications patch panel over the communication cabling. The powered communications patch panel may be provided with a management port to allow remote management of the patch panel via a network connection. Multiple management ports may be provided, allowing patch panels to be connected to one another in a daisy-chain configuration. | 2009-10-22 |
20090263981 | MIDPLANE OF COMMUNICATION DEVICE - A midplane of a communication device, includes the first connectors and the second connectors which connect with each other via high-speed traces, the first connectors arrange in parallel at one side of the midplane, the second connectors arrange in parallel at the other side of the midplane and in parallel with the first connectors. The wiring of high-speed traces between the first connectors and the second connectors can be disposed on the whole midplane, so that it avoids the high density of wiring in part of midplane, reduces the number of layers of the midplane and the complexity of design, and reduces the crosstalk in signals. And the cooling of the whole communication device can be accomplished by only one heat dissipation system, it reduces the complexity of design of the communication device. The area between each frames of the midplane is provided to allocate electrical power in the communication device with two or multiple frames, it reduces the costs of the communication device. | 2009-10-22 |
20090263982 | CIRCUIT BOARD CONNECTION STRUCTURE - A circuit board connection structure comprises: first and second circuit boards; a connector having first and second insertion openings receiving the first and second circuit boards, respectively, the first and second insertion openings being opposite each other. First and second connection pins are located on inner walls of the first and second insertion openings, respectively. The first and second connection pins are connected to each other in the connector. First and second patterned conductors connectable to the first and second connection pins are respectively located on the first and second circuit boards and connected to the first and second connection pins when inserted in the first and second insertion openings. The transmission path from the first connection pin to the second connection pin is a characteristic-impedance-matched coplanar line. | 2009-10-22 |
20090263983 | CIRCUIT BOARD AND ELECTRONIC DEVICE USING THE SAME - A circuit board includes four positioning pads placed on a surface of the circuit board, four positioning holes corresponding to the positioning pads, respectively, and a solder mask placed on the surface around the periphery of the positioning pads. An arc-shaped recess is defined at a side of each positioning pad near the corresponding positioning hole and the space between the edges of the positioning pad and the positioning hole ranges from 0.2 mm to 0.5 mm. | 2009-10-22 |
20090263984 | POWER CONNECTOR ASSEMBLY - A power connector is provided which includes an insulating housing having a plurality of contact receiving passages, each of said plurality of contact receiving passages receives a contact pair having a pair of independent conductive contacts, each of said independent conductive contacts has a base portion and a contacting portion extending from said base portion, a retention portion extends from at least one of said independent conductive contacts to another one of said independent conductive contacts, and rests on said another one of said independent conductive contacts when said contacting portion deforms under force, so as to prevent said contacting portion of said conductive contact from over deforming under force, and ensure the stability of power transmission. | 2009-10-22 |
20090263985 | Power connector - The electrical connector has an insulative housing and a number of contacts embedded in the housing and distributed in rows and columns. Each of the contact has a pair of contacting arms with a contacting portion thereon for electrically connecting with a pad of the electronic package. The contacting portions of the contacts are arranged in a pattern of contact portions of two adjacent contacts in same row can engage with a same pad on the electronic package when the electrical connector is coupled with the electronic package, such that the contacts of the row are coupled with each other in series. By way above mentioned, pitch between two adjacent contacts can be reduced and a high density of the contacts can be achieved. | 2009-10-22 |
20090263986 | SPRING INTERCONNECT STRUCTURES - An interconnection element of a spring (body) including a first resilient element with a first contact region and a second contact region and a first securing region and a second resilient element, with a third contact region and a second securing region. The second resilient element is coupled to the first resilient element through respective securing regions and positioned such that upon sufficient displacement of the first contact region toward the second resilient element, the second contact region will contact the third contact region. The interconnection, in one aspect, is of a size suitable for directly contacting a semiconductor device. A large substrate with a plurality of such interconnection elements can be used as a wafer-level contactor. The interconnection element, in another aspect, is of a size suitable for contacting a packaged semiconductor device, such as in an LGA package. | 2009-10-22 |
20090263987 | Burn-in socket having protecting device - A burn-in socket includes a base, a number of contacts received in the base, and a protecting device. The base has a first projection and a second projection. The protecting device is assembled to the base and moves from a first position to a second position relative to the base. The protecting device includes a planar bottom plate and a pair of spring arms extending upwardly from opposite sides of the bottom plate. Each spring arm has a first stopper for engaging with the first projection at the first position, and a second stopper for engaging with the second projection at the second position. | 2009-10-22 |
20090263988 | IC socket with improved contact having deformable retention portion - An IC socket ( | 2009-10-22 |
20090263989 | Connector assembly having connecting device - A connector assembly ( | 2009-10-22 |
20090263990 | Connector assembly having connecting device - A connector assembly includes a mother board ( | 2009-10-22 |
20090263991 | Negative Thermal Expansion System (NTES) Device for TCE Compensation in Elastomer Compsites and Conductive Elastomer Interconnects in Microelectronic Packaging - A method for fabricating a negative thermal expanding system device includes coating a wafer with a thermally decomposable polymer, patterning the decomposable polymer into repeating disk patterns, releasing the decomposable polymer from the wafer and forming a sheet of repeating patterned disks, suspending the sheet into a first solution with seeding compounds for electroless decomposition, removing the sheet from the first solution, suspending the sheet into a second solution to electrolessly deposit a first layer material onto the sheet, removing the sheet from the second solution, suspending the sheet into a third solution to deposit a second layer of material having a lower TCE value than the first layer of material, separating the patterned disks from one another, and annealing thermally the patterned disks to decompose the decomposable polymer and creating a cavity in place of the decomposable polymer. | 2009-10-22 |
20090263992 | Blind Docking Electrical Connector - Method and apparatus for blind docking an electronic device or module with an electrical connector, for example within a rack for a computer system. A forwardly-directed power connector is secured to a distal end of at least one rail or shelf bracket for blind docking with a rearwardly-directed power connector on the electronic module. The shelf bracket securing the forwardly-directed electrical connector is included in a pair of longitudinally-extending shelf brackets secured to opposing vertical side walls of a rack at a common elevation to form a module bay. The electronic module may slide along the shelf bracket until a rearwardly-directed power connector of the electronic module blind docks with the forwardly-directed power connector. A boss or alignment stud may be included on the bracket to improve alignment of the connectors. The forwardly-direct electrical connector may also be secured to the bracket with a floating connection to enable minor adjustments in alignment during blind docking. | 2009-10-22 |
20090263993 | Locking Seal for Data Ports and Associated Methods - A jack port locking device includes a base having side longitudinal slots. A protrusion extends upwardly into the slot. The base's top is compressible between a released and a compressed position. A ramp slopes upward from the front end. A stop higher than the ramp is positioned rearward of the ramp. A front portion of the device in the compressed position is dimensioned for insertion into a port so that the ramp is retained within the port when the device is in the released position. When the device is retained within the port, the protrusion prevents sufficient compression to remove the device from the port, and the stop is positioned to prevent access into the port. Preferably, the device is removable only by destroying the device's integrity. The device may have an electronically pollable sensor for detecting the device's presence in a port over a network. | 2009-10-22 |
20090263994 | ELECTRONIC DEVICE - An electronic device includes an enclosure, a protecting member, and a power plug. The enclosure includes a top wall, a bottom wall, sidewalls, a socket, and a slot to receive an electronic card. The socket and the slot are defined in one of the sidewalls. The protecting member includes a receiving portion bounding the socket and the slot and a sliding plate capable of sliding to an open position and a closed position in the receiving portion. Movement of the sliding plate in the open position does not allow insertion of the power plug into the socket and allows the electronic card to be inserted into or removed from the slot, and movement of the sliding plate in the closed position allows insertion of the power plug into the socket and does not allow the electronic card to be inserted into or removed from the slot. | 2009-10-22 |
20090263995 | CARD ADAPTER - A card adapter mounted on a card connector in a state where a card is held is provided. The card adapter includes an adapter body guided by a guide member which guides a separate card different from the card when being mounted to the card connector, and mounted on the card connector so as not to come into contact with contact terminals for the separate card; and a holding portion making the card held by the adapter body in a state where a rear end of the card is made to protrude from a rear end of the adapter body. The holding portion includes an ejection mechanism ejected by once pressing the card held by the adapter body toward the deep side. | 2009-10-22 |
20090263996 | Electrical card connector with a wedge-shaped block - A card connector, comprising: an insulative housing having a base, a first passageway and a second passageway defined adjacently in the base; a plurality of contacts held within the base, the contacts having contact sections extending beyond the base; a pair of detecting switches including a stationary switch and a movable switch respectively located in the first passageway and the second passageway communicating with each other; the movable switch including a planar section abutting against a bottom wall of the second passageway, and a slanted spring arm attached to planar section, the slanted spring arm defining a contact end; a wedge-shaped block extending into the second passageway with a wedgy surface defined thereon, the slanted spring arm constantly contacting with said wedgy surface such that there is no portion of said spring arm electrically engages with the stationary switch when said contact end is pushed by an external force. | 2009-10-22 |
20090263997 | LEVER-TYPE CONNECTOR AND METHOD OF OPERATING IT - A first housing ( | 2009-10-22 |
20090263998 | ELECTRICAL PLUG CONNECTOR - An electrical plug connector includes a first connector housing, a slider, and a cap. The slider has slider surfaces insertable into the first housing in a direction transverse to a direction of insertion of a second housing to the first housing at a connecting side of the first housing. The slider is connected to the first housing upon the slider surfaces being inserted into the first housing. The cap is on a cap side of the first housing lying opposite to the connecting side of the first housing. The slider surfaces connect with the cap to latch the cap to the cap side of the first housing upon the slider surfaces being inserted into the first housing. | 2009-10-22 |
20090263999 | POWER PLUG, POWER OUTLET, POWER SUPPLY DEVICE AND POWER SUPPLY SYSTEM - A power plug, power outlet, power supply device and power supply system for preventing electricity theft with relatively simple configuration are provided. A power outlet unit supplies power to a power plug unit to establish communication over a power line between a PLC block of the power outlet unit and a PLC block of the power plug unit. Upon transmission of an ID number from the power plug unit, the transmitted ID number is compared with an ID number stored in a memory. If the ID number matches the ID number in the memory, power is continuously supplied to the power plug unit. If the ID number does not match, the power supply is shut down to prevent electricity theft. | 2009-10-22 |
20090264000 | FLUORESCENT LAMP AND BASE - At the end of life of a fluorescent lamp having a base to which a pin is press-fitted, it is an object to prevent the pin from dropping or slanting, etc. A fluorescent lamp includes a base having a base body and a pin press-fitted to a hole formed on the base body. A pin retaining force (a pin torque of the base) Fe after use by which the base body retains the pin is at least 0.08 Nm after the fluorescent lamp is burned for a rated life, and a rate Fe/Fi of an initial pin retaining force Fi by which the base body retains the pin before use of the fluorescent lamp and the pin retaining force Fe after use is at least 0.66. | 2009-10-22 |
20090264001 | High density connector assembly having two-leveled contact interface - A connector assembly ( | 2009-10-22 |
20090264002 | EMI GASKET FOR AN ELECTRICAL CONNECTOR ASSEMBLY - An electrical connector assembly is provided. The electrical connector assembly includes a cage member configured for mounting in an opening in a panel. The cage member has a compartment for receiving a pluggable electrical component therein. The cage member includes a latch for cooperating with a latch element of the pluggable electrical component. An EMI gasket is mounted on the cage member such that the EMI gasket is electrically connected to the cage member. The EMI gasket is configured to engage the panel when the cage member is mounted in the opening in the panel. The EMI gasket includes a latch interface that engages the latch such that the latch interface is electrically connected to the latch. | 2009-10-22 |
20090264003 | CONNECTOR HAVING A SLEEVE MEMBER - A connector assembly configured to sealably engage with a mating connector. The connector assembly includes a plug assembly that has a mating end configured to be inserted into the cavity of the mating connector. The connector assembly also includes a collar that surrounds the plug assembly. The connector assembly also includes a sleeve member that is positioned between the collar and the plug assembly. The sleeve member surrounds the plug assembly about the central axis and includes a plurality of fingers that extend toward the mating end. The sleeve member is stamped and formed from a common piece of sheet material. The fingers are biased away from the central axis in a flared arrangement when the collar is in the withdrawn position. The lingers press against the wall surface of the mating connector when the collar is moved from the withdrawn position to the locked position. | 2009-10-22 |
20090264004 | Connector Device - A connector device for maintaining a desired spatial relationship for spatially and securely connecting to a platform, such as a circuit board, in an efficient manner. The connector device generally includes a body portion separated from the secondary device, a plurality of legs extending from the body portion for removably attaching the body portion to the secondary device, wherein the plurality of legs each include a foot member insertable within an opening of the secondary device for grasping the secondary device and at least one contact pin extending from the body portion to contact the secondary device on an opposite surface as the foot member. The contact pin maintains the separation between the body portion and the secondary device and includes a spring for providing a counter force against the secondary device with respect to the foot member. | 2009-10-22 |
20090264005 | Socket connector assembly having lock-down indicator preventing overstressing - An electrical connector mounted to a printed circuit board includes an insulation housing mounted to a printed circuit board, a plurality of contacts received in the insulation housing, a load plate covering the insulation housing. And an indicator disposed on the load plate. The indicator has a indicating portion, the showing abouting against the printed circuit board and capable of changing positions relative to the load plate, so that the operator may observe an assembly process of the load plate. The electrical connector has a simple configuration and reliable connection. | 2009-10-22 |
20090264006 | CALL CORD CONNECTION - A call cord system and connection are disclosed. The system can be implemented in any number of situations where summoning assistance from a remote location is desirable, such as in a healthcare provider setting. In addition, the call cord connection allows the cord to be securely engaged for its intended operation, without concern that the cord will unintentionally become disconnected. However, given sufficient force, the call cord connection further allows the cord to be disconnected from the patient station by the patient or staff without damaging either the call cord itself or the patient station. Such an intentional disconnect can be used, for instance, to signal a patient or staff emergency and a corresponding response, when normal call signaling is not possible (e.g., the patient is not able to depress the call button) or higher priority attention is needed for whatever reason. | 2009-10-22 |
20090264007 | CONNECTOR RETAINING BRACKET - A retainer may include a hollow portion for holding a connector, a path for conveying the connector from outside the retainer to the hollow portion, a surface that is adjacent to the connector when the connector is held in the hollow portion, a fastener for applying a force to couple the retainer to a device, and a member that causes the surface to press the connector against a connector receiver associated with the device and to prevent the connector from being disengaged from the connector receiver. | 2009-10-22 |
20090264008 | CONNECTOR HAVING FLOATING STRUCTURE - A connector assembly having a floating structure includes a connector moveably mounted in a cradle housing. A part of this connector connects to and detaches from another connector facing, through a spacing, a connector-mounting window of the cradle housing. The connector on the moveable side is moveable freely within the range of the spacing. An elastic member of flexible material is provided on the exterior of the moveable-side connector and closely contacts and is housed in a housing part formed in the cradle housing. An elastic member restoring force, acting when coupling between the moveable-side connector and the other connector is released, causes the moveable-side connector to return its original position in the cradle housing. | 2009-10-22 |
20090264009 | ELECTRIC CONNECTOR ASSEMBLY - The present invention discloses an electric connector assembly including an insulator body, a fixed part, multiple terminals, a flexible flat cable (FFC) and a metal case. The insulator body has a rectangular base, multiple accommodating tanks are located one side of the base, and an inserting part passing through the inner place of the base is located at the edge of the other side of the base. The fixed part is assembled at the inserting part of the insulating body and can accommodating multiple terminals. Each terminal has an upper contact arm and a lower contact arm, which can simultaneously contact with the FFC and maintain the steadiness of the FFC. At least one side surface of the FFC has multiple contact points, which are clipped between the terminals for electrically connection. The metal case covering one side of the insulator body seizes the FFC to achieve the grounding function. | 2009-10-22 |
20090264010 | CONNECTOR ASSEMBLY HAVING A JUMPER ASSEMBLY - A connector assembly for a device having a host circuit board includes a first circuit board, a connector receptacle and a jumper assembly. The first circuit board includes a first conductive trace. The connector receptacle is mounted on the first board and is electrically connected with the first conductive trace. The connector receptacle includes a mating interface configured to mate with an electrical connector. The jumper assembly has a height and is mounted on the first board. The jumper assembly also is electronically connected with the first conductive trace. The jumper assembly is configured to be mounted to the host board. The height of the jumper assembly controls a position of the connector receptacle with respect to the host board. The jumper assembly is configured to close a circuit comprising the first conductive trace of the first board and a second conductive trace of the host board. | 2009-10-22 |
20090264011 | HIGH FREQUENCY DIGITAL A/V CABLE CONNECTOR AND CABLE ASSEMBLY - A high frequency digital A/V cable connector assembly includes a cable connector, which is connectable to an electronic apparatus and has first and second conducting terminals arranged in two horizontal rows, an adapter board, which has first metal contacts and jumper circuits arranged on the top side for the bonding of the first conducting terminals of the cable connector, second metal contacts arranged on the bottom side for the bonding of the second conducting terminals of the cable connector and respectively electrically connected to the jumper circuits, and bonding contacts electrically connected with the first metal contacts and the jumper circuits, and a cable, which has core wires respectively bonded to the jumper circuits. | 2009-10-22 |
20090264012 | SECURING APPARATUS AND METHOD - When securing a watthour meter to a meter box base, a meter sealing ring is typically used. A quick-fastening watthour meter retaining member is provided, in certain embodiment of the present invention, to reduce installation time and generally comprises a circular band, a connector housing member, and a receiver housing member. The connector housing member and a receiver housing member are preferably mounted to the terminus ends of the circular band. A portion of the connector housing member, comprising locking protrusions or “teeth”, is adapted to engage, with a ratchet-type action, in one example embodiment, and fasten into the receiver housing member, which contains, a pre-installed “padlock type” frangible sealing device in an example embodiment. Removal of the ring is accomplished by simply cutting, in one embodiment, and removing the frangible sealing device and allowing the housings to disengage from each other. | 2009-10-22 |
20090264013 | REFRACTORY MOUNTING UNIT FOR CEILING MOUNTED OR WALL MOUNTED ELECTRIC DEVICES - The present invention relates to a refractory mounting unit for ceiling mounted or wall mounted electric devices and comprises: a refractory housing ( | 2009-10-22 |
20090264014 | MOUNTABLE CONNECTOR ASSEMBLIES AND FRAMES - An electrical connector assembly for mounting to a panel. The panel includes a latch element that projects outward from a first side of the panel. The connector assembly includes a connector body that has a mating end configured to interface with the panel and mate with another electrical connector through the cut-out. The connector assembly also includes at least one tab extending away from the body. The tab is oriented to engage a second side of the panel. Also, the connector assembly includes a wing member that extends away from the body and is oriented to move along the first side when moved in a locking direction. The wing member includes an end portion and a latch opening. The wing member is configured to flex away from the first side and resile toward the first side and engage the latch element. | 2009-10-22 |
20090264015 | FASTENING DEVICE FOR DETACHABLE HOLDING OF AN ELECTRICAL DISTRIBUTOR BY LATCHING - A fastening device for detachable holding of an electrical distributor ( | 2009-10-22 |
20090264016 | Coaxial Connector Piece - In a coaxial plug-connector part with a cap nut, which is disposed rotatably and in an axial force-fit manner on the outer-conductor and which can be screw-connected, in order to generate the contact pressure between the outer-conductor butting contact surfaces of the plug connector, with an external thread of the counter plug-connector part, the frictional torque of the axial force-fit between the cap nut and the outer-conductor is selected to be smaller than the frictional torque between the outer-conductor butting contact surfaces of the plug connector. | 2009-10-22 |
20090264017 | COMPOSITE ELECTRICAL CONNECTOR ASSEMBLY - A composite electrical connector assembly includes a housing, a shield, and an electrical contact. The housing is formed from a first material and has an interior chamber. The interior chamber includes a stepped cylindrical surface with first and second openings at mating and mounting ends of the housing, respectively. The interior chamber is staged in diameter to form front, intermediate and rear stages. The shield is formed from a second material and is shaped to fit within the interior chamber. The shield engages the rear stage of the interior chamber and is prevented from being removed from the second opening by the rear stage. The electrical contact is disposed within the interior chamber, is aligned along a longitudinal axis of the connector assembly and is configured to receive a center conductor of a cable and to connect with a conductor of a communication device. | 2009-10-22 |
20090264018 | Connector System and Contact Element for Such a System - The invention relates a connector system including a connector housing, capable of receiving a cable connector, and a panel, said panel having at least one opening defined by edges of said panel, from which opening at least a front portion of said connector housing protrudes to receive said cable connector and wherein at least one contact element is provided, capable of electrically coupling said connector housing and said cable connector by a first group of electrical contacts and electrically coupling said connector housing and said panel by a second group of electrical contacts. The contact element is structured to provide at least two contacts for said second group. The invention also relates to a contact element as such. | 2009-10-22 |
20090264019 | CIRCUIT BOARD CONNECTOR - A circuit board connector is provided. The circuit board connector includes: a connector housing which is mounted on a circuit board; and a terminal which is press-fitted into the terminal press-fitting hole of the connector housing. The terminal includes: a terminal connecting portion which is disposed through the rear side of the connector housing to be connected to a mating connector; a press-fitting portion to be fixed to the connector housing; a board fixing portion fixed to the circuit board by soldering; and a coupling portion extending and bent toward a side of the circuit board to couple the press-fitting portion with the board fixing portion. The circuit board connector also includes a stress absorbing portion provided with a center hole which is provided on a midway of the coupling portion so as to absorb a stress by being deformed. | 2009-10-22 |
20090264020 | Electrical connector with improved contact position structure - An electrical connector ( | 2009-10-22 |
20090264021 | CONNECTION DEVICE - A connection device for connecting a cable having at least one signal conductor to a signal connector. The connection device including a housing, the at least one signal conductor being disposed in the housing, the housing having at least one securing device configured to detachably secure the housing to the signal connector. The connection device further includes a plug disposed on the housing, the plug having a locking mechanism. The housing has a strain relief device configured to provide strain relief for the plug. A deflection device is configured to deflect the at least one signal conductor into a deflected position so that a movement of the at least one housing portion of the housing relative to the plug results in a defined lateral movement of the at least one signal conductor so as to provide a corresponding length compensation. | 2009-10-22 |