42nd week of 2015 patent applcation highlights part 62 |
Patent application number | Title | Published |
20150295542 | ULTRA WIDEBAND DOHERTY AMPLIFIER - A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier. | 2015-10-15 |
20150295543 | LOGARITHMIC AMPLIFIER WITH UNIVERSAL DEMODULATION CAPABILITIES - A logarithmic amplifier (LDA) is described that includes an amplifier configured to oscillate a modulated input signal, a feedback establishing a 180 degree phase shift between the amplifier input and the output and maintaining oscillation of the input signal, a parallel resonant circuit connected to the amplifier output causing the amplifier to resonate at or around a center frequency, and a controller connected to the amplifier input cyclically terminating oscillation of the input signal each time a pre-determined threshold of current is detected, the controller including a low pass filter configured to generate a second output signal having a repetition frequency. The LDA may be used for AM with or without a PLL and/or a superheterodyne. The LDA may be implemented as a mixer and used for phase demodulation. The LDA may be used for phase demodulation. The LDA may be used in place of a low noise amplifier. | 2015-10-15 |
20150295544 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with an overshoot suppress scheme is provided. The amplifier circuit includes an input amplifier, an output amplifier and a diode device. The output amplifier is coupled to the input amplifier and outputs an output voltage. The diode device is coupled between an output end and an input end of the output amplifier. When a voltage difference between the output end and the input end of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced. | 2015-10-15 |
20150295545 | DISTORTION COMPENSATION APPARATUS AND WIRELESS COMMUNICATION EQUIPMENT - A distortion compensation apparatus that compensates for distortion of an amplifier is provided. The distortion compensation apparatus includes: a distortion compensation processing section that performs a predistortion process for a signal provided to the amplifier, based on an amplifier model of the amplifier, and outputs a compensated signal; an estimation section that estimates the amplifier model; and a filter. The estimation section estimates the amplifier model, based on the compensated signal and a monitor signal obtained by monitoring an output of the amplifier. The monitor band of the monitor signal provided to the estimation section is narrower than a frequency band of the compensated signal. The filter is provided so as to eliminate an influence of a signal component outside the monitor band among signal components of the compensated signal, on the estimation of the amplifier model by the estimation section. | 2015-10-15 |
20150295546 | AMPLIFIER BANDWIDTH EXTENSION - According to at least one embodiment described herein an amplifier may include an amplifying circuit having an output. The amplifier may also include a bandwidth extension circuit coupled to the output of the amplifying circuit. The bandwidth extension circuit may include an active device and a resistor. The active device and the resistor may be configured to create an inductance that increases a bandwidth of the amplifier. | 2015-10-15 |
20150295547 | AMPLIFICATION STAGE AND WIDEBAND POWER AMPLIFIER - An amplification stage and a wideband power amplifier are provided. The amplification stage includes a stage input terminal, a stage output terminal, an amplifier, an input compensation network, and in output compensation network. At the stage input terminal is received a signal which is provided via the input compensation network to the amplifier. The input compensation network filters the signal to allow a wideband operation of the amplification stage around an operational frequency. The amplified signal provided by the amplifier is provided via the output compensation network to the stage output terminal. The output compensation network configured to allow a wideband operation of the amplification stage around the operational frequency with a minimal phase shift and distortion of amplitude and phase frequency response. The wideband power amplifier includes a plurality of amplification stage combined with transmission lines or their lumped element equivalents in a specific circuit topology. | 2015-10-15 |
20150295548 | APPARATUS AND METHODS FOR POWER AMPLIFIERS - Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance matching network. The impedance matching network is operatively associated with the power amplifier and is configured to provide a load line impedance to the power amplifier between about 6Ω and about 10Ω. The impedance matching network includes a fundamental matching circuit and one or more termination circuits, and the fundamental matching circuit and each of the of the one or more termination circuits include separate input terminals for coupling to an output of the power amplifier so as to allow the fundamental matching circuit and each of the one or more termination circuits to be separately tuned. | 2015-10-15 |
20150295549 | HIGH-FREQUENCY AMPLIFIER CIRCUIT - A high-frequency amplifier circuit ( | 2015-10-15 |
20150295550 | POWER MANAGEMENT IN TRANSCEIVERS - Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data. | 2015-10-15 |
20150295551 | IMPLICIT FEED-FORWARD COMPENSATED OP-AMP WITH SPLIT PAIRS - Disclosed are systems implementing an implicit Feed-Forward Compensated (FFC) op-amp, where the main FFC port is realized by the P-side of the CMOS input structure of the 2nd and 3rd stages of the op-amp, while the main signal path is through the N-side. According to some embodiments, to balance the relative strengths of the main path and feed-forward paths, the 2nd-stage NMOS input pair is split into two pairs, one is used to route the main path while the other is used for auxiliary FFC. The disclosed implicit FCC op-amp is unconditionally stable with adequate phase lead. According to some embodiments, the disclosed op-amp, which may be a wide-band op-amp, can be used in highly linear applications operative at intermediate frequency (IF), such as signal buffers for high-performance data converters or radio-frequency (RF) modulators and demodulators, continuous-time (CT) filters or sigma-delta data converters. | 2015-10-15 |
20150295552 | Input Amplitude Modulated Outphasing with an Unmatched Combiner - An amplifier system is disclosed, configured to apply a signal component separator algorithm such that the first phase modulated signal and the second phase modulated signal are allowed to take on several continuous amplitude levels in order to achieve a maximum efficiency at each desired output signal power level, without restricting the input signal power fed to the power amplifiers to a constant level, wherein for each desired output signal power level, the digital signal component separator assigns an amplitude and phases of input signals that result in a maximum instantaneous power efficiency at the amplified output signal combined with an unmatched/non-isolating combiner (e.g. Chireix combiner). | 2015-10-15 |
20150295553 | Unitary Electronic Speaker Device For Receiving An Assignment Of A Playlist From A Home Personal Computer And Rendering The Playlist - An unitary electronic speaker device and system for rendering a playlist are provided. An assignment of a playlist identifying a plurality of songs is received from a home personal computer. In one embodiment, the unitary electronic speaker device does not have any storage space other than the memory, and uses the hard disk embodied in the home personal computer to supply the songs. The songs are received and rendered at the unitary electronic speaker device in an order defined by the playlist. Any number of the unitary electronic speaker devices may be connected in a network with the home personal computer. In one embodiment a plurality of unitary electronic speaker devices are connected through a LAN using Ethernet | 2015-10-15 |
20150295554 | SIGNAL CONVERSION WITH GAIN IN THE FORWARD PATH - A system and method of frequency conversion or demodulation can be used in wireless environments. A demodulator or frequency converter can include a forward mixer path including an amplifier, a first mixer, a first input, a second input, and a first output. The forward mixer path can be configured to receive a first radio frequency signal at the first input, receive an oscillator signal at the second input and provide a baseband signal. The first mixer can configured to provide a gain. | 2015-10-15 |
20150295555 | ACTIVE CONNECTOR HAVING LOOP THROUGH FUNCTION - An object of the present invention is to realize a loop through circuit, in an active connector, securely having a preferable mismatching attenuation characteristic and having a preferable signal transmission characteristic, with respect to an input port, an output port, and an internal port, without providing a special circuit outside the connector. A connector base part has the input port inputting an external signal, the output port outputting a loop through signal, and the internal port outputting a signal into a device. First and second matching circuits, an equalizer circuit, a dividing circuit, and a driving circuit are stored in the connector base part. The matching circuit is supplied with an external signal input from the input port. The dividing circuit divides a signal to be input to generate first and second divided signals, and outputs them to the internal port and the output port. The equalizer circuit compensates for a frequency characteristic and/or loss of a signal to be input. The driving circuit is provided between the dividing circuit and the matching circuit, and drives a transmission line to be coupled to the output port. | 2015-10-15 |
20150295556 | TEMPERATURE COMPENSATED BULK ACOUSTIC WAVE RESONATOR WITH A HIGH COUPLING COEFFICIENT - The dominant frequency of a solidly mounted resonator ( | 2015-10-15 |
20150295557 | PIEZOELECTRIC RESONATOR DEVICE - A deviation in mounting a temperature sensor unit is eliminated. In a second cavity | 2015-10-15 |
20150295558 | PIEZOELECTRIC FILM PRODUCING PROCESS, VIBRATOR ELEMENT, VIBRATOR, OSCILLATOR, ELECTRONIC DEVICE, AND MOVING OBJECT - A piezoelectric film producing process includes depositing a piezoelectric body in a mixed atmosphere of N | 2015-10-15 |
20150295559 | MULTIPLEXER USING MULTIPLE TUNED OUTPUT IMPEDANCES FOR REDUCED HARMONIC GENERATION - A multiplexer comprises a plurality of filters connected to a common node and each comprising a plurality of acoustic resonators, and a plurality of harmonic traps each integrated into a corresponding one of the plurality of filters and configured to suppress harmonic generation of another one of the filters. | 2015-10-15 |
20150295560 | RESET SCHEME FOR SCAN CHAINS WITH ASYNCHRONOUS RESET SIGNALS - A first apparatus includes at least one scan chain. Each of the at least one scan chain includes scan cells coupled together. Each scan cell in the at least one scan chain includes a first type of scan cell when a reset state of the scan cell is a first state, and a second type of scan cell when the reset state of the scan cell is a second state. One or more scan chains of the at least one scan chain includes at least one of the first type of scan cell and at least one of the second type of scan cell. A second apparatus includes first and second sets of scan chains including flip-flops without both set and reset functionality. Each of the flip-flops in the first and second sets of scan chains has a reset state of a first state and a second state, respectively. | 2015-10-15 |
20150295561 | VOLTAGE LEVEL SHIFTER MODULE - A voltage level shifter module comprising at least one input arranged to receive an input signal, and at least one cascode transistor arranged to receive at a gate thereof at least one reference voltage signal. The voltage level shifter module further comprises at least one reference voltage control component arranged to detect logical state transitions within the input signal from at least a first logical state to a second logical state, and cause the reference voltage signal applied to the gate of the at least one cascode transistor to be pulled down to a reduced voltage upon detection of a logical state transition within the input signal from at least a first logical state to a second logical state. | 2015-10-15 |
20150295562 | Low Power Wireless Sensor System with Ring Oscillator And Sensors for Use in Monitoring of Physiological Data - Wireless sensor system that integrate sensors, wireless communication module, and user interface units are disclosed. The system can include sensors fabricated for identifying hypoglycemia in the breath of a patient. The system can provide a low-power and small form factor wireless sensor system that integrates multiple sensors (e.g. resistor and capacitor based) and includes an on-chip temperature sensor in an ASIC. The disclosed system collects information from the sensors and wirelessly transmits the processed information to end user interface units, such as smart phones. The systems can be used in healthcare applications, including un-interrupted involuntary continuous monitoring of vital parameters of human body or environment, and other applications, and can be particularly adapted to monitoring hypoglycemia. | 2015-10-15 |
20150295563 | INTERFACE CIRCUIT - An interface circuit comprises a first integrated circuit to transmit or receive data, a second integrated circuit connected to the first integrated circuit by a transmission line to transmit or receive data, and a constant current generating circuit connected to the transmission line so as to output a current of a constant magnitude to the transmission line. The constant current generating circuit adjusts the amount of current outputted to the transmission line by sensing a voltage level of the transmission line. | 2015-10-15 |
20150295564 | DUAL-COMPLEMENTARY INTEGRATING DUTY CYCLE DETECTOR WITH DEAD BAND NOISE REJECTION - A method for correcting the duty cycle of a clock signal uses two-dual-slope integrators with two comparators; each comparator is connected to both integrators and configured to include a “dead band” when the input pulse duty cycle is at or near 50%. One comparator detects when duty cycle is high and the other comparator detects when the duty cycle is low. When the duty cycle is within the “dead band” range, neither comparator goes valid. This provides an analog filter where the output comparators will not instantaneously switch between opposite duty cycle correction states. When the duty cycle is greater or less than 50%, the integrated voltages on the two integrators move in opposite directions producing twice the signal magnitude on differential inputs of the comparators, as compared with using a single integrator architecture. | 2015-10-15 |
20150295565 | PULSE GENERATION CIRCUIT, SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE - A pulse generation circuit is configured with a plurality of transistors of a single conductivity type. The pulse generation circuit includes: an output unit including a current limiting element configured to supply, by a predetermined current, a first voltage from a first power supply line supplied with the first voltage to an output terminal, the output unit being configured to perform a bootstrap operation that outputs the first voltage to the output terminal in response to a received input signal; and an output control unit configured to initiate the bootstrap operation when the output terminal transitions to the first voltage, and after the output terminal transitions to the first voltage, terminate the bootstrap operation and perform control so as to output the first voltage from the current limiting element to the output terminal. | 2015-10-15 |
20150295566 | METHOD AND APPARATUS FOR CANCELLATION OF SPURIOUS SIGNALS - Systems and methods for generating a spurious signal cancellation signal, the system comprising two direct digital synthesizers (DDS). The first DDS provides phase tracking to correct for rounding errors. The second DDS outputs a frequency that is exactly equal to N/M*CLK, where N and M are values selected to set the output frequency equal to the frequency of a spurious signal to be cancelled, and CLK is a clock frequency used to clock the first and second DDS circuits. | 2015-10-15 |
20150295567 | PULSE DELAY CIRCUIT - A pulse delay circuit includes a pull down element, a first pull up element, a first delay unit, a second delay unit, a second pull up element, and an inverted buffer. The pull down element is connected to an input pulse signal, a node b and a first voltage. The first pull up element is connected to a node c, a second voltage and the node b. The first delay unit has a reset terminal. The first delay unit is connected to the node b and the node c. The second delay unit is connected to the node c and the node d. The second pull up element is connected to the node d, the second voltage and the node c. The inverted buffer is connected to the node c and the reset terminal. Moreover, a delayed pulse signal is outputted from the inverted buffer. | 2015-10-15 |
20150295568 | LATCH CIRCUIT AND DISPLAY DEVICE - A latch circuit which can control a drain avalanche effect and improve reliability is provided. The latch circuit includes an input transistor importing a voltage corresponding to “0” or “1” when the scanning voltage is input to a gate, a storage capacitance storing a voltage imported by the input transistor, and having a first electrode and a second electrode, the first electrode is input with a capacitance control signal and the second electrode is connected to a second electrode of the input transistor, a first conduction type first transistor having a gate connected to the second electrode of the input transistor, a second electrode connected to a first output terminal, and a first electrode input with a first latch control signal, and a second conduction type second transistor having a gate connected to the second electrode of the first transistor, a second electrode connected to a second output terminal, and a first electrode input with a second latch control signal. | 2015-10-15 |
20150295569 | BINARY FREQUENCY SHIFT KEYING WITH DATA MODULATED IN DIGITAL DOMAIN AND CARRIER GENERATED FROM INTERMEDIATE FREQUENCY - Binary frequency shift keying modulation is implemented by choosing appropriate phases of a high frequency clock to generate a modulated intermediate clock frequency. The high frequency clock is chosen to be (M+0.5)*fc, where fc is the carrier frequency and M is an integer. Depending on the binary data ‘1’ or ‘0’ to be transmitted, ‘M’ or ‘M+1’ clock phases from the high frequency clock are converted to an intermediate clock that is 2*N times faster than the carrier frequency, where N is an integer. This intermediate clock, generated entirely in the digital domain, has the required data modulation in it, and is used to generate N pulse width modulated (PWM) phases of waveforms operating at the carrier frequency. The N phases are then weighed appropriately to synthesize a sine waveform whose lower harmonics are substantially suppressed. | 2015-10-15 |
20150295570 | HOLDING CIRCUIT, DRIVING METHOD OF THE HOLDING CIRCUIT, AND SEMICONDUCTOR DEVICE INCLUDING THE HOLDING CIRCUIT - A holding circuit includes first to third input terminals, an output terminal, first to third switches, a capacitor, and a node. The first to third switches control conduction between the node and the first input terminal, conduction between the node and the output terminal, and conduction between the second input terminal and the output terminal, respectively. First and second terminals of the capacitor are electrically connected to the node and the third input terminal, respectively. The first to third switches are each a transistor comprising an oxide semiconductor layer comprising a semiconductor region. Owing to the structure, a potential change of the node in an electrically floating state can be suppressed; thus, the holding circuit can retain its state for a long time. The holding circuit can be used as a memory circuit for backup of a sequential circuit, for example. | 2015-10-15 |
20150295571 | Radiation-Hardened Dual Gate Semiconductor Transistor Devices Containing Various Improved Structures Including MOSFET Gate and JFET Gate Structures and Related Methods - Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using structures configured to cooperatively control a common semi-conductive channel region (SCR). One embodiment includes providing a metal oxide semiconductor field effect transistor (MOSFET) section formed with an exemplary SCR and two junction field effect transistor (JFET) gates on opposing sides of the MOSFET's SCR such that operation of the JFET modulates or controls current through the MOSFET's. With two JFET gate terminals to modulate various embodiments' signal(s), an improved mixer, demodulator, and gain control element in, e.g., analog circuits can be realized. Additionally, a direct current (DC)-biased terminal of one embodiment decreases cross-talk with other devices. A lens structure can also be incorporated into MOSFET structures to further adjust operation of the MOSFET. An embodiment can also include a current leakage mitigation structure configured to reduce or eliminate current leakage between MOSFET and JFET structures. | 2015-10-15 |
20150295572 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided. | 2015-10-15 |
20150295573 | FIELD-EFFECT TRANSISTOR - This FET includes: a source electrode pad, which is formed on a source electrode and which is electrically connected to the source electrode; and/or a drain electrode pad, which is formed on the drain electrode and which is electrically connected to the drain electrode. The source electrode pad has a cutout for reducing a parasitic capacitance between the source electrode pad and the drain electrode, and the drain electrode pad has a cutout for reducing a parasitic capacitance between the drain electrode pad and the source electrode. | 2015-10-15 |
20150295574 | SIGNAL RECEPTION CIRCUIT AND ISOLATED SIGNAL TRANSMISSION DEVICE - A signal reception circuit according to an aspect of the present disclosure includes: an input terminal; an input reference terminal; an output terminal; an output reference terminal; a normally-on type transistor that includes a first terminal connected to the output terminal, a second terminal connected to the output reference terminal, and a control terminal; a first detector circuit that detects an input signal applied between the input terminal and the input reference terminal, to apply an output signal between the output terminal and the output reference terminal; and a second detector circuit that detects the input signal, to apply a negative voltage pulse to the control terminal of the transistor with the output reference terminal as a reference. | 2015-10-15 |
20150295575 | GATE DRIVING CIRCUIT AND GATE DRIVING METHOD - The present invention provides a gate driving circuit and a method thereof. The gate driving circuit comprises: a gate driving module ( | 2015-10-15 |
20150295576 | HOUSEHOLD APPLIANCE COMPRISING A TOUCH BUTTON - The present invention relates to a household appliance ( | 2015-10-15 |
20150295577 | Semiconductor Device - A programmable analog device and an analog device that can retain data even when supply of a power supply potential is interrupted and consumes less power. In a semiconductor device, first to fourth transistors are used as switches in a unit cell including an analog element, and the output of the unit cell switches between a conducting state, a non-conducting state, and a conducting state through the analog element by controlling the potential of a first node where the first transistor and the second transistor are connected and the potential of a second node where the third transistor and the fourth transistor are connected. | 2015-10-15 |
20150295578 | METHOD FOR THE RADIATION HARDENING OF AN ELECTRONIC CIRCUIT BY PARTITIONING - The method relates to a method for the radiation hardening of an electronic circuit by partitioning, said circuit including an odd number K of parallel branches connected to a same primary input I and each including a same series of N modules and N−1 nodes linking two consecutive modules, the K branches together forming a series of N−1 gates respectively consisting of parallel K nodes, and a primary arbiter forming a majority vote from the output signal of the K branches, the method being characterized in that it includes the following steps which are repeated for each one of the gates: determining a reliability of a subcircuit upstream from the gate consisting of the portions of the K branches located between the primary input and the gate, and the insertion of at least one arbiter at the gate forming a majority vote from the output signals of said portions of branches constituting the scanned subcircuit and outputting at least one majority signal to the respective inputs of an additional subcircuit formed by the branch portions downstream from the gate, if the reliability of the scanned subcircuit is less than a reliability set point. | 2015-10-15 |
20150295579 | System Reset Controller Replacing Individual Asynchronous Resets - An integrated circuit device comprises a system reset controller. The system reset controller includes a clock signal input, a reset signal input, a clock signal output, and a reset signal output. The system reset controller is arranged to receive distributed clock and reset signal inputs and output modified clock and reset signal outputs such that asynchronous reset inputs in downstream system components can be replaced by logic elements not requiring asynchronous reset inputs with no change in externally-visible behavior except the length of reset sequences as measured by clock pulses. | 2015-10-15 |
20150295580 | OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT - A temperature-compensated piezoelectric oscillator as an oscillator includes a piezoelectric resonator incorporating a resonator element, an electronic component (IC) as a circuit element having a function of driving the resonator element and a thermosensor, and a wiring board provided with a conductor film, and the piezoelectric resonator element and the electronic component (IC) are disposed side by side in an area where the conductor film is disposed. | 2015-10-15 |
20150295581 | Distributed Cooperative Control for Microgrid Resynchronization and Reconnection - Systems and methods are disclosed for distributed cooperative control strategy between a microgrid and a main grid by providing distributed synchronization and reconnection of the distributed generators with sparse communication channels, wherein each distributed generator only receives information from neighboring generators; receiving a voltage phase angle difference and a voltage magnitude difference by a proportional integration (PI) controller to adjust the output of the distributed generator at a leader node, wherein each distributed generator shares an output frequency and a voltage with neighbors; achieving a consensus behavior between all the distributed generators; sharing power generation among the distributed generators; and synchronizing the microgrid with the main grid for a seamless reconnection after islanding. | 2015-10-15 |
20150295582 | CLOCK GENERATION CIRCUIT WITH DUAL PHASE-LOCKED LOOPS - Embodiments provide a clock generation circuit with a first phase-locked loop (PLL) and a second PLL that are coupled in parallel with one another and receive a same feedback signal. The first and second PLLs generate respective output signals that are combined to generate an output clock signal. A version of the output clock signal may be passed back to the first and second PLLs as the feedback signal. In some embodiments, the second PLL may include a switch to selectively close the second PLL after the first PLL has locked. In some embodiments, the second PLL may include a bulk acoustic wave (BAW) voltage-controlled oscillator (VCO) and the first PLL may include a different type of VCO. | 2015-10-15 |
20150295583 | LOCKING MULTIPLE VOLTAGE-CONTROLLED OSCILLATORS WITH A SINGLE PHASE-LOCKED LOOP - Locking multiple VCOs to generate a plurality of LO frequencies, including: receiving a plurality of divided VCO feedback signals from a plurality of VCOs; receiving a reference signal multiplied by a predetermined number of the plurality of VCOs; generating and processing the predetermined number of phase differences between the multiplied reference signal and the plurality of divided VCO feedback signals in a single PLL circuit including a digital loop filter to receive and process the phase differences and generate (produce) a filter output, wherein the digital loop filter includes a plurality of delay cells equal to the predetermined number; and generating and outputting (delayed) control voltages for the plurality of VCOs based on the filter output. | 2015-10-15 |
20150295584 | SWITCHABLE SECONDARY PLAYBACK PATH - In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths including a first processing path and a second processing path, a digital-to-analog stage output, and a controller. The first processing path may include a first digital-to-analog converter for converting the digital input signal into a first intermediate analog signal, the first digital-to-analog converter configured to operate in a high-power state and a low-power state. The second processing path may include a second digital-to-analog converter for converting a digital input signal into a second intermediate analog signal. The digital-to-analog stage output may be configured to generate an analog signal comprising a sum of the first intermediate analog signal and the second intermediate analog signal. The controller may be configured to operate the first digital-to-analog converter in the lower-power state when a magnitude of the digital input signal is below a threshold magnitude. | 2015-10-15 |
20150295585 | DECODER LEVEL SHIFTER DEVICE AND DIGITAL TO ANALOG CONVERTER USING THE SAME - A decoder level shifter device includes a first decoder level shifter and a second decoder level shifter. The first decoder level shifter has first to fourth input terminals, first and second output terminals, first and second enable terminals, first and second reset terminals. The first to fourth input terminals receive first to second input signals and their complementary signals, respectively. The second decoder level shifter has fifth to eighth input terminals, third to fourth output terminals, and third and fourth enable terminals. The fifth to eighth input terminals receive the first and second input signals and their complementary signals, respectively. The first, second, third, and fourth enable terminals are connected to the fourth, third, second, and first output terminals, respectively. | 2015-10-15 |
20150295586 | ANALOG-DIGITAL CONVERTER - An analog-digital converter with successive approximation includes a capacitor array for being loaded by applying a given input signal potential and for providing a sampling potential, wherein capacitors of the capacitor array are serially coupled with switches. A decision latch is included for evaluating the sampling potential in a number of consecutive decision steps. The analog-digital converter also includes a logic unit for selectively changing the sampling potential by selectively switching switches associated to the capacitors of the capacitor array for each decision step based on an evaluation result of a previous decision step, wherein the switches are respectively coupled with a calibration switch. | 2015-10-15 |
20150295587 | CAPACITANCE-TO-DIGITAL CONVERTER AND METHOD FOR PROVIDING A DIGITAL OUTPUT SIGNAL - A capacitance-to-digital converter ( | 2015-10-15 |
20150295588 | SUPPRESSING DIELECTRIC ABSORPTION EFFECTS IN SAMPLE-AND-HOLD SYSTEMS - Sample-and-hold (S/H) circuitry operating in track and hold phases and having a first S/H circuit with a first hold capacitor at which a first voltage value is maintained in the hold phase, and a dielectric absorption (DA)-suppressing circuit connectable to the first hold capacitor for operating the S/H circuitry in an additional phase after completing the hold phase and before entering the track phase. The DA-suppressing circuit is configured to supply the first hold capacitor, during an operation in the additional phase, with a second voltage value that is negatively correlated with the first voltage value. | 2015-10-15 |
20150295589 | CONVERTING TIME-ENCODED SIGNAL INTO ANALOG OUTPUT - A converter may generate an analog output that is representative of a time-encoded signal. The circuit may include an input port receiving the time-encoded signal; a time-encoded to digital converter coupled to the input port; and a digital-to-analog converter coupled to the time-encoded to digital converter. | 2015-10-15 |
20150295590 | Method and Decoder for Reconstructing a Source Signal - In a method for reconstructing a source signal, which is encoded by a set of at least two descriptions, the method comprises: receiving a subset of the set of descriptions; reconstructing a reconstructed signal at an operating bitrate of a set of operating bitrates upon the basis of the subset of descriptions, the reconstructed signal having a second probability density, wherein the second probability density comprises a first statistical moment and a second statistical moment; and manipulating the reconstructed signal, wherein the reconstructed signal is manipulated such that, irrespective of the operating bitrate, a predetermined minimum similarity between a first statistical moment of a third probability density and a first statistical moment of a first probability density and between a second statistical moment of the third probability density and a second statistical moment of the first probability density is maintained. | 2015-10-15 |
20150295591 | INCREASING SPEED OF DATA COMPRESSION - A computer implemented method of performing data compression includes applying, with a computing device, a hash function to a selected part of a character string to calculate a hash value; searching, using the hash value, through entries in a bucket chain having the hash value previously registered in a hash table, and finding a longest matching character string; acquiring, an index indicating that a longest matching character string cannot be found in the search through the entries and thus the search operation is wasted; and switching the hash function to a different hash function for expanding the selected part of the character string, without reconstructing the hash table, when the index exceeds a predetermined threshold. | 2015-10-15 |
20150295592 | DECODING METHOD, APPARATUS, AND ALGORITHM FOR NONBINARY LDPC CODES - Provided is a method for decoding a non-binary (NB) low density parity check (LDPC) code at a user equipment (UE) that implements at least one variable nodes that receive a received signal of a wireless channel and deliver an input message to a check node and the check node that checks the input message and outputs an output message. The method includes receiving at least one input messages, generating a temporary vector by using the at least one input messages, searching for an element having a dominant value by checking the temporary vector, generating a configuration set, which is a check target, by using the element having the dominant value, and generating the output message by performing comparison with respect to the generated configuration set. | 2015-10-15 |
20150295593 | APPARATUS AND METHOD FOR ENCODING AND DECODING DATA IN TWISTED POLAR CODE - The disclosure relates to noiseless coding and, in particular, to the use of twisted polar code in data encoding and decoding. The disclosure increases the speed of encoding and/or decoding through the reduction in the number of iterations to be performed. The object is attained in method for encoding data, comprising the steps of: pre-coding, by a pre-coding module, data presented in the form of k-dimensional binary vector x, the pre-coding consists in computing u | 2015-10-15 |
20150295594 | Multiple Input and Multiple Output Switch Network - According to an embodiment, a circuit package includes a programmable switch component having a plurality of input terminals arranged on the programmable switch component, a plurality of output terminals arranged on the programmable switch component and configured to be coupled to a plurality of amplifiers, and a plurality of switches. Each switch of the plurality of switches is coupled between an input terminal of the plurality of input terminals and an output terminal of the plurality of output terminals. Each switch of the plurality of switches includes a radio frequency (RF) switch and is configured to pass an RF signal when closed. Each input terminal of the plurality of input terminals is coupled to two switches of the plurality of switches. | 2015-10-15 |
20150295595 | SWITCH MODULE - Impedance mismatching by a matching circuit provided on a signal line which connects a first common terminal and a second common terminal is eliminated so as to significantly reduce insertion loss of a switch module. Therefore, it is possible to provide a switch module which has a simple configuration without the need for connection of a matching circuit to antenna terminals to which antennas are respectively connected, and is able to selectively connect any one of the antennas and any one of communication systems. | 2015-10-15 |
20150295596 | CIRCUITS AND METHODS RELATED TO RADIO-FREQUENCY RECEIVERS HAVING CARRIER AGGREGATION - Circuits and methods related to radio-frequency (RF) receivers having carrier aggregation. In some embodiments, a carrier aggregation (CA) circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The CA circuit can further include a first path implemented between the first filter and a common node, with the first path being configured to provide a substantially matched impedance for the first frequency band and a substantially open-circuit impedance for the second frequency band. The CA circuit can further include a second path implemented between the second filter and the common node, with the second path being configured to provide a substantially matched impedance for the second frequency band and a substantially open-circuit impedance for the first frequency band. | 2015-10-15 |
20150295597 | ARCHITECTURES AND METHODS RELATED TO IMPROVED ISOLATION FOR DIPLEXER PATHS - Architectures and methods related to improved isolation for diplexer paths. In some embodiments, an architecture for routing radio-frequency (RF) signals can include an input node and an output node, and a distributed network of signal paths implemented between the input node and the output node. The distributed network of signal paths can include a first path having N switches including a selected switch, with the quantity N being an integer greater than 2. The first path can be capable of routing a first RF signal between the input node and the output node when enabled. The distributed network of signal paths can further include a second path capable of routing a second RF signal between the input node and the output node, with the second path including the selected switch. The second path can include a plurality of open switches when disabled and the first path is enabled. | 2015-10-15 |
20150295598 | Distance to VSWR Fault Measurement - The present invention addresses apparatuses, methods and computer program product for providing improved distance to fault measurement for voltage standing wave ratio (VSWR) on antenna line in networks. An embodiment of he present invention comprises the steps of transmitting a signal to a line to be tested, capturing a forward signal of the signal, capturing a reverse signal of the signal, separating the reflection of the signal in time domain via cross correlation of the forward signal and the reverse signal, and detecting a distance to fault in the line by searching and processing maximum peak position of the captured and separated signals. | 2015-10-15 |
20150295599 | ELECTROMAGNETIC RESONANCE COUPLER AND TRANSMISSION APPARATUS - An electromagnetic resonance coupler according to one aspect of the present disclosure includes a first layer, a second layer which faces a first principal surface of the first layer, a third layer which faces a second principal surface of the first layer, a first resonator which is located between the first layer and the second layer, and a second resonator which is located between the first layer and the third layer. A dielectric constant of the first layer is lower than either one of a dielectric constant of the second layer and a dielectric constant of the third layer. A dielectric dissipation factor of the first layer is higher than either one of a dielectric dissipation factor of the second layer and a dielectric dissipation factor of the third layer. | 2015-10-15 |
20150295600 | MOBILE WIRELESS COMMUNICATIONS DEVICE PROVIDING ENHANCED INTERFERENCE MITIGATION FROM WIRELINE TRANSMITTER AND RELATED METHODS - A mobile wireless communications device may include a housing, a wireless receiver carried by the housing and configured to receive communication signals over a wireless frequency range, a wireline transmitter carried by the housing and configured to transmit communication signals at a frequency overlapping the wireless frequency range, and a controller carried by the housing and coupled with the wireless receiver and the wireline transmitter. The controller may be configured to determine when the wireless receiver is to begin receiving and, based thereon, switch the wireline transmitter to a suspended communication mode during which transmission is disabled. The controller may also be configured to determine when the wireless receiver has completed receiving and, based thereon, switch the wireline transmitter to a normal communication mode in which transmission is enabled. | 2015-10-15 |
20150295601 | System and Method for Frequency Reuse for Wireless Point-To-Point Backhaul - A system and method for frequency reuse for wireless point-to-point backhaul. Frequency reuse is enabled through the cancellation of interfering signals generated by interference sources. In one embodiment, a conventional dish antenna is complemented with one or more additional auxiliary antennas (e.g., isotropic). The one or more additional auxiliary antennas enable cancellation of interfering signals whose direction of arrival (DOA) is off the dish antenna's bore-sight. | 2015-10-15 |
20150295602 | COMMUNICATION APPARATUSES - A communication apparatus includes a first communication module, a second communication module, an antenna module and a filtering module. The first communication module transmits and receives a first RF signal on a first channel. The second communication module transmits and receives a second RF signal on a second channel. The antenna module includes multiple antennas for transmitting and receiving the first and second RF signals. The filtering module is coupled between the first and second communication modules and the antenna module. The filtering module filters the first RF signal according to a first frequency response, and it filters the second RF signal according to a second frequency response to ensure the first RF signal and the second RF signal do not interfere with each other. | 2015-10-15 |
20150295603 | RECEIVER APPARATUS WITH BLOCKER DETECTION PATH PARALLEL WITH RECEIVER PATH AND ASSOCIATED BLOCKER DETECTION METHOD - A receiver apparatus includes a receiver path and a blocker detection path. The receiver path includes a down-converting stage. The blocker detection path includes a sensing circuit and a blocker detection circuit. The sensing circuit is arranged to sense a received radio frequency signal which has not yet been processed by the down-converting stage and generate a sensed signal accordingly. The blocker detection circuit is arranged to detect existence of a blocker signal according to the sensed signal and generate a blocker detection result indicative of the existence of the blocker signal when receiving the sensed signal. | 2015-10-15 |
20150295604 | VERY LOW INTERMEDIATE FREQUENCY (VLIF) RECEIVER AND A METHOD OF CONTROLLING A VLIF RECEIVER - A very low intermediate frequency (VLIF) receiver and a method of controlling a VLIF receiver. The method comprises estimating energy levels in first and second signals and detecting interference from a first adjacent channel interferer based upon a difference in energy in the first and second signals. The first signal comprising a first on-channel portion and an adjacent channel portion and the second signal comprises an intermediate frequency translation of the first on-channel portion. The energy levels are estimated for corresponding time instances and the adjacent channel interferer is of the adjacent channel portion. The VLIF receiver is then controlled based upon the detected interference. | 2015-10-15 |
20150295605 | METHOD OF COMPENSATING FOR SIGNAL DEGRADATION IN TRANSMISSION SYSTEMS - A method for compensating for transmission channel distortion effects for a data signal transmitted from a first computing device via the transmission channel to a second computing device is provided. The method includes combining the data signal with a reference marker, the reference marker including predetermined signal parameters, to create a composite data signal, transmitting the composite data signal from the first computing device to the second computing device, extracting the reference marker and the data signal from the received composite data signal received at the second computing device, analysing the signal parameters of the extracted reference marker, comparing the analysed signal parameters of the extracted reference marker with the predetermined signal parameters of the reference marker in order to determine transmission channel distortions, and adjusting the extracted data signal based on the determined transmission channel distortions in order to compensate for transmission channel distortion effects. | 2015-10-15 |
20150295606 | Method and system for filtering out adjacent frequency band interference - Provided are a method and a system for filtering out adjacent frequency band interference. The method includes that an RF MEMS switch control module receives a first transmitted coupling signal from a first frequency band RF module and a second received coupling signal from a second frequency band RF module; the RF MEMS switch control module determines whether interference exists between a first frequency band and a second frequency band according to the first transmitted coupling signal and the second received coupling signal; if interference exists, the RF MEMS switch control module filters out the interference by instructing a first frequency band RF MEMS radio frequency reconfigurable antenna working in the first frequency band to change a first antenna structure and/or by instructing a second frequency band RF MEMS radio frequency reconfigurable antenna working in the second frequency band to change a second antenna structure. By means of the disclosure, adjacent frequency bands can co-exist on hardware and mutual interference is effectively avoided. | 2015-10-15 |
20150295607 | Intermediate-Frequency Analogue-to-Digital Conversion Device - Provided is an intermediate-frequency analogue-to-digital conversion device, including: a gain attenuation module, a gain amplification module, a filter and an analogue-to-digital conversion module. The gain attenuation module is configured to perform attenuation processing on a received intermediate-frequency signal. The gain amplification module is connected to the gain attenuation module, and configured to perform amplification processing on a signal that is output from the gain attenuation module. The filter is a variable filter, connected to the gain amplification module, and configured to perform filter processing on a signal that is amplified by a gain amplifier. The analogue-to-digital conversion module is connected to the filter, and configured to convert a signal that is filtered by the filter into a digital signal. The technical solution solves the technical problem in the related art and achieves the technical effect of improving the universality of the intermediate-frequency analogue-to-digital conversion device. | 2015-10-15 |
20150295608 | CONTACTLESS COMMUNICATION DEVICE WITH RECEIVER INPUT VOLTAGE STABILIZATION - There is described a contactless communication device. The device comprises (a) a receiver unit ( | 2015-10-15 |
20150295609 | WIRELESS RECEIVER AND METHOD FOR WIRELESS RECEPTION - A wireless receiver includes a radio frequency (RF) receiving unit and a baseband receiving unit. A first path of the RF receiving includes a first filter, and is arranged for receiving an input RF signal and generating a first baseband input signal; a second path is arranged for receiving the input RF signal and generating a second baseband input signal. The baseband receiving unit is arranged for receiving the first baseband input signal and the second baseband input signal to generate a baseband decoded signal. One of the first path and the second path is an in-phase path, and the other is a quadrature-phase path. When the RF receiving unit operates in a first mode, the RF receiving unit only uses the first path to receive the input RF signal. | 2015-10-15 |
20150295610 | Glasses-Type Communications Apparatus, System, and Method - A glasses-type communications apparatus is provided that includes a frame; a display module set on the frame configured to receive data information and generate a corresponding visual picture according to the data information for the user to watch; a camera module set on the frame configured to obtain image information and transfer the image information; and a communications module set on the frame configured to set up a communications channel with an external processing apparatus by using a communications protocol, where the communications module receives data transmitted by the external processing apparatus through the communications channel, so as to parse the data to obtain the data information, and send the data information to the display module; where the communications module is further configured to receive the image information output by the camera module, and transfer the image information to the external processing apparatus by using the communications channel. | 2015-10-15 |
20150295611 | CONCURRENT TRANSMIT AND RECEIVE - The disclosure is directed to a circuit arrangement and method that provide efficient concurrent transmit and receive, transmit only and receive only of wireless signals. In one implementation, a circuit arrangement is provided that incorporates uses a single antenna to achieve concurrent transmit and receive, transmit only and receive only of wireless signals. A dual amplifier structure may be provided, and at least one of the amplifiers associated with the dual amplifier structure is amplitude tunable in order to ensure that each amplifier of the dual amplifier structure provides substantially the same or the same signal amplification. Unwanted transmit signals detected by a receiving circuit arrangement may be used to cause a processor to generate a digital code word that is used to modify a signal amplification provided by at least one of the amplifiers associated with the dual amplifier structure. | 2015-10-15 |
20150295612 | Mobile Device Radiation Reduction Shield - This invention is intended to provide a means to reduce the radiation emitted by Mobile Devices when used by people to make calls or left on when carried by people close their bodies. This is because the mobile device radiation has been shown to cause some cellular changes that are believed to cause cancer in the long run. The purpose of inventing this shield is to provide some limited level of reduction of this radiation for constant users of mobile devices in the hopes of reducing serious cellular damage in the short term from using these devices. While there is a way to completely block all radio/microwave radiation emitted by mobile devices, that complete block would also render the mobile device unable to make calls or connect to services, so the intent of this shield is to reduce exposure while still allowing people to make or receive necessary calls. | 2015-10-15 |
20150295613 | METHOD AND ELECTRONIC DEVICE FOR CONTROLLING RADIATION POWER - A radiation power controlling method includes: detecting a user input for setting a radiation power; determining a radiation environment of an antenna on the basis of at least the detected user input; and setting the radiation power of the antenna according to the determined radiation environment. | 2015-10-15 |
20150295614 | MOBILE TERMINAL DEVICE - A mobile terminal device ( | 2015-10-15 |
20150295615 | CASE FOR AN ELECTRONIC DEVICE AND MANUFACTURING METHODS FORMAKING A CASE - An accessory unit includes a front flap and a rear cover. The rear cover includes a recessed portion that defines a chamber and a lip that extends about an opening of the chamber. The chamber is configured to receive a consumer electronic device, and the lip is configured to hold the consumer electronic device therein. The rear cover can include a shell formed from glass fiber reinforced plastics and a lip formed from a thermoplastic. The front flap may include segments formed from panels with folding regions therebetween, which allow the front flap to fold. Further, an end region of the front flap hingedly couples the front flap to the rear cover, such that the front flap may be moved between open and closed configurations. Methods of manufacturing the accessory unit are also disclosed. | 2015-10-15 |
20150295616 | Computer Apparatus for use by Senior Citizens - An apparatus for enclosing a tablet computer and for simplifying operation of the computer by senior citizens is described. The enclosure receives and supports a conventional table computer but purposefully occludes or blocks access to selected user-activated controls on the tablet such as the on-off switch, and control zone regions of the touch screen regions of the display. The enclosure is supported in a stand and includes speakers to amplify sound played through the tablet, and rechargeable batteries. | 2015-10-15 |
20150295617 | WATERPROOF CASE - A protective case for an electronic device may include a housing, a case cover and a gasket positioned between the housing and the case cover. The housing may include a case member, having a plurality of housing snap attachment structures formed therein. The case cover may likewise include case cover snap attachment structures formed thereon that couple with the housing snap fit structures. The gasket is positioned between planar surfaces of the case member and case cover so that it is axially compressed between the case member and the case cover to provide a water and air tight seal, with the compression of the gasket being maintained by the connection of the housing snap attachment structures and the case cover snap attachment structures. | 2015-10-15 |
20150295618 | PROTECTIVE CASE FOR ELECTRONIC DEVICE - A protective case for an electronic device includes a protective shell and a flexible portion. The protective shell has an inner surface, an outer surface, and side members that define a perimeter of the protective shell. The side members at least partially cover respective sides of the electronic device when the electronic device is in the protective shell. The protective shell also has cutouts extending from the inner surface to the outer surface. The flexible portion is disposed on the inner surface of the protective shell and extends through cutouts of the protective shell to at least the outer surface of the protective shell. | 2015-10-15 |
20150295619 | METHOD AND APPARATUS FOR SPECTRUM SPREADING OF A PULSE-DENSITY MODULATED WAVEFORM - A spreading method and apparatus for spreading the spectral density of a pulse stream by summing a set of randomly selected zero-sum sequences to an incoming pulse stream and ensuring that the number of pulses output by the spreading method and apparatus is equal to the number of pulses input to the spreading method and apparatus. | 2015-10-15 |
20150295620 | METHOD FOR DETERMINING THE ARRIVAL TIME OF A UWB PULSE AND CORRESPONDING RECEIVER - A method for determining arrival time of a UWB pulse at a receiver. When a pulse is modulated at an RF frequency, the receiver includes a quadrature demodulator, a first correlating stage for correlating the in-phase signal with the first and second signals of an orthogonal base on a time window and a second correlating stage for correlating the quadrature signal with the first and second signals of the orthogonal base on the same window, a phase estimator estimating the phase of the signal received in the orthogonal base from the correlation results of the first and/or second correlating stage(s), and a computing device determining the arrival time from the phase thus estimated. | 2015-10-15 |
20150295621 | Method and Device for Line Initialization - The present invention provides a method and a device for line initialization. In the method, first, a first precoding matrix needed by a first part of subcarriers is acquired in a downstream direction, and then multiple data signals of all data signals that need to be sent in an initialization process are sent by using only the first part of subcarriers; afterward, a second precoding matrix needed by at least a second part of subcarriers of all available subcarriers is acquired, and remaining data signals of all the data signals exclusive of the multiple data signals are sent by using the at least second part of subcarriers to complete line initialization. By using the foregoing manner, the present invention can cancel crosstalk between lines while completing line initialization, and does not easily cause transmit power to exceed a limit. | 2015-10-15 |
20150295622 | WIRELESS COMMUNICATION DEVICE AND METHOD OF OPERATING THE SAME - A calibrator to process an output signal of an analog digital converter in a wireless communication device, the calibrator comprising a level filter to remove noise from the output signal of the analog digital converter using mask information regulating a signal level; a timing filter to remove pulses from the level-filtered signal that are beyond a reference duty ratio by using timing information; a pattern filter to remove pulses from the timing-filtered signal that are judged to not comprise a reference number of consecutive pulses by using pattern information; and a duty correction circuit to correct a duty of the pattern-filtered signal to improve performance of the wireless communication device by separately performing a filtering operation on noise and a damping component included in a normal signal. | 2015-10-15 |
20150295623 | HANDHELD DEVICE HAVING MULTIPLE NFC READING DIRECTIONS - A handheld device includes at least two NFC antennas provided with different RF transmission directions. The at least two NFC antennas are separated from each other and share one communication unit. In light of this, the handheld device exchange data with an external NFC device through the at least two NFC antennas to have more effective inductive coupling directions. | 2015-10-15 |
20150295624 | BASE STATION, WIRELESS COMMUNICATION TERMINAL, WIRELESS COMMUNICATION SYSTEM AND WIRELESS COMMUNICATION METHOD - Disclosed are a base station, a wireless communication terminal, a wireless communication system, and a wireless communication method. The base station can be used in coordinated multi-point transmission and comprises: a channel quality obtaining unit for obtaining uplink channel quality between a user equipment and a coordinated base station; a channel quality determination unit for comparing the obtained uplink channel quality with a quality threshold to determine whether the uplink channel quality is good or bad; a feedback control unit for determining, according to a determination result, whether to allow the user equipment to feed back channel state information to the corresponding coordinated base station; and a sending unit for sending information, about how to feed back the channel status information, to the user equipment. When the determination result is that the uplink channel quality is better than channel quality represented by the quality threshold, the feedback control unit determines to allow the user equipment to feed back the channel status information to the corresponding coordinated base station; when the determination result is that the uplink channel quality is poorer than the channel quality represented by the quality threshold, the feedback control unit determines not to allow the user equipment to feed back the channel status information to the corresponding coordinated base station. | 2015-10-15 |
20150295625 | SIGNAL GENERATION METHOD, TRANSMISSION DEVICE, RECEPTION METHOD, AND RECEPTION DEVICE - A signal generation method is used in a transmission device that transmits a plurality of transmission signals from a plurality of antennas at the same frequency and at the same time, in the case where larger power change is performed on a first transmission signal than on a second transmission signal during generation process of the first transmission signal and the second transmission signal, the first transmission signal and the second transmission signal are mapped before the power change such that a minimum Euclidian distance between possible signal points for the first signal is longer than a minimum Euclidian distance between possible signal points for the second signal. | 2015-10-15 |
20150295626 | SYSTEM AND METHOD FOR INTELLIGENT RI/PMI SELECTION - An apparatus in a user equipment node (UE) is configured to perform a method for channel feedback. The method includes determining, based on a common reference signal received from a base station and one or more channel conditions, a plurality of values for a receiver table. The method also includes determining a plurality of values for a decision table based on corresponding values in the receiver table and a predetermined interference table. The method further includes selecting a value from the decision table. In addition, the method includes transmitting, to the base station, at least one of a rank indicator (RI) value and a precoding matrix indicator (PMI) value associated with the selected value in the decision table. | 2015-10-15 |
20150295627 | EFFICIENT RANK AND PRECODING MATRIX FEEDBACK FOR MIMO SYSTEMS - The present disclosure provides a receiver, a transmitter and methods of operating a receiver or a transmitter. In one embodiment, the receiver includes a receive unit configured to receive transmissions from multiple antennas. The receiver also includes a rank feedback unit configured to feed back a transmission rank selection, wherein the transmission rank selection corresponds to a transmission rank feedback reduction scheme. The receiver further includes a precoding feedback unit configured to feed back a preceding matrix selection, wherein the preceding matrix selection corresponds to a preceding matrix feedback reduction schemes. | 2015-10-15 |
20150295628 | METHOD FOR DETERMINING A TIME MULTIPLEXING SEQUENCE FOR A MIMO RADAR - For providing time multiplexing sequences for transmit antennas of a linear or two-dimensional MIMO radar unit that includes antennas situated close to one another (collocated MIMO radar), a method that enables a precise angle estimation includes implementing an algorithm with which a transmit sequence of transmitters and their transmit times are determined so that object movements have essentially no influence on the angle estimation. In this way, as a function of previously known quantities, optimal time multiplexing sequences can be determined in each case. | 2015-10-15 |
20150295629 | UNIFORM WLAN MULTI-AP PHYSICAL LAYER METHODS - A method and apparatus are disclosed for training and feedback in sectorized transmissions. An IEEE 802.11 station may receive a Sector Training Announcement frame from an AP. The station may then receive a plurality of Training frames from the AP, wherein each of the plurality of Training frames is separated by a short interframe space (SIFS) and each of the plurality of Training frames is received using a different sectorized antenna pattern. The station may generate a Sector Feedback frame indicating a sector based on the plurality of Training frames. The station may send the Sector Feedback frame to the AP. The Sector Feedback frame may indicate a desire to enroll in sectorized transmissions. Alternatively, the Sector Feedback frame may indicate a desire to change sectors. | 2015-10-15 |
20150295630 | ANTENNA CONFIGURATION FOR CO-OPERATIVE BEAMFORMING - The present invention relates to a method for communicating in a network, the network comprising at least a first cell and a second cell including respectively a first primary station having a first antenna array dedicated to the first cell and a second primary station having a second antenna array dedicated to the second cell, for communicating with a plurality of secondary stations. | 2015-10-15 |
20150295631 | COMMUNICATION SYSTEM, COMMUNICATION METHOD, TRANSMISSION METHOD FOR MOBILE STATION, MOBILE STATION DEVICE, AND BASE STATION DEVICE - It is possible to effectively perform feedback in a communication system in which base station devices cooperatively communicate. A feedback information generation unit | 2015-10-15 |
20150295632 | Communication Systems and Methods - In accordance with embodiments, a communication system includes a first device and a second device in communication with the first device. The second device has at least a first pair and a second pair of antennas. The second device spreads a communication bit by a predetermined spreading factor and forms a first set of spatial block codes in frequency domain based on the spread communication bit. The first set of spatial block codes being consecutively transmitted on one of the first and second pairs of antennas. | 2015-10-15 |
20150295633 | Sparse Ordered Iterative Group Decision Feedback Interference Cancellation - Data can be received characterizing a first signal received on a plurality of antennas and comprising multiple transmission signals transmitted simultaneously on at least a same resource element in an orthogonal frequency-division multiple access (OFDM) communications system. A final estimate of the multiple transmission signals can be determined from at least the received data by iteratively estimating multiple transmission signals from the first signal and feeding back selected estimated multiple transmission signals, which satisfy a criterion, to cancel components of the first signal. Data characterizing the estimated multiple transmission signals can be provided. Related apparatus, systems, techniques, and articles are also described. | 2015-10-15 |
20150295634 | DATA RELAY BETWEEN COMMUNICATION DEVICES - While a user utilizes a communication device to communicate with other devices over a network, certain technical issues may cause the interruption or disconnection of the communication. The communication device may be configured to relay the communication to a secondary device to continue the communication without interrupting the communication. | 2015-10-15 |
20150295635 | RELAYING FRAMES - Frames received at a redundant port connecting a node to a communications network are identified by the frames including a sequence number associated with a source. A frame is received at the redundant port from a source. A newest sequence number of frames received from the source at the node is determined. A window of frames from the source is determined by corresponding sequence numbers. The window includes sequence numbers preceding the newest sequence number and associated with reception information of a corresponding frame at the node. The node relays the frame, when a sequence number of the received frame is within the window and the reception information indicates a first reception of the frame at the node. | 2015-10-15 |
20150295636 | RELAY APPARATUS, RELAY SATELLITE, AND SATELLITE COMMUNICATION SYSTEM - A reply apparatus includes: a reception analog switch matrix that outputs, to reception processing units, a wideband reception signal in a band wider than the bandwidth processable by the reception processing unit; a connecting unit that outputs demultiplexed signals to transmission processing units; a transmission analog switch matrix that outputs, to the same transmission antennas, signals subjected to transmission processing; a local generating unit that generates and transmits local signals having different frequencies to the reception processing units; a local-phase-difference calculating unit that calculates a phase difference between the local signals and inputs the phase difference to the reception processing units; and reception-phase correcting units that perform phase correction on the basis of the phase difference. The reception processing units, when the wideband reception signal is input, apply reception processing to divided signals obtained by extracting a part of bands of input signals on the basis of the local signals. | 2015-10-15 |
20150295637 | SATELLITE TELECOMMUNICATION SYSTEM AND METHOD WITH MULTISPOT COVERAGE AND WITH VARIABLE CAPACITY DISTRIBUTION - A telecommunication system comprises channels connected to a spot generation device, each spot being able to cover a dedicated user cell. All the channels have an identical bandwidth. The spot generation device comprises channel amplifiers with variable gain and with constant output power dedicated to each channel, the output power levels of all the channel amplifiers being constant and identical, frequency demultiplexers respectively connected to the channel amplifiers and intended to split the bandwidth assigned to each channel into N sub-bands having the same width corresponding to N carriers having different frequencies, a device for selecting and distributing all the carriers between the spots, and frequency combiners respectively dedicated to each spot, the number of carriers assigned to each spot being variable from one spot to another spot according to the needs of the corresponding users. | 2015-10-15 |
20150295638 | LOW LATENCY GLOBAL COMMUNICATION THROUGH WIRELESS NETWORKS - Embodiments describe a communication system optimized for low latency and includes one or more high altitude platforms disposed at intervals in data communication with each other forming a communication path and at least two network centers separated from each other by a predetermined distance, where the high altitude platforms receive data signals from the network centers, travel along a communication path between the network centers, forming a data relay and transferring the data signals along the communication path. Additional embodiments may include intervals that are at different altitudes or different distances and/or provide one or more high altitude platforms that comprise at least one of satellites, high altitude balloons, or unmanned aerial vehicles. | 2015-10-15 |
20150295639 | ROBUST BEAM SWITCH SCHEDULING - Systems and methods are described for robust scheduling of beam switching patterns in satellite communications systems. Embodiments operate in context of a hub-spoke satellite communications architecture having a number of gateway terminals servicing large numbers of user terminals over a number of spot beams. The satellite includes switching subsystems that distribute capacity to the user beams from multiple of the gateway terminals in a shared manner according to a beam group switching pattern. The beam group switching pattern is robustly formulated to continue distributing capacity during gateway outages (e.g., when one or two gateway terminals are temporarily non-operational due to rain fade, equipment failure, etc.). For example, the beam group switching pattern can be formulated to minimize worst-case degradation of capacity across user beams, to prioritize certain beams or beam groups, etc. | 2015-10-15 |
20150295640 | BROADBAND SATELLITE PAYLOAD ARCHITECTURE - A spacecraft includes a payload subsystem, the payload subsystem including a phased array of feed elements configured to illuminate an antenna reflector, a beam forming network (BFN) disposed proximate to the array of feed elements, and a plurality of power amplifiers disposed between the BFN and the array of feed elements. The BFN includes a plurality of variable amplitude and phase adjusting arrangements disposed between (i) m:1 power combiners that are communicatively coupled with the power amplifiers and (ii) at least one 1:n power splitter, where m is greater than 1, and n is greater than 2 | 2015-10-15 |
20150295641 | Apparatus and Method for Optical-Network Monitoring - A method, apparatus, and system for network monitoring, and more specifically for correlating downstream devices in an optical network with downstream ports of an optical splitter through which they are communicating with a central office. The downstream devices operational on the network are indentified and listed in a correlation table. Selected subsets of these devices are then monitored, preferably by an ISM under the direction of a management node, in a series of monitoring cycles until a satisfactory correlation may be achieved. The correlation cycle may be performed at startup, as needed, or on a periodic basis. | 2015-10-15 |