41st week of 2021 patent applcation highlights part 47 |
Patent application number | Title | Published |
20210319749 | DISPLAY DEVICE AND METHOD FOR DRIVING SAME - The present application discloses a current-driven display device capable of preventing a decrease in display quality due to luminance gradient caused by a voltage drop in a power supply line while preventing an increase in circuit and processing necessary for driving a pixel circuit. In an organic EL display device, a high-level power supply line ELVDD includes a trunk wire ELV | 2021-10-14 |
20210319750 | DISPLAY DEVICE AND METHOD FOR DRIVING SAME - The present application discloses a current-driven display device capable of preventing a decrease in display quality due to luminance gradient or the like caused by a voltage drop in a power supply line while preventing an increase in circuit and processing necessary for driving a pixel circuit. In an organic EL display device, at a connection point of a high-level power supply line ELVDD with a pixel circuit | 2021-10-14 |
20210319751 | IMAGE DISPLAY APPARATUS - The present disclosure relates to an image display apparatus. The image display apparatus includes: a display including an organic light emitting diode panel (OLED panel); and a controller configured to control the display, wherein the controller calculates an Average Picture Level (APL) of an input image, and in response to the calculated APL being greater than or equal to a first reference value in a high-dynamic range (HDR) mode, the controller decreases the APL and perform luminance conversion based on the decreased APL, and in response to the calculated APL being greater than or equal to the first reference value in a normal mode rather than the HDR mode, the controller performs luminance conversion based on the calculated APL. Accordingly, luminance representation may be improved during displaying image. | 2021-10-14 |
20210319752 | DISPLAY DEVICE - A display device includes a light emitting element. A first transistor transmits a driving current to the light emitting element. A second transistor is connected to a first electrode of the first transistor to transmit a data signal. A third transistor has a first electrode connected to a second electrode of the first transistor. An auxiliary transistor is connected between a second electrode of the third transistor and a gate electrode of the first transistor to transmit the data signal to the gate electrode of the first transistor. Each of the first transistor, the second transistor and the auxiliary transistor is a first-type transistor, and the third transistor is a second-type transistor different from the first-type transistor. | 2021-10-14 |
20210319753 | AMBIENT LIGHT SENSING SYSTEM - An apparatus includes a display screen, an ambient light sensor disposed behind the display screen, and an electronic control unit. An integration time of the ambient light sensor is unsynchronized to a frame rate of the display screen. The electronic control unit is operable to control a brightness of the display screen based on a duty cycle of a PWM blanking signal, wherein at least one OFF time of the PWM blanking signal occurs fully within a first integration period of the ambient light sensor, and wherein at least one other integration period ON time of the PWM blanking signal occurs fully during an ON time of the PWM blanking signal. The electronic control unit is further operable to acquire samples of an output of the ambient light sensor, to identify a highest value and a lowest value from among a consecutive group of the samples, and to estimate a magnitude of an ambient light signal based at least in part on the highest value and the lowest value. | 2021-10-14 |
20210319754 | DISPLAY SUBSTRATE AND DISPLAY DEVICE - A display substrate and a display device are provided. A sub-pixel of the display substrate includes a light emitting element and a pixel circuit which includes a first connecting portion, a driving transistor and a threshold compensation transistor, an electrode of the threshold compensation transistor is electrically connected with a gate electrode of the driving transistor through the first connecting portion. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. A ratio of an overlapping area between orthographic projections of the second electrode and the first connecting portion of the first pixel block on the base substrate to an overlapping area between orthographic projections of the second electrode and the first connecting portion of the second pixel block on the base substrate is in a range from 0.8 to 1.2. | 2021-10-14 |
20210319755 | LIGHT-EMITTING DISPLAY DEVICE AND PIXEL THEREOF - A pixel of a light-emitting display device includes a capacitor, a first transistor, a second transistor including a gate receiving a gate writing signal, a third transistor including a gate receiving a scan signal, a fourth transistor including a gate receiving a gate initialization signal, a fifth transistor including a gate receiving a first emission signal, a sixth transistor including a gate receiving a second emission signal, and a light-emitting diode. The scan signal and the gate writing signal may be provided at a first frequency, and the first emission signal, the second emission signal and the gate initialization signal may be provided at a second frequency higher than the first frequency. | 2021-10-14 |
20210319756 | DISPLAY DEVICE - A display device includes: a display area including pixels for displaying an image; a non-display area adjacent to the display area; scan lines connected to the pixels; a first scan driver circuit disposed in the non-display area, where the first scan driver circuit is connected to first scan lines among the scan lines, and outputs first scan signals to the first scan lines; and a second scan driver circuit disposed in the non-display area, where the second scan driver circuit is connected to second scan lines among the scan lines, and outputs second scan signals to the second scan lines. The second scan driver circuit is disposed farther away from the display area than the first scan driver circuit is. | 2021-10-14 |
20210319757 | DISPLAY DEVICE AND METHOD FOR DRIVING SAME - In a display device having a non-rectangular display panel, when the display panel is divided into a rectangular region and a non-rectangular region by a boundary line extending in a same direction as scanning lines, light emission control lines are driven so that a length of a first non-light emission period in which pixel circuits in each row in the rectangular region are in a non-light emission state and a length of a second non-light emission period in which the pixel circuits in each row in the non-rectangular region are in the non-light emission state are different. With this, a luminance difference that occurs near a boundary between the rectangular region and the non-rectangular region is suppressed, and display quality is improved. | 2021-10-14 |
20210319758 | DISPLAY CONTROL METHOD, APPARATUS, AND DISPLAY PANEL - The present disclosure proposes a display control method, an apparatus and a display panel. The display control method comprises: in response to turning on a display panel, acquiring a current first sensing voltage when a data voltage is equal to a first set data voltage; and compensating display data based on the current first sensing voltage. The display control method, apparatus and display panel according to the present disclosure may accurately compensate the display data of the display panel and improve the display effect. | 2021-10-14 |
20210319759 | DISPLAY DEVICE AND METHOD OF DRIVING THE DISPLAY DEVICE - A display device including a pair of substrates, a display medium formed between the pair of substrates and including charged particles encapsulated therebetween such that an image is displayed by moving the charged particles electrophoretically, a drive unit that applies a voltage to the display medium, and a display control unit that controls a display of the display medium. After data communication for rewriting a display of a display device commences and before the data communication ends, the display control unit commences rewriting using a first waveform, and after completion of the data communication and after the rewriting using the first waveform, the display control unit executes rewriting using a second waveform. | 2021-10-14 |
20210319760 | METHOD AND APPARATUS FOR COMPENSATING VIEW CHROMATIC ABERRATION OF DISPLAY DEVICE AND DISPLAY DEVICE - A method and apparatus for compensating view chromatic aberration of a display device, and a display device are provided, which includes: receiving an inputted image, obtaining a first pixel voltage and a second pixel voltage of each of pixels in two adjacent frames of the image, looking-up the first pixel voltage and the second pixel voltage and obtaining a corresponded first driving signal and a corresponded second driving signal, individually, computing a brightness compensation signal required in a backlight module of a backlight region based on the first driving signal, the second driving signal and a predetermined standard brightness signal, and compensating view chromatic aberration of a post frame of the image based on the brightness compensation signal. | 2021-10-14 |
20210319761 | PIXEL DRIVING METHOD, PIXEL DRIVING APPARATUS AND COMPUTER DEVICE - A pixel driving method is provided. The method includes: acquiring a pixel signal of each unit pixel in a pixel block; determining whether the pixel signal of the corresponding pixel block meets a first condition according to the pixel signal of each of the unit pixel and a signal determination interval; and if the graininess is determined during display, first-type gray-scale signals are loaded to a part of unit pixels of the pixel block and second-type gray-scale signals are loaded to the remaining unit pixels based on a preset rule, where the first-type gray-scale signals are not equal to the corresponding second-type gray-scale signals. The display quality is improved by controlling the unit pixel proportion loaded with the first-type gray-scale signals and the second-type gray-scale signals and reducing the difference among pixel signals. | 2021-10-14 |
20210319762 | STEREOSCOPIC DISPLAY DEVICE - To provide a naked-eye type stereoscopic display device which can achieve a fine stereoscopic display property while achieving high-definition display and high yield. An aperture part includes overlapping regions which overlap with an aperture part or another aperture part neighboring to each other in a second direction and a non-overlapping region which does not overlap. Provided that a light amount emitted from a linear aperture of the aperture part in parallel to a second direction is “longitudinal light amount”, the non-overlapping region includes longitudinal light amount fluctuating regions where the longitudinal light amount changes continuously from roughly a center of the aperture part towards both ends of the first direction, respectively. The sum of the longitudinal light amounts of the two overlapping regions overlapping with each other at a same position in the first direction is larger than the longitudinal light amount in roughly the center of the aperture part. | 2021-10-14 |
20210319763 | GOA CIRCUIT AND DISPLAY DEVICE - A gate driver on array (GOA) circuit and a display panel are provided. At least one reverse unit of a nth-stage GOA unit of the GOA circuit is a first reverse unit, which includes three reverse transistors. During an operation stage, when a potential of a first node is low, an input terminal of a maintenance unit is at a high potential, and when the first node is at a high potential, the input terminal of the maintenance unit is at a low potential. Only three transistors are used to achieve that a potential of the first node is opposite to a potential of a signal at the input terminal of the maintenance unit, which saves space. | 2021-10-14 |
20210319764 | DISPLAY APPARATUS AND ELECTRONIC DEVICE - A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately. | 2021-10-14 |
20210319765 | METHOD AND DEVICE FOR ASSIGNING VIDEO STREAMS TO WATCHER DEVICES - A process for operating an electronic computing device to assign video streams to watcher devices. The electronic computing device detects objects of interest within a field-of-view of a camera as a function of incident context information. The electronic computing device obtains video display characteristics associated with watcher devices and further determines, based on respective positions of the objects of interest within the field-of-view, a plurality of sub-regions each enclosing at least one of the detected objects of interest and having one or more video attributes. The electronic computing device then assigns, based on the video display characteristics associated with the watcher devices and the video attributes of the sub-regions, each of the sub-regions to a respectively selected one of the watcher devices. The video streams respectively captured corresponding to each of the assigned sub-regions of interest are then transmitted to the respectively selected one of the watcher devices. | 2021-10-14 |
20210319766 | ILLUMINATION OF A PORTION OF A DISPLAY OF A COMPUTING DEVICE - Methods, apparatuses, and non-transitory machine-readable media illumination of a portion of a display of a computing device are described. Apparatuses can include a display, a memory device, and a controller. In an example, the controller can determine an active portion of the display and in response, illuminate the active portion while an inactive portion of the display remains unilluminated. In another example, a method can include the controller receiving a request to illuminate a portion of the display, and in response, illuminating the portion of the display while a remaining portion of the display remains unilluminated. The request can be received via a touchscreen display of a mobile device in an example. | 2021-10-14 |
20210319767 | ACTIVATION OF A PORTION OF A DISPLAY OF A COMPUTING DEVICE - Methods, apparatuses, and non-transitory machine-readable media activation of a portion of a display of a computing device are described. Apparatuses can include a display, a memory device, and a controller. In an example, a method can include the controller receiving a request to illuminate a portion of the display, and in response, activating the portion of the display while a remaining portion of the display remains inactive. In another example, the controller can receive a request to inactivate a portion of a touchscreen display of a computing device and inactivate the portion responsive to the request while a remaining portion of the touchscreen display remains inactive. | 2021-10-14 |
20210319768 | INFORMATION PROCESSING DEVICE AND NON-TRANSITORY STORAGE MEDIUM STORING INSTRUCTIONS EXECUTABLE BY THE INFORMATION PROCESSING DEVICE - A non-transitory storage medium stores instructions executable by an information processing device including an operation device and a display. The instructions cause the information processing device to: display a first image; display a cropping frame for cropping of the first image when the operation device accepts a user operation for displaying the cropping frame in a state in which the first image is displayed; rotate the first image about a center of the cropping frame when the operation device accepts a user operation for rotating the first image in a state in which the first image and the cropping frame are displayed; and rotate the first image about a center of the first image when the operation device accepts a user operation for rotating the first image in a state in which the first image is displayed, and the cropping frame is not displayed. | 2021-10-14 |
20210319769 | DISPLAY DEVICE, AND CONTROL METHOD, CONTROL APPARATUS AND CONTROL SYSTEM THEREFOR - A control method for a display device includes: receiving a user distance, and determining whether the user distance is smaller than a preset distance: if so, transmitting a first control command to a display screen to control the display screen to enter a local display state, and a second control command to a player to control the player to output local image data; receiving the local image data; and transmitting the local image data to the display screen. The user distance is a distance from the user to a reference surface in a direction perpendicular to the reference surface, and the reference surface is a display surface of the display screen or a plane parallel to the display surface. The preset distance is a minimum distance from the user to the reference surface in a case where the field of view of the user covers the entire active area. | 2021-10-14 |
20210319770 | DISPLAY DRIVING CIRCUIT - A display driving circuit for driving a display panel, including a first memory configured to store main image data received from outside of the display driving circuit; a second memory configured to store first additional image data in a normal mode, and to store second additional image data in an Always On Display (AOD) mode having lower power consumption than the normal mode; a normal mode controller configured to operate in the normal mode according to the first additional image data stored in the second memory; and an AOD mode controller configured to operate in the AOD mode according to the main image data stored in the first memory and the second additional image data stored in the second memory. | 2021-10-14 |
20210319771 | Counter Tensioning System for Stringed Musical Instrument - A stringed musical instrument having a counter tensioning system to counteract the string tension. The counter tensioning system creates a force in opposition to the string tension preventing bowing of the neck. The counter tensioning system reduces the need for periodic adjustments and calibration. The counter tension system also allows for precise calibration of the neck bow to accommodate user preferences. | 2021-10-14 |
20210319772 | Lo-Hat Drum Pedal Assembly - A lo-hat drum pedal assembly is an apparatus that enables the user to modify a hi-hat stand to be used in a lo-hat configuration. The apparatus includes an extension arm, a height adjustment arm, a linkage arm, a suspension arm, a pedal attachment point, a strut attachment point, and a connector attachment point. The extension arm connects the stock stand pedal to the height adjustment arm. The height adjustment arm connects the extension arm to the linkage arm. The suspension arm enables the linkage arm to be hung from a base strut in a seesaw-like manner. The pedal attachment point is the location where the extension arm is connected to the stock stand pedal. The strut attachment point is the location where the suspension arm is connected to the stock base strut. The connector attachment point is the location where the linkage arm is connected to the stock cymbal rod. | 2021-10-14 |
20210319773 | SYSTEM AND METHOD FOR INTERACTIVE COMPOSITION OF MUSIC - A method and system for composing music, including: a plurality of game pieces, each representing a musical element and including a first communication module including an identifier that is associated with the musical element; at least one game track, comprising two or more positioning elements, each located at a predetermined position on the track and designed to accommodate placement of a game piece by a user, wherein each positioning element is associated with a respective second communication module configured to communicate with the first communication module of an accommodated game piece; and a computing device configured to: receive from at least one second communication module an identification of a game piece placed at a positioning element associated with the at least one second communication module; and play a tune based on the location of the positioning element and the identification of the game piece. | 2021-10-14 |
20210319774 | SYSTEMS AND METHODS FOR VISUAL IMAGE AUDIO COMPOSITION BASED ON USER INPUT - The present invention relates to systems and methods for visual image audio composition. In particular, the present invention provides systems and methods for audio composition from a diversity of visual images and user determined sound database sources. | 2021-10-14 |
20210319775 | MUSICAL PERFORMANCE CORRECTION METHOD AND MUSICAL PERFORMANCE CORRECTION DEVICE - A musical performance correction method executable by a computer, the musical performance correction method includes: estimating a playing position in a musical composition by analyzing musical performance data indicating a played pitch played by a user; and correcting the played pitch indicated by the musical performance data to a reference pitch, from among a plurality of reference pitches corresponding to the playing position in the musical composition, in a case where a difference between the played pitch and the reference pitch is less than a predetermined value. | 2021-10-14 |
20210319776 | DEVICE, SYSTEM, AND METHODS FOR BATTERIES REPLACEMENT IN ELECTRICAL INSTRUMENTS - The present disclosure relates to a device and system for eliminating and replacing batteries in any instruments with active electronics, preamp, and piezo pickups. The accessory device and systems have a combination of quarter-inch audio and nine-volt power cable and the methods thereof. Both mono and stereo versions of the apparatus and systems are presented herein. The device further has a mock batter that can power other instruments. Battery leakage can cause corrosion in the instrument. Therefore, the device protects the instrument from corrosive harm, and the electrical device reduces the cost associated with battery usage and the operator's business's overall cost. | 2021-10-14 |
20210319777 | FACE MASK FOR FACILITATING CONVERSATIONS - Apparatuses, systems, devices, and methods for a face mask for facilitating conversations are disclosed. A face mask includes a microphone located on an inside of the face mask, a processor located on the inside of the face mask and connected to the microphone, and a memory located on the inside of the face mask that stores code executable by the processor. The code is executable by the processor to capture, using the microphone, audio spoken by a user wearing the face mask, determine a mode that the face mask is in for transmitting the captured audio to a destination, and transmit the captured audio to the destination based on the determined mode. | 2021-10-14 |
20210319778 | Devices, Methods, and User Interfaces for Adaptively Providing Audio Outputs - An electronic device includes one or more pose sensors for detecting a pose of a user of the electronic device relative to a first physical environment and is in communication with one or more audio output devices. While a first pose of the user meets first presentation criteria, the electronic device provides audio content at a first simulated spatial location relative to the user. The electronic device detects a change in the pose of the user from the first pose to a second pose. In response to detecting the change in the pose of the user, and in accordance with a determination that the second pose of the user does not meet the first presentation criteria, the electronic device provides audio content at a second simulated spatial location relative to the user that is different from the first simulated spatial location. | 2021-10-14 |
20210319779 | SYSTEMS AND METHODS FOR GENERATING SYNTHESIZED SPEECH RESPONSES TO VOICE INPUTS - The system provides a synthesized speech response to a voice input, based on the prosodic character of the voice input. The system receives the voice input and calculates at least one prosodic metric of the voice input. The at least one prosodic metric can be associated with a word, phrase, grouping thereof, or the entire voice input. The system also determines a response to the voice input, which may include the sequence of words that form the response. The system generates the synthesized speech response, by determining prosodic characteristics based on the response, and on the prosodic character of the voice input. The system outputs the synthesized speech response, which includes a more natural, relevant, or both answer to the call of the voice input. The prosodic character of the voice input and/or response may include pitch, note, duration, prominence, timbre, rate, and rhythm, for example. | 2021-10-14 |
20210319780 | SYSTEMS AND METHODS FOR GENERATING SYNTHESIZED SPEECH RESPONSES TO VOICE INPUTS - The system trains a model to provide information used to provide a synthesized speech response to a voice input. The model takes as input prosodic information that may include pitch, note, duration, prominence, timbre, rate, and rhythm, for example. The system receives a plurality of voice inputs, each associated with prosodic metric, as well as a plurality of responses, each also associated with prosodic metrics. The system trains the model based on the plurality of voice inputs, the plurality of responses, the prosodic metrics of the voice inputs, and the prosodic metrics of the responses such that the model outputs information used to generate the response. The model may also take as input user profile information, emotion metrics, and transition information to generate output. The output of the training model may be used by the system to provide synthesized speech responses having relevant prosodic character to received voice inputs. | 2021-10-14 |
20210319781 | AUTOMATIC GENERATION OF VIDEOS FOR DIGITAL PRODUCTS - A system for generating videos uses a domain-specific instructional language and a video rendering engine that produces videos against a digital product which changes and evolves over time. The video rendering engine uses the instructions in an instruction markup document written in the domain-specific instructional language to generate a video while navigating a web-based document representing the digital product for which the video is generated. The video rendering engine navigates the web-based document, coupled with the instruction markup document, which explains the operations to be performed on the web-based document. The instruction markup document also identifies the special effects that manipulate the underlying product in real-time, includes the spoken text for generating subtitles, and provides formalized change management by design. | 2021-10-14 |
20210319782 | SPEECH RECOGNITION METHOD, WEARABLE DEVICE, AND ELECTRONIC DEVICE - A wearable device collects a fingerprint pattern input by a user and speech input by the user. The wearable device sends the fingerprint pattern to an electronic device, to enable the electronic device to perform authentication on the fingerprint pattern input by a user. The wearable device sends the speech to the electronic device, and, upon a determination that the authentication succeeds, the electronic device is enabled to execute a function corresponding to the speech. | 2021-10-14 |
20210319783 | LEARNING DEVICE, VOICE RECOGNITION DEVICE, LEARNING METHOD, VOICE RECOGNITION METHOD, AND PROGRAM - A voice recognition device | 2021-10-14 |
20210319784 | System and Method for Detecting Adversarial Attacks - A linguistic system for transcribing an input, where the linguistic system comprises a processor configured to execute a neural network multiple times while varying weights of at least some nodes of the neural network to produce multiple transcriptions of the input. Further, determine a distribution of pairwise distances of the multiple transcriptions; determine a legitimacy of the input based on the distribution; and transcribe the input using stored weights of the nodes of the neural network when the input is determined as legitimate to produce a final transcription of the input. | 2021-10-14 |
20210319785 | METHODS AND SYSTEMS FOR WORD EDIT DISTANCE EMBEDDING - A system for classifying words in a batch of words can include at least one memory device storing instructions for causing at least one processor to create dictionary vectors for each of a plurality of dictionary words using a neural network (NN), store each dictionary vector along with a classification indicator corresponding to the associated dictionary word, and create word vectors for each word in a batch of words for classification using the NN. The closest matching dictionary vectors are found for each word vector and the classification indicators of the closest matching dictionary vector for each word vector in the batch is reported. | 2021-10-14 |
20210319786 | MISPRONUNCIATION DETECTION WITH PHONOLOGICAL FEEDBACK - Disclosed are embodiments for mapping, with a first trained universal function approximator, the speech representation to predicted phonological feature and phoneme class probabilities; determining expected phonological feature values based on an automatic phonetic segmentation using the expected phoneme sequence and the predicted phoneme class probabilities; and classifying, with a second trained universal function approximator different from the first trained universal function approximator, a combination of the predicted phonological feature probabilities and the expected phonological feature values to thereby detect a mispronunciation present in the sampled speech waveform and facilitate phonological feature feedback associated with the mispronunciation. | 2021-10-14 |
20210319787 | HINDRANCE SPEECH PORTION DETECTION USING TIME STAMPS - A computer-implemented method of detecting a portion of audio data to be removed is provided. The method includes obtaining a recognition result of audio data. The recognition result includes recognized text data and time stamps. The method also includes extracting one or more candidate phrases from the recognition result using n-gram counts. The method further includes, for each candidate phrase, making pairs of same phrases with different time stamps and clustering the pairs of the same phrase by using differences in time stamps. The method includes further determining a portion of the audio data to be removed using results of the clustering. | 2021-10-14 |
20210319788 | SPEECH PROCESSING APPARATUS AND METHOD USING A PLURALITY OF MICROPHONES - A speech processing apparatus includes a plurality of microphones configured to receive a plurality of input signals, and processing circuitry configured to generate a spatial filtering signal corresponding to the plurality of input signals through spatial filtering, generate estimated noise information by integrating directional noise information representing a level of a noise signal received from a direction of interest with diffuse noise information representing levels of noise signals received from various directions based on whether the plurality of input signals have directionality, and generate an estimated speech signal by filtering the spatial filtering signal based on the estimated noise information. | 2021-10-14 |
20210319789 | ELECTRONIC DEVICE AND OPERATION METHOD THEREOF - Provided are an electronic device and an operation method thereof. The electronic device includes: a first sound receiver configured to receive a sound input while power is supplied to the first sound receiver in a standby state; a trigger word/phrase recognizer configured to recognize whether the sound input received by the first sound receiver corresponds to a trigger word or phrase; a second sound receiver configured to receive a sound input by receiving supply of power based on the trigger word or phrase being recognized by the trigger word/phrase recognizer; and a data transceiver configured to output a first sound input signal supplied from the first sound receiver and a second sound input signal supplied from the second sound receiver. | 2021-10-14 |
20210319790 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND PROGRAM - Implemented is a configuration of being able to reliably notify a device characteristic to a user by naturally generating and outputting a system speech including the device characteristic during an interaction with the user. The configuration includes a data processing section that generates and outputs a system speech including device characteristic information. The data processing section selects device characteristic information that is relevant to what is talked about during an interaction between the user and the information processing device, and generates and outputs a system speech including the selected device characteristic information. The data processing section receives an input of information of a user selection made to an option presented to the user, includes device characteristic information that is relevant to the inputted selection information into a system speech to be executed in an interaction with the user, and outputs the system speech. | 2021-10-14 |
20210319791 | ELECTRONIC APPARATUS AND CONTROLLING METHOD THEREOF - A method for controlling another electronic apparatus in an electronic apparatus is provided. The method includes receiving a voice, identifying a control command corresponding to the received voice, identifying at least one type of sensing data related to the identified control command, requesting sensing data from a sensing apparatus corresponding to the at least one type of sensing data which is identified, and controlling at least one other electronic apparatus related to the identified control command based on sensing data received in response to the request. | 2021-10-14 |
20210319792 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD - An information processing apparatus includes an extracting unit ( | 2021-10-14 |
20210319793 | VOICE RECOGNITION FOR PATIENT CARE ENVIRONMENT - A location monitoring system tracks a location of a user within a healthcare facility. When the user is detected in a patient room an electronic controller activates a voice command database having a plurality of voice commands specific to the user. A microphone located in the patient room receives one of the plurality of voice commands. The electronic controller transmits the one of the plurality of voice commands to a remote device positioned outside of the patient room. | 2021-10-14 |
20210319794 | AUTOMATED QUERY DETECTION IN INTERACTIVE CONTENT - Systems and methods may be used to automatically detect a query in interactive content. A system may implement a method that includes receiving an audible signal. The method may include determining that a portion of the audible signal includes speech. The method may include translating at least the portion of the audible signal. The portion of the audible signal may be translated into a natural language output. The method may include generating an identifier (ID) associated with the speech. The ID may be generated on a condition that the natural language output includes a trigger. The method may include generating an inaudible signal that includes the ID. The method may include synchronizing the inaudible signal with the audible signal. The method may include transmitting the audible signal at a first frequency. The method may include transmitting the inaudible signal at a second frequency. | 2021-10-14 |
20210319795 | SPEECH CONTROL METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM - The disclosure provides a speech control method, a speech control apparatus, an electronic device, and a storage medium. The method includes: acquiring target audio data sent by a client, the target audio data including audio data collected by the client within a target duration before wake-up and audio data collected by the client after wake-up; performing speech recognition on the target audio data; and controlling the client based on an instruction recognized from a second audio segment of the target audio data in response to recognizing a wake-up word from a first audio segment at beginning of the target audio data; in which, the second audio segment is later than the first audio segment or has an overlapping portion with the first audio segment. | 2021-10-14 |
20210319796 | Phone-Based Sub-Word Units for End-to-End Speech Recognition - System and methods for identifying a text word from a spoken utterance are provided. An ensemble BPE system that includes a phone BPE system and a character BPE system receives a spoken utterance. Both BPE systems include a multi-level language model (LM) and an acoustic model. The phone BPE system identifies first words from the spoken utterance and determine a first score for each first word. The first words are converted into character sequences. The character BPE model converts the character sequences into second words and determines a second score for each second word. For each word from the first words that matches a word in the second words the first and second scores are combined. The text word is the word with a highest score. | 2021-10-14 |
20210319797 | SYSTEMS AND METHODS FOR CAPTURING, PROCESSING, AND RENDERING ONE OR MORE CONTEXT-AWARE MOMENT-ASSOCIATING ELEMENTS - Computer-implemented method and system for receiving and processing one or more moment-associating elements. For example, the computer-implemented method includes receiving the one or more moment-associating elements, transforming the one or more moment-associating elements into one or more pieces of moment-associating information, and transmitting at least one piece of the one or more pieces of moment-associating information. The transforming the one or more moment-associating elements into one or more pieces of moment-associating information includes segmenting the one or more moment-associating elements into a plurality of moment-associating segments, assigning a segment speaker for each segment of the plurality of moment-associating segments, transcribing the plurality of moment-associating segments into a plurality of transcribed segments, and generating the one or more pieces of moment-associating information based on at least the plurality of transcribed segments and the segment speaker assigned for each segment of the plurality of moment-associating segments. | 2021-10-14 |
20210319798 | CONVERSATION-BASED REPORT GENERATION WITH REPORT CONTEXT - Examples for conversation-based report generation are described herein. In some examples, a report context based on user input to a conversation manager is received. A report is generated based on the report context. The report context is saved for subsequent report generation. The report context may include information related to the intent of the user input. | 2021-10-14 |
20210319799 | SPATIAL PARAMETER SIGNALLING - An apparatus comprising means for: obtaining at least one audio signal; obtaining at least one parameter respectively for each of at least two frequency bands associated with the at least one audio signal; and selecting a frequency band of the at least two frequency bands based on comparing at least one further respective parameter for each of the at least two frequency bands wherein the at least one further respective parameter is determined from each of the at least two frequency bands; generating an output comprising a selection of the at least one parameter associated with the selected frequency band of the at least two frequency bands, such that the selection of the at least one parameter associated with the selected frequency band is configured to reduce a bitrate or size of the output and wherein the at least one parameter of the selected frequency band is configured to represent respective parameters of the at least two frequency bands. | 2021-10-14 |
20210319800 | FREQUENCY BAND EXPANSION DEVICE, FREQUENCY BAND EXPANSION METHOD, AND STORAGE MEDIUM STORING FREQUENCY BAND EXPANSION PROGRAM - A frequency band expansion device includes processing circuitry to calculate a weighting coefficient based on a frequency gradient of the input signal; to generate a white noise signal; to generate a first white noise signal by performing filtering on the white noise signal; to generate a second white noise signal by regulating a phase characteristic of the white noise signal; to generate a third white noise signal by performing weighted addition on the first white noise signal and the second white noise signal by using the weighting coefficient; and to generate the output signal by adding together the input signal and a signal corresponding to the third white noise signal, wherein the processing circuitry is configured so that the phase characteristic of the second white noise signal becomes the same as the phase characteristic of the first white noise signal. | 2021-10-14 |
20210319801 | SHARED SPEECH PROCESSING NETWORK FOR MULTIPLE SPEECH APPLICATIONS - A device to process speech includes a speech processing network that includes an input configured to receive audio data corresponding to audio captured by one or more microphones. The speech processing network also includes one or more network layers configured to process the audio data to generate an output representation of the audio data. The speech processing network includes an output configured to be coupled to multiple speech application modules to enable the output representation to be provided as a common input to each of the multiple speech application modules. | 2021-10-14 |
20210319802 | METHOD FOR PROCESSING SPEECH SIGNAL, ELECTRONIC DEVICE AND STORAGE MEDIUM - The disclosure provides a method for processing a speech signal, an electronic device and a storage medium. The method includes: obtaining a speech signal to be processed and a reference speech signal; obtaining a frequency-domain speech signal to be processed and a reference frequency-domain speech signal by respectively preprocessing the speech signal to be processed and the reference speech signal; obtaining a frequency-domain speech signal ratio by inputting the frequency-domain speech signal to be processed and the reference frequency-domain speech signal into a complex neural network model; and obtaining a target frequency-domain speech signal based on the frequency-domain speech signal ratio and the frequency-domain speech signal to be processed, and obtaining a target speech signal by processing the target frequency-domain speech signal. | 2021-10-14 |
20210319803 | METHODS AND TECHNIQUES TO IDENTIFY SUSPICIOUS ACTIVITY BASED ON ULTRASONIC SIGNATURES - Various embodiments of an apparatus, methods, systems and computer program products described herein are directed to a Detection Engine that triggers playback of an audio signal at a defined frequency from a speaker module associated with a computing device. The Detection Engine receives a reflected signal captured by a microphone module associated with the computing device. In some embodiments, the reflected signal corresponds to the triggered audio signal. The Detection Engine determines whether there is suspicious activity occurring with respect to the computing device based on at least one characteristic of the reflected signal. | 2021-10-14 |
20210319804 | SYSTEMS AND METHODS USING NEURAL NETWORKS TO IDENTIFY PRODUCERS OF HEALTH SOUNDS - Examples of apparatuses and methods described herein may provide personalized audio health sensing to identify individuals based on their health sounds. A microphone may receive an audio sample including speech utterance and cough. A computing device may process the audio sample and analyze the audio sample to predict whether the audio sample is produced by a known user. The computing device may include a neural network that processes and analyzes the audio sample. | 2021-10-14 |
20210319805 | SUSPENSION ASSEMBLY AND DISK DEVICE - According to one embodiment, a suspension assembly includes a support plate, a wiring member disposed on the support plate, and a head supported on the support plate through the wiring member. The wiring member includes a distal end portion electrically connected to the head, a connection end portion extending outside the support plate, and a plurality of wirings extending between the distal end portion and the connection end portion. The connection end portion includes an opening with predetermined length and width and thirteen or more connection terminals disposed in the opening and arranged at intervals in a direction of the length. A percentage of an area of the opening occupied by areas of the thirteen or more connection terminals is | 2021-10-14 |
20210319806 | ALUMINUM ALLOY SHEET FOR MAGNETIC DISK AND PRODUCTION METHOD THEREFOR, AND MAGNETIC DISK USING SAID ALUMINUM ALLOY SHEET FOR MAGNETIC DISK - An aluminum alloy sheet for a magnetic disk, a method for manufacturing same, and a magnetic disk using same. The aluminum alloy sheet is made of an aluminum alloy comprising 0.10 to 3.00 mass % of Fe, 0.003 to 1.000 mass % of Cu, and 0.005 to 1.000 mass % of Zn, with a balance of Al and unavoidable impurities, wherein a value obtained by dividing a difference in an area ratio (%) of second phase particles between a region (A) and a region (B) by an average value of area ratios (%) of second phase particles in the regions (A) and (B) is 0.05 or less, the region (A) being a region from a sheet thickness center plane to a front surface of the sheet, and the region (B) being a region from the sheet thickness center plane to a rear surface of the plate. | 2021-10-14 |
20210319807 | ROTARY CAGE TYPE OPTICAL DISK LIBRARY STORAGE SYSTEM CAPABLE OF REPLACING OPTICAL DISKS - Disclosed is a rotary cage type optical disk library storage system capable of replacing optical disks. The device includes a case, a burning device, and a rotary cage storage device. The burning device is fixed in the case and includes a burn cabinet, a disk feeding mechanism and an internal gripping mechanism. Multiple optical disk cartridges are arranged in layers from top to bottom in the burning cabinet. The disk feeding mechanism is located just below the burning cabinet. The internal gripping mechanism can move up and down and grab and place the optical disk. The rotary cage storage device and the burning device are fixed in the case side by side. The rotary cage storage device includes a rotary cage mechanism, a rotary cage cassette placed in the rotary cage mechanism for storing optical disks, and a belt drive mechanism driving the rotary cage mechanism to rotate. | 2021-10-14 |
20210319808 | AUTOMATED AUDIO-VIDEO CONTENT GENERATION - Systems and methods for generating media content are provided. In some aspects, a process of the disclosed technology includes operations including: determining, one or more characteristics for the audio file, determining, based on a skin associated with the audio file, one or more media effects that will be applied based on the one or more characteristics of the audio file, applying the one or more media effects to a media file to generate a modified media file; and generating an audio-video file comprising a combination of the audio file and the modified media file. Systems and machine-readable media are also provided. | 2021-10-14 |
20210319809 | METHOD, SYSTEM, MEDIUM, AND SMART DEVICE FOR CUTTING VIDEO USING VIDEO CONTENT - The present invention discloses a method and system for cutting video using video content. The method comprises: acquiring recorded video produced by user's recording operation; extracting features of recorded audio in the recorded video and judging whether the recorded audio is damaged; and if not, extracting human voice data from the recorded audio which has been filtered out background sound, intercepting video segment corresponding to effective human voice, and displaying the video segment as clip video; and if yes, extracting image feature data of person's mouth shape and human movements in the recorded video after image processing, fitting the image feature data and the human voice data which has been filtered out background sound, and displaying the video segment with the highest fitting degree as clip video. | 2021-10-14 |
20210319810 | METHOD AND APPARATUS FOR ACCESSING TO DATA IN RESPONSE TO POWER-SUPPLY EVENT - The invention relates to a method, and an apparatus for accessing to data in response to a power-supply event The method, performed by a flash controller, includes steps for: repeatedly detecting whether a voltage supplied to the Hash controller is lower than a first threshold; and issuing a program command to a flash module for programming data into the flash module and performing a supervision procedure when the voltage is lower than the first threshold. The supervision procedure includes steps for: repeatedly detecting whether the voltage is lower than a second threshold during a time period when issuing the program command to the flash module until transmitting the data to the flash module completely; and cancelling the program command when the voltage is lower than the second threshold. | 2021-10-14 |
20210319811 | DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING - Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel. | 2021-10-14 |
20210319812 | Sense Amplifiers - The present disclosure generally relates to circuit architectures for programming and accessing resistive change elements. The circuit architectures can program and access resistive change elements using neutral voltage conditions. The present disclosure also relates to methods for programming and accessing resistive change elements using neutral voltage conditions. The present disclosure additionally relates to sense amplifiers configurable into initializing configurations for initializing the sense amplifiers and comparing configurations for comparing voltages received by the sense amplifiers. The sense amplifiers can be included in the circuit architectures of the present disclosure. | 2021-10-14 |
20210319813 | METHODS, SEMICONDUCTOR DEVICES, AND SEMICONDUCTOR SYSTEMS - A semiconductor device may be provided. The semiconductor device may be configured to shift storage positions of data and error information on the data to store the data into shifted storage positions based on the address signals having a certain combination being inputted a predetermined number of times. | 2021-10-14 |
20210319814 | READ-WRITE CONVERSION CIRCUIT, READ-WRITE CONVERSION CIRCUIT DRIVING METHOD, AND MEMORY - A read-write conversion circuit, a read-write conversion circuit driving method, and a memory are provided. The read-write conversion circuit includes a first precharge circuit, a positive feedback circuit, a second precharge circuit, a fourth switch unit, a sixth switch unit, a seventh switch unit, an eighth switch unit, a tenth switch unit, an eleventh switch unit, a twelfth switch unit, a thirteenth switch unit, a fourteenth switch unit, and a fifteenth switch unit. In the read-write conversion circuit, corresponding signals can be read from a third signal terminal and a fourth signal terminal by using only one of a first signal terminal or a second signal terminal in a signal read stage, and corresponding signals can be written to the first signal terminal and the second signal terminal by using only one of the third signal terminal or the fourth signal terminal in a signal write stage. | 2021-10-14 |
20210319815 | MEMORY AND CALIBRATION AND OPERATION METHODS THEREOF FOR READING DATA IN MEMORY CELLS - Embodiments of a memory, and calibration and operation methods thereof for reading data in memory cells are disclosed. In an example, an apparatus comprises transistors, and a charge sharing circuit coupled to the transistors through gate terminals of the transistors. The charge sharing circuit comprises a programmable electrical source, a first switch coupled to the programmable electrical source, a capacitor coupled to the first switch, and a second switch coupled to the capacitor, the first switch, and the gate terminals of the transistors. The programmable electrical source is configured to provide electrical charges to the capacitor when the first switch is turned on and the second switch is turned off. The capacitor is configured to provide at least a portion of the electrical charges to the gate terminals of the transistors when the first switch is turned off and the second switch is turned on. | 2021-10-14 |
20210319816 | TIMING SIGNAL DELAY COMPENSATION IN A MEMORY DEVICE - Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof. | 2021-10-14 |
20210319817 | SEMICONDUCTOR APPARATUS AND SYNCHRONIZATION METHOD - Data is synchronized when transmitted from a circuit operated at first frequency to another circuit operated at second frequency. A synchronization method includes storing data write pointers in a line, storing data input from a source at first frequency at a location in a data buffer designated by the write pointer at one end of the line, taking out the write pointer at the one end from the line to store it in the synchronization buffer, synchronizing a validation signal input from the input source at first frequency to second frequency, reading out the write pointer stored in the synchronization buffer when the validation signal is synchronized, adding completion information that indicates completion of synchronization to the data stored at the location in the data buffer designated by the read out write pointer, and reading out, from the data buffer, the data to which the completion information is added. | 2021-10-14 |
20210319818 | STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE - A storage device including a nonvolatile memory device including memory blocks and a controller connected with the nonvolatile memory device through data input and output lines and a data strobe line may be provided. The nonvolatile memory device and the controller may be configured to perform training on the data input and output lines by adjusting a delay of a data strobe signal sent through the data strobe line and adjust delays of the data input and output lines based on the training result. | 2021-10-14 |
20210319819 | NON-VOLATILE MEMORY WITH MULTIPLEXER TRANSISTOR REGULATOR CIRCUIT - As disclosed herein, a memory includes an array of resistive memory cells and a voltage regulator circuit that provides a regulated voltage based on a circuit with a replica resistive storage element. The regulated voltage is applied to a mux transistor of a multiplexer of a column decoder that is used to select a particular column line of a memory array from a set of column lines to provide the proper voltage to the memory cell during a write operation to the memory cell. | 2021-10-14 |
20210319820 | SENSE AMPLIFIER WITH SPLIT CAPACITORS - Methods and devices for reading a memory cell using a sense amplifier with split capacitors is described. The sense amplifier may include a first capacitor and a second capacitor that may be configured to provide a larger capacitance during certain portions of a read operation and a lower capacitance during other portions of the read operation. In some cases, the first capacitor and the second capacitor are configured to be coupled in parallel between a signal node and a voltage source during a first portion of the read operation to provide a higher capacitance. The first capacitor may be decoupled from the second capacitor during a second portion of the read operation to provide a lower capacitance during the second portion. | 2021-10-14 |
20210319821 | Integrated Circuit Device with Deep Learning Accelerator and Random Access Memory - Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to perform at least computations on matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; and an interface to a memory controller. The interface may be configured to facilitate access to the random access memory by the memory controller. In response to an indication provided in the random access memory, the Deep Learning Accelerator may execute the instructions to apply input that is stored in the random access memory to the Artificial Neural Network, generate output from the Artificial Neural Network, and store the output in the random access memory. | 2021-10-14 |
20210319822 | Deep Learning Accelerator and Random Access Memory with Separate Memory Access Connections - Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to a direct memory access controller. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the direct memory access controller may concurrently load next input into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory. | 2021-10-14 |
20210319823 | Deep Learning Accelerator and Random Access Memory with a Camera Interface - Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to an image generator, such as a camera. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the Deep Learning Accelerator may concurrently load next input from the camera into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory. | 2021-10-14 |
20210319824 | MEMORY DEVICE INCLUDING A PLURALITY OF AREA HAVING DIFFERENT REFRESH PERIODS, MEMORY CONTROLLER CONTROLLING THE SAME AND MEMORY SYSTEM INCLUDING THE SAME - A memory system includes a memory device including a first area being refreshed according to a first refresh period and a second area begin refreshed according to a second refresh period longer than the first refresh period. The memory system also includes a memory controller configured to generate a write command and a write data corresponding to a first write request and a first data. | 2021-10-14 |
20210319825 | POWER-EFFICIENT GENERATION OF VOLTAGE - Methods, systems, and devices for power-efficient generation of voltage are described. A driver circuit in a memory device may produce a voltage on an output node for other components in the memory device to use. To produce the voltage, the driver circuit may use a first voltage supply to charge the output node to a first threshold voltage level. The driver may then use a second voltage source to charge the output node to a second threshold voltage level that is different than (e.g., higher than) the first threshold voltage level. | 2021-10-14 |
20210319826 | CENTRALIZED DFE RESET GENERATOR FOR A MEMORY DEVICE - Systems and methods are provided that include an interamble data strobe (DQS) counter configured to count cycles between write operations. The interamble DQS counter includes a decision feedback equalizer (DFE) reset mask circuit configured to generate a DFE reset enable signal and a DFE reset timing generator configured to generate timing signals for the DFE reset. The systems and methods also include a DFE reset generator configured to receive the DFE reset enable signal and the timing signals from the interamble DQS counter, to use the DFE reset enable signal and the timing signals to generate DFE reset signals for a plurality of DQS phases; and to transmit the DFE reset signals to the plurality of DQS phases. | 2021-10-14 |
20210319827 | SEMICONDUCTOR DEVICE PROTECTION CIRCUITS FOR PROTECTING A SEMICONDUCTOR DEVICE DURING PROCESSING THEROF, AND ASSOCIATED METHODS, DEVICES, AND SYSTEMS - Memory devices are disclosed. A memory device may include a source (SRC) plate configured to couple to a number of memory cells. The memory device may also include a resistor coupled between the source plate and a node. Further, the memory device may include at least one transistor coupled between the source plate and the ground voltage, wherein a gate of the at least one transistor is coupled to the node. The transistor may be configured to couple the SRC plate to the ground voltage during a processing stage. The transistor may further be configured to isolate the SRC plate from the ground voltage during an operation stage. Methods and electronic systems are also disclosed. | 2021-10-14 |
20210319828 | Multi-State Programming for Memory Devices - Storage device programming methods, systems and media are described. A method may include encoding data to generate an encoded set of data. A first programming operation may write the encoded set of data to a memory device. The method includes encoding, using a second encoding operation based on the data, to generate a second set of encoded data. The second set of encoded data is stored to a cache. A first decoding operation is performed, based on the second set of encoded data and the encoded set of data, to generate a decoded set of data. A second decoding operation is performed to generate a second decoded set of data. The second decoded set of data is encoded to generate a third set of encoded data. The method includes performing a second programming operation to write the third set of encoded data to the memory device. | 2021-10-14 |
20210319829 | DEDICATED COMMANDS FOR MEMORY OPERATIONS - An apparatus can have a memory comprising an array of resistance variable memory cells and a controller. The controller can be configured to receive to a dedicated command to write all cells in a number of groups of the resistance variable memory cells to a first state without transferring any host data corresponding to the first state to the number of groups. The controller can be configured to, in response to the dedicated command, perform a read operation on each respective group to determine states of the cells in each respective group, determine from the read operation any cells in each respective group programmed to a second state, and write only the cells determined to be in the second state to the first state. | 2021-10-14 |
20210319830 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE - Provided herein is a semiconductor memory device and a method of operating the semiconductor memory device. The semiconductor memory device includes: a memory cell array including a plurality of word lines; a peripheral circuit coupled to the memory cell array through the plurality of word lines and configured to apply a program voltage to a selected word line of the plurality of word lines during a program operation and apply a pass voltage to unselected word lines of the plurality of word lines; and control logic configured to control the peripheral circuit to apply a first pass voltage to word lines adjacent to the selected word line among the unselected word lines during a first program operation of the program operation and apply a second pass voltage to the word lines adjacent to the selected word line during a second program operation of the program operation. | 2021-10-14 |
20210319831 | Multi-Phased Programming with Balanced Gray Coding - Disclosed are systems and methods for providing multi-phased programming with balanced Gray coding. A method includes programming, in a first phase, a first portion of data into memory cells of a flash memory in a first-level cell mode. The method also includes retaining, in a cache, at least a subset of the data. The method also includes regenerating the data from at least the cache, wherein the regenerated data includes a second portion of the data. The method also includes programming, in a second phase, the regenerated data in a second-level cell mode based on a mapping from the first-level cell mode to the second-level cell mode. The mapping maps each state distribution in the first-level cell mode to at least two non-adjacent state distributions in the second-level cell mode, and a width of each state distribution in the first-level cell mode may be narrowed. | 2021-10-14 |
20210319832 | INTEGRATED CIRCUIT DEVICE - An integrated circuit device includes channel structures extending from a substrate in a vertical direction, memory cell strings disposed along the plurality of channel structures, gate lines spaced apart from one another in the vertical direction and including erase control lines and string selection lines, and driving transistors including erase control driving transistors connected to the erase control lines and string selection driving transistors connected to the string selection lines. | 2021-10-14 |
20210319833 | APPARATUS AND METHODS FOR QUARTER BIT LINE SENSING - An apparatus is provided that includes a plurality of non-volatile memory cells, a plurality of bit lines, a plurality of memory holes, and a control circuit. The plurality of memory holes each include a corresponding one of the memory cells. Each memory hole is associated with and coupled to a corresponding one of the bit lines. The control circuit is configured to read the memory cells in four separate read intervals. | 2021-10-14 |
20210319834 | PROACTIVE READ DISTURB MITIGATION - A request is received to perform a set of read operations using a memory device. The set of read operations are divided into a plurality of subsets of read operations. A first read operation is selected from a first subset of read operations of the plurality of subsets of read operations. The first read operation is performed on a first location on a memory device. One or more first data integrity scan operations is performed on one or more second locations on the memory device adjacent to the first location to determine one or more first reliability statistics associated with the one or more second locations. | 2021-10-14 |
20210319835 | MEMORY APPARATUS AND DATA READING METHOD THEREOF - A memory apparatus and a data reading method thereof are provided. In the method, a plurality of memory cells of the memory apparatus are read to obtain read data, in which a threshold voltage of each memory cell is sensed and respectively compared with a first reference voltage and a second reference voltage to determine bit values. The first reference voltage and the second reference voltage are used to distinguish different states of the memory cell and the second reference voltage is larger than the first reference voltage. The bit values of the memory cells having the threshold voltage between the first reference voltage and the second reference voltage in the read data are gradually changed and syndromes of the changed read data are calculated. The read data is corrected according to values of the syndromes. | 2021-10-14 |
20210319836 | METHOD FOR WRITING IN A NON-VOLATILE MEMORY ACCORDING TO THE AGEING OF THE MEMORY CELLS AND CORRESPONDING INTEGRATED CIRCUIT - A semiconductor well of a non-volatile memory houses memory cells. The memory cells each have a floating gate and a control gate. Erasing of the memory cells includes biasing the semiconductor well with a first erase voltage having an absolute value greater than a breakdown voltage level of bipolar junctions of a control gate switching circuit of the memory. An absolute value of the first erase voltage is based on a comparison of a value of an indication of wear of the memory cells to a wear threshold value. | 2021-10-14 |
20210319837 | Read Level Tracking and Optimization - Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients. | 2021-10-14 |
20210319838 | MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE - Provided herein may be a memory device and a method of operating the memory device. The memory device includes an operation code generator configured to generate a program code and a verify code in response to a program control code and to output an operation code using the program code and the verify code, a verify counter configured to store a count value acquired by counting the number of verify operations that are performed depending on the verify code, a verify determiner configured to compare the count value with a reference value depending on the result of the verify operation and to generate the program control code to change a step voltage for raising a program voltage depending on the comparison result, and a voltage generator configured to generate the program voltage and a verify voltage depending on the operation code. | 2021-10-14 |
20210319839 | MEMORY DEVICE FOR WRITE OPERATION INCLUDING VERIFICATION AND OPERATING METHOD THEREOF - A memory device includes: a cell array including a memory cell and a reference cell; a sense amplifier configured to sense a difference between a first current flowing through the memory cell and a second current flowing through the reference cell, based on an activated sense enable signal; a controller configured to inactivate the sense enable signal in a program interval and activate the sense enable signal in a verify interval subsequent to the program interval, during a write operation; and a voltage driver configured to provide a write voltage to the memory cell in the program interval and the verify interval during the write operation, and to provide a read voltage to the memory cell during a read operation. | 2021-10-14 |
20210319840 | IMPEDANCE CALIBRATION VIA A NUMBER OF CALIBRATION CIRCUITS, AND ASSOCIATED METHODS, DEVICES, AND SYSTEMS - Semiconductor devices are disclosed. A semiconductor device may include an input/output (I/O) interface area. The semiconductor device may also include a number of ZQ calibration circuits, wherein each of the number of ZQ calibration circuits is positioned adjacent to an associated portion of the I/O interface area. The semiconductor device may also include a number of interpolation circuits, wherein each of the number of interpolation circuits positioned adjacent to an associated portion of the I/O interface area and configured to generate a calibration code based on a number of other calibration codes. Further, portions of the I/O interface area associated with the number of interpolation circuits are at least partially positioned between portions of the I/O interface area associated with the number of ZQ calibration circuits. Methods and systems are also disclosed. | 2021-10-14 |
20210319841 | Systems And Methods For Detecting And Configuring Lanes In A Circuit System - An electronic circuit system includes a main device that generates first and second strobe signals and a clock signal, a first peripheral device that uses the first strobe signal to generate a first output signal in a first lane in response to the clock signal, and a second peripheral device that uses the second strobe signal to generate a second output signal in a second lane in response to the clock signal. The main device determines if the first peripheral device is coupled to the main device through the first lane based on the first output signal. The main device determines if the second peripheral device is coupled to the main device through the second lane based on the second output signal. The main device also has the ability to detect if a peripheral device is faulty and to select a valid configuration of peripheral devices. | 2021-10-14 |
20210319842 | INTEGRATED CIRCUIT, POWER VERIFICATION CIRCUIT AND POWER VERIFICATION METHOD - A power verification circuit is provided. The power verification circuit includes a current source, a resistive random access memory (RRAM) cell and a Zener diode. The current source is coupled to a power terminal. The RRAM cell is coupled between the current source and a ground terminal. The Zener diode has an anode coupled to the RRAM cell and a cathode coupled to the power terminal. The impedance of the RRAM cell is determined by the power voltage applied to the power terminal. | 2021-10-14 |
20210319843 | IMPRINT RECOVERY FOR MEMORY CELLS - Methods, systems, and devices for imprint recovery for memory cells are described. In some cases, memory cells may become imprinted, which may refer to conditions where a cell becomes predisposed toward storing one logic state over another, resistant to being written to a different logic state, or both. Imprinted memory cells may be recovered using a recovery or repair process that may be initiated according to various conditions, detections, or inferences. In some examples, a system may be configured to perform imprint recovery operations that are scaled or selected according to a characterized severity of imprint, an operational mode, environmental conditions, and other factors. Imprint management techniques may increase the robustness, accuracy, or efficiency with which a memory system, or components thereof, can operate in the presence of conditions associated with memory cell imprinting. | 2021-10-14 |
20210319844 | MEMORY TEST METHOD AND RELATED DEVICE - A memory test method and apparatus, an electronic device, and a computer-readable storage medium are provided. The method includes: obtaining a test instruction; generating, in response to the test instruction, a test clock signal, a to-be-tested address and to-be-tested data; determining a to-be-tested memory from memories of a storage device, the storage device including a self-test circuit; writing the to-be-tested data into a storage unit corresponding to the to-be-tested address of the to-be-tested memory; reading output data from the storage unit corresponding to the to-be-tested address of the to-be-tested memory; and comparing the to-be-tested data and the output data to obtain a test result of the to-be-tested memory. The self-test circuit disposed in the storage device is used to implement a memory test process. Thus, the dependency on automatic test equipment is reduced, thereby improving test speed and reducing test cost. | 2021-10-14 |
20210319845 | MICROCHIP LEVEL SHARED ARRAY REPAIR - A system may include an integrated circuit having repair select bits coupled with a central repair register. The repair register may be configured to determine how to broadcast multiple repair actions to a group of repairable circuits. Inclusion of the repair register may function to reduce the total number of latches used to hold repair information. | 2021-10-14 |
20210319846 | DETECTION CIRCUITRY TO DETECT A DECK OF A MEMORY ARRAY - As described, a device may include detection circuitry to detect a deck of a memory array. The deck may include a conductive identifier coupled between a logic high voltage node and the detection circuitry a control circuit coupled to the detection circuit. The control circuit may perform operations including transmitting a test enable signal to the detection circuitry. The detection circuitry may generate a valid signal indicative of an existence of the conductive identifier of the deck in response to the test enable signal. The operations may also include the control circuit receiving the valid signal from the detection circuitry and adjusting a memory operation associated with the memory array based at least in part on the valid signal. | 2021-10-14 |
20210319847 | PEPTIDE-BASED VACCINE GENERATION SYSTEM - A method is provided for peptide-based vaccine generation. The method receives a dataset of positive and negative binding peptide sequences. The method pre-trains a set of peptide binding property predictors on the dataset to generate training data. The method trains a Wasserstein Generative Adversarial Network (WGAN) only on the positive binding peptide sequences, in which a discriminator of the WGAN is updated to distinguish generated peptide sequences from sampled positive peptide sequences from the training data, and a generator of the WGAN is updated to fool the discriminator. The method trains the WGAN only on the positive binding peptide sequences while simultaneously updating the generator to minimize a kernel Maximum Mean Discrepancy (MMD) loss between the generated peptide sequences and the sampled peptide sequences and maximize prediction accuracies of a set of pre-trained peptide binding property predictors with parameters of the set of pre-trained peptide binding property predictors being fixed. | 2021-10-14 |
20210319848 | SYSTEMS AND METHODS FOR IDENTIFYING ASSOCIATIONS BETWEEN MICROBIAL STRAINS AND PHENOTYPIC FEATURES - Provided herein are systems and methods for identifying associations, or lack thereof, between microbial strains (e.g., bacterial strains) and phenotypic features (e.g., demographic characteristics, physical statistics, and/or medical history) of a subject. | 2021-10-14 |