41st week of 2010 patent applcation highlights part 12 |
Patent application number | Title | Published |
20100258753 | ELECTROMAGNETIC VALVE - An electromagnetic valve includes a valve body, a valve element, a movable iron core, a guide tube, a coil, a yoke, and a fixed iron core. The valve body includes a fluid flow path. The valve element is movable and seated on a valve seat provided in the fluid flow path of the valve body. The movable iron core moves the valve element with respect to the valve seat. The guide tube is cylindrical and movably supports the movable iron core. The coil is mounted on an outer periphery of the guide tube. The yoke covers an outside of the coil and forms a magnetic circuit. The fixed iron core is provided facing the movable iron core and attracts the movable iron core by energization of the coil. The valve body is coupled to the guide tube on one opening end side of the guide tube, and the fixed iron core is provided on an other end side of the guide tube with a clearance spaced from an inside of the guide tube. One end of the yoke is coupled to the fixed iron core, and the valve body is coupled to an other end of the yoke. | 2010-10-14 |
20100258754 | CONTROL VALVES AND METHODS OF FLOWING A MATERIAL THROUGH A CONTROL VALVE - Valves comprise a valve body having a gallery coupled to an inlet and an outlet to facilitate a fluid flow therethrough. A plug is moveably disposed within the valve body and a seat ring assembly may be coupled to the outlet of the valve body. At least one circular motion inducement feature is positioned in a portion of the valve body, the seat ring assembly, or both. The at least one circular inducement feature is configured to induce a circular motion in a fluid flow through the valve. Methods of creating a circular flow in a fluid flowing through a valve are also disclosed. | 2010-10-14 |
20100258755 | Ergonomic pneumatic deadman valve - A lever actuated pneumatic deadman valve for use in connection with pneumatic blasting equipment is ergonomically designed to reduce fatigue and strain on the operator. The valve is shaped to fit comfortably in the hand of the operator, with a spring biased lever hinged for action to fit the natural movement of the hand. A detent button is sized and positioned for easily accommodating single-handed operation. Another important feature of the deadman valve is the reconfiguration of the valve cartridge with an offset port to produce a cyclonic flow around the spool for reducing the wear on the spool. | 2010-10-14 |
20100258756 | Slide type valve - The slide type valve of the present invention has a structure in which a movable flowpath forming member is pressed toward a slidable sealing member by use of a spring member and in which the load of the slidable sealing member received from the movable flowpath forming member becomes equal to a constant spring load determined by a spring force of the spring member. Additionally, an attachment member holding the movable flowpath forming member that is movable to the fixed flowpath forming member has a housing hole whose shape substantially coinciding with the shape of the movable flowpath forming member. The movable flowpath forming member is housed in the housing hole so as to be slidable in a direction perpendicular to the first end surface of the fixed flowpath forming member, and, accordingly, the load distribution is uniformed both in a first seal sliding surface and in a second seal sliding surface of the slidable sealing member. Additionally, a third flowpath is formed to follow one direction so as to reach the second seal sliding surface from the first seal sliding surface, and, as a result, a pressure loss in the flowpath is minimized. | 2010-10-14 |
20100258757 | VALVE FOR DISPENSING A FLUID PRODUCT AND DEVICE FOR DISPENSING A FLUID PRODUCT INCLUDING SUCH VALVE - A fluid dispenser valve comprising a valve body ( | 2010-10-14 |
20100258758 | HDD PATTERN APPARATUS USING LASER, E-BEAM, OR FOCUSED ION BEAM - A method and apparatus for manufacturing magnetic storage media is provided. A structural substrate is coated with a magnetically active material, and a magnetic pattern is formed in the magnetically active material by treating portions of the material with energy from a laser, e-beam, or focused ion beam. The beam may be divided into a packet of beamlets by passing the beam through a divider, which may be a diffraction grating for laser energy, a thin film single crystal for electrons, or a perforated plate for ions, or the beam may be generated by an array of emitters. The beamlets are then focused to a desired dimension and distribution by optics or electric fields. The resulting beam packet may be shaped further by passing through an aperture of any desired shape. The resulting beam may be applied sequentially to exposure zones to treat an entire substrate or plurality of substrates. | 2010-10-14 |
20100258759 | Nanostructured Metal Oxides Comprising Internal Voids and Methods of Use Thereof - The present invention relates to nano structures of metal oxides having a nanostructured shell (or wall), and an internal space or void. Nanostructures may be nanoparticles, nanorod/belts/arrays, nanotubes, nanodisks, nanoboxes, hollow nanospheres, and mesoporous structures, among other nanostructures. The nanostructures are composed of polycrystalline metal oxides such as SnO2. The nanostructures may have concentric walls which surround the internal space of cavity. There may be two or more concentric shells or walls. The internal space may contain a core such ferric oxides or other materials which have functional properties. The invention also provides for a novel, inexpensive, high-yield method for mass production of hollow metal oxide nanostructures. The method may be template free or contain a template such as silica. The nanostructures prepared by the methods of the invention provide for improved cycling performance when tested using rechargeable lithium-ion batteries. | 2010-10-14 |
20100258760 | THERMAL STORAGE DEVICE AND USE OF MULTICOMPONENT SYSTEMS - A thermal storage device is provided which comprises at least one storage medium which is a multicomponent mixture having a melting range between the solid phase of the mixture and the liquid phase of the mixture extending over at least 10 K. | 2010-10-14 |
20100258761 | ANODE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND ANODE AND LITHIUM BATTERY CONTAINING THE MATERIAL - An anode active material comprises metal core particles, metal nano wires formed on the metal core particles, pores between the metal core particles and the metal nano wires, and a carbon-based coating layer formed on a surface of the metal core particles and metal nano wires. In the anode active material according to the present invention, the metal core particles and metal nano wires are combined to form a single body, and a carbon-based coating layer is formed on the surface of the metal nano wires and metal core particles. Thus, volume changes in the pulverized metal core particles can be effectively buffered during charging and discharging, and the metal core particles are electrically connected through the metal nano wires. As a result, volume changes in the anode active material and degradation of the electrode can be prevented, thereby providing excellent initial charge/discharge efficiency and enhanced charge/discharge capacity. | 2010-10-14 |
20100258762 | AQUEOUS POLYURETHANE RESIN, HYDROPHILIC RESIN, AND FILM - An aqueous polyurethane resin is prepared by reaction of an isocyanate group-terminated prepolymer with a chain extender containing polyamine. The isocyanate group-terminated prepolymer is obtained by reaction of at least a polyisocyanate containing 50 wt % or more of a non-multiple ring polyisocyanate that does not contain an aromatic ring and an aliphatic ring, or contains one aromatic ring or aliphatic ring; polyoxyethylene polyol; and a polyoxyethylene side chain-containing active compound having two or more hydroxyl groups or isocyanate groups at its molecular terminal and having a polyoxyethylene group in the side chain. | 2010-10-14 |
20100258763 | LIQUID CRYSTAL SYSTEM AND LIQUID CRYSTAL DISPLAY - The instant invention relates to mesogenic systems comprising a) a polymeric component, component A, obtained or obtainable from polymerisation of a precursor comprising one or more mesogenic mono-reactive compounds, one or more di-reactive compounds, which optionally are also mesogenic compounds and optionally a photo-initiator and a low molecular weight component, component B, comprising one or more mono-reactive, mesogenic compounds, one or more mesogenic compounds and one or more chiral dopants, exhibiting a Blue Phase, as well as to the use of these systems in deices and to these devices. | 2010-10-14 |
20100258764 | POLYMERIZABLE LIQUID CRYSTAL COMPOUND, POLYMERIZABLE LIQUID CRYSTAL COMPOSITION, LIQUID CRYSTALLINE POLYMER, AND OPTICAL ANISOTROPIC ARTICLE - A polymerizable liquid crystal compound shown by the following formula (I), a polymerizable liquid crystal composition that includes the polymerizable liquid crystal compound and a chiral compound polymerizable with the polymerizable liquid crystal compound, a liquid crystalline polymer obtained by polymerizing the polymerizable liquid crystal compound or the polymerizable liquid crystal composition, and an optical anisotropic article that includes the liquid crystalline polymer. The polymerizable liquid crystal compound shows a liquid crystal phase over a wider temperature range, is chemically stable, can be inexpensively produced, and has a wide selective reflection wavelength band Δλ (i.e., a large value Δn). The polymerizable liquid crystal composition includes the polymerizable liquid crystal compound, the liquid crystalline polymer is obtained by polymerizing the polymerizable liquid crystal compound or the polymerizable liquid crystal composition, and the optical anisotropic article includes the liquid crystalline polymer. | 2010-10-14 |
20100258765 | ANTIFERROELECTRIC ORTHOCONIC LIQUID CRYSTALLINE MATERIAL WITH LONG PITCH AND THE METHOD OF ITS PREPARATION - The racemic and chiral compounds expressed by common formula 1 and formula 2: | 2010-10-14 |
20100258766 | Phosphor and manufacturing method for the same, and light source - To provide a phosphor having an emission spectrum with a broad peak in a range from yellow color to red color (580 nm to 680 nm) and an excellent excitation band on the longer wavelength side from near ultraviolet/ultraviolet of excitation light to visible light (250 nm to 550 nm), and having an improved emission intensity. The phosphor is provided, which is given by a general composition formula expressed by MmAaBbOoNn:Z, (wherein element M is more than one kind of element having bivalent valency, element A is more than one kind of element having tervalent valency selected from the group consisting of Al, Ga, In, Tl, Y, Sc, P, As, Sb, and Bi, element B is more than one kind of element having tetravalent valency, O is oxygen, N is nitrogen, and element Z is more than one kind of element selected from rare earth elements or transitional metal elements, satisfying m>0, a>0, b>0 o≧0, and n=2/3m+a+4/3b−2/3o), and further containing boron and/or fluorine. | 2010-10-14 |
20100258767 | COMPOSITE ORGANIC ELECTROLUMINESCENT MATERIAL AND PRODUCTION METHOD THEREOF - A composite organic EL material suited to flash deposition and a method for producing the same are provided. A composite organic electroluminescence material in which an organic material and an organic metal complex are combined with each other, wherein the melting point of the organic material is lower by 30° C. or more than the decomposition temperature of the organic metal complex. | 2010-10-14 |
20100258768 | METHOD AND SYSTEM FOR CONTROLLING RESISTIVITY IN INGOTS MADE OF COMPENSATED FEEDSTOCK SILICON - Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides semiconductor predominantly of a single type (p-type or n-type) for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of boron, phosphorus, aluminum and/or gallium. The process further melts the silicon feedstock with the boron, phosphorus, aluminum and/or gallium to form a molten silicon solution from which to perform directional solidification and maintains the homogeneity of the resistivity of the silicon throughout the ingot. A balanced amount of phosphorus can be optionally added to the aluminum and/or gallium. Resistivity may also be measured repeatedly during ingot formation, and additional dopant may be added in response, either repeatedly or continuously. | 2010-10-14 |
20100258769 | OPTICALLY VARIABLE PIGMENTS OF HIGH ELECTRICAL CONDUCTIVITY - The present invention relates to optically variable pigments of high electrical conductivity which comprise a flake-form substrate, which essentially consists of silicon dioxide and/or silicon oxide hydrate, and an electrically conductive layer surrounding the substrate, to a process for the preparation thereof, and to the use of pigments of this type. | 2010-10-14 |
20100258770 | SYNCHRONOUS MOVING DEVICE AND IMAGE MEASURING APPARATUS - A synchronous moving device includes: a device body; a movable portion which is provided in the device body; a feed screw shaft which is supported on the device body; a nut member which is thread-engaged with the feed screw shaft; a coupler which couples the movable portion and the nut member; and a cable binder which supports and guides a cable wired into the movable portion, wherein: the coupler includes a first member fixed to the movable portion, a second member fixed to the nut member, and an intermediate member interposed between the first and second members for absorbing deflecting motion of the feed screw shaft; and an end portion of the cable binder on a side of wiring of the cable into the movable portion is connected to the second member through a connection member and moved in synchronization with the movable portion. | 2010-10-14 |
20100258771 | WIRE PULL ASSEMBLY - A wire pull assembly including a quick-change assembly and a wire pull attachment. The wire pull attachment includes an insert, a basket adapted to receive and secure an article therein, and a swivel assembly interconnecting the insert and basket such that the swivel assembly allows the basket to move freely relative to the insert. | 2010-10-14 |
20100258772 | Apparatus and Methods for the Retensioning of Reinforcement Tendons - An apparatus for retensioning tendons in a concrete slab which has a stressing frame with a first leg having a top part and a bottom part, and a second leg having a top part and a bottom part, so that the top part of the first leg and the top part of the second leg, are pivotally connected; and so that the first leg further comprises a shaft and wherein the bottom part of the second leg further comprises a shaft; and second leg further comprises a contact point proximate to the bottom part of the second leg; so that the bar engagedly connects the first leg so that when the retractor is engaged, the bar is pulled and the contact point on the first leg and the contact point on the second leg are pulled inwards allowing the two pieces of rebar tendons to be connected. | 2010-10-14 |
20100258773 | DRUM WINCH - The invention relates to a drum winch ( | 2010-10-14 |
20100258774 | Lift Assembly And System - A portable, lightweight lift system employing one or more lift assemblies that counters effects of staging is disclosed. The lift system includes multiple lift assemblies, wherein each assembly may be connected to a lifting device such as a hydraulic or motorized jack. A lifting device comprises moving parts which are nested such that the difference in diameters of each of the moving parts is minimized. In one aspect, the lifting device is provided with an arrangement of seals such that, the working area of a smaller diameter tube is greater than the working area of a larger diameter tube causing the smaller tube to move before the larger tube. | 2010-10-14 |
20100258775 | Automatic Rising Jack Stand - Jack stands having support arms that automatically rise to meet lifted loads are disclosed herein. According to one embodiment, a jack stand includes a base having a collar, a support arm, a locking mechanism, and a lifting mechanism. The support arm is movable within the collar and has a plurality of teeth defining grooves and ridges. The locking mechanism has a handle and a stopper and is rotatably coupled to the base at an axis of rotation for movement between a first position where the stopper engages at least one of the grooves to restrict the support arm from moving downwardly, and a second position where the support arm is movable upwardly and downwardly. The lifting mechanism is coupled to the base and is in communication with the support arm to automatically raise the support arm relative to the collar when the locking mechanism is moved to the second position. | 2010-10-14 |
20100258776 | Shallow Trench Type Quadri-Cell of Phase-Change Random Access Memory (PRAM) - A method of forming a phase-change random access memory (PRAM) cell and PRAM arrangement, and embodiments of phase-change random access memory (PRAM) cells and PRAM arrangements are disclosed. A phase-change random access memory (PRAM) cell includes a bottom electrode, a heater resistor coupled to the bottom electrode, a phase change material (PCM) coupled to the heater resistor, and a top electrode coupled to the phase change material. An active region between the heater resistor and the phase change material is defined by a thickness of the heater resistor. | 2010-10-14 |
20100258777 | Diamond Type Quad-Resistor Cells of PRAM - A method of forming a phase-change random access memory (PRAM) cell, and a structure of a phase-change random access memory (PRAM) cell are disclosed. The PRAM cell includes a bottom electrode, a heater resistor coupled to the bottom electrode, a phase change material (PCM) formed over and coupled to the heater resistor, and a top electrode coupled to the phase change material. The phase change material contacts a portion of a vertical surface of the heater resistor and a portion of a horizontal surface of the heater resistor to form an active region between the heater resistor and the phase change material. | 2010-10-14 |
20100258778 | RESISTIVE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A resistive memory device includes a bottom electrode, a resistive layer formed over the bottom electrode and having a structure in which a first resistive layer having an amorphous phase and a second resistive layer having a polycrystal phase are sequentially stacked, and a top electrode formed over the second resistive layer. | 2010-10-14 |
20100258779 | NONVOLATILE MEMORY DEVICE AND MANUFACTURING MEHTOD THEREOF - A nonvolatile memory device of the present invention includes a substrate ( | 2010-10-14 |
20100258780 | PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a Phase-change Random Access Memory (PRAM) device and a method of manufacturing the same. In particular, a PRAM device including a heating layer, wherein the heating layer comprises first and second heating layers having different physical properties from each other and a method of manufacturing the same are provided. Since the PRAM device according to the present invention includes a heating layer having optimal heating characteristics, a PRAM device having high reliability and excellent operating characteristics can be manufactured. | 2010-10-14 |
20100258781 | RESISTIVE SWITCHING MEMORY ELEMENT INCLUDING DOPED SILICON ELECTRODE - A resistive switching memory element including a doped silicon electrode is described, including a first electrode comprising doped silicon having a first work function, a second electrode having a second work function that is different from the first work function by between 0.1 and 1.0 electron volts (eV), a metal oxide layer between the first electrode and the second electrode, the metal oxide layer switches using bulk-mediated switching and has a bandgap of greater than 4 eV, and the memory element switches from a low resistance state to a high resistance state and vice versa. | 2010-10-14 |
20100258782 | RESISTIVE-SWITCHING MEMORY ELEMENTS HAVING IMPROVED SWITCHING CHARACTERISTICS - Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness. | 2010-10-14 |
20100258783 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor memory device includes a plurality of memory cell arrays each includes a plurality of memory cells, the plurality of memory cell arrays being stacked on a semiconductor substrate to form a three-dimensional structure, a first well formed in the semiconductor substrate and having a first conductivity type, an element isolation insulating film including a bottom surface shallower than a bottom surface of the first well in the first well, and buried in the semiconductor substrate, a second well including a bottom surface shallower than the bottom surface of the first well in the first well, formed along a bottom surface of at least a portion of the element isolation insulating film, and made of an impurity having a second conductivity type, and a contact line electrically connected to the first well. | 2010-10-14 |
20100258784 | Method Of Efficient Coupling Of Light From Single-Photon Emitter To Guided Radiation Localized To Sub-Wavelength Dimensions On Conducting Nanowires - A cavity free, broadband approach for engineering photon emitter interactions via sub-wavelength confinement of optical fields near metallic nanostructures. When a single CdSe quantum dot (QD) is optically excited in close proximity to a silver nanowire (NW), emission from the QD couples directly to guided surface plasmons in the NW, causing the wire's ends to light up. Nonclassical photon correlations between the emission from the QD and the ends of the NW demonstrate that the latter stems from the generation of single, quantized plasmons. Results from a large number of devices show that the efficient coupling is accompanied by more than 2.5-fold enhancement of the QD spontaneous emission, in a good agreement with theoretical predictions. | 2010-10-14 |
20100258785 | Superlattice nanopatterning of wires and complex patterns - Fabrication of metallic or non-metallic wires with nanometer widths and nanometer separation distances without the use of lithography. Wires are created in a two-step process involving forming the wires at the desired dimensions and transferring them to a planar substrate. The dimensions and separation of the wires are determined by the thicknesses of alternating layers of different materials that are in the form of a superlattice. Wires are created by evaporating the desired material onto the superlattice that has been selectively etched to provide height contrast between layers. The wires thus formed upon one set of superlattice layers are then transferred to a substrate. | 2010-10-14 |
20100258786 | SELF-ASSEMBLED ORGANIC MONOLAYERS ON GRAPHENE AND METHODS OF MAKING AND USING - Self-assembled organic monolayers on epitaxial graphene are described. The organic molecules are perylene derivatives including 3,4,9,10-perylene-tetracarboxylic dianhydride (PTCDA) molecules arranged in a herringbone phase and/or molecules are of the following formula: | 2010-10-14 |
20100258787 | FIELD EFFECT TRANSISTOR HAVING GRAPHENE CHANNEL LAYER - Provided is a field effect transistor including a graphene channel layer, and capable of increasing an on/off ratio of an operating current by using the graphene of the graphene channel layer. The field effect transistor includes: a substrate; the graphene channel layer which is disposed on a portion of the substrate and includes graphene; a first electrode disposed on a first region of the graphene channel layer and a portion of the substrate; an interlayer disposed on a second region of the graphene channel layer, which is apart from the first region, and a portion of the substrate; a second electrode disposed on the interlayer; a gate insulation layer disposed on a portion of the graphene channel layer, the first electrode, and the second electrode; and a gate electrode disposed on a portion of the gate insulation layer. | 2010-10-14 |
20100258788 | Compositions comprising novel compounds and electronic devices made with such compositions - The present invention relates to novel compounds and polymers, compositions comprising novel compounds or polymers, and electronic devices comprising at least one layer containing the compound or polymer. | 2010-10-14 |
20100258789 | ELECTROLUMINESCENT DEVICE - The present invention provides an EL device that contains a quantum-dots-containing layer in which quantum dots hardly coagulate even under high-temperature conditions, e.g., at a temperature of 90° C. or more, that has a good performance even if heat treatment was carried at a high temperature in its production process, that can retain its emission characteristics for a prolonged period of time, and that has high durability. | 2010-10-14 |
20100258790 | USE OF DIPHENYLAMINO-BIS(PHENOXY)- AND BIS(DIPHENYLAMINO)-PHENOXYTRIAZINE COMPOUNDS - The present invention relates to an organic light-emitting diode comprising at least one diphenylaminobis(phenoxy)triazine or at least one bis(diphenylamino)phenoxytriazine compound, to a light-emitting layer comprising at least one diphenylamino-bis(phenoxy)triazine or at least one bis(diphenylamino)phenoxytriazine compound, to the use of the aforementioned compounds as a matrix material, hole/exciton blocker material, electron/exciton blocker material, hole injection material, electron injection material, hole conductor material and/or electron conductor material, and to a device selected from the group consisting of stationary visual display units, mobile visual display units and illumination units comprising at least one inventive organic light-emitting diode. | 2010-10-14 |
20100258791 | ORGANIC ELECTROLUMINESCENCE DEVICE AND MATERIAL FOR ORGANIC ELECTROLUMINESCENCE DEVICE - An organic electroluminescence device includes: a cathode; an anode; and an organic thin-film layer including at least one layer and provided between the cathode and the anode. At least one layer of the organic thin-film layer includes: an organic-electroluminescence-device material represented by any one of the following formulae (1), (2) and (3); and at least one phosphorescent material, in which the organic-electroluminescence-device material may have a substituent. A or Ar may be substituted by a phenyl group or a naphthyl group. | 2010-10-14 |
20100258792 | LIGHT EMITTING ELEMENT, LIGHT EMITTING DEVICE, AND ELECTRONIC APPARATUS - It is an object of the present invention to provide a light emitting element with a low driving voltage. In a light emitting element, a first electrode; and a first composite layer, a second composite layer, a light emitting layer, an electron transporting layer, an electron injecting layer, and a second electrode, which are stacked over the first electrode, are included. The first composite layer and the second composite layer each include metal oxide and an organic compound. A concentration of metal oxide in the first composite layer is higher than a concentration of metal oxide in the second composite layer, whereby a light emitting element with a low driving voltage can be obtained. Further, the composite layer is not limited to a two-layer structure. A multi-layer structure can be employed. However, a concentration of metal oxide in the composite layer is gradually higher from the light emitting layer to first electrode side. | 2010-10-14 |
20100258793 | Solution composition for forming oxide thin film and electronic device including the oxide thin film - A solution composition for forming an oxide thin film may include a first compound including zinc, a second compound including indium, and a third compound including magnesium or hafnium, and an electronic device may include an oxide semiconductor including zinc, indium, and magnesium. The zinc and hafnium may be included at an atomic ratio of about 1:0.01 to about 1:1. | 2010-10-14 |
20100258794 | FIELD EFFECT TRANSISTOR - A field effect transistor is provided including a gate electrode ( | 2010-10-14 |
20100258795 | ZINC OXIDE BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a method of manufacturing a ZnO-based semiconductor device having at least p-type ZnO-based semiconductor layer, which includes a step of forming a contact metal layer on the p-type ZnO-based semiconductor layer wherein the contact metal layer contains at least one of Ni and Cu; and a step of performing heat treatment of the contact metal layer and the p-type ZnO-based semiconductor layer under an oxygen-free atmosphere to form a mixture layer including elements of the p-type ZnO-based semiconductor layer and the contact metal layer at a boundary region therebetween while maintaining a metal phase layer on a surface of the contact metal layer. | 2010-10-14 |
20100258796 | ZINC OXIDE BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a method of manufacturing a ZnO-based semiconductor device, the method includes a first metal layer formation step of forming a first metal layer on a p-type ZnO-based semiconductor layer in island-form and/or mesh-form; a heat treatment step of performing heat treatment of the first metal layer and the p-type ZnO-based semiconductor layer under an oxygen-free atmosphere to form a mixture layer comprising elements of the p-type ZnO-based semiconductor layer and the first metal layer at a boundary region therebetween while maintaining a metal phase layer on a surface of the first metal layer; and a second metal layer formation step of forming a second metal layer so as to cover the first metal layer and the exposed portions of the p-type ZnO-based semiconductor layer through openings of the first metal layer. | 2010-10-14 |
20100258797 | ORGANIC ELECTROLUMINESCENT DEVICE AND METHOD FOR MANUFACTURING THE SAME - An organic electroluminescent device is provided, including at least one light emitting layer | 2010-10-14 |
20100258798 | INTEGRATED CIRCUIT HAVING A FILLER STANDARD CELL - An integrated circuit includes a functional block having a plurality of standard cells. The plurality of standard cells includes a plurality of functional standard cells and a filler standard cell. Each functional standard cell of the plurality of functional standard cells has a rectangular boundary. The filler standard cell has a rectangular boundary adjacent to at least one of the functional standard cells. The filler standard cell is selectable between a first state and a second state. The filler standard cell is non-functional in the first state. The filler standard cell has functional test structures coupled to a first metal layer in the second state. This allows for test structures helpful in analyzing functionality of circuit features such as transistors without requiring additional space on the integrated circuit. | 2010-10-14 |
20100258799 | Bipolar transistor and method of manufacturing the same - A bipolar transistor at least includes a semiconductor substrate including an N | 2010-10-14 |
20100258800 | Semiconductor stacking layer and fabricating method thereof - A fabricating method of a semiconductor stacking layer includes following steps. First, an amorphous silicon (a-Si) layer is formed on a substrate. Surface treatment is then performed on a surface of the a-Si layer. After that, a doped microcrystalline silicon (μc-Si) layer is formed on the treated surface of the a-Si layer, wherein interface defects existing between the a-Si layer and the doped μc-Si layer occupy an area in a cross-sectional region having a width of 1.5 micrometers and a thickness of 40 nanometers, and a ratio of the occupied area in the cross-sectional region is equal to or less than 10%. The method of fabricating the semiconductor stacking layer can be applied to a fabrication process of a semiconductor device to effectively reduce the interface defects of the semiconductor stacking layer. | 2010-10-14 |
20100258801 | SEMICONDUCTOR COMPONENT INCLUDING A LATERAL TRANSISTOR COMPONENT - A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. On the carrier layer a first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer and from which at least the first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer. | 2010-10-14 |
20100258802 | Semiconductor Device and Method for Manufacturing the Same - An object is to provide an n-channel transistor and a p-channel transistor having a preferred structure using an oxide semiconductor. A first source or drain electrode which is electrically connected to a first oxide semiconductor layer and is formed using a stacked-layer structure including a first conductive layer containing a first material and a second conductive layer containing a second material, and a second source or drain electrode which is electrically connected to a second oxide semiconductor layer and is formed using a stacked-layer structure including a third conductive layer containing the first material and a fourth conductive layer containing the second material are included. The first oxide semiconductor layer is in contact with the first conductive layer of the first source or drain electrode, and the second oxide semiconductor layer is in contact with the third and the fourth conductive layers of the second source or drain electrode. | 2010-10-14 |
20100258803 | THIN FILM ACTIVE ELEMENT GROUP, THIN FILM ACTIVE ELEMENT ARRAY, ORGANIC LIGHT EMITTING DEVICE, DISPLAY APPARATUS, AND THIN FILM ACTIVE ELEMENT MANUFACTURING METHOD - The objective is to achieve an organic thin film transistor group that can be manufactured more easily and at a lower cost. Provided is a thin film active element group comprising a drive active element having a semiconductor channel layer formed in a channel region between a source electrode and a drain electrode; and a switch active element having a semiconductor channel layer formed in a channel region between a source electrode and a drain electrode, the switch active element switching the drive active element. The drive active element and the switch active element are formed to be separated from each other in a direction of a channel width such that a straight line associated with the channel region of the drive active element and a straight line associated with the channel region of the switch active element are parallel to each other. The channel region of the drive active element and the channel region of the switch active element may be aligned linearly with each other in the direction of the channel width. | 2010-10-14 |
20100258804 | BACKPLANE STRUCTURES FOR ELECTRONIC DEVICES - There is provided a backplane for an organic electronic device including a TFT substrate having a base substrate, a polysilicon layer, a gate dielectric layer, a gate electrode, an interlayer dielectric, and a data electrode; an insulating layer over the TFT substrate; a multiplicity of first openings in the insulating layer having a depth d | 2010-10-14 |
20100258805 | Thin Film Transistor and Image Display Unit - One embodiment of the present invention is a thin film transistor having a substrate, a gate electrode formed on the substrate, a gate insulating film, a semiconductor layer formed on the gate insulating film, a protective film formed on the semiconductor layer and the gate insulating film and having first and second opening sections which are separately and directly formed on the semiconductor layer, a source electrode formed on the protective film and electrically connected to the semiconductor layer at the first opening section of the protective film, and a drain electrode formed on the protective film and electrically connected to the semiconductor layer at the second opening section of the protective film. | 2010-10-14 |
20100258806 | ELECTRONIC DEVICE, METHOD OF PRODUCING THE SAME, AND DISPLAY DEVICE - An electronic device includes: a substrate; a lower electrode which is provided on the substrate and has an edge portion cross-section having a taper angle of 60° or less; a SiO | 2010-10-14 |
20100258807 | DISPLAY DEVICE - The present invention provides a display device where thin film transistors are formed on a substrate on which an image display portion is formed, wherein the thin film transistors comprise: a gate electrode; a gate insulating film formed so as to cover the gate electrode; a semiconductor layer in island form which is formed on the gate insulating film so as to overlap with the gate electrode; and a pair of electrodes formed on the semiconductor layer so as to face each other, and the semiconductor layer is provided within a region where the gate electrode is formed as viewed in a plane, and formed of a crystal semiconductor layer and an amorphous semiconductor layer, which are layered in sequence on the gate electrode side, characterized in that the gate electrode is formed so as to have such a film thickness that the light transmittance is 0.3% or less at least in the region facing the semiconductor layer. | 2010-10-14 |
20100258808 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - A thin film transistor and a manufacturing method thereof are provided. A bottom gate, a gate insulating layer and an amorphous semiconductor layer are formed on a substrate. The amorphous semiconductor layer has an uneven upper surface. A laser annealing process is performed on the amorphous semiconductor layer through the uneven upper layer to transform the amorphous semiconductor layer into a polycrystalline semiconductor layer having a smaller-crystallizing-section and a greater-crystallizing-section. Another gate insulating layer, an upper gate and patterned photoresist layer are formed on the polycrystalline semiconductor layer. Patterns of the upper gate and the bottom gate are defined by the same photo-mask. A source/drain is formed in the polycrystalline semiconductor layer. An etching process with etching selectivity is performed on the upper gate and the patterned photoresist layer to make a length of the upper gate shorter than that of the bottom gate. | 2010-10-14 |
20100258809 | METHOD OF MANUFACTURING LOCALIZED SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES IN A BULK SEMIDONDUCTOR WAFER - A method of forming a localized SOI structure in a substrate ( | 2010-10-14 |
20100258810 | PIXEL UNIT AND FABRICATING METHOD THEREOF - A method for fabricating a pixel unit is provided. A TFT is formed on a substrate. A protection layer and a patterned photoresist layer are sequentially formed on the substrate entirely. A patterned protection layer is formed by using the patterned photoresist layer as a mask and partially removing the protection layer, wherein the patterned protection layer has an undercut located at a sidewall thereof. A pixel electrode material layer is formed to cover the substrate, the TFT and the patterned photoresist layer, wherein the electrode material layer is disconnected at the undercut and exposes the undercut. A pixel electrode electrically connected to the TFT is formed by lifting off the patterned photoresist layer and parts of the electrode material layer covering the patterned photoresist layer simultaneously through a stripper, wherein the stripper permeates from the undercut to an interface of the patterned photoresist layer and the patterned protection layer. | 2010-10-14 |
20100258811 | Semiconductor Device and Method of Manufacturing the Same - In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit, the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT. The driving circuit TFT is thus prevented from suffering electrostatic discharge damage. | 2010-10-14 |
20100258812 | GROUP-III NITRIDE SEMICONDUCTOR FREESTANDING SUBSTRATE AND MANUFACTURING METHOD OF THE SAME - To provide a group-III nitride semiconductor freestanding substrate, with carrier concentration of a peripheral part of a n-type group-III nitride semiconductor freestanding substrate set to be lower than the carrier concentration inside of the peripheral part. In this freestanding substrate, preferably value Δσ obtained by dividing a difference between a maximum value of the carrier concentration and a minimum value of the carrier concentration in a surface of the freestanding substrate by the maximum value of the carrier concentration is greater than 0.05, and the carrier concentration in any place in the surface of the freestanding substrate exceeds 5.0×10 | 2010-10-14 |
20100258813 | Light Emitting Device and Fabrication Thereof - A light emitting diode of the invention via laser scribing method is used to build up the mesh texture on the backside of the sapphire of light emitting diodes. Then high reflectivity and thermal conductivity metals are deposited onto the mesh structure. Since the multiple-reflection from the texture, the light extraction efficiency will be increased. Meanwhile, the high thermal conductivity metal filled into the sapphire also lead to the better heat dissipation within the light emitting diodes, it will decrease the junction temperature and avoid the thermal effect to reduce light efficiency and the lifetime. | 2010-10-14 |
20100258814 | Light emitting diode and method of fabrication thereof - There is provided a light emitting diode fabricating method including: a) forming, on a substrate and via a buffer layer, an epitaxial growth layer that includes a light emitting layer, and forming one electrode on a surface of the epitaxial growth layer; b) joining a supporting substrate to the one electrode; c) removing, by etching, the substrate and the buffer layer; and d) forming another electrode at a region, other than a region where output light is taken-out, at a reverse surface opposite the surface of the epitaxial growth layer on which the one electrode is formed. | 2010-10-14 |
20100258815 | SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An objective is to provide a manufacturing method of a silicon carbide semiconductor device in which an electric field applied to a gate oxide film can be relaxed and thereby reliability can be ensured, and by the manufacturing method increase of the manufacturing cost can also be prevented as much as possible. Well regions, channel regions, and gate electrodes are formed so that, given that extending lengths, with respect to the inner sides of source regions, of each of the well regions, the channel regions, and the gate electrodes are Lwell, Lch, and Lg, respectively, a relationship of Lch2010-10-14 | |
20100258816 | Silicon carbide semiconductor device and manufacturing method therefor - With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate. | 2010-10-14 |
20100258817 | Silicon carbide semiconductor device and manufacturing method therefor - With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate. | 2010-10-14 |
20100258818 | LIGHT EMITTING DIODE CHIP AND MANUFACTURING METHOD THEREOF - The present invention provides a manufacturing method of an LED chip. First, a device layer is formed on a growth substrate, wherein the device layer has a first surface connected to the growth substrate and a second surface. Next, a plurality of first trenches are formed on the second surface of the device layer. Then, a protection layer is formed on the side walls of the first trenches. After that, the second surface is bonded with a supporting substrate and the device layer is then separated from the growth substrate. Further, a plurality of second trenches corresponding to the first trenches are formed in the device layer to form a plurality of LEDs, wherein the second trenches extend from the first surface to the bottom portions of the first trenches. Furthermore, a plurality of electrodes are formed on the first surface of the device layer. | 2010-10-14 |
20100258819 | SUBSTRATE FOR AN LED SUBMOUNT, AND LED SUBMOUNT - A substrate for an LED submount may include a plurality of placement locations on its substrate top side and a plurality of pairs each composed of an electrical anode connection and an electrical cathode connection, wherein the anode connections are arranged on a first side section of the substrate top side and the cathode connections are arranged on a second side section of the substrate top side, having at least one connection dividing conductor track leading from one placement location past at least two other placement locations to an electrical connection, wherein the connection dividing conductor track leads past the at least two other placement locations on the inside. | 2010-10-14 |
20100258820 | MANUFACTURING METHOD FOR CONTACT PADS OF A THIN FILM TRANSISTOR ARRAY PANEL, AND A THIN FILM TRANSISTOR ARRAY PANEL HAVING SUCH CONTACT PADS - A thin film transistor array panel includes a first insulation substrate, a plurality of data wires formed on the first insulation substrate and extending in a first direction, a data pad region formed on the first insulation substrate and having plural ones of the data wires extending therefrom, and an organic layer formed on the data wires, where the organic layer has a greater thickness where it is disposed over the data wires than the thickness it has between the data wires. The surface of the organic layer of the data pad region includes minute slit patterns that extend parallel to the first direction of the data wires, and the data wires have line boundaries of a zigzag shape. | 2010-10-14 |
20100258821 | CONCAVE-HEMISPHERE-PATTERNED ORGANIC TOP-LIGHT EMITTING DEVICE - A first device is provided. The first device includes an organic light emitting device, which further comprises a first electrode, a second electrode, and an organic emissive layer disposed between the first and second electrode. Preferably, the second electrode is more transparent than the first electrode. The organic emissive layer has a first portion shaped to form an indentation in the direction of the first electrode, and a second portion shaped to form a protrusion in the direction of the second electrode. The first device may include a plurality of organic light emitting devices. The indentation may have a shape that is formed from a partial sphere, a partial cylinder, a pyramid, or a pyramid with a mesa, among others. The protrusions may be formed between adjoining indentations or between an indentation and a surface parallel to the substrate. | 2010-10-14 |
20100258822 | SEMICONDUCTOR LIGHT-EMITTING DEVICE ASSEMBLY MANUFACTURING METHOD, SEMICONDUCTOR LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND IMAGE DISPLAY DEVICE - A method of manufacturing a semiconductor light-emitting device assembly includes providing light-emitting device portions on a light-emitting device production substrate so as to be separated from each other, each of the light-emitting device portions including a laminated structure, in which a first compound semiconductor layer, an active layer, and a second compound semiconductor layer are sequentially laminated, and a second electrode provided on the second compound semiconductor layer; forming an insulating layer on an entire surface so as to have an opening portion in which a top central portion of the second electrode is exposed; providing an extraction electrode to each light-emitting device portion so as to be patterned to extend from a top surface of the second electrode to the insulating layer; and forming an adhesive layer so as to cover an entire surface and attaching a support substrate using the adhesive layer. | 2010-10-14 |
20100258823 | LIGHT EMITTING DIODE PACKAGE AND METHOD OF MANUFACTURING THE SAME - Provided is a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes a package main body with a cavity, a plurality of light emitting diode chips, a wire, and a plurality of lead frames. The plurality of light emitting diode chips are mounted in the cavity. The wire is connected to ah electrode of at least one light emitting diode chip. The plurality of lead frames are formed in the cavity, and at least one lead frame is electrically connected to the light emitting diode chip or a plurality of wires. | 2010-10-14 |
20100258824 | ELECTRODE STRUCTURE AND LIGHT-EMITTING DEVICE USING THE SAME - An electrode structure includes at least two first electrodes and at least two second electrodes configured to be electrically connected in parallel to a power supply. Each of the first electrodes includes at least one first pad and at least one first extending wire with one end connected to the first pad, and the at least two first electrodes are spaced apart from each other. Each of the second electrodes includes at least one second pad and at least one second extending wire with one end connected to the second pad, and the at least two second electrodes are spaced apart from each other. | 2010-10-14 |
20100258825 | LIGHT EMITTING DEVICE - There is provided a light emitting device which makes it possible to reduce optical loss and improve brightness by increasing a ratio of fluorescent light that is not reabsorbed by a light emitting element while decreasing a ratio of scattered light that is reabsorbed by the light emitting element. Individual faces forming outer faces of the light emitting element | 2010-10-14 |
20100258826 | LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - A light emitting diode ( | 2010-10-14 |
20100258827 | LIGHT-EMITTING DIODE PACKAGE AND WAFER-LEVEL PACKAGING PROCESS OF LIGHT-EMITTING DIODE - A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug. | 2010-10-14 |
20100258828 | SOLID STATE LIGHT EMITTER WITH NEAR-UV PUMPED NANOPHOSPHORS FOR PRODUCING HIGH CRI WHITE LIGHT - A solid state white light emitting device includes a semiconductor chip producing near ultraviolet (UV) electromagnetic energy in a range of 380-420 nm, e.g. 405 nm. The device may include a reflector forming and optical integrating cavity. Phosphors, such as doped semiconductor nanophosphors, within the chip packaging of the semiconductor device itself, are excitable by the near UV energy. However the re-emitted light from the phosphors have different spectral characteristics outside the absorption ranges of the phosphors, which reduces or eliminates re-absorption. The emitter produces output light that is at least substantially white and has a color rendering index (CRI) of 75 or higher. The white light output of the emitter may exhibit color temperature in one of the following specific ranges along the black body curve: 2,725±145° Kelvin; 3,045±175° Kelvin; 3,465±245° Kelvin; 3,985±275° Kelvin; 4,503±243° Kelvin; 5,028±283° Kelvin; 5,665±355° Kelvin; and 6,530±510° Kelvin. | 2010-10-14 |
20100258829 | METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT AND OPTOELECTRONIC COMPONENT - A method for producing an optoelectronic component including providing a radiation-emitting device, heating the device and applying a liquid lens material in a beam path of the device, wherein, with crosslinking of the lens material, a lens shaped onto the device is formed. | 2010-10-14 |
20100258830 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME - Light from a semiconductor light-emitting element travels in all directions. Thus, light that travels in the directions other than a lighting direction cannot be used effectively. Means for forming a semiconductor light-emitting element having tilted side surfaces, and forming a reflective layer on the tilted side surfaces has been proposed. However, since the tilted surfaces are formed by an etching method or the like, it takes a long time to form the tilted surfaces, and it is difficult to control the tilted surfaces. As a solution to these problems, semiconductor light-emitting elements are placed on a submount substrate and sealed with a sealant, and then a groove is formed in a portion between adjoining ones of the semiconductor light-emitting elements. The grooves formed are filled with a reflective material, and a light-emitting surface is polished. Then, the submount substrate is divided into individual semiconductor light-emitting devices. Thus, a semiconductor light-emitting device having a reflective layer on its side surfaces can be obtained. | 2010-10-14 |
20100258831 | SIDE EMITTING DEVICE WITH HYBRID TOP REFLECTOR - A side-emitting light emitting device ( | 2010-10-14 |
20100258832 | SIDE EMITTING DEVICE WITH HYBRID TOP REFLECTOR - A side-emitting light emitting device ( | 2010-10-14 |
20100258833 | ORGANIC ELECTROLUMINESCENCE ELEMENT AND MANUFACTURING METHOD THEREOF - The organic electroluminescence element includes an anode metal layer above a substrate. The anode metal layer comprises an inner region and an outer region. The inner region is adjacent to and different than the outer region. An upper surface of the inner region is lower than an upper surface of the outer region. A metal oxide layer is on the inner region of the metal anode layer. A hole transport layer is above the metal oxide layer and the inner region. The hole transport layer comprises a hole-transporting organic material. An organic luminescent layer is above the hole transport layer and the inner region. A cathode layer is above the organic luminescent layer and the inner region. The cathode layer injects electrons into the organic luminescent layer. An insulating layer is above the outer region of the anode metal layer. | 2010-10-14 |
20100258834 | VERTICAL LED WITH CURRENT GUIDING STRUCTURE - Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided. | 2010-10-14 |
20100258835 | LIGHT EMITTING DIODE DEVICE HAVING UNIFORM CURRENT DISTRIBUTION AND METHOD FOR FORMING THE SAME - A semiconductor is disclosed. The semiconductor may include a transparent layer having a first surface. The semiconductor may further include a first doped layer formed over the first surface of the transparent layer. The first doped layer may have a plurality of first-type metal electrodes formed thereon. The semiconductor may further include a second doped layer formed over the first surface of the transparent layer. The second doped layer may have a plurality of second-type metal electrodes formed thereon. The semiconductor may also include an active layer formed over the first surface of the transparent layer and disposed between the first doped layer and the second doped layer. The first-type metal electrodes and the second-type metal electrodes may be alternately arranged and the distances between each first-type metal electrode and its adjacent second-type metal electrodes may be substantially equal. | 2010-10-14 |
20100258836 | LIGHT-EMITTING DEVICE - A light-emitting device includes a substrate; a stacked structure including a first type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first type semiconductor layer, and a second type semiconductor layer positioned on the light-emitting structure, wherein the stacked structure includes a depression exposing the first type semiconductor layer; a first electrode positioned on the first type semiconductor layer in the depression, the first electrode including at least one first pad and at least one first extending wire with one end connected to the first pad; a second electrode positioned on the second type semiconductor layer, the second electrode including at least one second pad and at least one second extending wire with one end connected to the second pad; wherein the distance between the first pad and the second pad is greater than 70% of the width of the light-emitting device. | 2010-10-14 |
20100258837 | SEMICONDUCTOR LIGHT EMITTING ELEMENT AND SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME - In a semiconductor light emitting device, in which a light emitting layer is formed on one surface of a conductive substrate, and an n-type electrode and a p-type electrode are formed on the same side as the light emitting layer, there has been the problem that, if larger electric power is applied, heat is generated near the n-side electrode to reduce luminous efficiency. | 2010-10-14 |
20100258838 | PACKAGING SUBSTRATE DEVICE, METHOD FOR MAKING THE PACKAGING SUBSTRATE DEVICE, AND PACKAGED LIGHT EMITTING DEVICE - A packaging substrate device includes: a first laminate including a first ceramic substrate and a first copper pattern disposed on an upper surface of the first ceramic substrate; and a second laminate disposed over the first copper pattern and including a second ceramic substrate, a second copper pattern that is disposed on an upper surface of the second ceramic substrate, and a through hole extending through the second ceramic substrate and the second copper pattern to expose a copper portion of the first copper pattern. A light emitting semiconductor die can be mounted on the copper portion within the through hole. Efficient heat dissipation can be achieved through the first laminate. | 2010-10-14 |
20100258839 | ORGANIC ELECTROLUMINESCENCE DEVICE AND METHOD FOR MANUFACTURING THE SAME - An organic electroluminescent device comprising a supporting substrate, a sealing substrate and an organic electroluminescent element, comprising: the organic electroluminescent element mounted on the supporting substrate, and enclosed between the supporting substrate and the sealing substrate, and an insulating layer that covers the organic electroluminescent element, wherein the supporting substrate and/or the sealing substrate adhered to the insulating layer is formed of a material having thermal conductivity of 2 W/m·K or more, and wherein one surface of the supporting substrate and/or the sealing substrate formed of the material having the thermal conductivity, which is the surface constituting an exterior of the organic electroluminescent device, has surface roughness (Ra value) of 10 nm or more and 1 mm or less. | 2010-10-14 |
20100258840 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One embodiment provides a cell area and a junction termination area at a first side of a semiconductor zone of a first conductivity type. At least one first region of a second conductivity type is formed at a second side of the semiconductor zone. The at least one first region is opposed to the cell area region. At least one second region of the second conductivity type is formed at the second side of the semiconductor zone. The at least one second region is opposed to the cell area region and has a lateral dimension smaller than the at least first region. | 2010-10-14 |
20100258841 | BACK DIFFUSION SUPPRESSION STRUCTURES - An enhancement-mode GaN transistor, the transistor having a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate containing acceptor type dopant elements, and a diffusion barrier comprised of a III Nitride material between the gate and the buffer layer. | 2010-10-14 |
20100258842 | ENHANCEMENT MODE GALLIUM NITRIDE TRANSISTOR WITH IMPROVED GATE CHARACTERISTICS - An enhancement mode GaN transistor having a gate pGaN structure having a thickness which avoids dielectric failure. In one embodiment, this thickness is in the range of 400 Å to 900 Å. In a preferred embodiment, the thickness is 600 Å. | 2010-10-14 |
20100258843 | ENHANCEMENT MODE GaN HEMT DEVICE AND METHOD FOR FABRICATING THE SAME - An enhancement-mode GaN transistor and a method of forming it. The enhancement-mode GaN transistor includes a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate III-V compound containing acceptor type dopant elements, and a gate metal, where the gate III-V compound and the gate metal are formed with a single photo mask process to be self-aligned and the bottom of the gate metal and the top of the gate compound have the same dimension. The enhancement mode GaN transistor may also have a field plate made of Ohmic metal, where a drain Ohmic metal, a source Ohmic metal, and the field plate are formed by a single photo mask process. | 2010-10-14 |
20100258844 | BUMPED, SELF-ISOLATED GaN TRANSISTOR CHIP WITH ELECTRICALLY ISOLATED BACK SURFACE - A semiconductor device comprising a silicon substrate, a compound semiconductor material, an insulating material between the silicon substrate and the compound semiconductor material, and a top surface comprising means of electrical connection, and passivation material, where the passivation material is silicon nitride, silicon dioxide, or a combination of both. The present invention eliminates the need for a thick electrical insulator between a heat sink and the back surface of a surface mounted device by the inclusion of an AlN seed layer to electrically isolate the silicon substrate of the device. The sidewalls of the device are also electrically isolated from the active area of the device. | 2010-10-14 |
20100258845 | Semiconductor device and method for manufacturing same - There is provided a semiconductor device capable of deactivating 2-dimensional electron gas (2DEG) layers in a buffer layer having a multi-layer film structure. The buffer layer is formed in a high electron mobility transistor (HEMT) formed on a silicon (Si) substrate. The semiconductor device includes the substrate whose uppermost layer is the Si layer, the buffer layer constructed by alternately stacking a plurality of first layers and a plurality of second layers on the Si layer, third layer serving as an electron transit layer formed on the buffer layer, and fourth layer serving as an electron supplying layer formed on the third layer. The first layer is composed of the same material as for the third layer. A p-type impurity is introduced into the first layers so as to deactivate the 2DEG layers formed in the first layer near interfaces between the first and second layers. | 2010-10-14 |
20100258846 | ELECTRONIC DEVICE WITH CONTROLLED ELECTRICAL FIELD - The disclosure relates to electronic devices and associated methods of manufacture including materials of the Group III/N. An exemplary device successively includes, from its base towards its surface: (i) a support substrate, (ii) a layer adapted to contain an electron gas, (iii) a barrier layer, and (iv) a superficial layer extending on at least one part of the surface of the barrier layer, wherein the superficial layer has an electrical field of which the current is controlled so that, in at least one first region of the superficial layer, the electrical field is weaker than in a second region of the superficial layer. | 2010-10-14 |
20100258847 | Charge Coupled Device With High Quantum Efficiency - A six-phase charge coupled device (CCD) pixel includes a pixel pair, with each pixel having two adjacent control gates overlying corresponding variable potential wells, where voltages applied to the control gates enable charge to be accumulated into and transferred out of the wells. A clear window region overlies a fixed potential gradient region, decreasing in potential away from the control gates. This region enables a wide band of photons to be sensed by the photosensitive silicon of the CCD. The decreasing potential levels facilitate high charge transfer efficiency (i.e., high CTE) from pixel to pixel via the control or transfer gates. By applying particular voltages to the control gates, charge can be quickly and efficiently transferred between pixels. In addition, the window provides a self aligned mask for the implantation steps and thus prevents the formation of pockets (or wells) due to misalignments that decrease the charge transfer efficiency and causes non-uniformity problems as associated with prior art. Furthermore the window provides a flat region that can be covered with an anti-reflective (AR) coating layer, thus further increasing the quantum efficiency. | 2010-10-14 |
20100258848 | COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME - A MISFET, such as a GaN transistor, with low gate leakage. In one embodiment, the gate leakage is reduced with a compensated GaN layer below the gate contact and above the barrier layer. In another embodiment, the gate leakage is reduced by employing a semi-insulating layer below the gate contact and above the barrier layer. | 2010-10-14 |
20100258849 | MAGNETIC TUNNEL JUNCTION TRANSISTOR - A magnetic tunnel junction transistor. In a particular embodiment, the magnetic tunnel junction transistor includes a tunnel barrier having a high resistance when in a non-ferromagnetic state, and a low resistance when in a ferromagnetic state. The tunnel barrier is switchable between the non-ferromagnetic and the ferromagnetic states. | 2010-10-14 |
20100258850 | SEMICONDUCTOR INTEGRATED DEVICE - A semiconductor integrated device including a capacitor having a structure suitable for a larger capacitance is disclosed. A first electrode layer is electrically isolated by a first device isolation layer. An interelectrode insulating film is formed on the first electrode layer and the first device isolation layer and having an opening extending to the first electrode layer. A first electrode portion is formed on the interelectrode insulating film and electrically connected to the first electrode layer through the opening. A second electrode portion is formed on the interelectrode insulating film and electrically isolated from the first electrode layer. A third electrode portion is formed so as to penetrate through the interelectrode insulating film from a lower surface of the second electrode portion formed above the first device isolation layer, then to protrude inside the first device isolation layer, and to face side surfaces of the first electrode layer. | 2010-10-14 |
20100258851 | NANOCRYSTAL MEMORIES AND METHODS OF FORMING THE SAME - Nanocrystal memories and methods of making the same are disclosed. In one embodiment, a memory device comprises a substrate, a tunneling oxide, a silicide nanocrystal floating gate, and a control oxide. The tunneling oxide is positioned upon a first surface of the substrate, the silicide nanocrystal floating gate is positioned upon the tunneling oxide, and the control oxide positioned upon the nanocrystal floating gate. | 2010-10-14 |
20100258852 | NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed. | 2010-10-14 |