41st week of 2015 patent applcation highlights part 60 |
Patent application number | Title | Published |
20150288329 | Junction Box - The present invention relates to a junction box comprising a housing, an electric connection module, a monitor module, and a cable module. A solar module transmits electricity generated by the solar module to a power conversion device; moreover, a plurality of signal wires of the cable module transmit the parameter supervised by the monitor module to an external monitoring and controlling device at the same time. Therefore, the monitor module can inform users the using information of the solar module such that users can judge the timing of repairing and replacing the external solar module and so as to achieve an ultimate using benefit of the solar module. | 2015-10-08 |
20150288330 | Pairing of Components in a Direct Current Distributed Power Generation System - A method of signaling between a photovoltaic module and an inverter module. The inverter module is connected to the photovoltaic module. In an initial mode of operation an initial code is modulated thereby producing an initial signal. The initial signal is transmitted from the inverter module to the photovoltaic module. The initial signal is received by the photovoltaic module. The operating mode is then changed to a normal mode of power conversion, and during the normal mode of operation a control signal is transmitted from the inverter to the photovoltaic module. A control code is demodulated and received from the control signal. The control code is compared with the initial code producing a comparison. The control command of the control signal is validated as a valid control command from the inverter module with the control command only acted upon when the comparison is a positive comparison. | 2015-10-08 |
20150288331 | METHOD AND DEVICE FOR MONITORING A PHOTOVOLAIC SYSTEM - A device and a method for monitoring a photovoltaic system having a number of parallel-connected strings routed towards a common connecting lead for a reverse current. In the method it is provided for a current flow to be detected in a preferred direction in each of the strings and for a first total current flow to be created therefrom, for a current flow to be detected in the preferred direction in the connecting lead and for a second total current flow to be created therefrom, and for the first total current flow to be compared with the second total current flow, wherein a reverse current is recognized if the first total current flow deviates from the second total current flow by more than a tolerance value. | 2015-10-08 |
20150288332 | FAST PULSE GENERATOR - A pulse generator is disclosed. The pulse generator can include a pulsed switch, such as a diode. The pulsed switched can be connected between an input source, such as an oscillator and a frequency multiplier. | 2015-10-08 |
20150288333 | AMPLIFIER WITH ENHANCED LINEARITY - An apparatus includes a first amplifier that includes a transistor that is coupled to an input terminal of the first amplifier. The transistor is biased to operate in a first mode based on a first operating point. The apparatus also includes a second amplifier coupled in parallel with the first amplifier. The second amplifier includes a second transistor coupled to an input terminal of the second amplifier. The second transistor is biased to operate in a second mode based on a second operating point that is temperature-dependent. | 2015-10-08 |
20150288334 | POWER AMPLIFIER - An apparatus includes a differential amplifier. The differential amplifier includes a first side circuit configured to receive a first input signal, a second side circuit configured to receive a second input signal, and a resonant tank circuit coupled between the first and second side circuits. A first capacitor and first switch may be provided in series between a source and drain of a cascode transistor. A second capacitor and second switch may be provided in series between a source and drain of an input transistor. A method includes receiving a first input signal by a first side circuit, receiving a second input signal by a second side circuit, controlling a resource of a resonant tank circuit, and outputting an output signal according to the first and second input signals. The resource of the resonant tank circuit may be controlled according to a transmission mode, frequency band, or both. | 2015-10-08 |
20150288335 | CLASS D AUDIO AMPLIFIER WITH ADJUSTABLE LOOP FILTER CHARACTERISTICS - The present invention relates to a class D audio amplifier comprising a pulse width modulator, an adjustable loop filter and a feedback loop. The pulse width modulator generates a first set of pulse width modulated control signals at an adjustable modulation frequency for respective switch control terminals of a first output driver. A controller of the class D audio amplifier is configured to control frequency response characteristics of the adjustable loop filter based on a frequency setting of the adjustable modulation frequency. | 2015-10-08 |
20150288336 | APPARATUS AND METHODS FOR MULTI-CHANNEL AUTOZERO AND CHOPPER AMPLIFIERS - Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase. | 2015-10-08 |
20150288337 | REDUCING COMMON MODE TRANSCONDUCTANCE IN INSTRUMENTATION AMPLIFIERS - An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first transistor. The first amplifier is configured to receive a positive phase signal of a differential signal. The second amplifier includes a second transistor and is configured to receive a negative phase signal of the differential signal. The first and second transistors each include a gate, source, and drain. The first transistor drain is connected to the second transistor drain. | 2015-10-08 |
20150288338 | POWER AMPLIFIER CIRCUIT CAPABLE OF ADJUSTING GAIIN DYNAMICALLY - The invention provides a power amplifier circuit capable of adjusting gain dynamically. The power amplifier circuit comprises a power supply unit configured to provide a power supply signal; an input power detection unit for receiving at least one input signal and the power supply signal, detecting the power of the input signal to generate a detection signal, and pulling up or down a bias signal by the detection signal; a power amplifier unit for receiving the input signal and the bias signal, adjusting the gain by the controlling of the bias signal, and amplifying the input signal by the adjusted gain to output at least one output signal. Therefore, the gain of power amplifier circuit will be adjusted dynamically by detecting the power of the input signal, so that the output signal conforming to the actual power may be outputted. | 2015-10-08 |
20150288339 | INVERTER-AND-SWITCHED-CAPACITOR-BASED SQUELCH DETECTOR APPARATUS AND METHOD - A squelch detector includes is configured to receive a time-varying differential communication signal, and includes switched capacitors and an inverter configured to provide an indication of whether a level of the received communication signal is above or below a threshold value. | 2015-10-08 |
20150288340 | LINE FILTER AND ELECTRIC POWER SUPPLY DEVICE COMPRISING SAME - Disclosed are a line filter and a power supply apparatus including the line filter. The line filter includes a first inductor having a first coil wound around a first bobbin; and a second inductor having a second coil wound around a second bobbin, the second inductor being induced by the first inductor to flow current, wherein the first bobbin and the second bobbin are physically separated from each other. The power supply apparatus includes such a line filter. | 2015-10-08 |
20150288341 | PASSIVE EQUALIZER - A first meander line | 2015-10-08 |
20150288342 | MICROWAVE PROCESSING DEVICE - A microwave processing device includes: a periodic structure body which forms a surface-wave transmission line to transmit surface waves of microwaves; an oscillator which generates microwave power; and a transmitting part which transmits the microwave power generated by the oscillator to the periodic structure body, wherein a matching part is provided at a connecting portion between the periodic structure body and the transmitting part, and an impedance of the matching part is set to a value between an impedance of the periodic structure body and an impedance of the transmitting part. | 2015-10-08 |
20150288343 | BALUN DEVICE - A balun device is disclosed herein. The balun device is configured to transform a single-ended signal into a differential signal. The balun device includes a first and a second output port, an input port, and a matching circuit. The first output port includes a first output terminal. The second output port includes a second output terminal. The input port includes an input single-ended signal terminal and an input single-ended reference terminal. The input single-ended reference terminal is connected to the second output terminal, and the input single-ended signal terminal is configured to receive the single-ended signal which is relative to the input single-ended reference terminal. The matching circuit is connected to the first output port, the second output port and the input port and configured to transform the single-ended signal into the differential signal outputted between the first and the second output port with lowpass, highpass, or bandpass response. | 2015-10-08 |
20150288344 | BALUN CIRCUIT - The present disclosure is directed to a balun circuit adapted to operate at a frequency of between about 5 GHz to about 110 GHz. The balun circuit includes first and second output striplines and an input stripline formed on a first surface of the substrate, and a slotline formed on a second surface of the substrate opposite the first surface. The slotline has first and second ends, the first end overlapping the first output stripline and the second end overlapping the second output stripline, and the input stripline overlapping the slotline midway between the first end and the second end. | 2015-10-08 |
20150288345 | MEMS RESONATOR WITH FUNCTIONAL LAYERS - A MEMS device includes a substrate, at least one anchor on a surface of the substrate, and a vibrating body suspended over the substrate by the at least one anchor. The vibrating body includes a periodically poled piezoelectric thin-film layer, a first conductive layer, a second conductive layer, and a functional layer. The first conductive layer is on a first surface of the vibrating body opposite the surface of the substrate. The second conductive layer is on a second surface of the vibrating body opposite the first surface. The functional layer is over the first conductive layer. By including the functional layer over the first conductive layer, functionality may be added to the MEMS device, thereby increasing the utility thereof. | 2015-10-08 |
20150288346 | ELASTIC WAVE RESONATORS, AND ELASTIC WAVE FILTERS, ANTENNA DUPLEXERS, MODULES AND COMMUNICATION DEVICES USING SAME - An elastic wave resonator including comb-shaped electrodes and reflector electrodes formed on a piezoelectric substrate. In one example, an overlapping portion between the comb-shaped electrodes includes a first overlapping region and second overlapping regions. The second overlapping regions can be provided on both outside edges of the first overlapping region. In one example, the overlapping width of the first overlapping region is greater than the overlapping width of the second overlapping region, and the electrode finger pitch in the second overlapping region is greater than the electrode finger pitch in the first overlapping region. | 2015-10-08 |
20150288347 | Electroacoustic Filter Comprising Low-Pass Characteristics - An electroacoustic filter has improved low-pass characteristics. The filter includes a first electroacoustic converter, an electroacoustic element and a grid structure between the converter and the element. The grid structure is acoustically active in one frequency range that lies above the acoustically active frequency range of the first electroacoustic converter. | 2015-10-08 |
20150288348 | IMPEDANCE MATCHING NETWORK WITH HIGH FREQUENCY SWITCHING - An impedance matching network having a plurality of reactance elements is disclosed. Each of the plurality of switching circuits comprises a first node and a second node; a first diode having an anode coupled to the first node and a cathode coupled to the second node; a second diode having an anode to couple to the second voltage line and a cathode to couple to the first node; and a transistor having a first, second, and control terminals. Each of the plurality of reactance elements is switched into the impedance matching network when the transistor in the respective one of the plurality of switching circuits is on and switched out after the transistor in the respective one of the plurality of switching circuits is off. | 2015-10-08 |
20150288349 | SWITCH DEVICE - Switch devices with a first switching path and a second switching path are provided in some embodiments. When a voltage drop across the first switching path exceeds a predetermined voltage, the second switch may be activated. | 2015-10-08 |
20150288350 | SIGNAL TRANSFER CIRCUIT AND OPERATING METHOD THEREOF - A signal transfer circuit includes a signal input unit suitable for generating an input signal corresponding to a first voltage level and a second voltage level a transfer control unit suitable for controlling a driving path of a transfer node in response to a control signal and selectively driving the transfer node to the second voltage level or a third voltage level, which is higher than the first voltage level, based on the driving path in response to the input signal, and an output control unit suitable for outputting an output signal by driving an output node based on a voltage level of the transfer node or maintaining a previous voltage level of the output node in response to the control signal. | 2015-10-08 |
20150288351 | CHIP, MULTICHIP MODULE, AND APPARATUS PROVIDED WITH THE SAME - Provided is a chip including a plurality of unit cells; a scanning circuit adapted to scan the plurality of unit cells, thereby making each of the plurality of unit cells output a signal; a voltage-to-current conversion circuit; a current-to-voltage conversion circuit; an output terminal; and an input terminal. The current-to-voltage conversion circuit is adapted to convert a first current signal input into the input terminal, into a first voltage signal, the scanning circuit starts scanning in response to the first voltage signal output from the current-to-voltage conversion circuit, and the voltage-to-current conversion circuit is adapted to convert a second voltage signal output from the scanning circuit into a second current signal, and to output the second current signal from the output terminal. | 2015-10-08 |
20150288352 | ENERGY EFFICIENT CONTROLLED MAGNETIC FIELD GENERATOR CIRCUIT - A magnetic waveform generator circuit includes a first switch coupled to a first rectifier element at a first node, a first capacitor coupled, at a second node to the first switch, and to a fourth node, a second capacitor coupled, at a third node to the first rectifier element, and to the fourth node, and an inductor coupled between the first and the fourth nodes. The first switch is operable to be in an ON state during a first time period and in an off state during a second time period. The first switch and the first rectifier element are configured to enable the inductor to generate, during the first and the second time periods, a magnetic field having a waveform resembling a positive half-cycle of a triangular waveform. | 2015-10-08 |
20150288353 | VOLTAGE DOUBLER AND NONVOLATING MEMORY DEVICE HAVING THE SAME - A voltage doubler includes first to fourth transistors, a first capacitor connected between a first node and a first clock terminal configured to receive a first clock signal. A second capacitor is connected between a second node and a second clock terminal configured to receive an inverted first clock signal. A first gate control unit is configured to control the first and second transistors using the first clock signal and the inverted first clock signal, and a second gate control unit is configured to control the third and fourth transistors using a second clock signal and an inverted second clock signal. A load capacitor is connected between the output terminal and a ground terminal. | 2015-10-08 |
20150288354 | SEMICONDUCTOR DEVICE FOR SENSING PHYSICAL QUANTITY - A semiconductor device | 2015-10-08 |
20150288355 | VOLTAGE LEVEL SHIFT WITH CHARGE PUMP ASSIST - A charge pump assist circuit to assist a voltage level shifter to toggle an output based on an input. The charge pump assist circuit may be implemented to toggle the output at a higher rate than the voltage level shifter. The voltage level shifter may be biased with an undivided voltage rail, such as an operating voltage of the charge pump assist circuit, rather than a divided voltage rail, while maintaining or increasing a toggle rate. The charge pump assist circuit may include a non-overlapping control generator to generate non-overlapping differential controls, and may further include first and second charge pump multipliers to increase voltages of the differential controls by a multiple of the operating voltage. | 2015-10-08 |
20150288356 | METHOD AND APPARATUS FOR DRIVING A POWER TRANSISTOR GATE - A gate drive circuit includes a first switch electrically coupled to a single-supply input voltage node, the first switch electrically coupling the voltage node with a first capacitor if switched on; a second switch electrically coupled to a ground node, the second switch electrically coupling the first capacitor with the ground node if switched on; and the first capacitor. A first capacitor lead of the first capacitor is electrically coupled to the first and second switches and a second capacitor lead of the first capacitor is arranged to connect with a power transistor gate. | 2015-10-08 |
20150288357 | SEMICONDUCTOR DEVICE - Two or more pads and are connected to a gate region, so that a pad for applying a gate voltage can be selected. In the case where, for example, the peripheral region is likely to overheat, a turn-on voltage is applied to the first pad to turn on the peripheral region later than the central region, and a turn-off voltage is applied to the second pad to turn off the peripheral region earlier than the central region. The problem that the peripheral region is likely to overheat can be addressed. In the case where the flow of an excess current raises the temperature, the turn-off voltage is applied to the second pad. The problem that the temperature is likely to rise in the peripheral region when an excess current flows can be addressed. | 2015-10-08 |
20150288358 | Bidirectional Two-Base Bipolar Junction Transistor Operation, Circuits, and Systems with Diode-Mode Turn-On - Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low. | 2015-10-08 |
20150288359 | System and Method for a Driving a Radio Frequency Switch - In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells having a load path and a control node, and a switch driver coupled to the control node. Each of the plurality of series connected RF switch cells includes a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node. The switch driver includes a variable output impedance that varies with a voltage of the control node. | 2015-10-08 |
20150288360 | APPARATUS AND METHOD FOR TRANSMITTING AN ANALOG SIGNAL, AND ANALOG SIGNAL MULTIPLEXER - Disclosed are an apparatus and a method for transmitting an analog signal, and an analog signal multiplexer. The apparatus comprises a photocoupler to receive an input analog signal and transform the input analog signal into an output analog signal, which varies with the input analog signal in a manner of non-linearity. The apparatus further comprises a non-linearity correcting unit to receive the output analog signal and correct the non-linearity to output a corrected output analog signal. An analog signal may be transmitted with a photocoupler. | 2015-10-08 |
20150288361 | Capacitive Sensor Device And Method For Operating A Capacitive Sensor Device - A capacitive sensor device for approach and/or contact detection can be coupled with an electric circuit ( | 2015-10-08 |
20150288362 | CONTACTLESS ROTARY PULL SWITCH - A contactless rotary pull switch includes a switch knob assembly rotatable about an axis to a plurality of rotational positions and actuatable to at least one pull position, with the switch knob assembly including a knob element and a rotational shaft fixedly coupled thereto. A rotational magnet is coupled to the rotational shaft so as to rotate therewith, and at least one pull magnet is positioned separately from the rotational magnet. A rotational sensor senses a magnetic field generated by the rotational magnet to identify a rotational position of the switch knob assembly and at least one pull sensor senses a magnetic field generated by the pull magnet(s) to identify a pull position of the switch knob assembly. A rotatable arm member selectively enables/inhibits sensing of the magnetic field generated by the pull magnet(s) by the at pull sensor(s), to identify distinct pull positions of the switch knob assembly. | 2015-10-08 |
20150288363 | Clock Enabling Circuit - A clock enabling circuit for providing a gated clock signal in response to receiving clock request information is presented. The clock enabling circuit comprises a clock request input, a clock input, and a flip-flop stage. It also includes a first sub-circuitry comprising a first input being coupled with the clock request input and an output being coupled with the flip-flop stage for providing a set information to the flip-flop stage in response to the receipt of the clock request information, the flip-flop stage being configured to provide a clock enabling information in response to receiving the set information and a second sub-circuitry comprising a first and a second input, the first input being coupled with the clock input and the second input being coupled with the flip-flop stage, the second sub-circuitry comprising an output for providing the gated clock signal in response to receiving the clock enabling information. | 2015-10-08 |
20150288364 | SHIFT REGISTER CIRCUIT - A shift register circuit includes a pull-down circuit, pull-down control circuit, a driving unit, a primary pull-down circuit and a gate driver circuit. The pull-down control circuit is electrically connected to the pull-down circuit and configured to provide an nth-stage pull-down control signal to the pull-down circuit. The a driving unit is electrically connected to the pull-down control circuit and configured to drive the pull-down control circuit. The primary pull-down circuit is electrically connected to the pull-down circuit. The gate driver circuit is electrically connected to the pull-down circuit and configured to output an nth-stage gate driving signal according to an nth-stage control signal. The driving unit is configured to receive a plurality of high-frequency clock signals and accordingly to pre-enable the pull-down control circuit, and n is a positive integer. | 2015-10-08 |
20150288365 | LEVEL SHIFTER - A level shifter includes a differential input pair circuit, a current mirror circuit, a switching circuit, a first keeper circuit, a second keeper circuit, and an output buffering circuit. The differential input pair circuit is connected with a first node, a second node and a first voltage. The differential input pair circuit receives an input signal and an inverted input signal. The current mirror circuit is connected with a third voltage, and includes a first current output terminal connected with a third node and a second current output terminal generating an output signal. The switching circuit includes a first control terminal receiving the inverted output signal. The second keeper circuit is connected between the third voltage and the second node, and includes a third control terminal receiving the inverted input signal and a fourth control terminal receiving the inverted output signal. | 2015-10-08 |
20150288366 | CLOCK DISTRIBUTION ARCHITECTURE FOR INTEGRATED CIRCUIT - An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally. | 2015-10-08 |
20150288367 | PHASE LOCKED LOOP HAVING DUAL BANDWIDTH AND METHOD OF OPERATING THE SAME - A phase locked loop having a dual bandwidth is disclosed. The phase locked loop divides a loop filter into a zero filter and a pole filter, disposes the zero filter in front of a phase-frequency detector (PFD), and performs high-pass filtering on a voltage-controlled oscillator (VCO) noise with a maximum bandwidth and performs low-pass filtering on a charge pump noise (CP noise) with a minimum bandwidth to divide the VCO noise and the CP noise. | 2015-10-08 |
20150288368 | METHOD AND APPARATUS FOR CALIBRATING OUTPUT FREQUENCY OF OSCILLATOR - Provided is a method and an apparatus to calibrate an output of an oscillator. The method includes calibrating the output frequency of the oscillator to be a predetermined frequency. The method also generates a differential signal corresponding to the calibrated frequency, and operates the oscillator in response to the differential signal. The oscillator is controlled by the differential signal to remove common mode noise. | 2015-10-08 |
20150288369 | DIGITAL PHASE LOCKED LOOP - A phase locked loop circuit ( | 2015-10-08 |
20150288370 | DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS - A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator. | 2015-10-08 |
20150288371 | Fast Settling Phase Locked Loop (PLL) with Optimum Spur Reduction - A method for constructing a phase locked loop begins with determining spurious frequency component criteria permitted within the PLL. A PLL filter prototype is selected with a desired settling time. A transfer function is generated based on the PLL transfer function that predicts the spurious components. A maximum level of the spurious components produced in the PLL is determined based on the maximum frequency step. If the maximum level of the spurious frequency components produced is too large, the order variable is incremented and the PLL transfer function is determined until the transfer function produces the spurious frequency components that meet the requirements. The components for a loop filter are selected based on the selected PLL transfer function. The adjustable frequency source tuning gain, the phase detector gain, the loop filter gain, and the divide factor are chosen to meet the requirements of the PLL transfer function. | 2015-10-08 |
20150288372 | INTEGRATED CIRCUIT FREQUENCY GENERATOR - An integrated circuit frequency generator is disclosed. In some embodiments, the frequency generator comprises an electronic oscillator configured to generate an oscillator frequency and calibration circuitry configured to periodically calibrate the electronic oscillator with respect to a reference frequency source. When a primary power source is unavailable, an output frequency is generated from the oscillator frequency, and the reference frequency source is powered-on only during calibration cycles. | 2015-10-08 |
20150288373 | APPARATUS AND METHOD FOR SOURCE SYNCHRONOUS TESTING OF SIGNAL COVERTERS - An automatic tester, comprising a first signal converter, a first signal path, and a second signal path. The first signal converter is operable to convert, using a conversion clock signal, a signal from a digital signal domain to an analog signal domain to acquire an analog stimulus signal. The first signal path is operable to forward the analog stimulus signal from the first signal converter to a second signal converter operable to convert the analog stimulus signal back from the analog signal domain to the digital signal domain. The second signal path is operable to forward one of the conversion clock signal and a signal derived thereof from the first signal converter to the second signal converter. A difference between a propagation delay of an analog stimulus signal in response to a clock cycle of the conversion clock signal via the first signal path and a propagation delay of the conversion clock signal of the clock cycle via the second signal path is within a predetermined tolerance range. | 2015-10-08 |
20150288374 | DYNAMIC ELEMENT MATCHING METHODS AND APPARATUSES - A dynamic element matching method for a multi-unit-element digital-to-analog converter having unit elements comprises several steps. An element selection probability is determined as a function of a number of the unit elements and a digital signal. Next, loop filter output signals are generated as a function of the determined element selection probability and control signals for the unit elements. Certain ones of the unit elements are selected as a function of the generated loop filter output signals. The selected certain ones of the unit elements are activated for output of the converter. | 2015-10-08 |
20150288375 | METHOD AND SYSTEM FOR BROADBAND ANALOG TO DIGITAL CONVERTER TECHNOLOGY - Methods and systems are provided for generating correction estimates. Training signals may be injected into one or more particular spectral regions, and one or more correction estimation parameters may be determined based on the injecting of the training signals, where the one or more correction estimation parameters reduce distortion in at least the one or more particular spectral regions. The particular spectral regions may comprise originally-unoccupied spectral regions. The one or more correction estimation parameters may be applied during correcting of digital signals generated based on processing of received analog signals. The training signals may be generated, such as based on one or more pre-defined characteristics. The one or more correction estimation parameters may then be determined based on the one or more pre-defined characteristics of the training signals and/or changes thereto. | 2015-10-08 |
20150288376 | LOW POWER ADC FOR HIGH DYNAMIC RANGE INTEGRATING PIXEL ARRAYS - In one or more embodiments, an apparatus and method for processing an analog signal into a digital signal includes an input current buffer circuit, a signal charge integration node, a dual function comparator, a step charge subtractor, a state latch, a coarse N-bit counter, an optional residue signal buffer and a residue signal M-bit time-to-digital (TDC) converter. The circuitry is free running, meaning that it is never reset. Instead, what is tracked for each frame is how much additional charge has been accumulated since the end of the previous integration period. Between each frame, the state of the counter and the amount of charge residing in the integration node are recorded. This information from the beginning and end of a given frame is differenced and to this is added the amount of charge indicated by the number of times the counter overflowed during the integration period. | 2015-10-08 |
20150288377 | DATA PROCESSING SYSTEM - The present invention provides a data processing system which can increase resolution and which has excellent tracking with respect to the switching of a conversion range and is small in conversion error. The data processing system, which obtains an A/D conversion result after an n (where n: positive integer)-bit extension made to the resolution of an A/D converter, divides the input range of the A/D converter by m ( | 2015-10-08 |
20150288378 | HIGH RESOLUTION ANALOG TO DIGITAL CONVERTER - The systems, methods, and devices disclosed herein relate to a bit-per-stage ADC. The bit-per-stage ADC extracts one or more bits at each stage and creates a residue so that succeeding similar or identical stages can extract more bits. The ADC uses a reflected binary output code so that a bit can be extracted by observing the sign (e.g., polarity) of an input. The residue can be generated by rectifying the input, multiplying it by two, and level-shifting it by half the span. The generation of the residue is achieved using capacitors and switches. This causes the ADC to have low power consumption and a small size. | 2015-10-08 |
20150288379 | CANCELLATION OF FEEDBACK DIGITAL-TO-ANALOG CONVERTER ERRORS IN MULTI-STAGE DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTERS - The present disclosure describes a mechanism to digitally correct for the static mismatch of the digital-to-analog converter (DAC) in at least the first-stage of a multi-stage noise shaping (MASH) analog-to-digital converter (ADC). The correction is applicable to continuous-time implementations, and is especially attractive for high-speed applications. | 2015-10-08 |
20150288380 | ESTIMATION OF DIGITAL-TO-ANALOG CONVERTER STATIC MISMATCH ERRORS - Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR). | 2015-10-08 |
20150288381 | COMPRESSION OF FLOATING-POINT DATA BY IDENTIFYING A PREVIOUS LOSS OF PRECISION - Each binary floating-point value in a set of binary floating-point values is converted to a decimal floating-point value. Data are determined including an exponent, a mantissa and a quantity of decimal digits of the mantissa for each decimal floating-point value. The exponents, the mantissas and the quantity of decimal digits are individually compressed to produce compressed floating-point values based on the individual compressions. | 2015-10-08 |
20150288382 | METHOD AND SYSTEM - A method includes: setting a first and a second storage regions; first creating a first compression code of a compression target data in a file using a identifier indicating the data in the first storage region when a predetermined first consistency between the compression target data and the data in the first storage region is detected; comparing the compression target data with data in the second storage region when the predetermined first consistency between the compression target data and the data in the first storage region is not detected, the compression target data being moved to the second storage region after the comparing; and storing the compression target data into the first storage region associated with a identifier indicating the data in the first storage region when a predetermined second consistency between the compression target data and the data in the second storage region is detected. | 2015-10-08 |
20150288383 | METHOD AND SYSTEM - A method includes: first setting a first and a second storage regions; first comparing a compression target data in a file with data in the first storage region; first creating a first compression code of the compression target data based on the data in the first storage region when a predetermined first consistency between the compression target data and the data in the first storage region is detected; second comparing the compression target data with data in the second storage region when the predetermined first consistency between the compression target data and the data in the first storage region is not detected, the compression target data being moved to the second storage region after the second comparing; and first storing the compression target data into the first storage region when a predetermined second consistency between the compression target data and the data in the second storage region is detected. | 2015-10-08 |
20150288384 | GENERATING MOLECULAR ENCODING INFORMATION FOR DATA STORAGE - A method begins by a processing module of one or more processing modules of one or more computing devices generating a number for each encoded data slice of a set of encoded data slices based on the encoded data slice, identifying a gene based on the number to produce an identified gene, and creating a linking identifier that links the encoded data slice to the identified gene, where, for the set of encoded data slices, a set of identified genes and a set of linking identifiers are created. The method continues with the processing module generating molecular encoding information from the set of identified genes and the set of linking identifiers, where the molecular encoding information is used to create a molecular storage structure for each identified gene of the set of identified genes yielding a set of molecular storage structures. | 2015-10-08 |
20150288385 | ENCODER AND CODING METHOD - Disclosed are an encoder, a transmitting device, a coding method and a transmission method with which the transmission amount is reduced and a deterioration in transmission efficiency is suppressed while improving reception quality when QC-LDPC or a like block coding is used. A puncture pattern setting unit searches for a puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of a sub block matrix that forms a check matrix (H) of a QC-LDPC code, and a puncture unit (data reduction unit) switches the puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of the sub block matrix that forms the check matrix of the QC-LDPC code. | 2015-10-08 |
20150288386 | CODING METHOD AND DECODING METHOD - An encoding method generates an encoded sequence by performing encoding of a given coding rate according to a predetermined parity check matrix. The predetermined parity check matrix is a first parity check matrix or a second parity check matrix. The first parity check matrix corresponds to a low-density parity check (LDPC) convolutional code using a plurality of parity check polynomials. The second parity check matrix is generated by performing at least one of row permutation and column permutation with respect to the first parity check matrix. An eth parity check polynomial that satisfies zero, of the LDPC convolutional code, is expressible by using a predetermined mathematical formula. | 2015-10-08 |
20150288387 | METHODS AND APPARATUS FOR DECODING - Systems and techniques for decoding of data are described. A plurality of sub-decoders are defined, with the number of sub-decoders being limited only by a number of bits of a codeblock to be processed. A number of iterations is defined for the sub-decoders based on a desired maximum block error rate. Sub-decoders may run asynchronously. | 2015-10-08 |
20150288388 | METHOD AND SYSTEM FOR SUPPORTING MOBILITY OF A MOBILE TERMINAL IN A SOFTWARE-DEFINED NETWORK - A method and system for supporting the mobility of a mobile terminal in a software-defined network are disclosed. A method for supporting the mobility of a mobile terminal in a software-defined network according to an embodiment of the invention can include: routing a data packet of the mobile terminal to an authority switch serving as an anchor within a first partition, said routing performed by a switch by referencing a flow table; and setting a data path to an authority switch of a second partition, which is the partition containing the destination of the data packet, based on a rule provided by a controller and transmitting the data packet to a destination, said setting and transmitting performed by the authority switch of the first partition. | 2015-10-08 |
20150288389 | RF RECEIVE DIPLEXER - A first RF receive diplexer, which includes a first hybrid RF coupler, a second hybrid RF coupler, and RF filter circuitry, is disclosed. The first hybrid RF coupler has a first main port, a first pair of quadrature ports, and a first isolation port, which is coupled to an RF antenna. The second hybrid RF coupler has a second main port and a second pair of quadrature ports. The RF filter circuitry is coupled between the first pair of quadrature ports and the second pair of quadrature ports. The first RF receive diplexer receives a first adjunct RF antenna receive signal via the first isolation port to provide a first adjunct RF receive signal via the second main port. The first RF receive diplexer receives a first RF transmit signal via the first main port to provide a first RF antenna transmit signal via the first isolation port. | 2015-10-08 |
20150288390 | RADIO MODULE AND METHOD OF MANUFACTURING THE SAME - There is provided a radio module including: a first substrate; a second substrate that has a side which is opposed to the first substrate and on which an electronic component is mounted; a conductive member that connects the first substrate and the second substrate and that transmits a signal between the first substrate and the second; at least one first pad that is disposed in the first substrate and connected to the conductive member; and at least one second pad that is disposed in the second substrate and connected to the conductive member, each of the at least one second pad being opposed to each of the at least one first pad and each of larger than the at least one first pad in area. | 2015-10-08 |
20150288391 | SIGNAL AMPLIFIERS THAT SWITCH TO AN ATTENUATED OR ALTERNATE COMMUNICATIONS PATH IN RESPONSE TO A POWER INTERRUPTION - RF signal amplifiers are provided that include an RF input port, a switching device having an input that is coupled to the RF input port, a first output and a second output, a first diplexer having an input that is coupled to both the first output of the switching device and the second output of the switching device, and a first RF output port that is coupled to an output of the first diplexer. These amplifiers further include an attenuator that is coupled between the second output of the switching device and the input of the first diplexer. | 2015-10-08 |
20150288392 | TUNABLE FILTER EMPLOYING FEEDFORWARD CANCELLATION - Methods, systems, and computer readable media for a tunable filter employing feedforward cancellation are disclosed. According to one aspect, the subject matter described herein includes a tunable transmissive filter that includes a splitter for splitting an input signal into a first signal and a second signal, a first modifier circuit for modifying a characteristic of the first signal to produce a modified first signal, a second modifier circuit for using feedforward cancellation to modify a characteristic of the second signal to produce a modified second signal, the second modifier circuit including an N-path filter, N being an integer greater than 0; and a combiner for combining the modified first signal and the modified second signal to produce a filtered output signal having a bandpass response. | 2015-10-08 |
20150288393 | System and Method for Signal Generation - A high-power broadband radiation system and method are disclosed. The system includes an array of harmonic oscillators with mutual coupling through quadrature oscillators. Based on a self-feeding structure, the presently disclosed harmonic oscillators simultaneously achieve optimum conditions for fundamental oscillation and 2nd-harmonic generation. The signals at the second harmonic radiate through on-chip slot antennas, and are in-phase combined inside a hemispheric silicon lens attached at the backside of the chip. In some embodiments, the radiation of the system can also be modulated by narrow pulses generated on chip, thereby achieving broad radiation bandwidth. | 2015-10-08 |
20150288394 | MULTI-USER SATELLITE RECEIVING SYSTEM AND METHOD THEREOF - An integrated multi-user satellite receiver includes: a single-chip, and the single-chip includes: a first synthesizer for generating a first oscillating signal having a first frequency; a first frequency multiplier for generating a second oscillating signal having a second frequency according to the first oscillating signal; a second synthesizer for generating a third oscillating signal having a third frequency; and a second frequency multiplier for generating a fourth oscillating signal having a fourth frequency according to the third oscillating signal; wherein the single-chip generates a first down-converted signal according to a first satellite signal and the second oscillating signal, generates a second down-converted signal according to the first satellite signal and the fourth oscillating signal, generates a third down-converted signal according to a second satellite signal and the second oscillating signal, and generates a fourth down-converted signal according to the second satellite signal and the fourth oscillating signal. | 2015-10-08 |
20150288395 | DECISION FEEDBACK EQUALIZER AND RECEIVER - Embodiments of the present invention provide a decision feedback equalizer, which includes: a receive end, configured to receive a first differential signal, and input the first differential signal to the superimposer; a superimposer, configured to superimpose the first differential signal on a square-wave signal output by a adjusting unit to obtain a second differential signal; the adjusting unit, configured to perform phase and/or amplitude adjustment for a second square-wave signal; the first decision device is configured to compare a voltage amplitude of the second differential signal with a set value, and output a first square-wave signal; the second decision device is configured to compare the voltage amplitude of the second differential signal with a voltage amplitude of a signal adjusted by the adjusting unit, and input an obtained second square-wave signal to the adjusting unit. The embodiments of the present invention can reduce data edge jitter. | 2015-10-08 |
20150288396 | RECEPTION APPARATUS HAVING DUAL RECEPTION STRUCTURE, AND METHOD OF RECEIVING SIGNAL USING DUAL RECEPTION STRUCTURE - A reception apparatus having a dual reception structure includes a first receiver having a first quality (Q) factor and configured to receive a signal in a predetermined band in response to the first receiver being selected by a reception controller; a second receiver having a second Q factor greater than the first Q factor and configured to receive the signal in the predetermined band in response to the second receiver being selected by the reception controller; and a reception controller configured to select one of the first receiver and the second receiver based on interference information associated with an adjacent band adjacent to the predetermined band. | 2015-10-08 |
20150288397 | COMPENSATION SCHEME FOR MHL COMMON MODE CLOCK SWING - Embodiments of the invention are generally directed to compensation for common mode signal swing. An embodiment of an apparatus includes a connector for the transfer of the data, the connector including connections for a first set of one or more conductors; a receiver for the reception of data via the connector, the received data including a first signal and a second signal transmitted via the set of one or more conductors, the second signal being a common mode signal modulating the first signal, the receiver including an amplifier to amplify the received data with a positive gain; and a common mode compensation circuit to compensate for a voltage swing of the common mode signal in the amplified received data. The common mode compensation circuit is to sense the common mode signal, amplify the sensed common mode signal with a negative gain, and feed back the amplified common mode to output nodes of the receiver. | 2015-10-08 |
20150288398 | HIGHLY LINEAR RECEIVER FRONT-END WITH THERMAL AND PHASE NOISE CANCELLATION - A radio receiver supporting cancellation of thermal and phase noise in a down-converted RF signal. An inbound RF signal and blocking signal are provided directly to a passive mixer for down-conversion into a first baseband signal having data, thermal noise, and reciprocal mixing (RM) noise components. The inbound signals are also provided to a transconductance circuit, the output of which is provided to a second passive mixer for conversion into a current signal having data and blocking signal components, and a RM image. The blocking signal component and the RM image are mixed with a second LO signal, derived from the blocking signal, to produce a RM noise cancellation signal. The data component of the current signal is converted into a second baseband signal having data and thermal noise components. The first baseband signal, second baseband signal and RM noise cancellation signal are then combined through harmonic recombination. | 2015-10-08 |
20150288399 | Unwanted Component Reduction System - A system is described for forming an estimate of an unwanted signal component that may be formed as a result of non-linearities in a system. The estimate is used to form a cancellation signal which is added to an input signal to reduce the influence of the unwanted component. | 2015-10-08 |
20150288400 | IMPEDANCE MATCHING FOR VARIABLE IMPEDANCE ANTENNAS - An impedance matching circuit for a wireless communication device includes: a first node that receives a first impedance; a second node that is connected to an antenna having a second impedance; a first variable capacitor that is connected between the first node and a third node; a second variable capacitor that is connected between the third node and a reference potential; a first inductive element that is connected in parallel with the second variable capacitor between the third node and the reference potential; and a third variable capacitor and a second inductive element that are connected in series between the third node and the second node. | 2015-10-08 |
20150288401 | ULTRASONIC SENSOR AND ELECTRONIC DEVICE - An ultrasonic sensor includes a plurality of ultrasonic wave elements each including a first electrode and a second electrode, and a control circuit configured to switch parallel connection and serial connection of the plurality of the ultrasonic wave elements. | 2015-10-08 |
20150288402 | WIRELESS COMMUNICATION DEVICE - A wireless communication device including a communication controller, a transmitter, an antenna and a receiver is provided. The wireless communication device further includes a current detector detecting a current consumption value of a power supply generator, a non-volatile memory pre-storing multiple current thresholds corresponding to multiple operating states, and an abnormal oscillation detector detecting abnormal oscillation by comparing the current consumption value acquired from the current detector and a current threshold corresponding to a present operating state of the wireless communication device out of the current threshold stored in the non-volatile memory. | 2015-10-08 |
20150288403 | ELECTRONIC DEVICE AND METHOD OF ASSEMBLING THE SAME - An electronic device includes a housing, frame, and a lock attachment mechanism. The housing includes a front cabinet, and back cabinet which has opening and is attached to the front cabinet. The frame is disposed in the inside of the housing. The lock attachment mechanism includes lock attachment portion and hook portion. The lock attachment portion includes a pull-out portion with a hole disposed therein, and a leg portion protruding from the pull-out portion. The hook portion includes fixing portions attached to frame, and grappling portions that hook the leg portion with the pull-out portion being pulled out, and that form a gap through which the pull-out portion can be pulled out. The device further includes back cabinet having a holder. The holder restricts a movable range of lock attachment portion and holds the leg portion such that lock attachment portion is disposed at a location which allows the pull-out portion to be pulled out through opening. | 2015-10-08 |
20150288404 | CELLPHONE WITH A DETACHABLE RECEIVER - A cellphone with a detachable receiver includes a cellphone body having a topside provided with a recessed groove and an outer side transversely bored with a through hole. A receiver is inserted in the recessed groove of the cellphone body and exactly positioned at the location of the through hole of the cellphone body and installed therein with a rechargeable battery and a bluetooth device. Thus, when the receiver is inserted in the recessed groove, the through hole can be used for a user to answer phone calls, and when the receiver and the cellphone body are separated, the receiver can be employed as a bluetooth headset. The cellphone with a detachable receiver of this invention is convenient to be carried about, simple in use, light and skillful in structure and easy to be stored. | 2015-10-08 |
20150288405 | PORTABLE ELECTRONIC DEVICE SUPPORT - In certain embodiments of the present invention, a portable electronic device support comprises a base, a frame, and a rotational mechanism, with the base including a front and a rear panel. The rotational mechanism is attached to the frame at a position offset from the center so that substantially the same viewing angle can be maintained after rotation from landscape to portrait orientation. | 2015-10-08 |
20150288406 | STRECHABLE STRAP COVER FOR ELECTRONIC DEVICE - A stretchable strap cover for a handheld electronic device has a flexible and elastic pad with four apertures formed in the pad and extending through the thickness of the pad, and four straps defined between the four apertures and the perimeter of the pad. The pad has at least two configurations, including: 1) an initial configuration in which the pad is separate from the handheld electronic device, an in which the pad is unstretched with an initial unstretched perimeter, length and width, and in which the pad is flat and disposed in a flat layer having a thickness the same as the thickness of the pad, with the straps and the apertures disposed in the flat layer; and 2) an installed configuration in which the pad is coupled to the handheld electronic device, the pad being stretched and under tension, and the straps being disposed out of the flat layer. | 2015-10-08 |
20150288407 | Phone Wrist Mount - A wrist mount for attaching a portable electronic device to the wrist or forearm of a person. A band attaches over a forearm or wrist and includes a socket on its exterior. A plate on one side attaches to the portable electronic device and on a second side has a neck that engages into the socket. The neck and socket result in a rotatable joint that may be indexed and biased at a predetermined angle of the band relative to the plate. In one version micro suction cups on the first side of the plate secure the electronic device to the plate. | 2015-10-08 |
20150288408 | STABLE COMMUNICATION COVER - Embodiments of the Stable Communication Cover include a protective cover comprised of a protrusion for use with externally located and externally operated switch or switches on a mobile electronic device, such as a Walkie Talkie. Other embodiments of the Stable Communication Cover include a protective guard for use with externally located and externally operated switch or switches on a mobile electronic device. The protective cover provides protection from unintentional switch manipulations and environmental elements. The protective guard provides protection from unintentional manipulations. | 2015-10-08 |
20150288409 | Mobile Electronic Device Holder - A mobile electronic device holder for retaining electronic devices of various sizes and configurations in a foldable case that removably secures to a variety of surfaces. The mobile electronic device holder includes a foldable base having a first, second, and third panel, wherein the first panel is removably secured to the second panel and the second panel is secured to the third panel. The first panel includes a pair of flexible and extendable arms that are used to hold an electronic device therein. A first and second retracting mechanism are attached to the second panel so as to removably connect the first panel thereto. The mobile electronic device holder further includes a variety of attachments and fasteners in order to allow the user to removably secure the foldable base to a variety of surfaces. | 2015-10-08 |
20150288410 | CABLELESS CONNECTION APPARATUS AND METHOD FOR COMMUNICATION BETWEEN CHASSIS - Apparatus and methods for cableless connection of components within chassis and between separate chassis. Pairs of Extremely High Frequency (EHF) transceiver chips supporting very short length millimeter-wave wireless communication links are configured to pass radio frequency signals through holes in one or more metal layers in separate chassis and/or frames, enabling components in the separate chassis to communicate without requiring cables between the chassis. Various configurations are disclosed, including multiple configurations for server chassis, storage chassis and arrays, and network/switch chassis. The EHF-based wireless links support link bandwidths of up to 6 gigabits per second, and may be aggregated to facilitate multi-lane links. | 2015-10-08 |
20150288411 | PHASE-ARRAYED TRANSCEIVER - A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network. | 2015-10-08 |
20150288412 | Harmonic Rejection Mixer - An apparatus, which includes a local oscillator configured to oscillate at a carrier frequency and having output ports and configured to provide a signal of a respective phase at each of the output ports, wherein the respective phases are different from each other,
| 2015-10-08 |
20150288413 | METHODS, SYSTEMS, AND NON-TRANSITORY COMPUTER READABLE MEDIA FOR WIDEBAND FREQUENCY AND BANDWIDTH TUNABLE FILTERING - Methods, systems, and computer readable media for wideband frequency and bandwidth tunable filtering are disclosed. According to one aspect, the subject matter described herein includes a wideband frequency and bandwidth tunable filter that splits a filter input signal into first and second input signals, modifies the first input signal to produce a first output signal, modifies the second input signal to produce a second output signal having an intermediate frequency response, and combines the first and second output signals while adjusting their relative phases and/or amplitudes to produce a filter output signal with the target frequency response. Adjustment includes splitting the second input signal into third and fourth input signals, which are modified and then combined to produce the second output signal having the intermediate frequency response. | 2015-10-08 |
20150288414 | BROADBAND DISTRIBUTED ANTENNA SYSTEM WITH NON-DUPLEXER ISOLATOR SUB-SYSTEM - Certain aspects and aspects of the present invention are directed to a distributed antenna system having a downlink communication path, an uplink communication path, and a non-duplexer isolator sub-system. The downlink communication path can communicatively couple a transmit antenna to a base station. The uplink communication path can communicatively couple a receive antenna to the base station. In one aspect, the non-duplexer isolator sub-system can be electronically configured for isolating uplink signals traversing the uplink communication path from downlink signals. In another aspect, a non-duplexer isolator sub-system can be configurable in one or more mechanical steps selecting a frequency response. In another aspect, a non-duplexer isolator sub-system can include an active mitigation sub-system. | 2015-10-08 |
20150288415 | BIT SIGNAL STRUCTURE FOR DIFFERENTIALLY ENCODED BROADCASTS - In one embodiment, a communication device comprises a differential encoder to receive data for transmission and encode the data for transmission using a set of codes that, when processed by the differential encoder, place the differential encoder in a known state and generate uncorrelated output sequences. | 2015-10-08 |
20150288416 | Wireless Communication Synchronization System - Wireless communication synchronization at a wireless signal receiver is described. A wireless signal received may be a spread spectrum signal containing a periodic extension of a primary code, a periodic extension of a secondary code, and a data portion. The receiver may determine a first chip sequence representative of the secondary code by extraction of the primary code and the data portion from a first received wireless signal. The receiver may further determine, from a second received wireless signal, a second chip sequence representative of the secondary code by extraction of the primary code from the second received wireless signal. The receiver may identify a phase offset associated with the received wireless signals by analyzing the first chip sequence and the second chip sequence. | 2015-10-08 |
20150288417 | SYSTEM AND METHOD FOR AUTOMATICALLY PAIRING WIRED DEVICES - Apparatus, methods, and other embodiments associated with pairing network devices are described. According to one embodiment, a method is performed by a first network device on a data communication network. An identification signal is generated that identifies the first network device. A first transmission frequency is selected that minimizes cross-talk between neighboring wired communication channels of a bundle of wired communication channels. The identification signal is transmitted at the first transmission frequency to a second network device over a first wired communication channel of the bundle of wired communication channels. Pairing the first network device with the second network device is accomplished based on the identification signal. The first transmission frequency is changed to a second transmission frequency that is greater than the first transmission frequency to transmit data to the second network device, subsequent to the pairing, over the first wired communication channel. | 2015-10-08 |
20150288418 | CROSSTALK SUPPRESSION METHOD AND APPARATUS - Embodiments of the present invention provide a crosstalk suppression method and apparatus. By obtaining a first electrical signal indicating a data bit stream of a first optical signal output by a laser diode (LD) in an optical transceiver module and a transmission parameter of a photodiode (PD), adjusting the first electrical signal based on the transmission parameter of the PD to obtain a third electrical signal indicating an electrical signal transformed by the PD from the first optical signal transmitted by the LD, and subtracting the third electrical signal from a second electrical signal output by the PD in the optical transceiver module, an electrical signal generated by the optical signal transmitted by the LD and reflected or refracted to the PD is removed from the electrical signal output by the PD, thereby suppressing crosstalk and improving the sensitivity of the optical transceiver module. | 2015-10-08 |
20150288419 | POWER LINE ETHERNET ADAPTOR AND POWER LINE ETHERNET COMMUNICATION KIT - A power line Ethernet adaptor is suitable to be applied to an external module including a first connector. The power line Ethernet adaptor includes a housing, a cover and a circuit board. The housing has an accommodating space. The cover is movably connected to the housing to move between an on-position and an off-position. When placed at the off-position, the cover covers the accommodating space. The circuit board is disposed in the accommodating space and has a power line Ethernet module and a second connector. When at least a part of the external module is disposed in the accommodating space, the first connector and the second connector are electrically connected to each other to establish the signal connection between the external module and the power line Ethernet module, and the cover also covers the external module when placed at the off-position. | 2015-10-08 |
20150288420 | POWER LINE CARRIER TRANSMISSION APPARATUS AND COMMUNICATION SYSTEM - A power line carrier transmission apparatus for transmitting a transmission symbol via a power line, the power line carrier transmission apparatus including an interleave unit interleaving the transmission symbol, a modulation unit for modulating the transmission symbol interleaved by the interleave unit, and a transmission unit repeatedly transmitting the transmission symbol modulated by the modulation unit M times (where M is an integer larger than 1), wherein M symbols (where M denotes the number of the symbols), which are generated by repeatedly transmitting the transmission symbol M times by the transmission unit, are transmitted without guard intervals being added therebetween. | 2015-10-08 |
20150288421 | PHONE COVERS WITH NFC CIRCUIT POWERED DISPLAY DEVICES - A cover for a user equipment, such as a cell phone, includes a housing, a display device, and a near field communication (NFC) circuit. The housing is attachable to the user equipment, and while attached covers a back surface of the user equipment. The display device is at least partially disposed within the housing. The NFC circuit that is configured to generate power through inductive coupling to another NFC circuit within the user equipment, the NFC circuit configured to operate using the power to receive data from the other NFC circuit within the user equipment, and to supply the power and the data to the display device to cause the data to be displayed for viewing by a user. Related user equipment, methods, and computer program products are disclosed. | 2015-10-08 |
20150288422 | SYSTEMS FOR ENABLING CHASSIS-COUPLED MODULAR MOBILE ELECTRONIC DEVICES - A system for enabling a chassis-coupled modular mobile electronic device includes a chassis, a set of module couplers (coupled to the chassis) that removably and mechanically couple modules of the modular mobile electronic device to the chassis, a module communication network configured to enable data transfer between the modules through the module communication network when the modules are coupled to the chassis, and a module power network configured to enable power transfer between the modules when the modules are coupled to the chassis. | 2015-10-08 |
20150288423 | Method of Acquiring Operation State Information of Wireless Power System - A method for a mobile device in a wireless power system includes transmitting a request to a server of the wireless power system for acquiring operation state information of a first wireless power spot in the wireless power system, wherein the request at least comprises a required power threshold; and receiving a response comprising the operation state information of the first wireless power spot, wherein the operation state information at least comprises a capacity and an availability of the first wireless power spot. | 2015-10-08 |
20150288424 | RFID COMMUNICATION SYSTEM - The present invention relates to a RFID communication system comprising an interrogator ( | 2015-10-08 |
20150288425 | METHOD AND APPARATUS FOR RELIEVING DOPPLER BROADENING IN WIRELESS ACCESS SYSTEM THAT SUPPORTS SUPER HIGH FREQUENCY BAND - The present invention provides methods for relieving effective Doppler broadening in performing pin-point beamforming and provides apparatuses for supporting the methods, wherein the methods and the apparatuses are used in a wireless access system that supports a super high frequency band. The method for relieving Doppler broadening in a wireless access system that supports a super high frequency band according to one embodiment of the present invention may comprise the steps of: receiving a downlink signal at a receiving end; estimating a Doppler spectrum for the downlink signal received at the receiving end; and calculating a carrier wave shift value based on the Doppler spectrum estimated at the receiving end. | 2015-10-08 |
20150288426 | COMMUNICATION CONTROL METHOD, BASE STATION, AND PROCESSOR - A base station is connected to a first user terminal in a mobile communication system that performs spatial multiplexing transmission for the first user terminal and a second user terminal by applying a same radio resource and a same precoder matrix. The base station comprises: a control unit that notifies another base station connected to the second user terminal of a first statistic for each piece of first precoder matrix information fed back from the first user terminal and a second statistic for each downlink radio resource in the first user terminal. | 2015-10-08 |
20150288427 | METHOD AND APPARATUS FOR MEDIUM ACCESS CONTROL FOR UNIFORM MULTIPLE ACCESS POINTS COVERAGE IN WIRELESS LOCAL AREA NETWORKS - A method and apparatus may be used in multi-AP and multi-wireless transmit/receive unit joint transmissions. The apparatus may be configured to transmit a joint transmission request on a first medium, and receive a joint transmission response on the first medium. In response, the apparatus my perform a joint transmission negotiation on a second medium and transmit data on the second medium based on the joint transmission negotiation. The apparatus may be configured to perform coordinated sectorized or beamformed transmissions through access point (AP)/PCP negotiations. The apparatus may provide an indication of support for joint transmission and coordinated sectorized or beamformed transmissions. The method and apparatus may also implement multi-AP/WTRU request-to-send (RTS)/clear-to-send (CTS) procedures. The apparatus may be configured to perform coordinated sectorized or beamforming grouping. | 2015-10-08 |
20150288428 | PROTOCOL FOR COOPERATION COMMUNICATION BETWEEN ACCESS POINTS IN OVERLAPPED BASIC SERVICE SET (OBSS) ENVIRONMENT - Disclosed is a protocol for transmitting data through cooperation between access points in an overlapped basic service set (OBSS) environment. A cooperative beamforming communication method may include negotiating, by a first access point, a cooperative transmit beamforming with a second access point having an OBSS area with the first access point; transmitting, by the first access point, a clear-to-send (CTS) to the second access point; and performing, by the first access point, the cooperative transmit beamforming with the second access point during a cooperative transmit beamforming duration determined through the negotiation after a predetermined time interval is elapsed, when transmission of the CTS is completed. | 2015-10-08 |