40th week of 2018 patent applcation highlights part 73 |
Patent application number | Title | Published |
20180286749 | Fully Self-Aligned Via | 2018-10-04 |
20180286750 | FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION | 2018-10-04 |
20180286751 | TECHNOLOGICAL METHOD FOR PREVENTING, BY MEANS OF BURIED ETCH STOP LAYERS, THE CREATION OF VERTICAL/LATERAL INHOMOGENEITIES WHEN ETCHING THROUGH-SILICON VIAS | 2018-10-04 |
20180286752 | MANUFACTURING METHOD FOR SOLID-STATE IMAGING DEVICE AND SOLID-STATE IMAGING DEVICE | 2018-10-04 |
20180286753 | METHOD OF PROCESSING WORKPIECE | 2018-10-04 |
20180286754 | WORKPIECE PROCESSING METHOD | 2018-10-04 |
20180286755 | METHOD OF PROCESSING WORKPIECE | 2018-10-04 |
20180286756 | WORKPIECE PROCESSING METHOD | 2018-10-04 |
20180286757 | METHOD OF PROCESSING WORKPIECE | 2018-10-04 |
20180286758 | METHOD OF PROCESSING WORKPIECE | 2018-10-04 |
20180286759 | Asymmetric Source/Drain Epitaxy | 2018-10-04 |
20180286760 | FABRICATING FIN-BASED SPLIT-GATE HIGH-DRAIN-VOLTAGE TRANSISTOR BY WORK FUNCTION TUNING | 2018-10-04 |
20180286761 | FABRICATING FIN-BASED SPLIT-GATE HIGH-DRAIN-VOLTAGE TRANSISTOR BY WORK FUNCTION TUNING | 2018-10-04 |
20180286762 | Integration of Semiconductor Structures | 2018-10-04 |
20180286763 | METHOD FOR FABRICATING A ROW OF MOS TRANSISTORS | 2018-10-04 |
20180286764 | FIELD EFFECT TRANSISTOR WITH STACKED NANOWIRE-LIKE CHANNELS AND METHODS OF MANUFACTURING THE SAME | 2018-10-04 |
20180286765 | METHOD FOR MEASURING CHARGE ACCUMULATION IN FABRICATION PROCESS OF SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286766 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND INSPECTION APPARATUS FOR SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286767 | SUBSTRATE PROCESSING SYSTEM, CONTROL DEVICE, AND FILM DEPOSITION METHOD AND PROGRAM | 2018-10-04 |
20180286768 | METHODS FOR OPTICAL ENDPOINT DETECTION USING AN ENDPOINT BOOSTER | 2018-10-04 |
20180286769 | STRESS MINITORING DEVICE AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286770 | BOARD FOR ELECTRONIC COMPONENT PACKAGE, ELECTRONIC COMPONENT PACKAGE, AND METHOD OF MANUFACTURING BOARD FOR ELECTRONIC COMPONENT PACKAGE | 2018-10-04 |
20180286771 | SEMICONDUCTOR MODULE | 2018-10-04 |
20180286772 | VACUUM SUCTION PAD AND SUBSTRATE HOLDER | 2018-10-04 |
20180286773 | SEMICONDUCTOR DEVICE COMPRISING A DIE SEAL INCLUDING LONG VIA LINES | 2018-10-04 |
20180286774 | SEMICONDUCTOR DEVICE AND POWER CONVERTER | 2018-10-04 |
20180286775 | SEMICONDUCTOR MODULE | 2018-10-04 |
20180286776 | PACKAGE STRUCTURE AND METHOD OF FORMING PACKAGE STRUCTURE | 2018-10-04 |
20180286777 | WIRING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE | 2018-10-04 |
20180286778 | Heat Transfer Plate Having Small Cavities For Taking Up A Thermal Transfer Material | 2018-10-04 |
20180286779 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286780 | INTEGRATED ANTENNA FOR DIRECT CHIP ATTACH CONNECTIVITY MODULE PACKAGE STRUCTURES | 2018-10-04 |
20180286781 | POWER MODULE APPARATUS, COOLING STRUCTURE, AND ELECTRIC VEHICLE OR HYBRID ELECTRIC VEHICLE | 2018-10-04 |
20180286782 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286783 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286784 | METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING A DUAL MATERIAL REDISTRIBUTION LINE | 2018-10-04 |
20180286785 | 3D-MICROSTRIP BRANCHLINE COUPLER | 2018-10-04 |
20180286786 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS | 2018-10-04 |
20180286787 | METHOD OF PACKAGING A SEMICONDUCTOR DIE | 2018-10-04 |
20180286788 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286789 | LEADFRAME PACKAGE WITH SIDE SOLDER BALL CONTACT AND METHOD OF MANUFACTURING | 2018-10-04 |
20180286790 | FAN-OUT SEMICONDUCTOR PACKAGE | 2018-10-04 |
20180286791 | ELECTRONIC COMPONENT MODULE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MODULE | 2018-10-04 |
20180286792 | POWER APPARATUS | 2018-10-04 |
20180286793 | PACKAGE STRUCTURE AND METHOD OF FORMING THEREOF | 2018-10-04 |
20180286794 | INTERPOSER SUBSTRATE AND METHOD OF FABRICATING THE SAME | 2018-10-04 |
20180286795 | METHOD OF FORMING VIAS USING SILICON ON INSULATOR SUBSTRATE | 2018-10-04 |
20180286796 | ELECTRONIC COMPONENT MODULE AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286797 | INTEGRATED CIRCUIT PACKAGE WITH MICROSTRIP ROUTING AND AN EXTERNAL GROUND PLANE | 2018-10-04 |
20180286798 | POWER MESH-ON-DIE TRACE BUMPING | 2018-10-04 |
20180286799 | MICROELECTRONIC PACKAGE HAVING A PASSIVE MICROELECTRONIC DEVICE DISPOSED WITHIN A PACKAGE BODY | 2018-10-04 |
20180286800 | POWER DISTRIBUTION NETWORKS FOR A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC) | 2018-10-04 |
20180286801 | TRANSISTOR STRUCTURES | 2018-10-04 |
20180286802 | STRUCTURE AND METHOD FOR IMPROVING HIGH VOLTAGE BREAKDOWN RELIABILITY OF A MICROELECTRONIC DEVICE | 2018-10-04 |
20180286803 | NON-PLANAR METAL-INSULATOR-METAL CAPACITOR FORMATION | 2018-10-04 |
20180286804 | INTERCONNECTS FOR SEMICONDUCTOR PACKAGES | 2018-10-04 |
20180286805 | INTERFACE STRUCTURES AND METHODS FOR FORMING SAME | 2018-10-04 |
20180286806 | SEMICONDUCTOR DEVICE HAVING MULTILAYER INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286807 | SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286808 | SEMICONDUCTOR DEVICE HAVING CONTACTS WITH VARYING WIDTHS | 2018-10-04 |
20180286809 | MEMORY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2018-10-04 |
20180286810 | SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286811 | Semiconductor Device and Method | 2018-10-04 |
20180286812 | Die Interconnect Substrates, a Semiconductor Device and a Method for Forming a Die Interconnect Substrate | 2018-10-04 |
20180286813 | ELECTRONIC COMPONENT MODULE AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286814 | SEMICONDUCTOR POWER DEVICE AND A METHOD OF ASSEMBLING A SEMICONDUCTOR POWER DEVICE | 2018-10-04 |
20180286815 | SHIELDING SOLUTIONS FOR DIRECT CHIP ATTACH CONNECTIVITY MODULE PACKAGE STRUCTURES HAVING SHIELDING STRUCTURES ATTACHED TO PACKAGE STRUCTURES | 2018-10-04 |
20180286816 | ELECTRONIC COMPONENT MODULE | 2018-10-04 |
20180286817 | METHOD OF MANUFACTURING ELECTRONIC COMPONENT MODULE | 2018-10-04 |
20180286818 | WAFER LEVEL PACKAGES, SEMICONDUCTOR DEVICE UNITS, AND METHODS OF FABRICATING THE SAME | 2018-10-04 |
20180286819 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2018-10-04 |
20180286820 | Processing Techniques for Silicon-Based Transient Devices | 2018-10-04 |
20180286821 | Integrated Circuit Capable of Operating at Very High Voltage and Method of Fabricating Same | 2018-10-04 |
20180286822 | SUBSTRATE HAVING EMBEDDED ELECTRONIC COMPONENT | 2018-10-04 |
20180286823 | PACKAGE STRUCTURE AND METHOD OF FORMING PACKAGE STRUCTURE | 2018-10-04 |
20180286824 | PACKAGE STRUCTURE AND METHOD OF FORMING PACKAGE STRUCTURE | 2018-10-04 |
20180286825 | MONOLITHIC DECOUPLING CAPACITOR BETWEEN SOLDER BUMPS | 2018-10-04 |
20180286826 | METHODS OF INTERCONNECT FOR HIGH DENSITY 2.5D AND 3D INTEGRATION | 2018-10-04 |
20180286827 | RESIN-ENCAPSULATED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286828 | MONOLITHIC DECOUPLING CAPACITOR BETWEEN SOLDER BUMPS | 2018-10-04 |
20180286829 | RESIN COMPOSITION, BONDED BODY AND SEMICONDUCTOR DEVICE | 2018-10-04 |
20180286830 | BUMP-ON-TRACE INTERCONNECT | 2018-10-04 |
20180286831 | METHOD FOR PRODUCING A SUBSTRATE ARRANGEMENT, SUBSTRATE ARRANGEMENT, AND METHOD FOR CONNECTING A SUBSTRATE ARRANGEMENT TO AN ELECTRONIC COMPONENT | 2018-10-04 |
20180286832 | DECOUPLING SYSTEMS AND METHODS FOR SAME | 2018-10-04 |
20180286833 | Microelectronics Package Providing Increased Memory Component Density | 2018-10-04 |
20180286834 | SYSTEM ON PACKAGE ARCHITECTURE INCLUDING STRUCTURES ON DIE BACK SIDE | 2018-10-04 |
20180286835 | SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME | 2018-10-04 |
20180286836 | Sacrificial Alignment Ring And Self-Soldering Vias For Wafer Bonding | 2018-10-04 |
20180286837 | Chip On Board LED Device and Method | 2018-10-04 |
20180286838 | APPARATUS FOR DIRECT TRANSFER OF SEMICONDUCTOR DEVICE DIE | 2018-10-04 |
20180286839 | Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer | 2018-10-04 |
20180286840 | THREE-DIMENSIONAL SMALL FORM FACTOR SYSTEM IN PACKAGE ARCHITECTURE | 2018-10-04 |
20180286841 | Variable Resistance LED Device and Method | 2018-10-04 |
20180286842 | LIGHT EMITTING DEVICE PACKAGE | 2018-10-04 |
20180286843 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286844 | COOLING SYSTEM FOR HIGH POWER APPLICATION SPECIFIC INTEGRATED CIRCUIT WITH EMBEDDED HIGH BANDWIDTH MEMORY | 2018-10-04 |
20180286845 | POWER SEMICONDUCTOR MODULE FOR AN INVERTER CIRCUIT AND METHOD OF MANUFACTURING THE SAME | 2018-10-04 |
20180286846 | HYBRID BONDING WITH THROUGH SUBSTRATE VIA (TSV) | 2018-10-04 |
20180286847 | Semiconductor Device Packages, Packaging Methods, and Packaged Semiconductor Devices | 2018-10-04 |
20180286848 | DEEP HIGH CAPACITY CAPACITOR FOR BULK SUBSTRATES | 2018-10-04 |