40th week of 2013 patent applcation highlights part 39 |
Patent application number | Title | Published |
20130258764 | MULTI-STATE SPIN-TORQUE TRANSFER MAGNETIC RANDOM ACCESS MEMORY - A multi-state spin-torque transfer magnetic random access memory (STTMRAM) is formed on a film and includes a first magnetic tunneling junctions (MTJ) having a first fixed layer, a first sub-magnetic tunnel junction (sub-MTJ) layer and a first free layer. The first fixed layer and first free layer each have a first magnetic anisotropy. The STTMRAM further includes a non-magnetic spacing layer formed on top of the first MTJ layer and a second MTJ formed on top of the non-magnetic spacing layer. The second MTJ has a second fixed layer, a second sub-MTJ layer and a second free layer. The second fixed and second free layers each have a second magnetic anisotropy, wherein at least one of the first or second magnetic anisotropy is perpendicular to the plane of the film. | 2013-10-03 |
20130258765 | METHOD OF CHANGING REFLECTANCE OR RESISTANCE OF A REGION IN AN OPTOELECTRONIC MEMORY DEVICE - A method for changing reflectance or resistance of a region in an optoelectronic memory device. Changing the reflectance of the region includes sending an electric current through the region to cause a reflectance change in the region. Changing the resistance of the region includes: projecting a laser beam at a first beam intensity on the region, resulting in the region changing from a first to a second different resistance value; electrically reading the second resistance value during which an optical signal carried by the laser beam has a first digital value; after electrically reading the second resistance value, the laser beam is projected at a second beam intensity on the region resulting in the region changing from the second to the first resistance value; and electrically reading the first resistance value of the region while the laser beam is being projected on the region at the second beam intensity. | 2013-10-03 |
20130258766 | DECODING ARCHITECTURE AND METHOD FOR PHASE CHANGE NON-VOLATILE MEMORY DEVICES - A decoding system for a phase change non-volatile memory device having a memory array may include a column decoder that selects at least one column of the memory array during programming operations. The decoding system includes a selection circuit that includes selection switches on a number of hierarchical decoding levels for defining a conductive path between at least one column and a driving stage. A biasing circuit may supply biasing signals to the selection switches for defining the first conductive path and bringing the selected column to a programming voltage value. The programming selection circuit may have protection elements between columns and the selection switches. The selection switches and the protection elements may include metal oxide semiconductor (MOS) transistors having an upper threshold voltage level lower than the programming voltage. | 2013-10-03 |
20130258767 | PHASE-CHANGE MEMORY CELL - A phase-change memory cell includes a phase change material; a reference electrical terminal disposed on first side of the phase change material; first and second electrical terminals disposed on a second side of the phase change material; the phase-change material configured to be reversibly transformable between an amorphous phase and a crystalline phase, in response to a phase-altering electrical signal applied to the phase-change material via the reference electrical terminal and one or more of the first and second electrical terminals; a resistance measurement unit configured to measure a respective electrical resistance between each of the first and electrical terminals and the reference electrical terminal; and a mathematical operation unit configured to determine a mathematical relation between the respective electrical resistances measured between each of the electrical terminals and the reference electrical terminal. | 2013-10-03 |
20130258768 | RELIABLE SET OPERATION FOR PHASE-CHANGE MEMORY CELL - A Phase-Change Memory (PCM) device and a method of writing data to the PCM device are described. The PCM device includes a multi-phase data storage cell having at least a Set state and a Reset state that may be established using a heater configured to heat the data storage cell. A memory interface may be coupled with the heater configured to write data to the data storage cell, the data being represented by the Set or the Reset states. A write Reset pulse is used to place the data storage cell in the Reset state corresponding to a read value that is less than a read threshold. A write Set pulse that is a predetermined function of the write Reset pulse is used to place the data storage cell in the Set state. The PCM device may include additional intermediate states that enable each data storage cell to store two or more bits of information. Other embodiments may be described and claimed. | 2013-10-03 |
20130258769 | MEMORY DEVICES AND METHODS OF OPERATING MEMORY - Methods and apparatus for synchronizing a delay locked loop, such as delay locked loops used with NAND memories are disclosed. In at least one embodiment, one or both of a clock and the delay locked loop are stopped for energy savings. A synchronization start signal can be provided by the NAND memory or a controller to start the clock and/or delay locked loop, and to synchronize the delay locked loop to the clock before completing the read operation. | 2013-10-03 |
20130258770 | Parametric Tracking to Manage Read Disturbed Data - Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with various embodiments, data are stored in a first location in a memory, and read from the first location a selected number of times. At least one parameter associated with the first location is measured after the data are read the selected number of times. The data are thereafter migrated to a second location in the memory responsive to the measured parameter indicating a presence of read disturbance in the data in the first location. | 2013-10-03 |
20130258771 | METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE - In method of programming a nonvolatile memory device including first and second cell strings that are coupled to one bitline, a first channel of the first cell string and a second channel of the second cell string are precharged by applying a first voltage to the bitline, one cell string is selected from the first and second cell strings, and a memory cell included in the selected cell string is programmed by applying a second voltage greater than a ground voltage and less than the first voltage to the bitline. | 2013-10-03 |
20130258772 | Non-Volatile Memory and Method Having a Memory Array with a High-Speed, Short Bit-Line Portion - A non-volatile memory array is partitioned along the column direction into first and second portions. The first portion has SLC memory cells and the second portion has MLC memory cells. The first portion acts as a fast cache memory for the second portion. The read/write operations of the first portion are further enhanced by coupling to a set of read/write circuits immediately adjacent to the first portion, while the column of each bit line is switchably cut off at the junction between the first and second portions. In this way, the RC constant of the cut off bit line is at a minimum, which translates to faster precharge of the bit line via the read/write circuits. When the second portion is operating, its access to the set of read/write circuits is accomplished by not cutting off each bit line at the junction between the first and second portions. | 2013-10-03 |
20130258773 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH TRANSFERS A PLURALITY OF VOLTAGES TO MEMORY CELLS AND METHOD OF WRITING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array, a bit line, and a voltage generator. The memory cell array includes each of a plurality of memory cells. Each of the memory cells includes a charge storage layer and a control gate and is capable of holding two or more levels of data. The bit line is capable of transferring data to the memory cells in a one-to-one correspondence. The voltage generator carries out a verify operation by applying a verify voltage to the memory cells after performing first writing by applying a first voltage and then a second voltage lower than the first voltage to the control gate. | 2013-10-03 |
20130258774 | READING MEMORY CELL HISTORY DURING PROGRAM OPERATION FOR ADVAPTIVE PROGRAMMING - Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device. | 2013-10-03 |
20130258775 | Adaptively Programming or Erasing Flash Memory Blocks - Embodiments described herein generally relate to programming and erasing a FLASH memory. In an embodiment, a method of programming or erasing the contents of a block of a FLASH memory includes determining a voltage of a pulse based on an age of the block and outputting the pulse to at least a portion of the block. The pulse is used to program or erase the block. | 2013-10-03 |
20130258776 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA THEREFROM - A non-volatile semiconductor memory device according to an aspect includes a memory cell array and a control circuit. The memory cell array includes a plurality of memory cells, and stores initial setting data in each of a plurality of storage areas. The control circuit reads the initial setting data from the storage areas. The control circuit is configured to read, when it detects an error in the initial setting data read from one of the storage areas, initial setting data from another storage area. | 2013-10-03 |
20130258777 | TIMIMG CONTROL IN SYNCHRONOUS MEMORY DATA TRANSFER - A solid-state memory device has a memory interface that includes a timing signal port for receiving a timing signal, a data transfer port, a data transfer module for transferring blocks of data signals between the data transfer port and the memory module, and a selectable delay module for providing a selected delay between transitions in the data signals DQ and transitions in the timing signals DQS. The memory interface also has a delay controller for setting the selected delay, for detecting a variation in a delay produced by the selectable delay module relative to a reference delay, for controlling a pause in transfer of a block of the data signals DQ, and for adjusting the selected delay during the pause. | 2013-10-03 |
20130258778 | READ VOLTAGE GENERATION CIRCUIT, MEMORY AND MEMORY SYSTEM INCLUDING THE SAME - A read voltage generation circuit includes a register unit configured to store an initial read voltage code, a counter circuit configured to change a read voltage code in every read-retry operation, wherein an initial value of the read voltage code is the initial read voltage code; and a voltage generation circuit configured to generate a read voltage corresponding to a read voltage code produced by the counter circuit. | 2013-10-03 |
20130258779 | NAND MEMORY ARRAY WITH MISMATCHED CELL AND BITLINE PITCH - Embodiments of the present disclosure describe methods, apparatus, and system configurations for NAND memory arrays with mis-matched cell and bitline pitch. Other embodiments may be described and claimed. | 2013-10-03 |
20130258780 | METHOD OF PROGRAMMING SELECTION TRANSISTORS FOR NAND FLASH MEMORY - Disclosed herein is a method that includes providing a non-volatile memory device which includes a plurality of cells, a plurality of selection transistors each having a gate and each coupled to associated one of the cells, and a selection line coupled in common to the gates of the selection transistors, applying a first program voltage to the selection line, and applying a second program voltage to the selection line when at least one of the selection transistors have not been shifted to a program condition. | 2013-10-03 |
20130258781 | MEMORY DEVICES AND BIASING METHODS FOR MEMORY DEVICES - Devices, systems and methods of biasing in memory devices facilitate memory device programming and/or erase operations. In at least one embodiment, a first string of memory cells comprising a selected memory cell and a second string of memory cells are coupled to a common data line and a common source where the data line and the source are biased to substantially the same potential during a programming and/or erase operation performed on one or more of the strings of memory cells. | 2013-10-03 |
20130258782 | CONFIGURATION MEMORY - According to one embodiment, a configuration memory includes first and second data lines, a first memory string which comprises at least first and second nonvolatile memory transistors which are connected in series between a common node and the first data line, a second memory string which comprises at least third and fourth nonvolatile memory transistors which are connected in series between the common node and the second data line, and a flip-flop circuit which comprises a first data holding node connected to the common node and a second data holding node connected to a configuration data output node. | 2013-10-03 |
20130258783 | Method and Apparatus for Logic Read in Flash Memory - The timing of logic read operations in a Flash memory device may be improved by a pad serial output circuit which receives a pre-decoded instruction signal and pre-fetched logic data prior to the last command clock, and which performs a fast resolution of the command in the pad serial output circuit on the last clock of the command input sequence. In one illustratively implementation, instruction pre-decode and data pre-fetch may be done on the seventh clock during command input. In another illustrative implementation, a first instruction pre-decode and data pre-fetch may be done on the fourth clock during command input, and a second instruction pre-decode may be done on the seventh clock during command input. Both serial protocol interface, including dual and quad I/O SPI, and quad peripheral interface are supported. | 2013-10-03 |
20130258784 | SILICON ON INSULATOR AND THIN FILM TRANSISTOR BANDGAP ENGINEERED SPLIT GATE MEMORY - Memory cells comprising thin film transistor, stacked arrays, employing bandgap engineered tunneling layers in a junction free, NAND configuration. The cells comprise a channel region in a semiconductor strip formed on an insulating layer; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising a multilayer structure including at least one layer having a hole-tunneling barrier height lower than that at the interface with the channel region; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer Arrays and methods of operation are described. | 2013-10-03 |
20130258785 | APPARATUSES AND METHODS INCLUDING MEMORY WRITE, READ, AND ERASE OPERATIONS - Some embodiments include apparatuses and methods having a memory cell string that can include memory cells located in different levels of the apparatus. The memory cell string can include a body associated with the memory cells. At least one of such embodiments can include a module configured to apply a negative voltage to at least a portion of the body of the memory cell string during an operation of the apparatus. The operation can include a read operation, a write operation, or an erase operation. Other embodiments are described. | 2013-10-03 |
20130258786 | Victim Port-Based Design for Test Area Overhead Reduction in Multiport Latch-Based Memories - A multiport latch-based memory device includes a latch array, a plurality of first multiplexers, and a second multiplexer. The latch array is responsive to output data from an input data register in a functional mode associated with the latch-based memory device. The plurality of first multiplexers is responsive to output data from the latch array in the functional mode. The plurality of first multiplexers is responsive to output data from the input data register in a test mode associated with the latch-based memory device. The second multiplexer selectively provides output data from the plurality of first multiplexers to the input data register in the test mode, thereby providing a data path bypassing the latch array in the test mode. Embodiments of a corresponding method and computer-readable medium are also provided. | 2013-10-03 |
20130258787 | SEMICONDUCTOR DEVICE AND METHOD OF DRIVING THEREOF - A semiconductor device includes a first latch unit that latches write data based on a strobe signal, a second latch unit that receives the write data latched in the first latch unit based on a first clock signal, and a strobe generation unit that generates the strobe signal and supplies it to the first latch unit. The strobe generation unit includes a bit shift counter, which receives a second clock signal and outputs a bit shift signal having a logic level that is inverted every plural clock cycles of the second clock signal, and a logic gate that outputs the second clock signal as the strobe signal according to the bit shift signal. The latch period of the write data in the first latch part is determined by the period of the strobe signal and also the period of the bit shift signal. | 2013-10-03 |
20130258788 | SEMICONDUCTOR DEVICE HAVING PLURAL CHIP CONNECTED TO EACH OTHER - Disclosed herein is a device that includes: a first timing adjustment circuit generating a first control signal based on a command and an output buffer outputting a plurality of data sets in a serial at a timing based on the first control signal; and a second semiconductor chip including: a plurality of holding circuits holding the data sets in parallel, a second timing adjustment circuit generating a second control signal based on the command, and an input buffer sequentially capturing the data sets supplied from the holding circuits based on the second control signal. | 2013-10-03 |
20130258789 | SEMICONDUCTOR MEMORY AND METHOD OF OPERATING SEMICONDUCTOR MEMORY - Deterioration of holding characteristics due to fluctuations in power supply voltage VDD is prevented. During ting ending in one of memory circuits, a pair of bit lines in the other memory circuit is controlled to a dummy-bit-line voltage ranging from a ground voltage to ½×VDD. In a subsequent precharge period, a pair of bit lines in one of the memory circuits and the pair of bit lines in the other memory circuit are coupled to a reference voltage generating circuit. | 2013-10-03 |
20130258790 | MEMORY WITH REDUNDANT SENSE AMPLIFIER - Embodiments of a memory are disclosed that may reduce the likelihood of a miss-read while reading a weak data storage cell. The memory may include a number of data storage cells, a column multiplexer, a first sense amplifier and a second sense amplifier, and an output circuit. The gain level of the first sense amplifier may be higher than the gain level of the second sense amplifier. The output circuit may include a multiplexer and the multiplexer may be operable to controllably select one of the outputs of the first and second sense amplifiers and pass the value of the selected sense amplifier. The output circuit may include a node that couples the outputs of the first and second sense amplifiers and the outputs of the first and second sense amplifiers may be able to be set to a high impedance state. | 2013-10-03 |
20130258791 | DATA TRANSFER CIRCUIT AND DATA TRANSFER METHOD - A data transfer circuit includes a write circuit to control writing of write data to a memory, a read circuit to control reading of data from the memory, a first circuit to register a store position in the memory at which data written to the memory is stored, and a second circuit to store a data pattern when the write data is comprised of repeated patterns each identical to the data pattern, wherein the write circuit does not register the store position in the first circuit with respect to the written data that is comprised of the repeated patterns each identical to the data pattern stored in the second circuit, and the read circuit reads the data pattern from the second circuit for provision to a source issuing a read request when data requested by the read request corresponds to the data pattern stored in the second circuit. | 2013-10-03 |
20130258792 | SEMICONDUCTOR DEVICE HAVING COMPENSATION CAPACITOR TO STABILIZE POWER SUPPLY VOLTAGE - Disclosed herein is a device that includes: first and second memory cell arrays arranged in a first direction; a plurality of first bump electrodes disposed between the first and second memory cell arrays and arranged in line in a second direction crossing the first direction; a plurality of second bump electrodes disposed between the first bump electrodes and the second memory cell arrays and arranged in line in the second direction; a first area being between the first and second bump electrodes; a plurality of third bump electrodes disposed in the first area; and a first capacitor formed in the third area. | 2013-10-03 |
20130258793 | SEMICONDUCTOR DEVICE - A semiconductor device includes a sense amplifier circuit. The sense amplifier circuit includes a cross-coupled first transistor and second transistor that perform amplification. The sources of the cross-coupled transistors are respectively connected in series with a third transistor and a fourth transistor, and electrical current supply capability of the third and fourth transistors is controlled by a control voltage given to control electrodes of the third and fourth transistors. In a data retaining period, a minimum sub-threshold current necessary for retaining the data is flowed to the third and fourth transistors according to the control voltage, and bit line potential is maintained. | 2013-10-03 |
20130258794 | MEMORY DEVICE HAVING CONTROL CIRCUITRY FOR SENSE AMPLIFIER REACTION TIME TRACKING - A memory device includes a memory array comprising a plurality of memory cells arranged in rows and columns, and sensing circuitry coupled to the memory array. The sensing circuitry comprises a plurality of output sense amplifiers configured to sense stored data associated with respective columns of the memory array, and sense amplifier control circuitry configured to generate a sense amplifier control signal for application to control inputs of respective ones of the output sense amplifiers. The sense amplifier control circuitry comprises reaction time tracking circuitry including at least one dummy sense amplifier configured to track reaction time of one or more of the output sense amplifiers, with the sense amplifier control signal being generated at least in part responsive to an output signal of the dummy sense amplifier. | 2013-10-03 |
20130258795 | SINGLE-ENDED READ RANDOM ACCESS MEMORY - A single-ended read random access memory including a plurality of memory units, a clock generator, a bit line load circuit, a control processing unit, and a sensing unit is revealed. The memory units are coupled to a bit line and the clock generator is for generating a clock signal. The bit line load circuit charges the memory units to an operating voltage according to the clock signal. The control processing unit controls at least one of the memory units according to the clock signal to make the memory unit store a stored voltage according to the operating voltage. The sensing unit generates a sensing threshold according to the clock signal and a data dependency, and outputs a data signal according to the sensing threshold and the stored voltage. The operating voltage includes a noise whose ratio to the operating voltage is inversely proportional to the operating voltage. | 2013-10-03 |
20130258796 | SEMICONDUCTOR DEVICE - A semiconductor device comprising a stacked layer memory block and associated peripheral circuits in stacked layer arrangements. Booster circuits in a variety of stacked layer arrangements are described. The booster circuit possesses plural rectifier cells that are series-connected and plural first capacitors. The plural first capacitors receive the first clock signal on one end, and the other ends are each connected to one end of different rectifier cells. The first capacitor is composed of capacities between plural first conductive layers that are arrayed with a set pitch perpendicularly to the substrate. One of the either even numbered or odd numbered first conductive layers is supplied with a first clock signal. The other of the either even numbered or odd numbered first conductive layers that line perpendicularly to the substrate is, individually, connected to one end of different rectifier cells. | 2013-10-03 |
20130258797 | WORD LINE DRIVER - A first circuit is coupled to a second circuit, which is coupled to a third circuit. A high voltage value of a first input signal and of a first output signal of the first circuit are equal, and are less than a high voltage value of a second output signal of the second circuit. A low voltage value of the first input signal is higher than a low voltage value of the first output signal. A high voltage value of the second output signal and of a third output signal of the third circuit are equal. The low voltage value of the first output signal, the second output signal, and the third output signal are equal. | 2013-10-03 |
20130258798 | Gas Injection Heating Probe - A gas injection heating probe, where the probe has a hollow injection channel, a heating media inlet, a heating media outlet, a gas injection fitting and heat exchange area. The gas injection heating probe is connectable to a heated media and a source of gas, so that when connected and inserted into a container having product, the probe provides for gas injection and heating of the product to assist in mixing the product for discharge. | 2013-10-03 |
20130258799 | Method and Apparatus for Mixing Powder Material With Water - A process and apparatus is provided for mixing a powder material with water. The powder material can be powdered activated carbon (PAC) or a dry polymer. The powder material is provided from a container, and it is delivered to a feed hopper, then to a mixing vessel, where water is provided, to mix with the powder material through a wetting ring. A vibrator mechanism may be used to facilitate discharge of the powder material into the feed hopper. | 2013-10-03 |
20130258800 | HOMOGENIZER AND STORAGE COOLER - A homogenizer, for homogenizing a tissue sample collected from a living body, comprising: a main body; and a storage cooler, comprising a container holder for holding a sample container, configured to cool a tissue sample in the sample container held by the container holder, the storage cooler being detachably installed to the main body, wherein the main body has a blender for crushing the tissue sample in the sample container held in the storage cooler is disclosed. | 2013-10-03 |
20130258801 | MIXING APPARATUS AND METHOD FOR MIXING FLUIDS - Provided is a mixing apparatus which can efficiently mix two fluids, for example to create emulsions, which using a relatively low energy input. This objective is met by a mixing device comprising two confronting surfaces ( | 2013-10-03 |
20130258802 | ULTRASONIC TRANSDUCER ELEMENT CHIP, PROBE, ELECTRONIC INSTRUMENT, AND ULTRASONIC DIAGNOSTIC DEVICE - An ultrasonic transducer element chip includes a substrate, ultrasonic transducer elements and a reinforcing member. The substrate defines openings arranged in an array pattern. The ultrasonic transducer elements are respectively disposed at the openings on a first surface of the substrate. The reinforcing member is fixed on a second surface of the substrate opposite to the first surface of the substrate. The reinforcing member includes linear groove parts formed on a surface of the reinforcing member fixed on the substrate so that internal spaces of the openings and an external space of the substrate are in communication with each other via the linear groove parts. The linear groove parts extend along a plane of the surface of the reinforcing member, and they are arranged at an interval in a first direction smaller than a width of each opening on the second surface of the substrate in the first direction. | 2013-10-03 |
20130258803 | ULTRASONIC TRANSDUCER ELEMENT CHIP, PROBE, ELECTRONIC INSTRUMENT, AND ULTRASONIC DIAGNOSTIC DEVICE - An ultrasonic transducer element chip includes a substrate, a plurality of ultrasonic transducer elements, a reinforcing member and a ventilation passage. The substrate defines a plurality of openings arranged in an array pattern. The ultrasonic transducer elements are respectively disposed at the openings on a first surface of the substrate. The reinforcing member is fixed on a second surface of the substrate opposite to the first surface of the substrate to reinforce the substrate. Through the ventilation passage, internal spaces of the openings and an external space of the substrate are in communication with each other. | 2013-10-03 |
20130258804 | ULTRASONIC DIAGNOSTIC APPARATUS AND IMAGE PROCESSING METHOD - Provided is an ultrasonic diagnostic apparatus including an STIC function, wherein, in order to make it possible to reproduce images with the correct time phase by preventing erroneous image reproduction due to time phase estimation failure, the ultrasonic diagnostic apparatus includes: a time phase estimation unit that uses echo data to estimate time phase information of periodic movement of an examination object included in the echo data; an image processing unit that uses the echo data and the time phase information estimated by the time phase estimation unit to create an ultrasonic image of the examination object at each time phase; and, in addition, a time phase correction unit that corrects the time phase information estimated by the time phase estimation unit. The image processing unit creates an ultrasonic image using the time phase information corrected by the time phase correction unit. | 2013-10-03 |
20130258805 | METHODS AND SYSTEMS FOR PRODUCING COMPOUNDED ULTRASOUND IMAGES - Disclosed is a method for producing compounded ultrasound images by beamforming a first and a second low-resolution image using data from a first ultrasound emission, beamforming a third and a fourth low-resolution image using data from a second ultrasound emission, summing said first and said third low-resolution image creating a first high-resolution image and said second and said fourth low-resolution image creating a second high-resolution image, wherein the method further comprises computing a first envelope image for said first high-resolution image and a second envelope image for said second high-resolution image, and processing said first envelope image and said second envelope image creating in a first compounded high-resolution image. | 2013-10-03 |
20130258806 | MARINE ACQUISITION USING SUBAQUATIC FLOATING SEISMIC NODES - Methods and systems are presented for generating and performing a seismic data acquisition mission based on an a priori sea current model and a seismic data acquisition operation model and a shooting solution model based on the a priori sea current model. The individual models can be updated based on releasing sample buoys through the survey area both before and during mission execution. | 2013-10-03 |
20130258807 | METHODS AND APPARATUS FOR NODE POSITIONING DURING SEISMIC SURVEY - Disclosed are apparatus and methods acoustic node positioning during a marine survey. In one embodiment, positions of a plurality of nodes are calibrated using acoustic transceivers. In addition, changes in the positions of the nodes are tracked using accelerometers. In another embodiment, a traveling wave is detected, and an effect of the traveling wave is projected on steering devices in a projected path of the traveling wave. Time-dependent control signals are computed and applied to the steering devices to maintain a local streamer geometry. Other embodiments, aspects, and features are also disclosed. | 2013-10-03 |
20130258808 | METHOD AND DEVICE FOR DETECTING FAULTS IN A MARINE SOURCE ARRAY - A method for detecting faults of individual wave sources in a marine source array includes acquiring near-field data using sensors, the sensors being located near the individual wave sources. The method further includes generating an index for each of the individual wave sources based on (A) the near-field data and (B) information on the geometry of the marine source array that enables localizing the individual wave sources and respective sensors relative to one another. The method also includes comparing the index for each of the individual wave sources with a corresponding reference index for determining whether a fault has occurred. | 2013-10-03 |
20130258809 | METHOD FOR TIME-LAPSE WAVE SEPARATION - A method for processing seismic data acquired using the same seismic survey setup over long periods of time includes acquiring sets of seismic data using the same seismic survey setup over multiple days, the sets being gathered as repeated seismic data. The method further includes estimating a time-variable wavelet corresponding to unwanted waves, and determining a propagation of the time-variable wavelet, which propagation is assumed to be constant in time, by solving an inverse problem using the repeated seismic data and the estimated time-variable wavelet. The method also includes extracting signal data by subtracting a convolution of the estimated time-variable wavelet and the propagation from the repeated seismic data. | 2013-10-03 |
20130258810 | Method and System for Tomographic Inversion - Method and system is described for reducing sensitivity imbalance issues and/or implements target-oriented tomography to enhance tomographic inversion for velocity model building. The method may include performing a preparation stage to construct a measurement vector from seismic data and a kernel matrix from ray-path information; performing a sensitivity optimization stage to generate a data weighting vector; and performing a property optimization stage to reconstruct a subsurface model of one or more geophysical properties. | 2013-10-03 |
20130258811 | DISCRETE VOLUMETRIC SONAR METHOD AND APPARATUS FOR SUB-SEABED SURVEYING - A method for imaging formations below the bottom of a body of water includes imparting acoustic energy into the formations along a predetermined length swath at a selected geodetic position. Acoustic energy reflected from the formations is detected along a line parallel to the length of the swath. The selected geodetic position is moved a selected distance transverse to the length of the swath. The imparting acoustic energy, detecting acoustic energy and moving the geodetic position are repeated until a selected distance transverse to the length of the swath is traversed. The detected acoustic energy from all the selected geodetic positions is coherently stacked. The detected acoustic energy is beam steered to each of a plurality of depths and positions along the length of the swath to generate an image for each such depth and position. | 2013-10-03 |
20130258812 | ULTRASONIC RECEIVER FRONT-END - In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively. | 2013-10-03 |
20130258813 | APPARATUS AND METHOD FOR SPATIALLY SELECTIVE SOUND ACQUISITION BY ACOUSTICTRIANGULATION - An apparatus for capturing audio information from a target location includes first and second beamformers arranged in a recording environment and having first and second recording characteristics, respectively, and a signal generator. The first and second beamformers are configured for recording first and second beamformer audio signals, respectively, when they are directed towards the target location with respect to the first and second recording characteristics. The first and second beamformers are arranged such that first and second virtual straight lines, defined to pass through the first and second beamformers, respectively, and the target location, are not mutually parallel. The signal generator is configured to generate an audio output signal based on the first and second beamformer audio signals so that the audio output signal reflects relatively more audio information from the target location compared to the audio information from the target location in the first and second beamformer audio signals. | 2013-10-03 |
20130258814 | Ultrasound System and Method of Manufacture - An ultrasound system and a method of manufacturing an ultrasound system comprising a base comprising a bore; a prismatic segment, coupled to the base, that defines a set of surfaces surrounding the bore; a set of ultrasound transducer panels configured to emit ultrasound signals in a radial direction, each ultrasound transducer panel in the set of ultrasound transducer panels coupled to at least one surface of the set of surfaces, and an interconnect coupling a first ultrasound transducer panel in the set of ultrasound transducer panels to a second ultrasound transducer panel in the set of ultrasound transducer panels, wherein the interconnect facilitates coupling of the first ultrasound transducer panel and the second ultrasound transducer panel to the prismatic segment. | 2013-10-03 |
20130258815 | METHOD AND APPARATUS FOR AN ACOUSTIC-ELECTRIC CHANNEL MOUNTING - Method and apparatus for rotational alignment and attachment of ultrasonic transducers to a barrier with one submerged surface uses a temporary transducer assembly to position mounting rings on opposite surfaces of the barrier. Plural permanent transducers are then mounted to each mounting ring and are aligned with each other across the barrier by virtue of the alignment of their mounting rings. The submerged mounting ring is used like a cylinder in combination with a mounting plate for the transducers on the submerged side of the barrier or each submerged side transducer has a suction cup fitting for use to exclude water from between each transducer and the submerged barrier surface to facilitate bonding of the submerged side transducers to the barrier. | 2013-10-03 |
20130258816 | EARTHQUAKE MONITORING DEVICE AND INSTALLATION METHOD THEREOF - Disclosed are an earthquake monitoring device and a method of installing the same, which can permit stable and efficient installation and operation on any ground surface with free-field conditions including level and sloped ground conditions, and can provide precise monitoring results of earthquakes. The earthquake monitoring device includes a sensor for sensing vibration; and a base having an upper surface formed into a leveled surface, wherein the sensor is secured to the upper surface, and the base is placed on an excavated ground such that the upper surface of the base is positioned on a ground surface or the sensor on the upper surface of the base intersects the ground surface. | 2013-10-03 |
20130258817 | STRUCTURE OF A WRISTWATCH - The wristwatch structure consists of a case containing the movement, the battery, and all of the mechanisms necessary for the functioning of a classic timepiece. The case stays suspended due to the force of magnets set inside the case, which are repelled by an equal number of magnets in the base frame that are arranged in such a way that they have the same polarity as those in the case. The case can also include a light diffuser and a contact that turns on the light when the case touches the base, thereby illuminating the hands, the hours, and the date on the dial. | 2013-10-03 |
20130258818 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - There is provided an information processing apparatus, including a first information acquisition section which acquires priority action information, a second information acquisition section which acquires biological information related to a body clock of the user at a present time, a state setting section which sets an ideal state of the body clock corresponding to the priority action, a state estimation section which estimates a present state of the body clock at the present time, a third information acquisition section which acquires set action information related to a set action, and a display control section which displays a state of the body clock in the schedule on a display section. | 2013-10-03 |
20130258819 | METHOD AND DEVICE FOR OBTAINING A CONTINUOUS MOVEMENT OF A DISPLAY MEANS - Method of determining a motion of continuous variable velocity for display means, comprising a step of establishing a model of at least one simulated mechanical force and/or torque value from values measured by a sensor, and a second step of solving a newton equation of motion from these simulated mechanical force and/or torque values, wherein the second step allows a simulated velocity to be calculated for the display means. | 2013-10-03 |
20130258820 | TIMEPIECE - A timepiece includes a dial plate and a solar battery which is disposed on a rear surface side of the dial plate. The dial plate has an area larger than the solar battery. The solar battery is encompassed by the dial plate in a planar view. The dial plate is provided with grooves or ridges which have a function of condensing incident light. | 2013-10-03 |
20130258821 | TIMEPIECE - A timepiece includes a dial plate, and a solar battery which is disposed on a rear side of the dial plate. The dial plate is provided with grooves or ridges. The grooves or the ridges have portions where inclination angles with regard to a normal line of the dial plate are different, and due to this, light which is transmitted through the dial plate is incident from a plurality of directions with angles which are different with regard to the solar battery. | 2013-10-03 |
20130258822 | SOLAR POWER GENERATING DEVICE AND ELECTRONIC TIMEPIECE - A solar power generating device of the present invention includes a first solar section which has a plurality of solar cells arranged flatwise, a second solar section which has a plurality of solar cells arranged flatwise and is placed a predetermined space away and below the first solar section so as to be shifted with respect to the first solar section in a surface direction, and a coupling section which couples the first solar section and the second solar section together. In the solar power generating device, the coupling section has a connecting section placed in an area below the second solar section, and the connecting section is provided with contact terminals to which the first solar section and the second solar section are electrically connected. | 2013-10-03 |
20130258823 | LIGHT SOURCE CHIP AND A THERMALLY ASSISTED HEAD WITH THE SAME, AND MANUFACTURING METHODS THEREOF - A manufacturing method of a light source chip for a thermally assisted head comprises steps of (a) providing a light source bar with a surface coating formed thereon; (b) forming several blind holes on the predetermined positions of the light source bar by etching, the blind hole having a top hollowed on the surface coating and a bottom hollowed on the light source bar, and the blind hole having a first biggest width at its top; (c) cutting the light source bar along every two adjacent blind holes by a cutting machine The cutting machine has a cutting means with a second biggest width that is smaller than the first biggest width of the blind hole, thereby cutting down an individual light source chip without contacting the side edges of the blind hole. Thus a light source chip with a smooth edge and without cracks on the surface can be obtained; and the surface coating formed thereon is hard to be peeled off. | 2013-10-03 |
20130258824 | THERMALLY-ASSISTED MAGNETIC RECORDING HEAD HAVING TEMPERATURE SENSOR EMBEDDED ON DIELECTRIC WAVEGUIDE - A thermal assisted magnetic recording head includes a dielectric waveguide that is configured to propagate propagation light a metal waveguide that is provided facing the dielectric waveguide and that couples to the propagation light propagating through the dielectric waveguide in a surface plasmon mode, thereby generating and propagating surface plasmon, a near-field light generator that is exposed on an air bearing surface facing a magnetic recording medium either at an end part of the metal waveguide or at a position facing the end part of the metal waveguide, and that generates near-field light from the surface plasmon, a magnetic pole for magnetic recording that is exposed on the air bearing surface, and a temperature sensor that is arranged inside the dielectric waveguide. | 2013-10-03 |
20130258825 | RECORDING HEAD FOR HEAT ASSISTED MAGNETIC RECORDING - An apparatus includes a waveguide having a core layer and an end adjacent to an air bearing surface, first and second poles magnetically coupled to each other and positioned on opposite sides of the waveguide, wherein the first pole includes a first portion spaced from the waveguide and a second portion extending from the first portion toward the air bearing surface, with the second portion being structured such that an end of the second portion is closer to the core layer of the waveguide than the first portion, and a heat sink positioned adjacent to the second portion of the first pole. | 2013-10-03 |
20130258826 | RECORDING/REPRODUCING SYSTEM AND SERVER - A reproducing process of related data is efficiently performed also in a recording medium having recording surfaces at both of front and rear surfaces in a recording and reproducing system including a plurality of recording media. | 2013-10-03 |
20130258827 | OPTICAL DISK, FORMAT PROCESSING METHOD FOR THE SAME, RECORDING METHOD FOR THE SAME, AND OPTICAL DISK DEVICE - An optical disk that enables a laser beam to be focused on an object track without making mistakes, an optical disk device, a format processing method, and a recording method. The optical disk shall be configured to has a guiding layer with a physical groove structure containing address information and a single or multiple recording layers with no groove structure, in which the guide areas for recording the address information thereon are formed along a track of the guide layer at fixed intervals in a user data area of each recording layer. An address for the recording layer is generated based on information obtained from the guide layer, and the address for the recording layer is recorded in the guide area. | 2013-10-03 |
20130258828 | RECORDING APPARATUS, RECORDING METHOD, REPRODUCING APPARATUS, AND REPRODUCING METHOD - There is provided a recording apparatus including a light radiating unit that radiates light to an optical recording medium, a recording unit that performs light emission control of the light radiating unit, and performs recording on the optical recording medium, and a control unit that performs control in a manner that, in a state in which a logical address space, a virtual address space obtained by adding at least a spare area to the logical address space, and a physical address space obtained by adding a buffer area to the virtual address space are defined, a process for replacing a recording area of the optical recording medium with the spare area is executed using a virtual address. | 2013-10-03 |
20130258829 | RECORDING APPARATUS, AND RECORDING METHOD - Provided is a recording apparatus including a light radiating unit that radiates light to an optical recording medium, a recording unit that performs light emission control of the light radiating unit, and performs recording on the optical recording medium, and a control unit that controls the recording unit in a manner that recording of remaining data starts from a position over a defect occurrence area, according to occurrence of a defect, in a state in which a logical address space and a physical address space are defined with respect to a recording area of the optical recording medium, and controls the recording unit in a manner that, when the buffer area is consumed and data is not completely recorded, a recording area of the remaining data that is not completely recorded is replaced with the spare area and the remaining data is recorded on the spare area. | 2013-10-03 |
20130258830 | BATTERY MANAGEMENT DEVICE, BATTERY APPARATUS, DISK ARRAY APPARATUS AND BATTERY MANAGEMENT METHOD - Disclosed is a battery management device | 2013-10-03 |
20130258831 | DISK ARRAY DEVICE, A FAILURE PATH SPECIFYING METHOD AND A PROGRAM THEREOF - The object of the present invention is to provide a disk array device, a failure path specifying method and a program thereof capable of specifying a physical interconnection path where failures occurred. | 2013-10-03 |
20130258832 | TEST ELEMENT HAVING AN OPTICAL DATA STORAGE, DEVICE FOR READING THE OPTICAL DATA STORAGE OF THE TEST ELEMENT AND MEASURING SYSTEM THEREOF - A test element is disclosed for analyzing a human or animal body fluid sample. The test element includes a substrate carrying a test field with a reagent for effecting a detection reaction when exposed to the body fluid sample, and an optical data storage in which data regarding the test element, preferably calibration data, is stored. Accordingly, the data storage is a holographic data storage. A hologram reader also is disclosed for reading the data storage of such a test element. Moreover, a hologram label and a method for manufacturing a hologram label are disclosed, as is a medical product including a holographic data storage in which data regarding the product is stored. | 2013-10-03 |
20130258833 | OPTICAL RECORDING MEDIUM HAVING AUXILIARY INFORMATION AND REFERENCE CLOCK - An information recording medium is composed of a substrate having a microscopic pattern constituted by a continuous substrate of grooves formed with a groove portion and a land portion alternately, a recording layer, and a light transmitting layer. The microscopic pattern is formed with satisfying a relation of P≦λ/NA, wherein P is a pitch of the land portion or the groove portion, λ is a wavelength of reproducing light, and NA is a numerical aperture of an objective lens. The land portion is formed with wobbling so as to be parallel with each other for both sidewalls of the land portion. Auxiliary information and a reference clock are recorded alternately. Information is recorded in the recording layer corresponding to a land portion by either one change of reflectivity difference and refractive index difference in the recording layer. | 2013-10-03 |
20130258834 | WIRELESS TRANSMISSION SYSTEM, WIRELESS COMMUNICATION DEVICE AND WIRELESS TRANSMISSION METHOD - A wireless transmission system including antenna pairs, a demodulation functional unit, and a transmission characteristic correction unit. The antenna pairs include transmission and reception antennae. A desired wave arrives at a reception antenna in a wireless signal from one transmission antenna. Meanwhile, the reception antenna receives an unnecessary wave in a wireless signal transmitted from a different transmission antenna. The demodulation functional unit corresponding to each antenna pair demodulates a signal received by the reception antenna. The transmission characteristic correction unit carries out correction calculation based on a transmission characteristic of a transmission space between the transmission and reception antennae based on demodulation signals demodulated by the demodulation functional units to acquire an output signal corresponding to a transmission subject signal. | 2013-10-03 |
20130258835 | LOAD BALANCING ACROSS A LINK AGGREGATION GROUP - A system includes a network element. The network element includes multiple egress ports configured as a LAG, an ingress port, and a distributor. The ingress port is configured to receive multiple packets including at least one flood domain. Additionally, the distributor is configured to access a virtual local area network identifier (VID) of each flood domain. Based on the VID and the number of egress ports in the LAG, the distributor is configured to select a representative egress port from the multiple egress ports. The distributor additionally forwards packets of each flood domain to the egress port of the LAG which is selected as the representative egress port for that flood domain. | 2013-10-03 |
20130258836 | Preserving Stable Calls During Failover - According to one method for preserving stable calls during failover, during a dialog between two user endpoints, a determination is made whether a standby call processor has become operational, such as when a corresponding primary call processor is in fault. Responsive to determining that the standby call processor has become operational, a signaling protocol message is received from a requester. A determination is made whether the message includes an in-dialog signaling protocol request. Responsive to determining that the message includes the in-dialog request, a determination is made whether a call state associated with the dialog is found in memory. Responsive to determining that the call state associated with the dialog is not found in memory, a non-call terminating error response is made responding to the in-dialog request. The non-call terminating error response may cause the requester to terminate the in-dialog request but not terminate the dialog. | 2013-10-03 |
20130258837 | PSEUDOWIRE EXTENDED GROUP ACTIONS IN A PACKET SWITCHED NETWORK - Embodiments of the invention are directed to extended psuedowire groups in a packet switched network. Embodiments associate a pseudowire to one or more groups at each provider edge device across which the pseudowire traverses. When a pseudowire set-up request message traverses across various provider edge devices, each provider edge device typically adds one or more local group membership information elements into the pseudowire set-up request message. In that way the grouping assigned by each provider edge device that the pseudowire traverses is made available to all other provider edge devices traversed by the pseudowire. Advantageously, this availability pseudowire grouping information allows any of these provider edge devices to initiate a wildcard message to notify other provider edge devices with respect to pseudowires in any of its local groups, as well as allowing a pseudowire to be bound to multiple groups based on various requirements. | 2013-10-03 |
20130258838 | MINIMAL DATA LOSS LOAD BALANCING ON LINK AGGREGATION GROUPS - An example embodiment includes a network element. The network element includes an ingress port, an ingress line card, a link aggregation group (LAG) including multiple egress ports, and a distributor. The ingress port receives multiple packets including flood traffic. The ingress line card separates the packets into buckets. The distributor is configured to allocate the buckets to the egress ports, transmit the buckets to the egress ports, and when a failed egress port is identified, reallocate the buckets from the failed egress port to at least one functional egress port while continuing to transmit the buckets to functional egress ports of the LAG. | 2013-10-03 |
20130258839 | INTER-CHASSIS REDUNDANCY WITH COORDINATED TRAFFIC DIRECTION - A method, in a first network element of an inter-chassis redundancy (ICR) system, of cooperating with a second network element of the ICR system to provide ICR. The network elements are coupled by a synchronization channel. IP addresses are announced with a favorable traffic direction attribute. It is determined that the second network element either has announced the IP addresses with an unfavorable traffic direction attribute less favorable than the favorable direction attribute, or has not announced the IP addresses. Sessions that are connected through the IP addresses are handled. Session state synchronization messages that include session state for the handled sessions are transmitted over the synchronization channel to the second network element. It is determined, after an occurrence of a failure event that inhibits the first element from handling the sessions, that the IP addresses have been announced by the second network element with a favorable traffic direction attribute. | 2013-10-03 |
20130258840 | GENERALIZED SERVICE PROTECTION SYSTEMS AND METHODS - A node includes a first port configured to be selectively blocked and unblocked; a second port configured to be selectively blocked and unblocked; a forwarder between the first port and the second port; a management channel between the first port and the second port, wherein the selective blocking and unblocking of the first port and the second port is based on the management channel; and a data channel between the first port and the second port, wherein the data channel utilizes an arbitrary service identifier. A method can include operating a ring with Ring Protection Switching comprising a forwarding mechanism and a blocking mechanism that are independent and decoupled entities therebetween, wherein the ring includes a management channel and a data channel that each utilize an arbitrary service identifier. | 2013-10-03 |
20130258841 | Method for Protecting Data Transmission in MPLS Networks Due to Failures - A method protects data transmission from failures, wherein the data transmissions are from a source to a destination in a Multi-Protocol Label Switching (MPLS) network, and the data transmissions are via a labeled-switch path (LSP) with segment protection in protection domains. A maximum recovery time for each protection domain is constrained, and for each protection domain, one or more backup tunnels are determined. A graph of nodes of the LSP and the backup tunnels is constructed, wherein edges in the graph represent the links between the nodes. A weight is assigned to each edge to produce a weighted graph. Based on the weighted graph, a path from the source to the destination that satisfies a reliability constraint with a minimum cost is determined by using an optimal combination of segment protections and a reliability-guaranteed least-cost | 2013-10-03 |
20130258842 | COMMUNICATION NETWORK SYSTEM AND COMMUNICATION NETWORK CONFIGURATION METHOD - A redundant path configuration method and a control method are disclosed. An intercommunication path for mutually transmitting and receiving a signal is provided among the BHEs each of which is a top of a tree. When failures occur in an active system path in certain AE, a standby system path (BHE) relays communication between the AE and the (active system) BHE so as to secure continuity of communication. The intercommunication path through which a data signal does not flow in a normal operation is used as a traffic accommodation path in an emergency among the BHEs. By setting a bypass between the tops of the trees, when a failure occurs in one tree, a signal is transferred from the active system BHE to the standby system path in which another BHE is a top to build a sub-tree bypassing the failure point and to secure a communication path. | 2013-10-03 |
20130258843 | NETWORK SYSTEM AND APPARATIS - A network system includes a plurality of apparatuses which transmits traffic data included in a plurality of communications by switching a destination for each communication, and a management device coupled to the plurality of apparatuses, wherein each of the plurality of apparatuses includes, a processor which executes a first process including, selecting a communication from a plurality of communications, acquiring traffic data included in a selected communication selected in the selecting, and transmitting a acquired traffic data acquired in the acquiring to the management device, and wherein the management device includes a processor which executes a second process including receiving the acquired traffic data from each of the plurality of apparatuses, and performing an analysis of the selected communication based on the acquired traffic data. | 2013-10-03 |
20130258844 | METHOD AND ARRANGEMENT IN A WIRELESS COMMUNICATION NETWORK - Method and arrangement in a first node for requesting a status report from a second node. The first node and the second node are both comprised within a wireless communication network. The status report comprises positive and/or negative acknowledgement of data sent from the first node, to be received by the second node. The first node comprises a first counter configured to count the number of transmitted Protocol Data Units, PDUs, and a second counter configured to count the number of transmitted data bytes. The method and arrangements comprises initialising the first and the second counter to zero, transmitting data to be received by the second node, comparing the value of the first and the second counters with a first threshold limit value and a second threshold limit value and requesting a status report from the second node if any of the threshold limit values is reached or exceeded. | 2013-10-03 |
20130258845 | METHOD AND APPARATUS FOR SCHEDULING PACKETS FOR TRANSMISSION IN A NETWORK PROCESSOR HAVING A PROGRAMMABLE PIPELINE - A network processor includes an arbitration device, a processing device, and a pipeline. The arbitration device receives a first packet and a second packet. The second packet includes a first control message. The pipeline includes access devices, where the access devices include first and second access devices. The pipeline, based on a clock signal, forwards the first and second packets between successive ones of the access devices. The arbitration device: sets a timer based on at least one of (i) an amount of time for data to travel between the first and second access devices, or (ii) a number of pipeline stages between the first and second access devices; adjusts a variable based on (i) the clock signal, and (ii) transmission of the first packet from the arbitration device to the pipeline; and based on the timer and the variable, schedules transmission of the second packet through the pipeline. | 2013-10-03 |
20130258846 | Method for Enabling Traffic Acceleration in a Mobile Telecommunication Network - A radio network node of a mobile telecommunication network. The radio network node configured to determine a TCP session based on TCP parameters adapted for a radio link on which end user traffic is to be transported. The radio network node also configured to originate the TCP session which is used to transport the end user traffic. | 2013-10-03 |
20130258847 | Congestion Control and Resource Allocation in Split Architecture Networks - A controller performs network-wide congestion control in a split architecture network. The controller receives flow statistics from switches for each entity that communicates via the network. The controller chooses a most congested link as a bottleneck link based on a packet loss rate that is derived from the flow statistics and estimated for each entity on each link of the network. The controller identifies a target path in the network that passes through the bottleneck link and carries the most traffic, and calculates a throttling probability for each sharing entity that shares the target path based on the capacity of the bottleneck link, capacity of the first link of the target path, bandwidth consumption and packet loss rate of each sharing entity. The controller then transmits the throttling probability of each sharing entity to the ingress switch of the target path to reduce the congestion on the bottleneck link. | 2013-10-03 |
20130258848 | METHOD AND ARRANGEMENT IN A DISTRIBUTED RADIO BASE STATION - In a method for use in a distributed radio base station, comprising a plurality of radio equipment nodes and an associated radio equipment control node, configuring at least one of the radio equipment nodes with a initial signal path configuration, and monitoring a traffic demand of a respective cell of each of the plurality of radio equipment nodes. Subsequently, determining an alternative signal path configuration for the at least one radio equipment node based on at least the monitored demand, and dynamically switching from the initial signal path configuration to the determined alternative signal path configuration. Finally, exchanging data between the radio equipment control node and the at least one radio equipment node based on the determined alternative signal path configuration. | 2013-10-03 |
20130258849 | CLOSED-LOOP QOS CONTROL USING CHARGING GROUPS - A method and apparatus for providing Quality of Service (QoS) gating and control as a function of quota consumption by a group of users is disclosed. A feedback mechanism for QoS gating and control with an Offline Charging System (OFCS) is also provided. In a packet telecommunication network, the Policy Charging and Control architecture is modified to include an Aggregation Interface Function that dynamically collects usage quantum for users in real time. The Aggregation Interface Function proactively seeks user group information and aggregates usage quantum over an entire group to prevent surprise overage charges at billing. | 2013-10-03 |
20130258850 | CONGESTION ALLEVIATION IN NETWORK SYSTEMS - In one embodiment, a method is provided for alleviating congestion in a network system. In this method, the receipt of data packets destined for a destination apparatus is detected. Flow control signals are also received with each flow control signal corresponding to a data packet. Various time periods are tracked with each time period being between the detection of the receipt of a data packet and the receipt of tracked corresponding flow control signal. An average of the time periods is calculated and this average is compared to a threshold. One or more data packets are dropped in reference to the comparison. | 2013-10-03 |
20130258851 | MITIGATION OF CONGESTION DUE TO STUCK PORTS IN NETWORK SYSTEMS - In one embodiment, a method is provided for controlling congestion in a network system. In this method, receipt of a data packet that is destined for a destination switching apparatus is detected. Subsequent to the detection of the data packet, a time that has elapsed while flow control is implemented by the destination switching apparatus is tracked. The data packet is dropped based on the elapsed time exceeding a predefined time period. | 2013-10-03 |
20130258852 | METHOD AND APPARATUS FOR ROUTE OPTIMIZATION ENFORCEMENT AND VERIFICATION - In one embodiment, a best exit from an autonomous system (AS) for a controlled prefix is determined. A network device of the AS influences a route for the controlled prefix to be over the best exit. Traffic statistics for the controlled prefix are selected. The network device verifies, based on the traffic statistics, whether the influence has caused at least a configured amount of traffic for the controlled prefix to be over the best exit. When at least the configured amount of the traffic is not directed over the best exit, the network device further influences the route for the controlled prefix to be over the best exit. | 2013-10-03 |
20130258853 | SYSTEMS AND METHODS FOR SELECTIVELY PERFORMING EXPLICIT CONGESTION NOTIFICATION - A system provides congestion control and includes multiple queues that temporarily store data and a drop engine. The system associates a value with each of the queues, where each of the values relates to an amount of memory associated with the queue. The drop engine compares the value associated with a particular one of the queues to one or more programmable thresholds and selectively performs explicit congestion notification or packet dropping on data in the particular queue based on a result of the comparison. | 2013-10-03 |
20130258854 | DISTRIBUTED LOAD MANAGEMENT ON NETWORK DEVICES - This disclosure relates to a system and method for dynamically managing load on network devices in a distributed manner. As the proliferation of data rich content and increasingly more capable mobile devices has continued, the amount of data communicated over mobile operator's networks has exponentially increased. Upgrading the existing network to accommodate increased data traffic is neither desirable nor practical. One way to accommodate increased data traffic is by utilizing network resources more efficiently. This disclosure provides systems and methods for efficiently utilizing network resources by dynamically configuring the network in a distributed manner based on real-time load information. | 2013-10-03 |
20130258855 | ETHERNET RING NODE WITH IMPROVED RECOVERY TIME AFTER A LINK FAILURE - The invention relates to an Ethernet ring node ( | 2013-10-03 |
20130258856 | METHOD AND SYSTEM FOR TRANSMITTING DATA PACKETS IN A NETWORK - A method for transmitting data packets from a first node to a second node. The method includes transmitting the data packet from the first node to the one second node where each data packet is determined to be sent according to a first or a second transmission mode, where, in the first transmission mode, the data packet is transmitted to the second node according to a prescheduled scheme, where the prescheduled scheme defines a cyclic one-to-one assignment between first and second node over time slots so that the data packet is forwarded to the second node during that time slot the one-to-one assignment of which assigns the first node with the one second node and in the second transmission mode, the data packet is transmitted during an actual time slot to the second node while overruling the prescheduled scheme. | 2013-10-03 |
20130258857 | System and Method for Hybrid Telecommunication - A hybrid telecommunication system for providing data to a requesting mobile device has been disclosed. The system includes a base station server adapted to receive the data request signals. The base station server is adapted to sense the density of current data signals on the conventional wireless network and subsequently redirect at least some of the received data request signals from the conventional wireless network to the hybrid data server connected to a wireline network in the event that the density of data signals present on the conventional wireless network exceeds a pre-determined threshold value. Once the data request signals are redirected to the hybrid data server, the rest of the communication to and from the requesting mobile device takes place through a private, wireless communication bandwidth. | 2013-10-03 |
20130258858 | METHODS AND APPARATUS FOR COMPENSATING FOR TIME-BASED SAMPLING BY SAMPLE PACKET ELIMINATION DURING EXPORT OF SAMPLED PACKETS - Methods and apparatus for compensating for time-based sampling using packet elimination are disclosed herein. An example method may be implemented in a network device communicatively connected to a network. The method may include: receiving a packet over the network at a monitoring point; replicating the received packet; determining whether to sample the replicated packet using a time-based sampling scheme; upon determining that the replicated packet should be sampled, queuing the replicated packet to a port of the network device; determining whether to eliminate the queued packet by comparing a configured sample rate with a current sample rate; upon determining that the current sample rate is less than the configured sample rate, exporting the queued packet from the network device; and upon determining that the current sample rate is greater than or equal to the configured sample rate, dropping the queued packet. | 2013-10-03 |
20130258859 | METHODS AND APPARATUS FOR SPECTRAL SCANNING WITHIN A NETWORK - In some embodiments, an apparatus includes a spectral scanning controller configured to interrupt service at a wireless access point (WAP) such that the WAP performs spectral scanning during service interruption. The spectral scanning controller is configured to interrupt service at the WAP at a first scanning frequency when the spectral scanning controller is in a first configuration. The spectral scanning controller is configured to interrupt service at the WAP at a second scanning frequency different from the first scanning frequency when the spectral scanning controller is in a second configuration. The spectral scanning controller is configured to move from the first configuration to the second configuration in response to a change in at least one of a service demand, a service quality, a spectral scanning demand or a spectral scanning quality. | 2013-10-03 |
20130258860 | Systems and Methods for Sharing Control Devices on an IO Network - Certain embodiments of the invention can include systems and methods for enabling the operation of multiple control devices on the same network. Each control device on a network can be configured to monitor and receive input messages from multiple IO devices on the network. The control devices may also be configured send output messages to one or more of the IO devices. According to certain embodiments, one control device may send output messages to certain IO devices while another IO device may send output messages to different IO devices. The input and output messages can both be sent via multicast according to certain embodiments. | 2013-10-03 |
20130258861 | STANDBY METHOD AND MOBILE ROUTER - Embodiments of the present invention provide a standby method and a mobile router. In the embodiments of the present invention, a mobile router determines a working mode in current time, and then according to the working mode, obtains a standby processing cycle that corresponds to the working mode, so that when no terminal device performs a data service through the mobile router, the mobile router can execute a sleeping operation and an awakening operation according to the standby processing cycle, which can avoid a problem that in the prior art, after a mobile router enters a standby status, the mobile router is handed over between sleeping and awakening frequently according to a fixed frequency, thereby reducing power consumption of the mobile router according to an actual application requirement. | 2013-10-03 |
20130258862 | Radio Access for a Wireless Device and Base Station - A wireless device configures cell groups comprising a primary cell group and secondary cell group(s). The wireless device receives a control command for transmission of a random access preamble on a first secondary cell. The wireless device receives a random access response on the primary cell. The random access response comprises a timing advance command and an uplink grant. The wireless device applies the timing advance command to uplink transmission timing of a first secondary cell group comprising the first secondary cell. The wireless device transmits uplink data on the first secondary cell in radio resources identified in the uplink grant. | 2013-10-03 |
20130258863 | SYSTEMS AND METHODS FOR CONTENT TYPE CLASSIFICATION - Various embodiments illustrated and described herein include systems, methods and software for content type classification. Some such embodiments include determining a potential state of classification for packets associated with a session based at least in part on a packet associated with the session that is a packet other than the first packet of the session. | 2013-10-03 |