40th week of 2013 patent applcation highlights part 20 |
Patent application number | Title | Published |
20130256864 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode. | 2013-10-03 |
20130256865 | SEMICONDUCTOR MODULE - In the semiconductor module comprising a package substrate, a first semiconductor package, and a semiconductor bare chip, such problems as the occurrence of a wire short caused by warpage of the first semiconductor package and non-filling and the like at the time of resin sealing can be solved. | 2013-10-03 |
20130256866 | Semiconductor Device and Method of Forming Prefabricated Heat Spreader Frame with Embedded Semiconductor Die - A semiconductor device is made by mounting a prefabricated heat spreader frame over a temporary substrate. The heat spreader frame includes vertical bodies over a flat plate. A semiconductor die is mounted to the heat spreader frame for thermal dissipation. An encapsulant is deposited around the vertical bodies and semiconductor die while leaving contact pads on the semiconductor die exposed. The encapsulant can be deposited using a wafer level direct/top gate molding process or wafer level film assist molding process. An interconnect structure is formed over the semiconductor die. The interconnect structure includes a first conductive layer formed over the semiconductor die, an insulating layer formed over the first conductive layer, and a second conductive layer formed over the first conductive layer and insulating layer. The temporary substrate is removed, dicing tape is applied to the heat spreader frame, and the semiconductor die is singulated. | 2013-10-03 |
20130256867 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed that includes an insulation substrate, a metal wiring layer, a semiconductor element, a heat sink, and a stress relaxation member located between the insulation substrate and the heat sink. The heat sink has a plurality of partitioning walls that extend in one direction and are arranged at intervals. The stress relaxation member includes a stress absorbing portion formed by through holes extending through the entire thickness of the stress relaxation member. Each hole is formed such that its dimension along the longitudinal direction of the partitioning walls is greater than its dimension along the arranging direction of the partitioning walls. | 2013-10-03 |
20130256868 | THERMAL INTERFACE MATERIAL FOR SEMICONDUCTOR CHIP AND METHOD FOR FORMING THE SAME - Disclosed is a method for forming a thermal interface material for a semiconductor chip, comprising the steps of forming an initial layer on a substrate, the initial layer including carbon nanotubes and nano metal powder; arranging a semiconductor chip on the initial layer; and heat-treating the initial layer with a sintering temperature of the nano metal powder to obtain a thermal interface material of the carbon nanotubes and the nano metal powder. | 2013-10-03 |
20130256869 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - An embodiment provides a chip package including a substrate, a cavity extending downward from an upper surface of the substrate, a metal layer overlying the substrate and conformally covering a sidewall and a bottom portion of the cavity, a chip having an upper surface and located on the metal layer in the cavity, wherein the upper surface is not lower than an upper surface of the metal layer outside of the cavity, and the protective layer covering the chip. | 2013-10-03 |
20130256870 | PACKAGING DEVICE AND METHOD OF MAKING THE SAME - A device includes a first and a second package component. A metal trace is disposed on a surface of the first package component. The metal trace has a lengthwise direction. The second package component includes a metal pillar, wherein the second package component is disposed over the first package component. A solder region bonds the metal pillar to the metal trace, wherein the solder region contacts a top surface of the metal trace. | 2013-10-03 |
20130256871 | SEMICONDUCTOR CHIP DEVICE WITH FRAGMENTED SOLDER STRUCTURE PADS - Methods and apparatus to inhibit cracks and delaminations in a semiconductor chip solder bump and to reduce pad parasitic capacitance are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first insulating layer over plural conductor pads of a semiconductor chip and forming an opening over each of the conductor pads. An individual solder structure is coupled to the insulating layer. The solder structure has a projection in each of the openings and in electrical contact with one of the plural conductor pads. | 2013-10-03 |
20130256872 | THERMAL MANAGEMENT OF STACKED SEMICONDUCTOR CHIPS WITH ELECTRICALLY NON-FUNCTIONAL INTERCONNECTS - A method of manufacturing is provided that includes fabricating a first plurality of electrically functional interconnects on a front side of a first semiconductor chip and fabricating a first plurality of electrically non-functional interconnects on a back side of the first semiconductor chip. Additional chips may be stacked on the first semiconductor chip. | 2013-10-03 |
20130256873 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR PREPARING A SUBSTRATE POST - A system, method, and computer program product are provided for preparing a substrate post. In use, a first solder mask is applied to a substrate. Additionally, a post is affixed to each of one or more pads of the substrate. Further, a second solder mask is applied to the substrate. | 2013-10-03 |
20130256874 | Elongated Bumps in Integrated Circuit Devices - A device includes a substrate, a metal pad over the substrate, and a passivation layer covering edge portions of the metal pad. The passivation layer has a first opening overlapping the metal pad, wherein the first opening has a first lateral dimension measured in a direction parallel to a major surface of the substrate. A polymer layer is over the passivation layer and covering the edge portions of the metal pad. The polymer layer has a second opening overlapping the metal pad. The second opening has a second lateral dimension measured in the direction. The first lateral dimension is greater than the second lateral dimension by more than about 7 μm. A Under-Bump metallurgy (UBM) includes a first portion in the second opening, and a second portion overlying portions of the polymer layer. | 2013-10-03 |
20130256875 | SEMICONDUCTOR PACKAGE, PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor package includes: a dielectric layer having opposite first and second surfaces; a semiconductor chip embedded in the dielectric layer and having a plurality of electrode pads; a plurality of first metal posts disposed on the electrode pads of the semiconductor chip, respectively, such that top ends of the first metal posts are exposed from the first surface; at least a second metal post penetrating the dielectric layer such that two opposite ends of the second metal post are exposed from the first and second surfaces, respectively; a first circuit layer formed on the first surface for electrically connecting the first and second metal posts; and a second circuit layer formed on the second surface for electrically connecting the second metal post. The semiconductor package dispenses with conventional laser ablation and electroplating processes for forming conductive posts in a molding compound, thereby saving fabrication time and cost. | 2013-10-03 |
20130256876 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a semiconductor chip having a plurality of contact pads on a surface thereof, a plurality of main bumps on the contact pads, respectively. Each of the plurality of main bumps includes a first pillar layer on one of the contact pads and a first solder layer on the first pillar layer, and the first solder layer includes an upper portion having an overhang portion. | 2013-10-03 |
20130256877 | SEMICONDUCTOR PACKAGE - Provided is a semiconductor package including a circuit substrate including a substrate pad, a semiconductor chip spaced apart from and facing the circuit substrate, the semiconductor chip including a chip pad, and a connection pattern electrically connecting the circuit substrate with the semiconductor chip. The semiconductor chip may include a plurality of first circuit patterns extending substantially perpendicular toward a top surface of the semiconductor chip and at least one first via electrically connecting the chip pad to the first circuit patterns. The chip pad may include a first region in contact with the connection pattern and a second region outside the first region, and the first via may be connected to the second region of the chip pad. | 2013-10-03 |
20130256878 | SEMICONDUCTOR PACKAGE - The invention provides a semiconductor package. The semiconductor package includes a semiconductor package includes a substrate having a die attach surface. A die is mounted on die attach surface of the substrate via a conductive pillar bump. The die comprises a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, wherein the length of the first edge is different from that of the second edge from a plan view. | 2013-10-03 |
20130256879 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate may include: a base having a predetermined thickness; a plurality of electrode portions formed to protrude on one surface in a thickness direction of the base; a wiring provided in the base and electrically connected to the electrode portions; and a resin layer formed on the base to fill between the plurality of electrode portions. An upper surface of the resin layer may be formed in a concave shape lower than a maximum height of the electrode portion, and an upper surface of the electrode portion and the upper surface of the resin layer form a continuous curved surface. | 2013-10-03 |
20130256880 | ELECTRODE BODY, WIRING SUBSTRATE, AND SEMICONDUCTOR DEVICE - An electrode body is provided as an electrode body capable of appropriately reducing a load when silicon wafer direct bonding is performed. The electrode body includes a base member that has a predetermined thickness; and an electrode portion that is formed on one surface of the base member in a thickness direction thereof. The electrode portion includes a basic bump formed in a substantially columnar shape to protrude on the base member and a fragile bump formed independently from the basic bump to form a metallic bond with the basic bump. | 2013-10-03 |
20130256881 | Semiconductor Device - Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion ( | 2013-10-03 |
20130256882 | METHOD FOR MANUFACTURING FINE-PITCH BUMPS AND STRUCTURE THEREOF - A method for manufacturing fine-pitch bumps comprises providing a silicon substrate; forming a titanium-containing metal layer having a plurality of first zones and a plurality of second zones on the silicon substrate; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer; forming a plurality of copper bumps having a plurality of first top surfaces and a plurality of first ring surfaces; heating the photoresist layer to form a plurality of body portions and removable portions; etching the photoresist layer; forming a plurality of bump protection layers on the titanium-containing metal layer, the first top surface and the first ring surface, each of the bump protection layers comprises a bump coverage portion; plating a plurality of gold layers at the bump coverage portion; eventually, removing the second zones to enable each of the first zones to form an under bump metallurgy layer. | 2013-10-03 |
20130256883 | ROTATED SEMICONDUCTOR DEVICE FAN-OUT WAFER LEVEL PACKAGES AND METHODS OF MANUFACTURING ROTATED SEMICONDUCTOR DEVICE FAN-OUT WAFER LEVEL PACKAGES - In various aspects of the disclosure, a package may be provided. The package may include at least one semiconductor device rotated about an axis with respect to an edge of the package, at least one bond pad on each semiconductor device, and at least one conductive trace electrically connected to the semiconductor device through the at least one bond pad. | 2013-10-03 |
20130256884 | GRID FAN-OUT WAFER LEVEL PACKAGE AND METHODS OF MANUFACTURING A GRID FAN-OUT WAFER LEVEL PACKAGE - In various aspects of the disclosure, a chip packaging arrangement may be provided. The chip packaging arrangement may include a dielectric layer with at least one semiconductor device adjoining the dielectric layer, at least one bonding area on the semiconductor device, the bonding area being exposed through the dielectric layer, a first material comprising a first coefficient of thermal expansion substantially surrounding the semiconductor device and adjoining the dielectric layer, a second material comprising a second coefficient of thermal expansion substantially surrounding the semiconductor device and the first material; and at least one conductive trace electrically connected to the semiconductor device. | 2013-10-03 |
20130256885 | Copper Sphere Array Package - Presented is a method for fabricating a semiconductor package, and the associated semiconductor package. The method includes providing a compliant coverlay having a resin film disposed thereon. A plurality of metallic spheres may be placed at predetermined positions in the resin film. A top surface and a bottom surface of the metallic spheres may be flattened. Tamp blocks on opposing sides of the metallic spheres may be used. The resin film may then be cured to permanently set the metallic spheres in the resin film, and the compliant overlay may then be removed. A semiconductor die may then be placed on the plurality of metallic spheres. An encapsulating layer may then be deposited over the semiconductor die, the plurality of metallic spheres, and the resin film. The semiconductor package may then be diced. The method does not include fabricating a metal leadframe for the semiconductor die. | 2013-10-03 |
20130256886 | SEMICONDUCTOR DEVICE - A semiconductor device has a semiconductor substrate which has a plurality of pad electrodes provided on a top surface thereof and has an approximately rectangular shape; a rewiring layer which is provided with a plurality of contact wiring lines connected to the plurality of pad electrodes, is disposed on the semiconductor substrate through an insulating film, and has an approximately rectangular shape; and a plurality of ball electrodes which are provided on the rewiring layer. | 2013-10-03 |
20130256887 | STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME - A stacked semiconductor package includes a semiconductor package module including a plurality of semiconductor packages each of which has a first surface, a second surface facing away from the first surface, side surfaces connecting the first surface and the second surface and through-holes formed on the side surfaces to pass through the first surface and the second surface and which are stacked such that their through-holes vertically connect with one another, and adhesive members which are formed between the semiconductor packages and attach the semiconductor packages to one another, a main substrate supporting the semiconductor package module and formed, on a third surface thereof facing the semiconductor package module, with main connection pads which are aligned with the through-holes, and conductive connection members formed in the through-holes and electrically connecting the semiconductor packages with the main connection pads. | 2013-10-03 |
20130256888 | INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME - A interconnect structure includes a first etch stop layer over a substrate, a dielectric layer over the first etch stop layer, a conductor in the dielectric layer, and a second etch stop layer over the dielectric layer. The dielectric layer contains carbon and has a top portion and a bottom potion. A difference of C content in the top portion and the bottom potion is less than 2 at %. An oxygen content in a surface of the conductor is less than about 1 at %. | 2013-10-03 |
20130256889 | SUBSTRATE AND SEMICONDUCTOR DEVICE - A substrate includes a base member having a predetermined thickness, and an electrode array provided in one surface in a thickness direction of the base member and having a plurality of electrodes arranged two-dimensionally in a plan view, and the electrode array includes a central portion and an incremental region provided around the central portion in the planar view and is formed so that a height of the electrodes in the incremental region gradually increase as approaching toward the central portion. | 2013-10-03 |
20130256890 | SHALLOW VIA FORMATION BY OXIDATION - A method, and an apparatus formed thereby, to construct shallow recessed wells on top of exposed conductive vias on the surface of a semiconductor. The shallow recessed wells are subsequently filled with a conductive cap layer, such as a tantalum nitride (TaN) layer, to prevent or reduce oxidation which may otherwise occur naturally when exposed to air, or possibly occur during an under-bump metallization process. | 2013-10-03 |
20130256891 | SEMICONDUCTOR DEVICE WITH A COPPER LINE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device with a copper line comprises a lower portion of a copper pattern buried in an interlayer insulating film, an upper portion of the copper disposed over the upper portion of the lower copper pattern, and an upper barrier metal layer disposed over upper and side surfaces of the upper copper pattern. As a result, the copper pattern is protected by the barrier metal layers, providing a metal line with a stable structure. | 2013-10-03 |
20130256892 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel, and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device. | 2013-10-03 |
20130256893 | BONDING PAD STRUCTURE WITH DENSE VIA ARRAY - A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is formed in a second dielectric layer and disposed over the first conductive island. A second conductive island is formed in a third dielectric layer and disposed over the first via array. A bonding pad is disposed over the second conductive island. The first conductive island, the first via array, and the second conductive island are electrically connected to the bonding pad. The first via array is connected to no other conductive island in the first dielectric layer except the first conductive island. No other conductive island in the third dielectric layer is connected to the first via array except the second conductive island. | 2013-10-03 |
20130256894 | Porous Metallic Film as Die Attach and Interconnect - One exemplary disclosed embodiment comprises a sintered porous metallic film as a die attach mechanically connecting a backside of a semiconductor die to a substrate of a package. Another exemplary disclosed embodiment comprises a sintered porous metallic film as an electrical connection between an electrode on an active surface of a semiconductor die and a substrate of a package. The porous metallic film may be integrated as a prefabricated film or may be created at the wafer or substrate level. By providing a conformal bond through the presence of pores in the metallic film, the sintered connection can provide a reliable mechanical connection with a lower effective elastic modulus. Thermal expansion stresses between die and substrate are thereby accommodated for robustness against thermal cycling, which is of particular relevance for high performance power modules and automotive applications. | 2013-10-03 |
20130256895 | STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT - A method of manufacturing is provided that includes fabricating a first set of interconnect structures on a side of a first semiconductor substrate. The first semiconductor substrate is operable to have at least one of plural semiconductor substrates stacked on the side. The first set of interconnect structures is arranged in a pattern. Each of the plural semiconductor substrates has a second set of interconnect structures arranged in the pattern, one of the plural semiconductor substrates has a smallest footprint of the plural semiconductor substrates. The pattern has a footprint smaller than the smallest footprint of the plural semiconductor substrates. | 2013-10-03 |
20130256896 | VERTICAL MOUNT PACKAGE AND WAFER LEVEL PACKAGING THEREFOR - Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads. | 2013-10-03 |
20130256897 | SUBSTRATE AND SEMICONDUCTOR DEVICE - A substrate may include: a base material having a predetermined thickness; an electrode section formed on one side surface in a thickness direction of the base material, and having a plurality of electrodes; and a concave section formed on at least a part of the surface on which the electrode section is formed, on the base material. | 2013-10-03 |
20130256898 | Optimizing Layout of Irregular Structures in Regular Layout Context - A plurality of regular wires are formed within a given chip level, each having a linear-shape with a length extending in a first direction and a width extending in a second direction perpendicular to the first direction. The plurality of regular wires are positioned according to a fixed pitch such that a distance as measured in the second direction between lengthwise centerlines of any two regular wires is an integer multiple of the fixed pitch. At least one irregular wire is formed within the given chip level and within a region bounded by the plurality of regular wires. Each irregular wire has a linear-shape with a length extending in the first direction and a width extending in the second direction. A distance as measured in the second direction between lengthwise centerlines of any irregular wire and any regular wire is not equal to an integer multiple of the fixed pitch. | 2013-10-03 |
20130256899 | METHODS AND APPARATUSES TO FORM SELF-ALIGNED CAPS - At least one conductive line in a dielectric layer over a substrate is recessed to form a channel. The channel is self-aligned to the conductive line. The channel can be formed by etching the conductive line to a predetermined depth using a chemistry comprising an inhibitor to provide uniformity of etching independent of a crystallographic orientation. A capping layer to prevent electromigration is deposited on the recessed conductive line in the channel. The channel is configured to contain the capping layer within the width of the conductive line. | 2013-10-03 |
20130256900 | ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF - A method of forming a buried die module includes providing an initial laminate flex layer and forming a die opening through the initial laminate flex layer. A first uncut laminate flex layer is secured to the first surface of the initial laminate flex layer via an adhesive and a die is positioned within the die opening of the initial laminate flex layer. A second uncut laminate flex layer is secured to the second surface of the initial laminate flex layer via an adhesive and the adhesive between each pair of neighboring layers is cured. A plurality of vias and metal interconnects are formed in and on the first and second uncut laminate flex layers, with each of the metal interconnects extending through a respective via and being directly metalized to a metal interconnect on the initial laminate flex layer or a die pad on the die. | 2013-10-03 |
20130256901 | METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING SUBSTRATE CONTACTS AND INTEGRATED CIRCUITS HAVING SUBSTRATE CONTACTS - Methods for fabricating integrated circuits having substrate contacts and integrated circuits having substrate contacts are provided. One method includes forming a first trench in a SOI substrate extending through a buried insulating layer to a silicon substrate. A metal silicide region is formed in the silicon substrate exposed by the first trench. A first stress-inducing layer is formed overlying the metal silicide region. A second stress-inducing layer is formed overlying the first stress-inducing layer. An ILD layer of dielectric material is formed overlying the second stress-inducing layer. A second trench is formed extending through the ILD layer and the first and second stress-inducing layers to the metal silicide region. The second trench is filled with a conductive material. | 2013-10-03 |
20130256902 | INTERCONNECT STRUCTURE HAVING SMALLER TRANSITION LAYER VIA - An interconnect structure including a bottom layer over a substrate, where the bottom layer includes at least one bottom layer line and at least one bottom layer via. The interconnect structure further includes a transition layer over the bottom layer, where the transition layer includes at least one transition layer line and at least one transition layer via. The interconnect structure further includes a top layer over the transition layer, where the top layer includes at least one top layer line and at least one top layer via. The at least one transition layer via has a cross sectional area at least 30% less than a cross sectional area of the at least one top layer via. | 2013-10-03 |
20130256903 | INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME - A interconnect structure includes a conductive layer formed in a dielectric layer. An adhesion layer is formed between the dielectric layer and a substrate. The adhesion layer has a carbon content ratio greater than a carbon content ratio of the dielectric layer. | 2013-10-03 |
20130256904 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed. A semiconductor device includes a contact hole formed over a semiconductor substrate so as to open an active region, a contact plug coupled to the active region in the contact hole and having a height lower than that of the contact hole, and a bit line that is coupled to the contact plug and has the same width as the contact plug. When forming a bit line of a cell region, a barrier metal layer is formed between a bit line contact plug and a bit line conductive layer, such that interfacial resistance is reduced, a thickness of the bit line conductive layer is increased, conductivity is improved, and the height of overall bit line is reduced, resulting in reduction in parasitic capacitance. | 2013-10-03 |
20130256905 | Monolithic Power Converter Package with Through Substrate Vias - According to an exemplary embodiment, a monolithic power converter package includes a monolithic die over a substrate, the monolithic die integrating a driver integrated circuit (IC) with a control power transistor and a sync power transistor connected in a half-bridge. The high side power input and a power output of the half-bridge each are disposed on a top surface of the monolithic die. The high side power input is electrically coupled to the substrate through a high side power connection. The power output is electrically coupled to the substrate through a power output connection. The low side power input of the half-bridge comprises a plurality of through substrate vias that extend through the monolithic die to electrically connect a low side power pad to the monolithic die. | 2013-10-03 |
20130256906 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME - A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad. | 2013-10-03 |
20130256907 | BONDED PROCESSED SEMICONDUCTOR STRUCTURES AND CARRIERS - Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be processed while using the carrier die or wafer to handle the semiconductor structure. The semiconductor structure may be bonded to another semiconductor structure, and the carrier die or wafer may be divided along the weakened region therein. Bonded semiconductor structures are fabricated using such methods. | 2013-10-03 |
20130256908 | INTER-DIE CONNECTION WITHIN AN INTEGRATED CIRCUIT FORMED OF A STACK OF CIRCUIT DIES - An integrated circuit is formed of a plurality of circuit dies | 2013-10-03 |
20130256909 | PATTERNED ADHESIVE TAPE FOR BACKGRINDING PROCESSES - The present disclosure relates to the field of fabricating microelectronic devices, wherein a microelectronic device substrate, such as a microelectronic wafer, may be thinned by a backgrinding process using a patterned adhesive tape that reduces slurry seepage and adhesive contamination. The patterned adhesive tape may comprise a base film and adhesive material patterned on the base film such that an edge or periphery portion of the microelectronic device substrate may contact the adhesive material, but substantially no adhesive material contacts interconnectors formed on the microelectronic device substrate. | 2013-10-03 |
20130256910 | 3D INTERCONNECT STRUCTURE COMPRISING FINE PITCH SINGLE DAMASCENE BACKSIDE METAL REDISTRIBUTION LINES COMBINED WITH THROUGH-SILICON VIAS - A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through-silicon vias (TSVs) and using a single damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow. | 2013-10-03 |
20130256911 | SEMICONDUCTOR CHIP STACK PACKAGE AND MANUFACTURING METHOD THEREOF - The present invention relates to a semiconductor chip stack package and a manufacturing method thereof, and more particularly, to a semiconductor chip stack package and a manufacturing method thereof in which a plurality of chips can be rapidly arranged and bonded without a precise device or operation so as to improve productivity | 2013-10-03 |
20130256912 | CHIP ARRANGEMENT AND A METHOD FOR FORMING A CHIP ARRANGEMENT - A chip arrangement is provided. The chip arrangement includes: a first chip electrically connected to the first chip carrier top side; a second chip electrically connected to the second chip carrier top side; and electrically insulating material configured to at least partially surround the first chip carrier and the second chip carrier; at least one electrical interconnect configured to electrically contact the first chip to the second chip through the electrically insulating material; one or more first electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier top side and second chip carrier top side, and one or more second electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier bottom side and second chip carrier bottom side. | 2013-10-03 |
20130256913 | DIE STACKING WITH COUPLED ELECTRICAL INTERCONNECTS TO ALIGN PROXIMITY INTERCONNECTS - A method of manufacturing is provided that includes forming a first proximity interconnect on a first side of a first semiconductor chip and a first plurality of interconnect structures projecting from the first side. A second proximity interconnect is formed on a second side of a second semiconductor chip and a second plurality of interconnect structures are formed projecting from the second side. The second semiconductor chip is coupled to the first semiconductor chip so that the second side faces the first side and the first interconnect structures are coupled to the second interconnect structures. The first and second proximity interconnects cooperate to provide a proximity interface. The coupling of the first interconnect structures to the second interconnect structures provides desired vertical and lateral alignment of the first and second proximity interconnects. | 2013-10-03 |
20130256914 | PACKAGE ON PACKAGE STRUCTURES AND METHODS FOR FORMING THE SAME - The described embodiments of forming bonding structures for package on package involves removing a portion of connectors and molding compound of the lower package. The described bonding mechanisms enable easier placement and alignment of connectors of an upper package to with connector of a lower package. As a result, the process window of the bonding process is wider. In addition, the bonding structures have smoother join profile and planar joint plane. As a result, the bonding structures are less likely to crack and also are less likely to crack. Both the yield and the form factor of the package on package structure are improved. | 2013-10-03 |
20130256915 | PACKAGING SUBSTRATE, SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A semiconductor package includes a packaging substrate having a die attach area, a plurality of flow-guiding blocks disposed around an outer periphery of the die attach area, a first semiconductor element mounted on the die attach area, a second semiconductor element mounted on the first semiconductor element, and an underfill formed between the packaging substrate and the second semiconductor element. During filling of the underfill between the packaging substrate and the second semiconductor element, the flow-guiding blocks can guide a portion of the underfill to flow between the first semiconductor element and the second semiconductor element such that only one dispensing process is required for the underfill to completely encapsulate all conductive bumps used for flip-chip interconnection, thereby simplifying the fabrication process and improving the production efficiency. | 2013-10-03 |
20130256916 | SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING SEMICONDUCTOR PACKAGES - A semiconductor package including a mounting substrate, a first semiconductor chip mounted on an upper surface of the mounting substrate, a unit package stacked on the first semiconductor chip may be provided. The unit package includes a package substrate and a second semiconductor chip mounted on the package substrate. A plurality of bonding wires connects bonding pads of the mounting substrate and connection pads of the unit package, thereby electrically connecting the first and second semiconductor chips to each other. A molding member is provided on the mounting substrate to cover the first semiconductor chip and the unit package. | 2013-10-03 |
20130256917 | SEMICONDUCTOR PACKAGES - A semiconductor package includes a master chip and a slave chip stacked on a substrate. The master chip and the slave chip are connected to one another by a bonding wire. The master chip and the slave chip are connected in series with an external circuit. The semiconductor package may have a low loading factor and excellent performance, and may be mass produced at low costs. | 2013-10-03 |
20130256918 | DEVICE - A semiconductor device includes a wiring board, a first semiconductor chip mounted on the wiring board via a first adhesive member, and second semiconductor chip stacked on the first semiconductor chip via a second adhesive member. The first adhesive member is a die attach film having an adhesive layer formed on both surfaces of an insulating base, and the second adhesive member is an adhesive paste. | 2013-10-03 |
20130256919 | MULTIFUNCTION SENSOR AS POP MICROWAVE PCB - A method for producing a component with at least one micro-structured or nano-structured element includes applying at least one micro-structured or nano-structured element to a carrier. The element has at least one area configure to make contact and the element is applied to the carrier such that the at least one area adjoins the carrier. The element is enveloped in an enveloping compound and the element-enveloping compound composite is detached from the carrier. A first layer comprising electrically conductive areas is applied to the side of the element-enveloping compound composite that previously adjoined the carrier. At least one passage is introduced into the enveloping compound. A conductor layer is applied to the surface of the passage and at least to a section of the layer comprising the first electrically conductive areas to generate a through contact, which enables space-saving contacting. A component is formed from the method. | 2013-10-03 |
20130256920 | SEMICONDUCTOR DEVICE - A semiconductor device in one embodiment includes a chip-mount substrate, a first semiconductor chip mounted on the chip-mount substrate, and a second semiconductor chip mounted adjacent to the first semiconductor chip on the chip-mount substrate. | 2013-10-03 |
20130256921 | Deformable Network Structure - Disclosed herein is a deformable network structure, which includes a first device portion, a second device portion and at least one connector interconnecting between the first device portion and the second device portion. Moreover, the second device portion can be electrically connected to the first device portion through one of the connectors. The first and second device portions respectively have a first and a second center. Each of the connectors may be deformable from an initial state to a final state, such that a first distance between the first and second centers in the final state varies by at least 10% of a second distance between the first and second centers in the initial state. | 2013-10-03 |
20130256922 | Method for Fabricating a Semiconductor Device - In a method for fabricating a semiconductor device, a carrier and at least one semiconductor chip are provided. | 2013-10-03 |
20130256923 | Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and Pressure - A semiconductor wafer has a plurality of semiconductor die distributed over a surface area. The semiconductor die are singulated from the semiconductor wafer. The semiconductor die are mounted to a carrier to form a reconstituted semiconductor wafer. The carrier has a surface area 10-50% larger than the surface area of the semiconductor wafer. The number of semiconductor die mounted to the carrier is greater than a number of semiconductor die singulated from the semiconductor wafer. The reconstituted wafer is mounted within a chase mold. The chase mold is closed with the semiconductor die disposed within a cavity of the chase mold. An encapsulant is dispersed around the semiconductor die within the cavity under temperature and pressure. The encapsulant can be injected into the cavity of the chase mold. The reconstituted wafer is removed from the chase mold. An interconnect structure is formed over the reconstituted wafer. | 2013-10-03 |
20130256924 | LIQUID TREATING DEVICE - A liquid treating device includes a liquid guide cylinder having liquid suction and ejection ports, a liquid supply unit that supplies liquid to the liquid suction port, a pumping-up unit that is provided within the liquid guide cylinder and suctions liquid from the liquid suction port and ejecting liquid from the liquid ejection port, a liquid ejection space part that enlarges liquid, which has been ejected from the liquid ejection port by the pumping-up unit, in an upper part of a closed tank, a gas supply unit that supplies gas in the liquid ejection space part under pressure, a reflux passage that circulates liquid from the liquid ejection space part through space between the tank and the liquid guide cylinder to a lower part of the liquid guide cylinder, and treated liquid taking-out piping that takes out treated liquid from a lower part of the tank to an exterior. | 2013-10-03 |
20130256925 | CASCADE AERATOR ASSEMBLY - An improved cascade aerator is disclosed, comprising a trough having a low profile slope, whereby the trough is divided into a plurality of adjacent longitudinal channels. In one embodiment, a plurality of low head baffles are mounted in spaced relationship and transversely of the longitudinal channels and are spaced apart from the floor of the trough. | 2013-10-03 |
20130256926 | Method for Making Optical Sensor - Disclosed are processes of method for making an optical sensor. The processes comprises the steps as follow: provide a carrier; mount an infrared ambient light detector, a proximity sensor and an infrared light emitter on the carrier; place a polymer layer on the carrier for fully coving the infrared ambient light detector, the proximity sensor and the infrared light emitter; provide a metal mold and press the polymer layer by metal mold for forming a first lens covering the infrared ambient light detector and the proximity sensor, a second lens coving the infrared light emitter, and a fixing concave positioned between the first and second lenses; insert and fix a light blocking element in the fixing concave for contributing to the minimization of crosstalk between the infrared ambient light detector and the infrared light emitter. | 2013-10-03 |
20130256927 | LENS AND LENS FABRICATION METHOD - Provided is a lens fabrication method including filling liquid-phase resin in a first mold, primarily hardening the liquid-phase resin by heating the liquid-phase resin, secondarily hardening the primarily-hardened resin by irradiating Ultraviolet (UV) rays to the primarily-hardened resin to form a lens, and separating the lens from the first mold. | 2013-10-03 |
20130256928 | Drug-Containing Bioabsorbable Fibers and Implants - Methods for producing drug-containing bioabsorbable fibers. Also disclosed are methods for treating diseases using a bioabsorbable drug delivery device. | 2013-10-03 |
20130256929 | METHOD AND DEVICE FOR PRODUCING AND TREATING PELLETS - The invention relates to a method and a device for producing and treating plastic pellets. According to said method, a melt of the plastic material is granulated to give pellets, the pellets are cooled in a cooling fluid, the pellets are separated from the cooling fluid and the pellets are crystallized. The device according to the invention is characterized by comprising a control unit which monitors the crystallization step and controls the method in such a manner that, in case of a disturbance of crystallization, the pellets are supplied to an intermediate storage alter separation of the pellets from the cooling fluid and, as soon as the disturbance is removed, the pellets temporarily stored in the intermediate storage are supplied to crystallization and are crystallized. | 2013-10-03 |
20130256930 | METHOD AND DEVICE FOR MANUFACTURING NANOFIBER - Provided is a nano-fiber manufacturing apparatus capable of mass-producing nano-fibers having uniform quality at a low manufacturing cost. The nano-fiber manufacturing apparatus is equipped with a nozzle block having a plurality of upward nozzles and a polymer solution supply channel. The nano-fiber manufacturing apparatus field-emits the nano-fibers while overflowing the polymer solution from the upward nozzles, and at the same time, collects the overflowed polymer solution so as to reuse it. The nano-fiber manufacturing apparatus is additionally equipped with a raw material tank, regeneration tanks, a middle tank, a first transfer device for transferring the polymer solution to the regeneration tanks, a second transfer device for transferring the polymer solution to the middle tank, and first and second transfer control devices for controlling the transfer operations of the first and second transfer devices. | 2013-10-03 |
20130256931 | METHOD FOR MAKING SOLID BEADS - A method of forming solid beads, the method comprising: | 2013-10-03 |
20130256932 | METHOD FOR PREPARING A HEMISPHERE-SHAPED DOSAGE FORM CONTAINING DRUG AND APPLICATIONS THEREOF - A method for preparing a hemisphere-shaped dosage form containing drug. A high molecular weight solution containing the drug is prepared, and the solution is then dropped onto a base material. The interface phenomenon between the solution and different base materials causes the solution to form a hemisphere-shaped liquid drop dosage. After solidifying by cross-link or evaporation, a hemisphere-shaped dosage form containing drug is obtained. The advantages of the preparation method are a simple and fast process, and simple operation. Applications of the preparation method to prepare a hemisphere-shaped dosage form containing drug are also provide. | 2013-10-03 |
20130256933 | MICROPOROUS POLYETHYLENE MEMBRANE, ITS PRODUCTION METHOD AND BATTERY SEPARATOR - A microporous polyethylene membrane made of a polyethylene resin comprising 15% or less by mass of ultra-high-molecular-weight polyethylene having a mass-average molecular weight of 1×10 | 2013-10-03 |
20130256934 | METHOD OF MANUFACTURING A WOOL PILE FABRIC PRODUCT - A method of manufacturing a component for an article of footwear including providing a two-part mold, inserting a first material layer in the mold, pouring a polyurethane layer on the first material layer, placing a piece of a wool pile fabric on the polyurethane layer and closing the mold for a designated period of time for forming a wool pile fabric component such as a footwear insole. After the designated period of time the mold is opened and the molded wool pile fabric component is removed from the mold. | 2013-10-03 |
20130256935 | METHOD OF DEWATERING IN A CONTINUOUS HIGH INTERNAL PHASE EMULSION FOAM FORMING PROCESS - A method for continuous High Internal Phase Emulsion (HIPE) foam production. A HIPE is produced then extruded onto a belt. After polymerization, a portion of the saturated aqueous phase is removed using a vacuum box. A nip insert is inserted under the vacuum box to raise the vacuum box leading to improved uniformity of the HIPE in the cross direction along the belt. | 2013-10-03 |
20130256936 | METHOD FOR MANUFACTURING VENTILATION CLOTH HAVING SUEDE EFFECTS - A method for manufacturing ventilation cloth having suede effects temporarily combines a film layer to an upper surface of a metal net via a temporary combining device. A plurality of apertures of a suction mold allow the film layer above meshes of the metal net to be strongly sucked, thereby contributing to rough edges and breaking holes. The rough edges go through the meshes and extend to a lower surface of the metal net. Subsequently, the suede effects are achieved along with the benefit of ventilation and prevention of peep. | 2013-10-03 |
20130256937 | POLYMER LOCALLY COMPRISING CONDUCTIVE AREAS - A method for producing a conductive area in a polymer material comprises: providing a polymer layer comprising conductive particles with a density such that the polymer layer is insulating, heating the polymer material to a temperature higher than or equal to the glass transition temperature of the polymer material, compressing a portion of the polymer layer using a stamp, in order to obtain a density of conductive particles such that the portion becomes conductive, and removing the stamp from the polymer layer. | 2013-10-03 |
20130256938 | METHOD OF PRODUCING FRICTION MATERIAL - Provided is a method of producing a friction material that can prevent occurrence of dust generation and segregation at the time of mixing raw materials of the friction material and that is resistant to deterioration of the friction material even when a phenol resin is employed as a binder and that also allows the production process to be effected safely and speedily and at a low cost. The method includes a mixing step (A) for stirring the raw materials for the friction material containing a high-ortho phenol resin, slaked lime and 3-10 wt. % of water and a forming step (B) for forming a mixture powder obtained from the mixing step (A) to a desired shape at room temperature. | 2013-10-03 |
20130256939 | METHODS AND SYSTEMS FOR UTILIZING CARBIDE LIME - Methods and systems are provided for producing a carbonate precipitation material comprising stable or reactive vaterite from carbide lime that provides both a source of divalent cations (Ca | 2013-10-03 |
20130256940 | SYSTEM AND METHOD FOR PRODUCING BONDED FIBER/CELLULOSE PRODUCTS - A system and method of producing both loose cellulose insulation and bonded fiber/cellulose insulation products utilizing shredded paper particles, including making shredded paper particles in a shredded paper particle line and diverting a portion of the shredded paper particles to a bonded fiber/cellulose product line whereby the shredded paper particle line forms an in-process production and delivery of shredded paper particles to the bonded fiber/cellulose product line. Moisture is added to the shredded paper particles at the bonded fiber/cellulose product line, and bonded fiber/cellulose insulation products are produced with the bonded fiber/cellulose product line from the diverted portion of shredded paper particles and loose cellulose insulation is produced from shredded paper particles that are not diverted from the shredded paper particle line. | 2013-10-03 |
20130256941 | METHOD FOR PRODUCING A SUBSTANTIALLY SHELL-SHAPED, FIBER-REINFORCED PLASTIC PART - A method for producing a substantially shell-shaped, fiber-reinforced plastic part includes preheating a material blank that is formed of a fibrous material impregnated with a matrix material using a heating device to ensure the formability and placing the preheated material blank into a shaping tool having an upper die and a lower die. The shaping tool is then closed to form the material blank. Using a cooling device, at least one shaping surface of the shaping tool, with the material blank inserted, is at least partially cooled. | 2013-10-03 |
20130256942 | Process for Producing Milk Protein Fibers and Milk Protein Fiber Products Obtained Therefrom - Milk protein fibers are produced by an extrusion process for the textile industry inter alia, in which at least one thermoplasticizable protein obtained from milk is plasticized with a plasticizer, for example water or glycerol, at temperatures between room temperature and 140° C., under mechanical stress and spun to fibers by means of a jet. | 2013-10-03 |
20130256943 | METHOD FOR PRODUCING THREE-LAYER CO-EXTRUDED POLYIMIDE FILM - In the present invention, (i) a polyamic acid solution for forming a thermoplastic polyimide layer to be in no contact with a support contains no chemical dehydrating agent or imidization catalyst, (ii) a polyamic acid solution for forming a thermoplastic polyimide layer to be in contact with the support contains an imidization catalyst, and (iii) a polyamic acid solution for forming a non-thermoplastic polyimide layer contains a chemical dehydrating agent and an imidization catalyst. This arrangement eliminates a property difference between the thermoplastic polyimide layers. | 2013-10-03 |
20130256944 | METHOD OF MAKING ARTICLES WITH SUPER-HYDROPHOBIC AND/OR SELF-CLEANING SURFACES - Super-hydrophobic and self-cleaning articles produced by imprinting exposed surfaces with suitable fine-grained and/or amorphous metallic embossing dies to transfer a dual surface structure, including ultra-fine features less than or equal to 100 nm embedded in and overlaying a surface topography with macro-surface structures greater than or equal to 1 micron are disclosed. | 2013-10-03 |
20130256945 | Method Of Making A Golf Ball - The disclosure provides a method of making a golf ball with a reduced gate defect. The method may include using a mold that has a mold cavity with a mold chamber with a surface and a parting edge disposed along the perimeter of mold chamber. At least one gate may be disposed on the parting edge to provide a path for a cover material to be injected into the mold chamber. The gate may include a flat middle surface connected by a first side surface and a second side surface disposed opposite the first side surface. A round having a radius of curvature ranging from about 0.2 mm to about 0.5 mm may be disposed along a middle gate edge of middle surface and/or a side gate edge of one of the first side surface and the second side surface. | 2013-10-03 |
20130256946 | Mold With Midplate And Method Of Molding Golf Ball - A mold for manufacturing hemispherical sections for a golf ball includes a first mold plate including a first cavity, a second mold plate including a second cavity, and a midplate. The midplate includes an indentation on a first side of the midplate and a projection on a second side of the midplate. The indentation of the midplate corresponds to the first cavity of the first mold plate. The projection of the midplate corresponds to the second cavity of the second mold plate. | 2013-10-03 |
20130256947 | MOLDABLE THERMOPLASTIC INSERTS - An apparatus for cushioning and protecting body parts of a human or animal is described. The apparatus includes a blend of dual durometer resilient flexible materials with a plurality of degrees of hardness to personalize the properties of comfort, proper fit, structure, and protection. The resilient flexible materials comprise thermoplastic, thermoset, casting, curing, epoxy, or resin materials, and a soft part is customizable. | 2013-10-03 |
20130256948 | GOLF BALL MOLD AND GOLF BALL MANUFACTURING METHOD - A golf ball mold that includes a mold body configured as a plurality of mold parts which have at least a parting surface that defines a parting line at a golf ball equator and removably mate to form a cavity having an inner wall with a plurality of dimple-forming protrusions thereon is provided. The golf ball mold includes a support pin which has an end face with a plurality of dimple-forming protrusions thereon and is extendable into and retractable from the cavity. The support pin extends into the cavity to support a center sphere and, when in a retracted state, the end face thereof defines a portion of the inner wall of the cavity. The end face of the support pin includes a pole of the cavity and has a peripheral edge which intersects a parallel of latitude at 10 degrees from the pole. | 2013-10-03 |
20130256949 | Mold for Creating Negative Draft Surfaces in Molded Items and Method of Molding - A one-piece mold can be used to form molded items that incorporate features or encroachments with negative draft angles, and such molded items can be removed from the mold in a single piece by lifting, tilting, or pulling, or a combination thereof, without breaking the mold or the item to be molded. The mold and method of molding are suited to a bathtub or shower unit. The mold and method of molding permit the removal of molded items with negative draft angles by coordinating the angle of the sump front wall and sump back wall with the angles of other encroachments in the molded item within specified ranges that permit one-piece removal of the item to be molded from the mold. | 2013-10-03 |
20130256950 | INJECTION MOLDING MACHINE HAVING A TIE BAR ENGAGEMENT APPARATUS AND METHOD OF OPERATING SAME - An injection molding machine includes a base and an injection unit mounted to the base, and a first platen for holding a first mold section and a second platen for holding a second mold section. The first and second platens are supported by the base, and are movable along a machine axis between mold-open and mold-closed positions. At least a first tie bar engagement apparatus is associated with a first tie bar and includes a first bore in the first platen for receiving the respective tie bar therethrough at least when the platens are in the mold-closed position; and a first roller mounted to the first platen proximate the first bore. The first roller is rotatable about a first roller axis that is oriented horizontally and perpendicular to the machine axis. | 2013-10-03 |
20130256951 | Shaping tool for producing a substantially shell-shaped, fiber-reinforced plastic part - A shaping tool is constructed for producing a substantially shell-shaped, fiber-reinforced plastic part. The shaping toll includes and upper die and a lower die. A material blank made substantially of fibrous material is placed into the lower die the shaping tool brought into shaping engagement with the material blank. At least one of the dies is segmented into shaping segments for being brought into shaping engagement with the material blank in segments or in groups of segments. | 2013-10-03 |
20130256952 | BUBBLER BASE - A bubbler base or base body for accepting a bubbler tube that has an externally threaded section at one end of the bubbler tube. The bubbler base of this invention can be used to quickly attach the bubbler base already connected to a bubbler tube, without the need to form an internally threaded bore within a bottom clamp plate which is also referred to as a cooling plate and is conventionally known in the molding tool industry. A conventional bubbler tube can be attached to the bubbler base rather than to the bottom clamp plate or the cooling plate. The bubbler base can have an overall spool shape. An O-ring can be used to seal the bubbler base with respect to the bottom clamp plate or the cooling plate. | 2013-10-03 |
20130256953 | METHOD FOR MANUFACTURING AN OBJECT BY SOLIDIFYING POWDER USING A LASER BEAM WITH THE INSERTION OF A MEMBER FOR ABSORBING DEFORMATIONS - Method for manufacturing an object, includes: a) depositing a first layer of powder onto a work area constituted by a plate; b) compacting the first layer; c) solidifying a first area of the layer compacted in step b) using a laser beam, the area corresponding to a section of the bottom of the finished object; and d) repeating steps a) through c) until the object is obtained. An additional step e) before step c) includes producing, by solidifying a powder using the laser beam, a member for absorbing deformations to be arranged between the work area and an area to be part of an area corresponding to a portion of a bottom of the finished object. The absorption member produced includes a deformable substrate including a plurality of blades capable of connecting a surface of the plate to the first area constituting a surface of a bottom of the object. | 2013-10-03 |
20130256954 | Blown Film Fastening - A method for forming a film of plastic material includes urging molten resin through a die head opening to form a stalk having an extrusion profiled rail of resin material extending radially outward from a tubular wall, the die head opening including an annular orifice that defines a thickness of the tubular wall and a cross-sectional shape of the rail; cutting the rail to form discrete elements while leaving the tubular wall un-punctured; and inflating the stalk with a gas bubble maintained within an interior space of the tubular wall to form a thin film tube. | 2013-10-03 |
20130256955 | METHOD FOR MAKING A RESERVOIR - A process for making a reservoir including steps of positioning a hollow extrudate at an elevated temperature in a mold cavity, inserting a fitting into an end of the extrudate, sealing an outer surface of the fitting with an interior surface of the extrudate using latent heat within the extrudate, and forming at least a portion of the extrudate against the mold cavity forming a reservoir with the fitting sealed into the reservoir. | 2013-10-03 |
20130256956 | VACUUM MOLD HAVING REVERSE SOLID PATTERN, AND VACUUM-FORMING METHOD USING THE SAME - Provided is a vacuum mold having a reverse solid pattern, which enables an insert sheet to be vacuum-formed, and a solid pattern to be transferred to the insert sheet. The vacuum mold having the reverse solid pattern includes: a lower mold; and a solid pattern disposed on the surface of the lower mold. The insert sheet disposed above the lower mold is adsorbed to the surface of the lower mold by vacuum pressure in order to transfer a pattern of the solid pattern to the insert sheet. | 2013-10-03 |
20130256957 | TRANSLUCENT ALUMINA AND METHOD FOR PRODUCING TRANSLUCENT ALUMINA - A translucent alumina has an alumina content of 99.98% by mass or more and a density of 3.97 g/cm | 2013-10-03 |
20130256958 | CELLULAR CERAMIC ARTICLES WITH COATED CHANNELS AND METHODS FOR MAKING THE SAME - Cellular ceramic articles are manufactured from a green cellular ceramic body that includes a binder material and a plurality of channels. At least one of the channels is coated with a slurry that includes a green coating composition and a solvent to form a coating layer. The binder material is insoluble in the solvent. | 2013-10-03 |
20130256959 | VIBRATION-ABSORBING MOUNTING DEVICE - A vibration bearing for a vehicle exhaust system includes an elastic damping element and a pretension device which compresses the elastic damping element radially and axially. A first coupling region is formed on the elastic damping element, and a second coupling region is formed on the pretension device. | 2013-10-03 |
20130256960 | ENGINE MOUNT FOR A MOTOR VEHICLE - A switchable mount includes a partition wall which partitions a working chamber from a compensating chamber. A first diaphragm is arranged in the partition wall so as to be deflectable in the longitudinal direction of the mount. A switching actuator controls the diaphragm and, in a first state thereof, the diaphragm is fixed in a rest position and, in a second state thereof, the diaphragm is released to move in the longitudinal direction of the mount. A second diaphragm is arranged in the partition wall and is deflected in the longitudinal direction of the mount to influence the volume of the working chamber. An air chamber is arranged between the first diaphragm and the second diaphragm. In the first state of the actuator, the air chamber is closed off air-tight to the atmosphere and, in the second current-conducting state of the actuator, is connected to the atmosphere. | 2013-10-03 |
20130256961 | VIBRATION ISOLATION SYSTEM - According to one embodiment, a vibration isolation system includes a heater element thermally coupled to a damping element formed of an elastomeric material having an elasticity that varies as a function of its temperature. The damping element physically couples a first structure to a second structure. The heater element selectively heats the damping element to regulate its temperature for controlling the elasticity of the damping element. | 2013-10-03 |
20130256962 | SUBSTRATE PROCESSING SYSTEM HAVING SUSCEPTORLESS SUBSTRATE SUPPORT WITH ENHANCED SUBSTRATE HEATING CONTROL - Methods and apparatus for processing substrates are provided herein. In some embodiments, an apparatus includes a process kit, the process kit comprising a first ring to support a substrate proximate a peripheral edge of the substrate; a second ring disposed about the first ring; and a path formed between the first and second rings that allows the first ring to rotate with respect to the second ring, wherein the path substantially prevents light from travelling between a first volume disposed below the first and second rings and a second volume disposed above the first and second rings. | 2013-10-03 |
20130256963 | Clean cutting board - The “Clean Cutting Board” is a new design in kitchen cutting boards that maintains a cleaner cutting surface and cleaner surrounding area by allowing the liquid and cutting waste to flow into and be placed in the bottom holding tray to be placed directly into the trash without leaving an unsanitary mess making clean up faster and easier. | 2013-10-03 |